TW266272B - - Google Patents
Info
- Publication number
- TW266272B TW266272B TW083100933A TW83100933A TW266272B TW 266272 B TW266272 B TW 266272B TW 083100933 A TW083100933 A TW 083100933A TW 83100933 A TW83100933 A TW 83100933A TW 266272 B TW266272 B TW 266272B
- Authority
- TW
- Taiwan
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
- G06F11/1032—Simple parity
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Detection And Correction Of Errors (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/080,699 US5367526A (en) | 1993-06-22 | 1993-06-22 | Memory module, parity bit emulator, and associated method for parity bit emulation |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW266272B true TW266272B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1995-12-21 |
Family
ID=22159040
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW083100933A TW266272B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1993-06-22 | 1994-02-04 |
Country Status (4)
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR0168896B1 (ko) * | 1993-09-20 | 1999-02-01 | 세키자와 다다시 | 패리티에 의해 에러를 수정할 수 있는 반도체 메모리장치 |
| US5446873A (en) * | 1993-10-15 | 1995-08-29 | Brain Power Co. | Memory checker |
| US5541941A (en) * | 1994-01-28 | 1996-07-30 | International Business Machines Corporation | Method and structure for providing automatic parity sensing |
| US5465262A (en) * | 1994-01-28 | 1995-11-07 | International Business Machines Corporation | Method and structure for providing error correction code and automatic parity sensing |
| GB2289779B (en) * | 1994-05-24 | 1999-04-28 | Intel Corp | Method and apparatus for automatically scrubbing ECC errors in memory via hardware |
| US5477553A (en) * | 1994-07-22 | 1995-12-19 | Professional Computer Systems, Inc. | Compressed memory address parity checking apparatus and method |
| US5586129A (en) * | 1994-11-29 | 1996-12-17 | Brain Power Co. | Parity bit memory simulator |
| GB2290892A (en) * | 1995-04-26 | 1996-01-10 | Memory Corp Plc | Automatic parity detect and generate circuit |
| US5673419A (en) * | 1995-05-19 | 1997-09-30 | Simple Technology, Incorporated | Parity bit emulator with write parity bit checking |
| US5987628A (en) * | 1997-11-26 | 1999-11-16 | Intel Corporation | Method and apparatus for automatically correcting errors detected in a memory subsystem |
| KR100295642B1 (ko) * | 1998-02-07 | 2001-08-07 | 김영환 | 모듈제어회로를구비한메모리모듈 |
| US6052818A (en) * | 1998-02-27 | 2000-04-18 | International Business Machines Corporation | Method and apparatus for ECC bus protection in a computer system with non-parity memory |
| US6425055B1 (en) | 1999-02-24 | 2002-07-23 | Intel Corporation | Way-predicting cache memory |
| US6691241B1 (en) * | 1999-12-21 | 2004-02-10 | Intel Corporation | Delay tuning to improve timing in multi-load systems |
| KR20060073932A (ko) * | 2003-08-12 | 2006-06-29 | 코닌클리즈케 필립스 일렉트로닉스 엔.브이. | 디코더 회로 및 전력 감소 방법 |
| US8250417B2 (en) | 2009-01-14 | 2012-08-21 | Micron Technology, Inc. | Method for detecting flash program failures |
| KR20190046491A (ko) * | 2017-10-26 | 2019-05-07 | 삼성전자주식회사 | 반도체 메모리, 반도체 메모리를 포함하는 메모리 시스템, 그리고 반도체 메모리의 동작 방법 |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3693152A (en) * | 1970-12-21 | 1972-09-19 | Ibm | Error detection circuit for decoders |
| US3992696A (en) * | 1975-06-27 | 1976-11-16 | Bell Telephone Laboratories, Incorporated | Self-checking read and write circuit |
| US4271521A (en) * | 1979-07-09 | 1981-06-02 | The Anaconda Company | Address parity check system |
| US4433388A (en) * | 1980-10-06 | 1984-02-21 | Ncr Corporation | Longitudinal parity |
| US4472805A (en) * | 1982-03-26 | 1984-09-18 | Rca Corporation | Memory system with error storage |
| US4561095A (en) * | 1982-07-19 | 1985-12-24 | Fairchild Camera & Instrument Corporation | High-speed error correcting random access memory system |
| US4528666A (en) * | 1983-01-03 | 1985-07-09 | Texas Instruments Incorporated | Memory system with built in parity |
| US4656605A (en) * | 1983-09-02 | 1987-04-07 | Wang Laboratories, Inc. | Single in-line memory module |
| JPS61134988A (ja) * | 1984-12-04 | 1986-06-23 | Toshiba Corp | 半導体メモリにおける誤り検出訂正機能制御系 |
| US4740971A (en) * | 1986-02-28 | 1988-04-26 | Advanced Micro Devices, Inc. | Tag buffer with testing capability |
| US4809278A (en) * | 1986-04-21 | 1989-02-28 | Unisys Corporation | Specialized parity detection system for wide memory structure |
| JPS62293599A (ja) * | 1986-06-13 | 1987-12-21 | Hitachi Ltd | 半導体記憶装置 |
| US4754457A (en) * | 1986-09-03 | 1988-06-28 | Motorola, Inc. | Digital sequence polarity detection with adaptive synchronization |
| US4884270A (en) * | 1986-12-11 | 1989-11-28 | Texas Instruments Incorporated | Easily cascadable and testable cache memory |
| US4831625A (en) * | 1986-12-11 | 1989-05-16 | Texas Instruments Incorporated | Easily cascadable and testable cache memory |
| JP2583547B2 (ja) * | 1988-01-13 | 1997-02-19 | 株式会社日立製作所 | 半導体メモリ |
| US5040179A (en) * | 1989-08-18 | 1991-08-13 | Loral Aerospace Corp. | High data rate BCH encoder |
| US5117428A (en) * | 1989-11-22 | 1992-05-26 | Unisys Corporation | System for memory data integrity |
| US5088092A (en) * | 1989-11-22 | 1992-02-11 | Unisys Corporation | Width-expansible memory integrity structure |
-
1993
- 1993-06-22 US US08/080,699 patent/US5367526A/en not_active Expired - Fee Related
-
1994
- 1994-02-04 TW TW083100933A patent/TW266272B/zh active
- 1994-04-21 CA CA002121868A patent/CA2121868A1/en not_active Abandoned
- 1994-04-29 GB GB9408583A patent/GB2276744B/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| GB2276744A (en) | 1994-10-05 |
| GB2276744B (en) | 1995-03-22 |
| CA2121868A1 (en) | 1994-12-23 |
| US5367526A (en) | 1994-11-22 |
| GB9408583D0 (en) | 1994-06-22 |