TW255024B - - Google Patents
Info
- Publication number
- TW255024B TW255024B TW083101184A TW83101184A TW255024B TW 255024 B TW255024 B TW 255024B TW 083101184 A TW083101184 A TW 083101184A TW 83101184 A TW83101184 A TW 83101184A TW 255024 B TW255024 B TW 255024B
- Authority
- TW
- Taiwan
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3816—Instruction alignment, e.g. cache line crossing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0877—Cache access modes
- G06F12/0886—Variable-length word access
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/109—Address translation for multiple virtual address spaces, e.g. segmentation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US19338394A | 1994-02-08 | 1994-02-08 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW255024B true TW255024B (zh) | 1995-08-21 |
Family
ID=22713424
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW083101184A TW255024B (zh) | 1994-02-08 | 1994-02-15 |
Country Status (2)
Country | Link |
---|---|
TW (1) | TW255024B (zh) |
WO (1) | WO1995022791A2 (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1029279B1 (de) * | 1998-07-03 | 2006-09-27 | Infineon Technologies AG | Datenspeichervorrichtung |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54122043A (en) * | 1978-03-15 | 1979-09-21 | Toshiba Corp | Electronic computer |
JPS5530727A (en) * | 1978-08-22 | 1980-03-04 | Nec Corp | Information processor |
US4814976C1 (en) * | 1986-12-23 | 2002-06-04 | Mips Tech Inc | Risc computer with unaligned reference handling and method for the same |
US5386531A (en) * | 1991-05-15 | 1995-01-31 | International Business Machines Corporation | Computer system accelerator for multi-word cross-boundary storage access |
-
1994
- 1994-02-15 TW TW083101184A patent/TW255024B/zh not_active IP Right Cessation
-
1995
- 1995-02-08 WO PCT/US1995/001779 patent/WO1995022791A2/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
WO1995022791A2 (en) | 1995-08-24 |
WO1995022791A3 (en) | 1995-09-21 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK4A | Expiration of patent term of an invention patent |