TW202418978A - Laminated structure, element, electronic device, electronic instrument and system - Google Patents

Laminated structure, element, electronic device, electronic instrument and system Download PDF

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TW202418978A
TW202418978A TW112132841A TW112132841A TW202418978A TW 202418978 A TW202418978 A TW 202418978A TW 112132841 A TW112132841 A TW 112132841A TW 112132841 A TW112132841 A TW 112132841A TW 202418978 A TW202418978 A TW 202418978A
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layer
metal
film
aforementioned
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木島健
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日商蓋亞尼克斯股份有限公司
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Abstract

An object of the present invention is to provide a laminated structure, an element, an electronic device, an electronic instrument and a system with excellent bending strength. The present invention use a laminated structure to manufacture a piezoelectric element or a semiconductor element, in which at least a first layer and a second layer are laminated respectively on a crystal substrate, wherein the first layer is composed of a metal compound film, the second layer is composed of a metal film of a metal that will perform martensite transformation by heat treatment or process, and the crystal substrate, the first layer and the second layer are respectively oriented in an approximately same crystal axis direction.

Description

積層構造體、元件、電子器件、電子機器及系統 Laminated structures, components, electronic devices, electronic machines and systems

本發明係關於一種積層構造體、電子器件、電子機器及系統。 The present invention relates to a layered structure, an electronic device, an electronic machine and a system.

已有研究一種由具有較佳之壓電性、強介電質之鋯鈦酸鉛(Pb(Zr,Ti)O3)(以下亦稱PZT)所構成之壓電體薄膜等,壓電體薄膜係應用於非揮發性記憶體(FeRAM)等記憶體元件、噴墨頭或加速度感測器等MEMS(Micro Electro Mechanical Systems,微機電系統)技術。 There has been research on a piezoelectric film made of lead zirconate titanate (Pb(Zr,Ti)O 3 ) (hereinafter also referred to as PZT) which has good piezoelectricity and strong dielectric properties. The piezoelectric film is applied to memory devices such as non-volatile memory (FeRAM), inkjet heads, acceleration sensors and other MEMS (Micro Electro Mechanical Systems) technologies.

近年來,已有研究一種技術,係藉由在朝(100)配向之Si基板上隔著朝(200)配向之ZrO2膜等而形成朝(200)配向之Pt膜,而在Pt膜上形成具有良好之壓電特性的壓電體膜(專利文獻1)。然而,在成膜時或作為壓電元件使用時,會有因彎曲應力而在結晶基板等產生裂縫或破裂等問題,在耐久性或長期使用上並無法充分滿足,而期望有一種耐彎曲應力之壓電元件。 In recent years, a technique has been studied in which a Pt film oriented toward (200) is formed on a Si substrate oriented toward (100) via a ZrO2 film oriented toward (200), thereby forming a piezoelectric film having good piezoelectric properties on the Pt film (Patent Document 1). However, during film formation or when used as a piezoelectric element, cracks or breakage may occur in the crystalline substrate due to bending stress, and durability or long-term use cannot be fully satisfied, and a piezoelectric element that can withstand bending stress is desired.

(先前技術文獻) (Prior technical literature) (專利文獻) (Patent Literature)

專利文獻1:日本特開2015-154015號公報 Patent document 1: Japanese Patent Publication No. 2015-154015

本發明之目的係提供一種彎曲強度佳之積層構造體、元件、電子器件、電子機器及系統。 The purpose of the present invention is to provide a laminated structure, element, electronic device, electronic machine and system with good bending strength.

本發明者為了達成上述目的,經過精心研究之結果,係成功將朝(100)方向配向之由麻田散體轉變之金屬所構成之金屬膜積層在朝(100)方向配向之結晶基板上,並且得知將壓電體膜成膜於上述積層後的結晶基板上時,可實現彎曲強度佳之壓電元件,並發現該種元件係可徹底地解決上述之習知問題者。 In order to achieve the above purpose, the inventors of the present invention have conducted careful research and have successfully laminated a metal film composed of metal transformed from a mathematic bulk oriented in the (100) direction on a crystalline substrate oriented in the (100) direction. It is also known that when a piezoelectric film is formed on the crystalline substrate after the above lamination, a piezoelectric element with good bending strength can be realized. It is also found that such an element can completely solve the above known problems.

再者,本發明等係在得到上述見解之後,進一步反覆地研究而完成本發明。 Furthermore, the present invention was completed after further repeated research after obtaining the above insights.

亦即,本發明係關於以下之發明。 That is, the present invention relates to the following invention.

[1]一種積層構造體,係在結晶基板上分別積層有至少第一層及第二層, [1] A layered structure having at least a first layer and a second layer layered on a crystalline substrate,

前述第一層係由金屬化合物膜所構成, The aforementioned first layer is composed of a metal compound film.

前述第二層係由因熱處理或加工而麻田散體轉變(Martensitic transformation)之金屬的金屬膜所構成,且前述結晶基板、前述第一層及前述第二層係分別朝大致相同之結晶軸方向配向。 The second layer is composed of a metal film of a metal that undergoes Martensitic transformation due to heat treatment or processing, and the crystalline substrate, the first layer, and the second layer are oriented in substantially the same crystal axis direction.

[2]如前述[1]所述之積層構造體,其中,前述金屬係包含Fe。 [2] The layered structure as described in [1] above, wherein the metal comprises Fe.

[3]如前述[1]或[2]所述之積層構造體,其中,前述金屬係包含Cr。 [3] The layered structure as described in [1] or [2] above, wherein the metal contains Cr.

[4]如前述[1]至[3]任一項所述之積層構造體,其中,前述金屬係包含Ni。 [4] A layered structure as described in any one of [1] to [3] above, wherein the metal comprises Ni.

[5]如前述[1]至[4]任一項所述之積層構造體,其中,前述金屬係包含Fe及Cr。 [5] A layered structure as described in any one of [1] to [4] above, wherein the metal comprises Fe and Cr.

[6]如前述[1]至[5]任一項所述之積層構造體,其中,前述金屬係不鏽鋼。 [6] A layered structure as described in any one of [1] to [5] above, wherein the metal is stainless steel.

[7]如前述[1]至[6]任一項所述之積層構造體,其中,前述金屬膜之膜厚係100μm以下。 [7] A multilayer structure as described in any one of [1] to [6] above, wherein the thickness of the metal film is less than 100 μm.

[8]如前述[1]至[7]任一項所述之積層構造體,其中,前述金屬膜之膜厚係1μm至10μm。 [8] A multilayer structure as described in any one of [1] to [7] above, wherein the thickness of the metal film is 1 μm to 10 μm.

[9]如前述[1]至[8]任一項所述之積層構造體,其中,前述金屬化合物膜係包含Hf及/或Zr。 [9] A layered structure as described in any one of [1] to [8] above, wherein the metal compound film contains Hf and/or Zr.

[10]如前述[1]至[9]任一項所述之積層構造體,其中,前述金屬化合物膜係由包含Hf及/或Zr之氧化物或氮化物所構成。 [10] A multilayer structure as described in any one of [1] to [9] above, wherein the metal compound film is composed of an oxide or nitride containing Hf and/or Zr.

[11]如前述[1]至[10]任一項所述之積層構造體,其中,前述結晶軸方向係(100)方向。 [11] A layered structure as described in any one of [1] to [10] above, wherein the crystal axis direction is the (100) direction.

[12]如前述[1]至[11]任一項所述之積層構造體,其中,前述結晶基板係Si基板。 [12] A multilayer structure as described in any one of [1] to [11] above, wherein the crystal substrate is a Si substrate.

[13]如前述[1]至[12]任一項所述之積層構造體,其中,在前述第二層上係隔著第三層及第四層積層有壓電體層或半導體層,前述第三層係由與前述金屬不同之金屬所構成,前述第四層係由導電性金屬氧化物所構成。 [13] A multilayer structure as described in any one of [1] to [12] above, wherein a piezoelectric layer or a semiconductor layer is stacked on the second layer via a third layer and a fourth layer, the third layer is made of a metal different from the metal, and the fourth layer is made of a conductive metal oxide.

[14]前述[13]所述之積層構造體,其中,前述第三層係包含屬於元素週期表第10族或第11族之金屬。 [14] The layered structure described in [13] above, wherein the third layer comprises a metal belonging to Group 10 or Group 11 of the Periodic Table of Elements.

[15]如前述[13]或[14]所述之積層構造體,其中,前述導電性金屬氧化物係包含Sr及/或Ru。 [15] The layered structure as described in [13] or [14] above, wherein the conductive metal oxide contains Sr and/or Ru.

[16]如前述[13]至[15]任一項所述之積層構造體,其中,積層有前述壓電體層,前述壓電體層係包含Pb及Ti。 [16] A layered structure as described in any one of [13] to [15] above, wherein the piezoelectric layer is layered, and the piezoelectric layer contains Pb and Ti.

[17]一種包含積層構造體之元件,其中,前述積層構造體係前述[1]至[16]之任一項所述之積層構造體。 [17] A component comprising a layered structure, wherein the layered structure is a layered structure as described in any one of [1] to [16].

[18]如前述[17]所述之元件,其為壓電體元件或半導體元件。 [18] The element as described in [17] above, which is a piezoelectric element or a semiconductor element.

[19]一種包含元件之電子器件,前述元件係前述[17]或[18]所述之元件。 [19] An electronic device comprising a component, wherein the component is the component described in [17] or [18] above.

[20]一種包含電子器件之電子機器,其中,前述電子器件係前述[19]所述之電子器件。 [20] An electronic machine comprising an electronic device, wherein the electronic device is the electronic device described in [19].

[21]一種包含電子機器之系統,其中,前述電子機器係前述[20]所述之電子機器。 [21] A system comprising an electronic machine, wherein the electronic machine is the electronic machine described in [20].

本發明之積層構造體、元件、電子器件、電子機器及系統係發揮彎曲強度佳之效果。 The multilayer structure, element, electronic device, electronic machine and system of the present invention have good bending strength.

1:結晶基板(Si基板) 1: Crystalline substrate (Si substrate)

2:HfZrN膜 2: HfZrN film

3:SUS膜(FeCrNi膜) 3: SUS film (FeCrNi film)

4:Pt膜 4: Pt film

5:SRO膜 5:SRO membrane

6:壓電體層(PbTiO膜) 6: Piezoelectric layer (PbTiO film)

21:結晶基板(Si基板) 21: Crystalline substrate (Si substrate)

23:SUS膜 23:SUS film

24a:Pt膜 24a:Pt film

24b:Pt膜 24b:Pt film

24c:Pt膜 24c:Pt film

25a:SRO膜 25a:SRO membrane

25b:SRO膜 25b:SRO membrane

25c:SRO膜 25c:SRO membrane

25d:SRO膜 25d:SRO membrane

26a:PZT膜 26a: PZT film

26b:PZT膜 26b: PZT film

28A:懸臂樑 28A: Cantilever beam

28B:懸臂樑 28B: Cantilever beam

29:間隙 29: Gap

30:空洞 30: Hollow

31:結晶基板(Si基板) 31: Crystalline substrate (Si substrate)

32:HfZrN膜 32: HfZrN film

33:SUS膜 33:SUS film

34a:Pt膜 34a:Pt film

34b:Pt膜 34b:Pt film

35a:SRO膜 35a:SRO membrane

35b:SRO膜 35b:SRO membrane

36:PZT膜 36: PZT film

37:絕緣膜 37: Insulation film

38:導電墊片 38: Conductive pad

39:導電路徑 39: Conductive path

40:流路 40: Flow path

41:腔室 41: Chamber

42:鈍化層 42: Passivation layer

1101a至101b:金屬源 1101a to 101b: Metal source

1102a至102j:接地 1102a to 102j: Grounding

1103a至103b:ICP電極 1103a to 103b: ICP electrode

1104a至104b:截止濾波器 1104a to 104b: Cutoff filter

1105a至105b:DC電源 1105a to 105b: DC power supply

1106a至106b:RF電源 1106a to 106b: RF power supply

1107a至107b:燈 1107a to 107b: Lights

1108:Ar源 1108: Ar source

1109:反應性氣體源 1109: Reactive gas source

1110:電源 1110: Power supply

1111:基板保持具 1111: Substrate holder

1112:基板 1112: Substrate

1113:截止濾波器 1113:Cutoff filter

1114:ICP環 1114:ICP Ring

1115:真空槽 1115: Vacuum tank

1116:旋轉軸 1116: Rotation axis

圖1係示意性顯示本發明之積層構造體之較佳實施態樣之一例的圖。 FIG1 is a diagram schematically showing an example of a preferred embodiment of the layered structure of the present invention.

圖2係顯示實施例之XRD繞射圖案的圖。 FIG2 is a diagram showing the XRD diffraction pattern of the embodiment.

圖3係說明試驗例之實施例品之試驗片的圖。 Figure 3 is a diagram illustrating a test piece of an example product of a test example.

圖4係說明試驗例之比較例品之試驗片的圖。 Figure 4 is a diagram illustrating a test piece of a comparative product of a test example.

圖5係顯示試驗例之彎曲強度試驗結果的圖。 Figure 5 is a graph showing the bending strength test results of the test example.

圖6係示意性顯示本發明中之MEMS換能器之實施態樣的較佳一例的圖。 FIG6 is a diagram schematically showing a preferred example of the implementation of the MEMS transducer in the present invention.

圖7係示意性顯示作為本發明適用於流體排出裝置的應用例之具備壓電致動器之晶圓之一部分的剖面圖之一例的圖。 FIG. 7 schematically shows an example of a cross-sectional view of a portion of a wafer having a piezoelectric actuator as an application example of the present invention applicable to a fluid discharge device.

圖8係示意性顯示實施例中適用之成膜裝置的圖。 FIG8 is a diagram schematically showing a film forming device applicable to the embodiment.

本發明之積層構造體之特徵為:在結晶基板上分別積層有至少第一層及第二層,前述第一層係由金屬化合物膜所構成,前述第二層係由因熱處理或加工而麻田散體轉變之金屬的金屬膜所構成,前述結晶基板、前述第一層及前述第二層係分別朝大致相同之結晶軸方向配向。再者,前述結晶軸方向雖無特別地限定,惟較佳為(100)或(111)方向,更佳為(100)方向。 The laminated structure of the present invention is characterized in that at least a first layer and a second layer are laminated on a crystalline substrate, the first layer is composed of a metal compound film, the second layer is composed of a metal film of a metal that is transformed from a bulk metal by heat treatment or processing, and the crystalline substrate, the first layer, and the second layer are oriented in substantially the same crystal axis direction. Furthermore, the crystal axis direction is not particularly limited, but is preferably (100) or (111), and more preferably (100).

前述金屬係只要為藉由熱處理或加工而麻田散體轉變之金屬即可,並無特別地限定,亦可為習知之金屬。前述金屬係通常作為前述金屬膜之主成分而包含在前述金屬膜中。就前述麻田散體轉變之金屬而言,可列舉例如Fe-Cr-Ni、Fe、Fe-Ni、Fe-Ni-Co、Fe-Si、Fe-Cr、Fe-Mn、Fe-Mn-C、Fe-Mn-Ni、Fe-Mn-Cr、Fe-C、Fe-N、Fe-Ni-C、Fe-Cr-C、Fe-Cu-C、Fe-Si-C、Fe-Cr-Ni-C、Co、Co-Ni、Co-Fe、Mn-Cu、In-Tl、In-Tl-Li、Na、Zr、Tl、Hf、Ti、Ti-Al、Ti-Cu、Ti-Cr、Ti-Fe、Ti-Mn、Ti-Mo、Ti-V、Ti-Zr、Ti-Al-V、Zr-U、Cu-Al-Ni、Cu-Al、Ag-Cd、Au-Cd、Au-Cd-Cu、Li、Li-Mg、Cu-Zn、U、U-Cr、Hg等。在本發明中,前述金屬係較佳為包含Fe、Cr或Ni,更佳為包含Fe及Cr,再更佳為不鏽鋼。依據該較佳之範圍,可使彎曲強度成為更佳者。此外,「主成分」係只要前述金屬膜中之前述金屬的原子比為0.5以上之比例即可。在本發明中,前述金屬相對於前述金屬膜中之全部金屬元素的原子比係較佳為0.7以上,更佳為0.8以上。 The metal is not particularly limited as long as it is a metal that can be transformed into a bulk material by heat treatment or processing, and may be a known metal. The metal is usually contained in the metal film as a main component. As for the metals transformed from the aforementioned Matan bulk, for example, there can be listed Fe-Cr-Ni, Fe, Fe-Ni, Fe-Ni-Co, Fe-Si, Fe-Cr, Fe-Mn, Fe-Mn-C, Fe-Mn-Ni, Fe-Mn-Cr, Fe-C, Fe-N, Fe-Ni-C, Fe-Cr-C, Fe-Cu-C, Fe-Si-C, Fe-Cr-Ni-C, Co, Co-Ni, Co-Fe, Mn-Cu, In-Tl, In-Tl-Li, Na, Zr, Tl, Hf, Ti, Ti-Al, Ti-Cu, Ti-Cr, Ti-Fe, Ti-Mn, Ti-Mo, Ti-V, Ti-Zr, Ti-Al-V, Zr-U, Cu-Al-Ni, Cu-Al, Ag-Cd, Au-Cd, Au-Cd-Cu, Li, Li-Mg, Cu-Zn, U, U-Cr, Hg, etc. In the present invention, the aforementioned metal is preferably Fe, Cr or Ni, more preferably Fe and Cr, and even more preferably stainless steel. According to the preferred range, the bending strength can be made better. In addition, the "main component" is as long as the atomic ratio of the aforementioned metal in the aforementioned metal film is 0.5 or more. In the present invention, the atomic ratio of the aforementioned metal relative to all metal elements in the aforementioned metal film is preferably 0.7 or more, and more preferably 0.8 or more.

並且,在本發明中,前述金屬膜係較佳為朝(100)方向配向。前述之「朝(100)方向配向」係指藉由X線繞射法而檢測出之結晶方位角朝(100)方向配向即可,更具體而言,只要(100)方向相對於藉由X線繞射法而檢測出之前述金屬膜的全峰值的峰值比為50%以上即可,前述峰值比係較佳為90%以上。 Furthermore, in the present invention, the aforementioned metal film is preferably oriented toward the (100) direction. The aforementioned "oriented toward the (100) direction" means that the crystal azimuth angle detected by the X-ray diffraction method is oriented toward the (100) direction. More specifically, as long as the peak ratio of the (100) direction relative to the total peak value of the aforementioned metal film detected by the X-ray diffraction method is 50% or more, the aforementioned peak ratio is preferably 90% or more.

在本發明中,前述金屬膜之膜厚係較佳為100μm以下,更佳為膜厚1μm至10μm。依據該較佳之範圍,就功能膜之結晶成長用中間膜而言,係為更佳者。 In the present invention, the thickness of the aforementioned metal film is preferably less than 100μm, and more preferably 1μm to 10μm. According to the preferred range, it is better for the intermediate film used for crystal growth of functional film.

前述金屬膜係朝例如Si基板等方向結晶基板上之(100)方向,藉由結晶成長而將包含Hf及/或Zr之金屬化合物膜予以成膜而成為第一層,接著藉由結晶成長將前述金屬膜予以成膜而成為第二層,而可容易地獲得。此乃係由本發明者所成之新見解。前述金屬化合物膜係較佳為包含Hf及/或Zr之氧化物或氮化物,更佳為包含Hf及/或Zr之氮化物。 The aforementioned metal film is crystallized in the (100) direction on the substrate such as a Si substrate, and a metal compound film containing Hf and/or Zr is formed into a first layer by crystal growth, and then the aforementioned metal film is formed into a second layer by crystal growth, and can be easily obtained. This is a new insight obtained by the inventors of the present invention. The aforementioned metal compound film is preferably an oxide or nitride containing Hf and/or Zr, and more preferably a nitride containing Hf and/or Zr.

前述結晶基板(以下亦簡稱為「基板」)係只要不妨礙本發明之目的,則基板材料等無特別限定,可為習知之結晶基板。可為有機化合物,亦可為無機化合物。在本發明中,前述結晶基板係較佳為包含無機化合物。在本發明中,前述基板係較佳為在表面之一部分或全部具有結晶者,更佳為在結晶成長側之主面的全部或一部分具有結晶之結晶基板,再更佳為在結晶成長側之主面的全部具有結晶之結晶基板。前述結晶係只要未妨礙本發明之目的,則未特別地限定,結晶構造等亦無特別地限定,惟較佳為立方晶系、正方晶系、三方晶系、六方晶系、斜方晶系或單斜晶系之結晶,更佳為朝(100)或(200)配向之結晶。並且,前述結晶基板亦可具有偏角,就前述偏角而言,可列舉例如0.2°至12.0°之偏角等。在此,「偏角」係指基板表面與結晶成長面所成之角度。前述基板形狀只要為板狀,且為成為前述磊晶膜之支持體者,則無特別地限定。可為絕緣體基板,亦可為半導體基板,惟在本發明中,前述基板係較佳為Si基板,更佳為結晶性Si基板,最佳為朝(100)配向之結晶性Si基板。此外,就前述基板材料而言,除了Si基板之外,例如可列舉屬於元素週期表第3族至第15族之一種或二種以上 之金屬或該等金屬之氧化物等。前述基板之形狀並無特別地限定,可為大致圓形狀(例如圓形、橢圓形等),亦可為多角形狀(例如三角形、正方形、長方形、五角形、六角形、七角形、八角形、九角形等),可適當地採用各種之形狀。再者,在本發明中,亦可採用大面積之基板,藉由採用該種大面積之基板,可使磊晶膜之面積增大。 The aforementioned crystallized substrate (hereinafter also referred to as "substrate") is not particularly limited in terms of the substrate material, etc., as long as it does not hinder the purpose of the present invention, and can be a known crystallized substrate. It can be an organic compound or an inorganic compound. In the present invention, the aforementioned crystallized substrate preferably contains an inorganic compound. In the present invention, the aforementioned substrate is preferably a substrate having crystals on a part or all of the surface, more preferably a crystallized substrate having crystals on all or a part of the main surface of the crystal growth side, and even more preferably a crystallized substrate having crystals on the entire main surface of the crystal growth side. The aforementioned crystal is not particularly limited as long as it does not hinder the purpose of the present invention, and the crystal structure is not particularly limited either, but preferably is a cubic, tetragonal, trigonal, hexagonal, orthorhombic or monoclinic crystal, and more preferably is a crystal oriented toward (100) or (200). In addition, the aforementioned crystal substrate may also have a bias angle, and as for the aforementioned bias angle, for example, a bias angle of 0.2° to 12.0° can be listed. Here, "bias angle" refers to the angle between the substrate surface and the crystal growth plane. The shape of the aforementioned substrate is not particularly limited as long as it is plate-shaped and serves as a support for the aforementioned epitaxial film. It can be an insulating substrate or a semiconductor substrate, but in the present invention, the aforementioned substrate is preferably a Si substrate, more preferably a crystalline Si substrate, and most preferably a crystalline Si substrate oriented toward (100). In addition, as for the aforementioned substrate material, in addition to the Si substrate, for example, one or more metals belonging to Group 3 to Group 15 of the periodic table of elements or oxides of such metals can be listed. The shape of the aforementioned substrate is not particularly limited, and can be roughly circular (e.g., circular, elliptical, etc.), or polygonal (e.g., triangle, square, rectangle, pentagon, hexagon, heptagon, octagon, pentagon, etc.), and various shapes can be appropriately adopted. Furthermore, in the present invention, a large-area substrate can also be adopted. By adopting such a large-area substrate, the area of the epitaxial film can be increased.

並且,在本發明中,前述結晶基板雖較佳為具有平坦面,惟前述結晶基板在表面之一部分或全部具有凹凸形狀者亦可作為使前述磊晶膜之結晶成長的品質成為更良好者,因此較為理想。具有前述凹凸形狀之結晶基板係只要在表面之一部分或全部形成有由凹部或凸部所構成之凹凸部即可,前述凹凸部係只要為由凸部或凹部所構成者即可,並無特別地限定,可為由凸部所構成之凹凸部,亦可為由凹部所構成之凹凸部,亦可為由凸部及凹部所構成之凹凸部。再者,前述凹凸部可由規則之凸部或凹部所形成,亦可由不規則之凸部或凹部所形成。在本發明中,前述凹凸部係較佳為週期性地形成,更佳為週期性且規則性圖案化者。就前述凹凸部之形狀而言,雖無特別地限定,惟可列舉例如條紋狀、點狀、網狀或不規則狀等,在本發明中,較佳為點狀或條紋狀,更佳為點狀。並且,當凹凸部週期性且規則性地圖案化時,前述凹凸部之圖案形狀係較佳為三角形、四角形(例如正方形、長方形或梯形等)、五角形或六角形等多角形狀、圓形、橢圓形等形狀。此外,將凹凸部形成為點狀時,較佳為將點之格子形狀作成為例如正方格子、斜方格子、三角格子、六角格子等格子形狀,更佳為作成為三角格子之格子形狀。就前述凹凸部之凹部或凸部之剖面形狀而言,雖無特別地限定,惟可列舉例如ㄇ字型、U字型、逆U字型、波型、或三角形、四角形(例如正方形、 長方形或梯形等)、五角形或六角形等多角形等。此外,前述結晶基板之厚度雖無特別地限定,惟較佳為50至2000μm,更佳為100至1000μm。 Furthermore, in the present invention, although the aforementioned crystal substrate preferably has a flat surface, it is also desirable that the aforementioned crystal substrate has a concavo-convex shape on a part or all of the surface, which can also be used as a method of improving the quality of the crystal growth of the aforementioned epitaxial film. The crystal substrate having the aforementioned concavo-convex shape can be formed with a concavo-convex portion composed of concave portions or convex portions on a part or all of the surface, and the aforementioned concavo-convex portion can be formed with a convex portion or a concave portion without any particular limitation, and can be a concavo-convex portion composed of a convex portion, a concavo-convex portion composed of a concave portion, or a concavo-convex portion composed of a convex portion and a concave portion. Furthermore, the aforementioned concavo-convex portion can be formed by regular convex portions or concave portions, or by irregular convex portions or concave portions. In the present invention, the concavo-convex part is preferably formed periodically, and more preferably is periodically and regularly patterned. As for the shape of the concavo-convex part, although there is no particular limitation, it can be, for example, stripe-shaped, dot-shaped, mesh-shaped or irregular, etc. In the present invention, it is preferably dot-shaped or stripe-shaped, and more preferably dot-shaped. Furthermore, when the concavo-convex part is periodically and regularly patterned, the pattern shape of the concavo-convex part is preferably a triangle, a quadrangle (such as a square, a rectangle or a trapezoid, etc.), a polygon such as a pentagon or a hexagon, a circle, an ellipse, etc. In addition, when the concave-convex part is formed into a dot shape, it is preferred to make the lattice shape of the dot into a lattice shape such as a square lattice, a rhombus lattice, a triangular lattice, a hexagonal lattice, etc., and it is more preferred to make it into a lattice shape of a triangular lattice. As for the cross-sectional shape of the concave part or the convex part of the aforementioned concave-convex part, although there is no special limitation, for example, a U-shaped, a U-shaped, an inverse U-shaped, a wave-shaped, or a triangle, a quadrangle (such as a square, a rectangle or a trapezoid, etc.), a pentagon or a hexagon, etc. polygon, etc. can be listed. In addition, although the thickness of the aforementioned crystalline substrate is not particularly limited, it is preferably 50 to 2000μm, and more preferably 100 to 1000μm.

前述壓電體層係只要為由壓電體所構成之壓電體層,則並無特別地限定。前述壓電體係可為習知之壓電體,惟在本發明中,前述壓電體係較佳為包含Pb及Ti。再者,前述半導體層係只要為由半導體所構成之半導體層,則並無特別地限定。前述半導體係可為習知之半導體,惟在本發明中,前述半導體係較佳為包含Si、SiC、GaN或Ga2O3。此外,在本說明書中、「膜」及「層」之各用語係亦可分別依情況或狀況,相互取代。 The aforementioned piezoelectric layer is not particularly limited as long as it is a piezoelectric layer composed of a piezoelectric. The aforementioned piezoelectric may be a known piezoelectric, but in the present invention, the aforementioned piezoelectric preferably contains Pb and Ti. Furthermore, the aforementioned semiconductor layer is not particularly limited as long as it is a semiconductor layer composed of a semiconductor. The aforementioned semiconductor may be a known semiconductor, but in the present invention, the aforementioned semiconductor preferably contains Si, SiC, GaN or Ga 2 O 3. In addition, in this specification, the terms "film" and "layer" may be replaced with each other according to circumstances or conditions.

再者,在本發明中,較佳為在前述第二層上,隔著第三層及第四層積層有前述壓電體層或前述半導體層。前述第三層係較佳為由與前述金屬不同之金屬所構成,前述第四層係較佳為由導電性金屬氧化物所構成。就前述第三層之金屬而言,可列舉例如金、銀、白金、鈀、銀鈀、銅、鎳、或該等之合金,惟在本發明中,較佳為包含屬於元素週期表第10族或第11族之金屬,更佳為包含白金。 Furthermore, in the present invention, the piezoelectric layer or the semiconductor layer is preferably stacked on the second layer via the third layer and the fourth layer. The third layer is preferably made of a metal different from the metal, and the fourth layer is preferably made of a conductive metal oxide. As for the metal of the third layer, for example, gold, silver, platinum, palladium, silver-palladium, copper, nickel, or alloys thereof can be listed, but in the present invention, it is preferably a metal belonging to Group 10 or Group 11 of the Periodic Table of Elements, and more preferably platinum.

前述導電性金屬氧化物係只要未妨礙本發明之目的,則未特別地限定,可為習知之導電性金屬氧化物,惟在本發明中,較佳為包含Sr及/或Ru、更佳為包含Sr及Ru之SRO膜。 The aforementioned conductive metal oxide is not particularly limited as long as it does not hinder the purpose of the present invention, and can be a known conductive metal oxide. However, in the present invention, it is preferably a SRO film containing Sr and/or Ru, and more preferably a Sr and Ru film.

前述之第一層、第二層、第三層及第四層皆係可利用習知之成膜手段進行積層。在本發明中,前述成膜手段係較佳為蒸鍍(包含MBE)或濺鍍。各層之各自的厚度雖無特別地限定,惟較佳為10nm至100μm,更佳為50nm至30μm。 The aforementioned first layer, second layer, third layer and fourth layer can all be deposited using known film-forming methods. In the present invention, the aforementioned film-forming method is preferably evaporation (including MBE) or sputtering. The thickness of each layer is not particularly limited, but is preferably 10nm to 100μm, and more preferably 50nm to 30μm.

如以上方式所得之金屬膜或積層構造體係利用習知之手段適合使用於壓電元件或半導體元件等元件。並且,前述元件係依據一般方法,適合使用於電子器件。例如,藉由將前述積層構造體作為壓電元件,與電源或電氣/電子電路連接,並安裝或封裝於電路基板,即可構成各式各樣之電子器件。在本發明中,前述電子器件係較佳為壓電器件,例如可利用作為噴墨印表機頭、微致動器、陀螺儀、動作感測器等電子機器中的壓電器件。並且,例如若與放大器及整流電路連接並封裝,則可利用於磁性感測器等各種感測器。並且,亦可應用於定電壓驅動之記憶體,例如若連接蓄電元件與整流電力管理電路,則可成為從來自外部之磁場或振動來發電之能量轉換器件(能量收集器)。此外,前述能量轉換器件係較佳為組裝在電源系統或穿戴式終端(耳機/耳戴式器件、智慧型手錶、智慧型眼鏡(眼鏡)、智慧型隱形眼鏡、人工內耳、心率調節器等)等中來利用。在本發明中,較佳為將前述積層構造體利用於例如智慧型眼鏡、AR頭戴式裝置、適於LiDAR系統之MEMS鏡、適於尖端醫療之壓電MEMS超音波換能器(PMUT)、適於商工業用3D印表機之壓電元件頭等。 The metal film or multilayer structure obtained as described above is suitable for use in piezoelectric elements or semiconductor elements and other elements by known means. Furthermore, the aforementioned elements are suitable for use in electronic devices according to general methods. For example, by connecting the aforementioned multilayer structure as a piezoelectric element to a power source or an electric/electronic circuit, and installing or packaging it on a circuit substrate, a variety of electronic devices can be constructed. In the present invention, the aforementioned electronic device is preferably a piezoelectric device, for example, it can be used as a piezoelectric device in electronic machines such as inkjet printer heads, microactuators, gyroscopes, motion sensors, etc. Furthermore, if it is connected to an amplifier and a rectifier circuit and packaged, it can be used in various sensors such as magnetic sensors. Furthermore, it can also be applied to constant voltage driven memory. For example, if the storage element is connected to the rectifying power management circuit, it can become an energy conversion device (energy collector) that generates electricity from an external magnetic field or vibration. In addition, the aforementioned energy conversion device is preferably assembled in a power supply system or wearable terminal (earphones/ear-worn devices, smart watches, smart glasses (glasses), smart contact lenses, artificial inner ears, heart rate regulators, etc.). In the present invention, it is preferred to use the aforementioned multilayer structure in, for example, smart glasses, AR head-mounted devices, MEMS mirrors suitable for LiDAR systems, piezoelectric MEMS ultrasonic transducers (PMUTs) suitable for cutting-edge medical treatment, and piezoelectric element heads suitable for commercial and industrial 3D printers.

前述電子器件係依據一般方法而適用於電子機器。就前述電子機器而言,除了上述之電子機器以外,亦可適用於各式各樣之電子機器,更具體而言,作為較佳例可列舉例如液體吐出頭、液體吐出裝置、振動波馬達、光學機器、振動裝置、攝像裝置、壓電音響零件或具有該壓電音響零件之聲音播放機器、聲音錄音機器、行動電話、各種資訊終端等。 The aforementioned electronic device is applied to electronic equipment according to a general method. As for the aforementioned electronic equipment, in addition to the aforementioned electronic equipment, it can also be applied to various electronic equipment. More specifically, as preferred examples, liquid dispensing heads, liquid dispensing devices, vibration motors, optical equipment, vibration devices, camera equipment, piezoelectric audio parts or sound players with the piezoelectric audio parts, sound recorders, mobile phones, various information terminals, etc. can be cited.

並且,前述電子機器係依據一般方法亦適用於系統,就該系統而言,可列舉例如感測器系統等。 Furthermore, the aforementioned electronic machines are also applicable to systems according to general methods. For example, sensor systems can be cited as examples of such systems.

[實施例] [Implementation example]

(實施例1)以RIE處理Si基板(100)之結晶成長面側,且在氮之存在下,利用蒸鍍法使蒸鍍源之金屬與氮進行熱反應,而將HfZrN單結晶形成在Si基板上。此外,該成膜時之蒸鍍法的各條件係如下所述。 (Example 1) The crystal growth side of the Si substrate (100) is treated by RIE, and in the presence of nitrogen, the metal of the evaporation source is thermally reacted with nitrogen by evaporation to form a HfZrN single crystal on the Si substrate. In addition, the conditions of the evaporation method during the film formation are as follows.

蒸鍍源:Hf、Zr Evaporation source: Hf, Zr

電壓:3.5至4.75V Voltage: 3.5 to 4.75V

壓力:3×10-2至6×10-2Pa Pressure: 3×10 -2 to 6×10 -2 Pa

基板溫度:450至700℃ Substrate temperature: 450 to 700°C

圖8顯示在HfZrN單結晶之蒸鍍中所使用之蒸鍍成膜裝置。圖8之成膜裝置係坩堝至少具備:金屬源1101a至1101b、接地1102a至1102h、ICP電極1103a至1103b、截止濾波器1104a至1104b、DC電源1105a至1105b、RF電源1106a至1106b、燈1107a至1107b、Ar源1108、反應性氣體源1109、電源1110、基板保持具1111、基板1112、截止濾波器1113、ICP環1114、真空槽1115及旋轉軸1116。此外,圖8之ICP電極1103a至1103b係在基板1112之中心側具有彎曲之大致凹曲面形狀或拋物線形狀。 FIG8 shows an evaporation film forming apparatus used in the evaporation of a HfZrN single crystal. The film forming apparatus of FIG8 is a crucible having at least: metal sources 1101a to 1101b, grounds 1102a to 1102h, ICP electrodes 1103a to 1103b, cutoff filters 1104a to 1104b, DC power sources 1105a to 1105b, RF power sources 1106a to 1106b, lamps 1107a to 1107b, Ar sources 1108, reactive gas sources 1109, power sources 1110, substrate holders 1111, substrates 1112, cutoff filters 1113, ICP rings 1114, vacuum chambers 1115, and rotating shafts 1116. In addition, the ICP electrodes 1103a to 1103b in FIG8 have a curved, generally concave shape or a parabolic shape on the center side of the substrate 1112.

如圖8所示,將基板1112卡止於基板保持具1111上。接著,利用電源1110及旋轉機構(未圖示)使旋轉軸1116旋轉,並使基板1112旋轉。並且,藉由燈1107a至1107b對基板112進行加熱,並藉由真空泵(未圖示),利用排氣使真空槽1115內成為真空或減壓下。然後,從Ar源1108將Ar氣體導入於真空槽1115內,並利用DC電源1105a至1105b、RF電源1106a至1106b、ICP電極1103a至1103b、截止濾波器1104a至1104b、及接地1102a至1102h,在基板1112上形成氬電漿,以進行基板1112之表面的清淨化。 As shown in FIG8 , the substrate 1112 is locked on the substrate holder 1111. Then, the power supply 1110 and the rotating mechanism (not shown) are used to rotate the rotating shaft 1116, thereby rotating the substrate 1112. In addition, the substrate 112 is heated by the lamps 1107a and 1107b, and the vacuum chamber 1115 is evacuated or depressurized by exhausting gas by a vacuum pump (not shown). Then, Ar gas is introduced into the vacuum chamber 1115 from the Ar source 1108, and Ar plasma is formed on the substrate 1112 using the DC power supplies 1105a to 1105b, the RF power supplies 1106a to 1106b, the ICP electrodes 1103a to 1103b, the cutoff filters 1104a to 1104b, and the grounding 1102a to 1102h to clean the surface of the substrate 1112.

將Ar氣體導入於真空槽1115內,並且利用反應性氣體源1109導入反應性氣體。此時,係構成為藉由交互地反覆進行屬於加熱燈之燈1107a至1107b之開啟及關閉,而可形成更優質之結晶成長膜。 Ar gas is introduced into the vacuum chamber 1115, and reactive gas is introduced using the reactive gas source 1109. At this time, the lamps 1107a to 1107b belonging to the heating lamps are turned on and off alternately and repeatedly, so that a better quality crystal growth film can be formed.

接著,除了改為利用Fe、Cr及Ni作為蒸鍍源之金屬之外,與上述同樣地,對SUS304單結晶膜進行成膜。 Next, a SUS304 single crystal film was formed in the same manner as above, except that Fe, Cr, and Ni were used as the evaporation source metals.

接著,藉由濺鍍法,將白金(Pt)之金屬膜作為導電膜而形成在結晶性金屬氧化物之單結晶膜上。此時之條件如以下所示。 Next, a platinum (Pt) metal film is formed as a conductive film on the single crystal film of the crystalline metal oxide by sputtering. The conditions at this time are as follows.

裝置:ULVAC公司製濺鍍裝置QAM-4 Equipment: ULVAC sputtering equipment QAM-4

壓力:1.20×10-1Pa Pressure: 1.20×10 -1 Pa

對象:Pt Subject: Pt

電力:100W(DC) Power: 100W (DC)

厚度:100nm Thickness: 100nm

基板溫度:450至600℃ Substrate temperature: 450 to 600°C

接著,藉由濺鍍法將SRO膜形成於導電膜上。此時之條件如以下所示。 Next, an SRO film is formed on the conductive film by sputtering. The conditions at this time are as follows.

裝置:ULVAC公司製濺鍍裝置QAM-4 Equipment: ULVAC sputtering equipment QAM-4

功率:150W(RF) Power: 150W (RF)

氣體:Ar Gas: Ar

壓力:1.8Pa Pressure: 1.8Pa

基板溫度:600℃ Substrate temperature: 600℃

厚度:20nm Thickness: 20nm

接著,在SRO膜上,將PbTiO3膜予以成膜為壓電膜。所得之積層構造體係具有良好之密接性及結晶性的積層構造體。並且,針對積層構造體之結晶基板、結晶性金屬氧化物之單結晶膜及導電膜,利用X線繞射裝置來量測各者之結晶。圖2係顯示XRD量測結果。由圖2所得知,形成有具有良好之結晶性的SUS304單結晶膜,且PbTiO3膜等之結晶性等亦良好。 Next, a PbTiO 3 film is formed on the SRO film as a piezoelectric film. The resulting multilayer structure has good adhesion and crystallinity. In addition, an X-ray diffraction device is used to measure the crystallinity of the crystalline substrate of the multilayer structure, the single crystal film of the crystalline metal oxide, and the conductive film. Figure 2 shows the XRD measurement results. As shown in Figure 2, a SUS304 single crystal film with good crystallinity is formed, and the crystallinity of the PbTiO 3 film is also good.

(試驗例) (Test example)

就試驗例而言,利用FIB FB2100(日立High-Technologies公司製)來製作如圖3及圖4之微小元件之懸臂,以奈米壓痕儀NanoTest Xtreme(Micro Materials公司製)對其破壞強度特性進行破壞強度評估時,成為圖5所示者。由圖5顯示出,Si之破壞強度為1GPa左右之大致一定之值。考慮Si單結晶散裝材料之彎曲強度為300MPa左右(論文),可知微米材料係具有較大之強度。再者,在SUS304單結晶薄膜之情形,其具有破壞強度約5GPa,為Si單結晶之約5倍的彎曲強度。此事是藉由將SUS304單結晶薄膜使用於MEMS器件之樑(相當於可動部分、SOI基板之活性層),除了MEMS器件之位移量的大幅改善之外,亦可期待大幅的壽命特性之改善。 In the test example, a cantilever of a micro-component as shown in FIG3 and FIG4 was made using FIB FB2100 (manufactured by Hitachi High-Technologies). When the destructive strength characteristics were evaluated using the nano-indenter NanoTest Xtreme (manufactured by Micro Materials), the result was as shown in FIG5 . FIG5 shows that the destructive strength of Si is a roughly constant value of about 1 GPa. Considering that the bending strength of Si single crystal bulk material is about 300 MPa (thesis), it can be seen that micron materials have greater strength. Furthermore, in the case of SUS304 single crystal film, it has a destructive strength of about 5 GPa, which is about 5 times the bending strength of Si single crystal. This is because by using SUS304 single crystal thin film in the beam of MEMS devices (equivalent to the movable part, the active layer of the SOI substrate), in addition to a significant improvement in the displacement of the MEMS device, a significant improvement in the life characteristics can also be expected.

(應用例) (Application examples)

以下,利用圖式具體地說明所得之積層構造體的應用例,惟本發明並不限定於該等之應用例者。此外,在本發明中,只要未特別地說明,可利用習知之手段,由前述積層構造體來製造壓電器件等。 The following diagrams are used to specifically describe the application examples of the obtained multilayer structure, but the present invention is not limited to such application examples. In addition, in the present invention, unless otherwise specified, piezoelectric devices can be manufactured from the aforementioned multilayer structure by known means.

圖6係顯示在本發明中適用前述積層構造體之構成MEMS麥克風之音響MEMS換能器的實施態樣。此外,前述MEMS換能器係可構成音響放出機器(例如揚聲器等)。 FIG6 shows an implementation of an audio MEMS transducer for a MEMS microphone using the aforementioned multilayer structure in the present invention. In addition, the aforementioned MEMS transducer can be used to construct an audio output device (such as a speaker, etc.).

由圖6之音響MEMS換能器所構成的MEMS麥克風係顯示懸臂型之MEMS麥克風,且具備具有二個懸臂樑28A、28B及空洞30之Si基板21。各懸臂樑28A、28B係在各自的端部固定於基板21,且在懸臂樑8A、8B之間設置有間隙29。此外,懸臂樑8A、8B係由例如包含複數個壓電層(PZT膜)26a、26b之積層構造體所形成,且與複數個電極層、亦即Pt膜24a、24b、24c及SRO膜25a、25b、25c、25d交疊。Pt膜24a係設置在SUS膜23上,在SUS膜23上設置有HfZrN膜23。與使用SiO2或SiN等之情形相比較,當使用HfZrN膜23時,會成為與Si基板之密接性及結晶性較佳者,且在該HfZrN膜上可橫跨複數層使結晶性更為提升,進一步成為壓電特性及/或耐久性亦更佳者。 The MEMS microphone formed by the acoustic MEMS transducer of FIG. 6 is a cantilever type MEMS microphone, and has a Si substrate 21 having two cantilever beams 28A, 28B and a cavity 30. Each cantilever beam 28A, 28B is fixed to the substrate 21 at its end, and a gap 29 is provided between the cantilever beams 8A, 8B. In addition, the cantilever beams 8A, 8B are formed of a laminated structure including, for example, a plurality of piezoelectric layers (PZT films) 26a, 26b, and overlapped with a plurality of electrode layers, namely, Pt films 24a, 24b, 24c and SRO films 25a, 25b, 25c, 25d. The Pt film 24a is provided on the SUS film 23, and the HfZrN film 23 is provided on the SUS film 23. Compared with the case of using SiO2 or SiN, when the HfZrN film 23 is used, the adhesion and crystallinity with the Si substrate are better, and the crystallinity can be further improved by crossing multiple layers on the HfZrN film, and the piezoelectric characteristics and/or durability are also better.

圖7係顯示在本發明中前述積層構造體適用於印刷用途、特別是在能夠以噴墨頭的態樣使用之流體排出裝置的應用例,具體而言係顯示具備壓電致動器的晶圓之一部分的剖面圖,該壓電致動器包含Pt膜34a、34b及SRO膜35a、35b作為電極層,且包含PZT膜36作為壓電膜。圖7之晶圓係除了前述壓電致動器之外,亦具備用以收容流體之腔室41。腔室41係構成為從槽(未圖示)經由流路40導入流體。此外,圖7之晶圓係包含Si基板31,且在該Si基板31上積層有HfZrN膜32及SUS膜33,且面向腔室41。在圖7中,藉由採用HfZrN膜32,與採用SiO2或SiN等之情形相比較,係成為與Si基板之密接性及結晶性更佳者,且在該HfZrN膜上可橫跨複數層使結晶性更為提升,且進一步成為壓電特性及/或耐久性亦更佳者。此外,HfZrN膜32係在例如俯視圖(未圖示)中具有四角形之形狀,該形狀亦可為例如正方形、長方形、圓角之長方形、平行四邊形等之任一者。 FIG. 7 shows an application example in which the aforementioned multilayer structure in the present invention is suitable for printing purposes, especially in an application example of a fluid discharge device that can be used in the form of an inkjet head. Specifically, it shows a cross-sectional view of a portion of a wafer having a piezoelectric actuator, and the piezoelectric actuator includes Pt films 34a, 34b and SRO films 35a, 35b as electrode layers, and includes a PZT film 36 as a piezoelectric film. In addition to the aforementioned piezoelectric actuator, the wafer of FIG. 7 also has a chamber 41 for accommodating a fluid. The chamber 41 is configured to introduce a fluid from a groove (not shown) through a flow path 40. In addition, the wafer of FIG. 7 includes a Si substrate 31, and a HfZrN film 32 and a SUS film 33 are layered on the Si substrate 31 and face the chamber 41. In FIG. 7 , by using the HfZrN film 32, compared with the case of using SiO 2 or SiN, the adhesion and crystallinity with the Si substrate are better, and multiple layers can be formed across the HfZrN film to further improve the crystallinity, and further the piezoelectric characteristics and/or durability are better. In addition, the HfZrN film 32 has a quadrangular shape in, for example, a top view (not shown), and the shape may be any of, for example, a square, a rectangle, a rectangle with rounded corners, a parallelogram, and the like.

在SUS膜33之上,依序積層有Pt膜34a、SRO膜35a、壓電膜(PZT膜)36、SRO膜35b、及Pt膜34b,以構成壓電致動器。並且,前述壓電致動器係更具備電極34a及35a、壓電膜36、及在電極34b及35b上延伸之絕緣膜37。絕緣膜37雖包含使用於電絕緣之介電質材料,惟介電質材料係可為習知之介電質材料,例如可為SiO2層、SiN層或Al2O3層。此外,包含絕緣膜作為構成材料之絕緣層的厚度雖無特別地限定,惟較佳為約10nm至約10μm之間的厚度。並且,導電路徑39係設置在絕緣層(絕緣膜)37上,且分別與電極34a及35a、以及電極34b及35b接觸,在使用時可選擇性地接取。此外,導電路徑之構成材料係可為習知之導電材料,就該種導電材料而言,可列舉例如鋁(Al)等作為適當例。並且,鈍化層42係設置在絕緣層37、電極34b及35b、以及導電路徑39上。鈍化層42係只要由使用於前述壓電致動器之鈍化的介電質材料所構成即可,該介電質材料亦無特別地限定,可為習知之介電質材料。就前述介電質材料而言,可列舉例如SiN或SION(氮氧化矽)等作為適當例。前述鈍化層之厚度係無特別地限定,惟較佳為約0.1μm至約3μm之間的厚度。導電墊片38亦同樣地沿著前述壓電致動器設置,且與導電路徑39電性連接。此外,鈍化層42係作為保護壓電體不會受到濕度等影響之阻障層而發揮功能。 On the SUS film 33, a Pt film 34a, an SRO film 35a, a piezoelectric film (PZT film) 36, an SRO film 35b, and a Pt film 34b are sequentially stacked to form a piezoelectric actuator. In addition, the piezoelectric actuator further comprises electrodes 34a and 35a, a piezoelectric film 36, and an insulating film 37 extending on the electrodes 34b and 35b . The insulating film 37 includes a dielectric material used for electrical insulation, and the dielectric material may be a known dielectric material, such as a SiO2 layer, a SiN layer, or an Al2O3 layer. In addition, the thickness of the insulating layer including the insulating film as a constituent material is not particularly limited, but is preferably between about 10 nm and about 10 μm. In addition, the conductive path 39 is provided on the insulating layer (insulating film) 37, and is in contact with the electrodes 34a and 35a, and the electrodes 34b and 35b, respectively, and can be selectively accessed when used. In addition, the constituent material of the conductive path can be a known conductive material, and as for such a conductive material, aluminum (Al) can be cited as an appropriate example. In addition, the passivation layer 42 is provided on the insulating layer 37, the electrodes 34b and 35b, and the conductive path 39. The passivation layer 42 only needs to be composed of a passivated dielectric material used for the aforementioned piezoelectric actuator. The dielectric material is not particularly limited and can be a known dielectric material. As for the aforementioned dielectric material, SiN or SION (silicon oxynitride) can be cited as appropriate examples. The thickness of the aforementioned passivation layer is not particularly limited, but is preferably between about 0.1μm and about 3μm. The conductive pad 38 is also similarly arranged along the aforementioned piezoelectric actuator and is electrically connected to the conductive path 39. In addition, the passivation layer 42 functions as a barrier layer to protect the piezoelectric body from being affected by humidity and the like.

(產業上之可利用性) (Industrial availability)

本發明之金屬膜及積層構造體係適用作為例如壓電器件等電子器件,且適用於電子機器或感測器系統等。 The metal film and multilayer structure of the present invention are suitable for use as electronic devices such as piezoelectric devices, and are suitable for use in electronic machines or sensor systems, etc.

1:結晶基板(Si基板) 1: Crystalline substrate (Si substrate)

2:HfZrN膜 2: HfZrN film

3:SUS膜(FeCrNi膜) 3: SUS film (FeCrNi film)

4:Pt膜 4: Pt film

5:SRO膜 5:SRO membrane

6:壓電體層(PbTiO膜) 6: Piezoelectric layer (PbTiO film)

Claims (21)

一種積層構造體,係在結晶基板上分別積層有至少第一層及第二層, A layered structure having at least a first layer and a second layer layered on a crystalline substrate, 前述第一層係由金屬化合物膜所構成, The aforementioned first layer is composed of a metal compound film. 前述第二層係由因熱處理或加工而麻田散體轉變之金屬的金屬膜所構成, The aforementioned second layer is composed of a metal film of metal that has been transformed from bulk metal by heat treatment or processing. 且前述結晶基板、前述第一層及前述第二層係分別朝大致相同之結晶軸方向配向。 Furthermore, the aforementioned crystalline substrate, the aforementioned first layer, and the aforementioned second layer are oriented in substantially the same crystal axis direction. 如請求項1所述之積層構造體,其中,前述金屬係包含Fe。 The layered structure as described in claim 1, wherein the metal includes Fe. 如請求項1或2所述之積層構造體,其中,前述金屬係包含Cr。 The layered structure as described in claim 1 or 2, wherein the metal includes Cr. 如請求項1至3中任一項所述之積層構造體,其中,前述金屬係包含Ni。 A layered structure as described in any one of claims 1 to 3, wherein the metal comprises Ni. 如請求項1至4中任一項所述之積層構造體,其中,前述金屬係包含Fe及Cr。 A layered structure as described in any one of claims 1 to 4, wherein the metal comprises Fe and Cr. 如請求項1至5中任一項所述之積層構造體,其中,前述金屬係不鏽鋼。 A layered structure as described in any one of claims 1 to 5, wherein the aforementioned metal is stainless steel. 如請求項1至6中任一項所述之積層構造體,其中,前述金屬膜之膜厚係100μm以下。 A multilayer structure as described in any one of claims 1 to 6, wherein the thickness of the metal film is less than 100 μm. 如請求項1至7中任一項所述之積層構造體,其中,前述金屬膜之膜厚係1μm至10μm。 A multilayer structure as described in any one of claims 1 to 7, wherein the thickness of the metal film is 1 μm to 10 μm. 如請求項1至8中任一項所述之積層構造體,其中,前述金屬化合物膜係包含Hf及/或Zr。 A layered structure as described in any one of claims 1 to 8, wherein the metal compound film contains Hf and/or Zr. 如請求項1至9中任一項所述之積層構造體,其中,前述金屬化合物膜係由包含Hf及/或Zr之氧化物或氮化物所構成。 A multilayer structure as described in any one of claims 1 to 9, wherein the metal compound film is composed of an oxide or nitride containing Hf and/or Zr. 如請求項1至10中任一項所述之積層構造體,其中,前述結晶軸方向係(100)方向。 A layered structure as described in any one of claims 1 to 10, wherein the crystal axis direction is the (100) direction. 如請求項1至11中任一項所述之積層構造體,其中,前述結晶基板係Si基板。 A multilayer structure as described in any one of claims 1 to 11, wherein the aforementioned crystal substrate is a Si substrate. 如請求項1至12中任一項所述之積層構造體,其中,在前述第二層上係隔著第三層及第四層積層有壓電體層或半導體層,前述第三層係由與前述金屬不同之金屬所構成,前述第四層係由導電性金屬氧化物所構成。 A multilayer structure as described in any one of claims 1 to 12, wherein a piezoelectric layer or a semiconductor layer is stacked on the second layer via a third layer and a fourth layer, the third layer is composed of a metal different from the metal, and the fourth layer is composed of a conductive metal oxide. 如請求項13所述之積層構造體,其中,前述第三層係包含屬於元素週期表第10族或第11族之金屬。 The layered structure as described in claim 13, wherein the third layer comprises a metal belonging to Group 10 or Group 11 of the Periodic Table of Elements. 如請求項13或14所述之積層構造體,其中,前述導電性金屬氧化物係包含Sr及/或Ru。 The layered structure as described in claim 13 or 14, wherein the conductive metal oxide contains Sr and/or Ru. 如請求項13至15中任一項所述之積層構造體,其中,積層有前述壓電體層,前述壓電體層係包含Pb及Ti。 A laminated structure as described in any one of claims 13 to 15, wherein the aforementioned piezoelectric layer is laminated, and the aforementioned piezoelectric layer contains Pb and Ti. 一種包含積層構造體之元件,其中,前述積層構造體係請求項1至16中任一項所述之積層構造體。 A component comprising a layered structure, wherein the layered structure is a layered structure as described in any one of claims 1 to 16. 如請求項17所述之元件,其為壓電體元件或半導體元件。 The element as described in claim 17 is a piezoelectric element or a semiconductor element. 一種包含元件之電子器件,前述元件係請求項17或18所述之元件。 An electronic device comprising a component, wherein the component is a component described in claim 17 or 18. 一種包含電子器件之電子機器,其中,前述電子器件係請求項19所述之電子器件。 An electronic machine comprising an electronic device, wherein the electronic device is the electronic device described in claim 19. 一種包含電子機器之系統,其中,前述電子機器係請求項20所述之電子機器。 A system comprising an electronic machine, wherein the electronic machine is the electronic machine described in claim 20.
TW112132841A 2022-08-31 2023-08-30 Laminated structure, element, electronic device, electronic instrument and system TW202418978A (en)

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