TW202416557A - Light emitting devices and methods for manufacturing the same - Google Patents

Abstract

A light emitting device includes a first-conductive type semiconductor layer having a first portion and a second portion adjoining the first portion, a semiconductor mesa over the second portion and not covering the first portion, and a first insulating layer covering the first portion and the semiconductor mesa, wherein the semiconductor mesa includes an active region and a second-conductive type semiconductor layer sequentially stacked over the second portion in a stacking direction. The first insulating layer has a first opening on the first portion and a second opening on the second portion. The light emitting device also includes a III-V group compound semiconductor layer that is disposed in the first opening and contacts the first portion. The profile of the first opening surrounds the III-V group compound semiconductor layer, in a top view. The light emitting device also includes a first electrode on the III-V group compound semiconductor layer and electrically connecting the first-conductive type semiconductor layer, and a second electrode in the second opening and electrically connecting the second-conductive type semiconductor layer.

Description

Light emitting element and method for manufacturing the same

The present disclosure relates to a light emitting device and a manufacturing method thereof, and more particularly to a light emitting device with improved light emitting efficiency and a manufacturing method thereof.

Currently, light-emitting diodes (LEDs) have become the mainstream in the market for many products with light-emitting components. LEDs have many advantages, such as small size, fast response speed, low power consumption, low heat generation, good durability and impact resistance, and long service life. Therefore, they are widely used in various fields that require the use of light-emitting components, such as display panels, lighting devices, vehicles, and home appliances.

Some embodiments of the present disclosure provide a light-emitting element, comprising a first-type semiconductor layer having a first portion and a second portion connected to the first portion; a semiconductor platform located on the second portion and not covering the first portion, wherein the semiconductor platform comprises an active region and a second-type semiconductor layer sequentially stacked on the second portion in a stacking direction; a first insulating layer covering the first portion and the semiconductor platform, wherein the first insulating layer has a first opening located on the first portion, and a second opening located on the second-type semiconductor layer. The light-emitting element of the embodiment further includes a III-V compound semiconductor layer, which is located in the aforementioned first opening and contacts the aforementioned first portion, and when viewed from above, the outline of the aforementioned first opening surrounds the aforementioned III-V compound semiconductor layer; a first electrode, which is located on the aforementioned III-V compound semiconductor layer and electrically connected to the aforementioned first type semiconductor layer; and a second electrode, which is located in the aforementioned second opening and electrically connected to the aforementioned second type semiconductor layer.

Some embodiments of the present disclosure provide a method for manufacturing a light-emitting element, including providing a substrate, and forming a first-type semiconductor layer and a semiconductor platform on the substrate, wherein the first-type semiconductor layer has a first portion and a second portion connected to the first portion, the semiconductor platform is formed on the second portion and does not cover the first portion, and the semiconductor platform includes an active region and a second-type semiconductor layer sequentially stacked on the second portion in a stacking direction; forming a first insulating layer on the first portion and the semiconductor platform, and the first insulating layer has a first opening located on the first portion. The manufacturing method of the light-emitting element of the embodiment also includes forming a III-V compound semiconductor layer in the aforementioned first opening, and the aforementioned III-V compound semiconductor layer contacts the aforementioned first part, wherein, when viewed from above, the outline of the aforementioned first opening surrounds the aforementioned III-V compound semiconductor layer; forming a first electrode on the aforementioned III-V compound semiconductor layer, and the aforementioned first electrode is electrically connected to the aforementioned first type semiconductor layer; and forming a second electrode in a second opening of the aforementioned first insulating layer, wherein the aforementioned second opening is located on the aforementioned second type semiconductor layer, and the aforementioned second electrode is electrically connected to the aforementioned second type semiconductor layer.

The following disclosure provides many embodiments or examples for specifically describing the different components of the light-emitting element provided by the embodiments. However, these are merely examples and are not intended to limit the light-emitting element of the present disclosure to the following examples. Unless otherwise specified, the size, material, shape, relative configuration, etc. of each component described in the embodiments in this specification are not limited to the scope of the present disclosure. For example, if the description mentions that a first component is formed on a second component, it may include an embodiment in which the first and second components are in direct contact, and it may also include an embodiment in which an additional component is formed between the first and second components so that they are not in direct contact.

Furthermore, in some variant embodiments, similar/identical components in the drawings of different embodiments are marked with similar/identical element symbols to appropriately omit detailed descriptions. In addition, the drawings are drawn to facilitate understanding and clear descriptions, and the thickness, size, shape or position relationship of each layer in the drawings is not necessarily the actual size of the components or the actual ratio. It should be particularly noted that components not shown in the drawings or described in the specification may be in a form known to those skilled in the art of the invention.

Furthermore, spatially related terms such as "under", "below", "lower", "above", "upper" and other similar terms may be used in the following description to simplify the description of the relationship between one component and other components as shown in the figures. In addition to the directions depicted in the figures, the light-emitting element can be positioned in other directions during use or operation (e.g., rotated 90 degrees or other angles/directions), and the spatially related terms used herein should be interpreted accordingly.

The embodiments of the present disclosure provide a light-emitting element and a method for manufacturing the same. By forming a III-V compound semiconductor layer between a first electrode and a first type semiconductor layer, the first electrode can form a good ohmic contact with the III-V compound semiconductor layer to improve the light-emitting efficiency. In addition, the manufacturing method of the embodiments can improve the electronic properties of the light-emitting element and enhance the reliability. The light-emitting element of the embodiments is, for example, a light-emitting diode, such as an ultraviolet light emitting diode (UV LED), or other types of light-emitting elements. The following are a number of embodiments for illustration of the light-emitting element and a method for manufacturing the same. However, it can be understood that the components of the light-emitting element in these embodiments are for illustration only and are not intended to limit the present invention. Furthermore, other steps may be performed before, during or after each step described in the manufacturing method proposed below, and some of the steps described above may be replaced or deleted due to other embodiments of this method.

Figures 1, 2, 3A, 4, 5, and 6A are cross-sectional schematic diagrams of a light-emitting element 10 at multiple intermediate manufacturing stages according to some embodiments of the present disclosure. Figures 3B and 6B are top views of the light-emitting element 10 at intermediate manufacturing stages of an embodiment, and Figures 3A and 6A are drawn along the section line A-A' in Figures 3B and 6B, respectively.

1 , according to some embodiments, a substrate 100 is provided, and a first-type semiconductor layer 120 and a semiconductor mesa 130 are formed on the substrate 100. The first-type semiconductor layer 120 has a first portion 121 and a second portion 122, wherein the second portion 122 is connected to the first portion 121. The semiconductor mesa 130 is formed on the second portion 122 of the first-type semiconductor layer 120 and does not cover the first portion 121.

According to some embodiments, the semiconductor platform 130 includes an active region 131 and a second type semiconductor layer 132 sequentially stacked above the second portion 122 of the first type semiconductor layer 120 in a stacking direction D1 (eg, Y direction).

In some embodiments, the substrate 100 may be a growth substrate for growing subsequent semiconductor layers. The substrate 100 includes silicon, silicon carbide (SiC), aluminum oxide (Al ₂ O ₃ ), aluminum nitride (AlN), gallium nitride (GaN), other suitable materials, or a combination of the foregoing materials. In some embodiments, the substrate 100 may be a patterned substrate, that is, the substrate 100 has a patterned structure on the surface where the semiconductor stack is located (not shown). Light emitted from the semiconductor stack can be refracted by the patterned structure of the substrate 100, thereby increasing the brightness of the light-emitting element 10. In one example, the substrate 100 is a sapphire substrate composed of aluminum oxide.

In any embodiment of the present disclosure, the method of performing epitaxial growth includes but is not limited to metal-organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), molecular beam epitaxy (MBE), physical vapor deposition (PVD), and liquid-phase epitaxy (LPE).

In some embodiments, the first semiconductor layer 120 is an n-type semiconductor layer, and its constituent material includes III-V (III/V) compound semiconductors, such as aluminum gallium indium nitride series (Al _x Ga _y In _(1-xy) N) or aluminum gallium indium phosphide series (Al _x Ga _y In _(1-xy) P), wherein 0≦x≦1, 0≦y≦1, 0≦x+y≦1, and is doped with n-type dopants. The n-type dopant includes silicon or oxygen, but the present disclosure is not limited thereto, and other suitable IV group or VI group elements are also applicable to the present disclosure.

In some embodiments, the first semiconductor layer 120 is a single-component n-type doped aluminum gallium nitride (n-AlGaN) layer. In some other embodiments, the first semiconductor layer 120 is a multi-layer structure, for example, comprising at least two n-AlGaN layers with different aluminum (Al) compositions stacked by epitaxial growth or deposition, and the stacking method can be non-periodic stacking or periodic alternating stacking, wherein the aluminum composition is, for example, between 0.5-1. In one example, the first semiconductor layer 120 is a high aluminum composition n-AlGaN layer.

In some embodiments, the active region 131 may be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well (MQW). In some embodiments, the active region 131 has a multiple-quantum well (MQW) structure. The quantum well of such a multi-layer structure may be formed by alternately stacking multiple well layers and multiple barrier layers having an energy barrier higher than the well layers. The well layer includes, for example, indium gallium nitride (InGaN) or aluminum gallium nitride (AlGaN), and the barrier layer includes, for example, gallium nitride (GaN), aluminum indium gallium nitride (AlInGaN) or aluminum gallium nitride (AlGaN). The quantum well can increase the chance of electrons and holes combining and generate light, thereby improving the luminescence efficiency of the light-emitting element 10. Its luminescence principle and mechanism are not repeated here. Therefore, the multiple quantum well structure included in the active region 131 also serves as the light-emitting layer of the light-emitting element 10. In some embodiments, the material of the active region 131 can be a neutral, p-type or n-type electrical semiconductor. The wavelength of the light emitted by the active region 131 is adjusted by changing the physical and chemical composition of the active region 131. When the material of the active region 131 is an InGaN series material, blue light or deep blue light with a wavelength between 400 nm and 490 nm, or green light with a wavelength between 490 nm and 550 nm can be emitted. When the material of the active region 131 is an AlGaN series or AlInGaN series material, ultraviolet light with a wavelength between 250 nm and 400 nm can be emitted. The second type semiconductor layer 132 and the first type semiconductor layer 120 are located on opposite sides of the active region 131, respectively.

In some embodiments, the second type semiconductor layer 132 is a p-type semiconductor layer, and its constituent materials include III-V (III/V) group compound semiconductors, such as aluminum _gallium indium nitride series ( _{AlxGayln (1-xy)} N) or aluminum _gallium indium phosphide series ( _{AlxGayIn (1-xy)} P), where 0≦x≦1, 0≦y≦1, 0≦x＋y≦1, and is doped with p-type dopants.

The first type semiconductor layer 120, the multiple quantum well (MQW) structure of the active region 131, and the second type semiconductor layer 132 may be formed by, for example, a metal organic chemical vapor deposition (MOCVD) process, an ultrahigh vacuum chemical vapor deposition (UHV-CVD) process, a molecular beam epitaxy (MBE) process, a hydride vapor phase epitaxy (HVPE) process, a physical vapor deposition (PVD), a liquid-phase epitaxy (LPE), or other suitable processes.

In some embodiments, the substrate 100 further includes a buffer layer 110, and the first type semiconductor layer 120 is grown on the surface of the buffer layer 110. The buffer layer 110 may include aluminum nitride (AlN), aluminum gallium nitride (AlGaN) or other suitable materials. In some embodiments, the buffer layer 110 includes a single layer, or includes multiple layers (not shown). In some embodiments, the aluminum content of the multiple layers of the buffer layer 110 varies according to the stacking order, for example, the aluminum content gradually decreases according to the stacking order. In some embodiments, the multiple layers of the buffer layer 110 may be a superlattice structure formed by periodically stacking at least two different material layers. The buffer layer 110 has the function of reducing the lattice mismatch between the substrate 100 and the semiconductor material to be formed subsequently. In some embodiments, the buffer layer 110 can be formed on the substrate 100 by, for example, a metal organic chemical vapor deposition (MOCVD) process, a molecular beam epitaxy (MBE) process, a hydride vapor phase epitaxy (HVPE) process, a physical vapor deposition (PVD) process, or other suitable processes.

The structure shown in FIG. 1 can be manufactured by, for example (but not limited to), the following method. First, a buffer layer 110 (e.g., AlN material) is deposited on a substrate 100 (e.g., a sapphire substrate). Then, a first-type semiconductor material (e.g., n-type doped aluminum gallium nitride (n-AlGaN)), a multiple quantum well (MQW) structure, and a second-type semiconductor material (e.g., p-type doped aluminum gallium nitride (p-AlGaN)) are sequentially formed on the buffer layer 110 along a stacking direction D1 (e.g., a Y direction). Then, a portion of the second-type semiconductor material, a portion of the multiple quantum well structure, and a portion of the first-type semiconductor material can be removed by optical lithography and etching processes to form a semiconductor platform 130 and a first-type semiconductor layer 120 including portions with different thicknesses. In some embodiments, a mask may be formed on the stacked material layer, and wet etching or dry etching, such as an inductively coupled plasma (ICP) etching process, a reactive ion etching (RIE) process, or other suitable processes, may be performed to remove the portion of the second-type semiconductor material and the portion of the multiple quantum well structure corresponding to the portion outside the mask, and to thin the portion of the first-type semiconductor material. As shown in FIG. 1 , after the optical lithography and etching processes, a semiconductor platform 130 and a first-type semiconductor layer 120 may be formed. The first-type semiconductor layer 120 includes a first portion 121 located outside the semiconductor platform 130 and having a smaller thickness, and a second portion 122 located below the semiconductor platform 130 and having a larger thickness. Thereafter, the aforementioned mask is removed.

2 , according to some embodiments, a first insulating layer 141 is formed on the first portion 121 of the first type semiconductor layer 120 and on the semiconductor platform 130, and the first insulating layer 141 has a first opening 142 located on the first portion 121 of the first type semiconductor layer 120. The first opening 142 exposes a portion of the upper surface 121a of the first portion 121.

In some embodiments, the material of the first insulating layer 141 is mainly selected to be a material that can withstand the temperature of subsequent processes and whose material properties will not be degraded. The first insulating layer 141 may include silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, other suitable materials, or a combination of the foregoing materials.

In some embodiments, the first insulating layer 141 may be formed by chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), or other suitable methods. In some embodiments, the first insulating layer 141 includes silicon oxide and is formed by a plasma enhanced chemical vapor deposition (PECVD) process.

Furthermore, since the first insulating layer 141 serves as a protective layer for the light-emitting element 10, it needs to have a sufficient thickness to block current leakage. In some embodiments, the thickness H1 of the first insulating layer 141 is in the range of about 500Å to about 5000Å, more specifically, in the range of about 1500Å to about 2500Å, for example, about 2000Å. However, the present disclosure is not limited to the aforementioned numerical values and numerical ranges. In some embodiments, the thickness H1 of the first opening 142 depends on the thickness H2 of the subsequently formed III-V compound semiconductor layer 150 (FIGS. 3A and 3B), which will be described in detail later.

In some embodiments, the width W _O1 of the first opening 142 in the direction D2 (eg, the X direction) corresponds to the width W1 of the subsequently formed III-V compound semiconductor layer 150 ( FIGS. 3A and 3B ).

The structure shown in FIG. 2 can be manufactured by, for example (but not limited to), the following method: First, an insulating material layer (not shown) is deposited to conformally cover the first type semiconductor layer 120 and the semiconductor platform 130. Thereafter, the insulating material layer can be patterned by optical lithography and etching processes. For example, a patterned photoresist (not shown) is formed above the insulating material layer, and an etching process is performed on the insulating material layer according to the patterned photoresist, such as by a dry etching process, a wet etching process, or a combination of the aforementioned etching processes, to form a first insulating layer 141 having a first opening 142, wherein the first opening 142 exposes the upper surface 121a of the first portion 121 of the first type semiconductor layer 120.

3A and 3B , according to some embodiments, a III-V compound semiconductor layer 150 is formed in the first opening 142 , and the III-V compound semiconductor layer 150 contacts the first portion 121 of the first type semiconductor layer 120 .

Furthermore, FIG. 3B is a top view of the first insulating layer 141 having the first opening 142 and the III-V compound semiconductor layer 150 located in the first opening 142 in the light emitting element 10 according to an embodiment of the present disclosure, and FIG. 3A is drawn along the section line A-A' in FIG. 3B. In some embodiments, when viewed from above the substrate 100, the outline of the first opening 142 surrounds the III-V compound semiconductor layer 150.

According to some embodiments, the first insulating layer 141 is a portion covering the upper surface 121a of the first portion 121 of the first type semiconductor layer 120, and extends along the side surface of the second portion 122 to cover the side surface and the upper surface of the semiconductor platform 130, including covering the side surface 131s of the active region 131 and the side surface 132s and the upper surface 132a of the second type semiconductor layer 132. And the first insulating layer 141 is in contact with the side surface 150s of the III-V compound semiconductor layer 150, but does not cover the upper surface 150a of the III-V compound semiconductor layer 150.

In some embodiments, the thickness H2 of the formed III-V compound semiconductor layer 150 in the stacking direction D1 is less than the thickness H1 of the first insulating layer 141 in the stacking direction D1 (i.e., H2＜H1). Therefore, as shown in FIG. 3A , after the III-V compound semiconductor layer 150 is formed, in the stacking direction D1, the upper surface 150a of the III-V compound semiconductor layer 150 is lower than the upper surface 141a of the first insulating layer 141 adjacent to the III-V compound semiconductor layer 150. In some embodiments, the thickness H2 of the III-V compound semiconductor layer 150 may be greater than or equal to the thickness H1 of the first insulating layer 141.

In some embodiments, the thickness H2 of the III-V compound semiconductor layer 150 is in the range of about 5 nm to about 200 nm, more specifically, in the range of about 30 nm to about 150 nm, such as in the range of about 80 nm to about 100 nm. However, the present disclosure is not limited to the aforementioned values and value ranges.

In some embodiments, after forming the III-V compound semiconductor layer 150, an inner sidewall 142s of the first opening 142 of the first insulating layer 141 extends upward along the side surface 150s of the III-V compound semiconductor layer 150. As shown in FIG. 3A, the first opening 142 exposes all portions of the upper surface 150a of the III-V compound semiconductor layer 150. In some embodiments, from a cross-sectional view, the inner sidewall 142s of the first opening 142 is an inclined sidewall, and the first opening 142 is an inverted trapezoidal opening.

In some embodiments, the III-V compound semiconductor layer 150 is a low contact resistance layer. In one example, the contact resistance between the III-V compound semiconductor layer 150 and the electrode 170 ( FIG. 6A ) formed subsequently is lower than the contact resistance between the first semiconductor layer 120 and the electrode 170. In some embodiments, the conductivity of the III-V compound semiconductor layer 150 is higher than that of the first semiconductor layer 120 by adjusting the material composition, the conductive type doping type, or the conductive type doping concentration, thereby reducing the contact resistance with the electrode 170.

In subsequent manufacturing processes, a metal electrode of the embodiment, such as the electrode 170 shown in FIG. 6A (also referred to as an n-metal electrode in this example), is deposited on the low contact resistance III-V compound semiconductor layer 150 to form a good ohmic contact. Furthermore, compared to directly depositing the electrode 170 on the first portion 121 of the first type semiconductor layer 120, the structural configuration proposed in the embodiment can make it easier to achieve good ohmic contact between the electrode 170 and the underlying first type semiconductor layer 120 through the provision of a semiconductor material with low contact resistance (i.e., the III-V compound semiconductor layer 150), and at the same time, it can reduce the alloy temperature of the electrode 170, making the electrode 170 smoother and improving the reflectivity, thereby enhancing the luminous efficiency of the applied light-emitting element 10.

According to the embodiments disclosed herein, the material of the III-V compound semiconductor layer 150 is a semiconductor material that can withstand the temperature of the subsequent process and does not deteriorate the material properties. In some embodiments, the material of the III-V compound semiconductor layer 150 includes n-type gallium nitride (n-GaN), n-type gallium indium nitride (n-InGaN), n-type aluminum gallium nitride (n-AlGaN), n-type aluminum gallium indium nitride (n-AlGaInN), other suitable materials, or a combination of the foregoing materials. Furthermore, in some examples, the conductivity of the III-V compound semiconductor layer 150 is better than that of the first semiconductor layer 120. The aluminum (Al) composition of the material of the III-V compound semiconductor layer 150 is less than the aluminum composition of the material of the first type semiconductor layer 120. In some examples, the material of the III-V compound semiconductor layer 150 includes gallium nitride or aluminum gallium nitride, wherein the composition of gallium is greater than the composition of aluminum. In some examples, the material of the III-V compound semiconductor layer 150 includes n-type gallium nitride. In some examples, the doping concentration of the III-V compound semiconductor layer 150 is greater than the doping concentration of the first type semiconductor layer 120. In some examples, the doping concentration of the III-V compound semiconductor layer 150 is greater than 1x10 ¹⁸ cm ^-3 , for example, greater than 5x10 ¹⁸ cm ^-3 .

In some embodiments, the III-V compound semiconductor layer 150 may be formed by a metal organic chemical vapor deposition (MOCVD) process, an ultra high vacuum chemical vapor deposition (UHV-CVD) process, a molecular beam epitaxy (MBE) process, a hydride vapor phase epitaxy (HVPE) process, or other suitable processes. In one example, n-type gallium nitride (n-GaN) is deposited by a metal organic chemical vapor deposition process to form the III-V compound semiconductor layer 150.

Thereafter, according to the embodiment of the present disclosure, the first insulating layer 141 is retained, and another opening is formed in the first insulating layer 141 above the semiconductor platform 130 to define the position of the electrode to be disposed on the semiconductor platform 130 in the subsequent process, as described in detail below.

Referring to FIG. 4 , according to some embodiments, after forming the III-V compound semiconductor layer 150, a second opening 143 is formed in the first insulating layer 141, and the second opening 143 exposes a portion of the upper surface 132a of the second type semiconductor layer 132. In some embodiments, the width W _O2 of the second opening 143 in the direction D2 (e.g., the X direction) corresponds to the width W2 of the subsequent reflective structure 160 (shown in FIG. 5 ) in the direction D2. In some embodiments, when forming the first opening 142 of the first insulating layer 141, the second opening 143 above the semiconductor platform 130 can be formed simultaneously. A III-V compound semiconductor layer is formed in the second opening 143. The III-V compound semiconductor layer formed in the second opening 143 may be formed at the same time as the III-V compound semiconductor layer 150, or may not be formed at the same time. The III-V compound semiconductor layer formed in another opening may be made of the same material or different material as the III-V compound semiconductor layer 150, or may have the same dopant or different dopant.

According to some embodiments, the first insulating layer 141 may be patterned by optical lithography and etching processes, such as (but not limited to) the method proposed below, to form the second opening 143 structure as shown in FIG. 4. First, a patterned photoresist layer (not shown) is formed on the first insulating layer 141, and the patterned photoresist layer covers the III-V compound semiconductor layer 150. The patterned photoresist layer has a hole corresponding to the upper portion of the second semiconductor layer 132. The first insulating layer 141 is etched according to the hole, for example, by a dry etching process, a wet etching process, or a combination of the aforementioned etching processes, to form a second opening 143 in the first insulating layer 141, and the second opening 143 exposes a portion of the upper surface 132a of the second type semiconductor layer 132.

Referring to FIG. 5 , according to some embodiments, a reflective structure 160 is formed in the second opening 143 of the first insulating layer 141, wherein the reflective structure 160 in the second opening 143 is electrically connected to the second type semiconductor layer 132. In this example, the reflective structure 160 is physically in contact with the second type semiconductor layer 132. In some embodiments, the reflective structure 160 may be formed only in the second opening 143, or may extend from the second opening 143 to the outside of the second opening 143 to the first insulating layer 141, so as to increase the reflective area and improve the light extraction efficiency.

In some embodiments, the second type semiconductor layer 132 is a p-type semiconductor layer, and thus the reflective structure 160 electrically connected to the p-type semiconductor layer can also be referred to as a p-electrode, such as a p-metal electrode.

In some embodiments, the material of the reflective structure 160 includes a conductive material, and the conductive material includes a metal, such as nickel (Ni), gold (Au), silver (Ag), aluminum (Al), palladium (Pd), platinum (Pt), vanadium (V), zirconium (Zr), chromium (Cr), rhodium (Rh), or titanium (Ti). In some embodiments, the conductive material includes a metal compound, such as titanium nitride (TiN), indium tin oxide (ITO), indium zinc oxide (IZO), aluminum tin oxide (AlTO), aluminum zinc oxide (AZO), indium gallium oxide (IGO), other suitable materials, or a combination of the foregoing materials. In some embodiments, the reflective structure 160 may be a single-layer structure or a multi-layer structure. In the embodiment where the reflective structure 160 is a multi-layer structure, it includes a transparent conductive oxide layer, such as indium tin oxide, formed on the second type semiconductor layer 132, and a reflective metal layer, such as aluminum, formed on the transparent conductive oxide layer. To simplify the diagram, the reflective structure 160 in the example is drawn as a single-layer structure, but the present disclosure is not limited thereto.

The reflective structure 160 shown in FIG. 5 can be manufactured by, for example (but not limited to), the following methods. First, a conductive material can be deposited on the second type semiconductor layer 132 and filled into the second opening 143 by, for example, electron beam evaporation (e-beam evaporation), magnetron sputtering (magnetron sputtering), or other suitable methods. Thereafter, the conductive material can be formed into the reflective structure 160 at the second opening 143 by optical lithography and etching processes.

In some embodiments, the upper surface 160a of the reflective structure 160 is substantially coplanar with the upper surface 141a of the adjacent first insulating layer 141. However, the present disclosure is not limited thereto.

Furthermore, in some embodiments, as shown in FIG. 5 , the first insulating layer 141 contacts the side surface 150s of the III-V compound semiconductor layer 150 and contacts the side surface 160s of the reflective structure 160 , but the first insulating layer 141 does not cover the upper surface 150a of the III-V compound semiconductor layer 150 and the upper surface 160a of the reflective structure 160 .

6A and 6B, according to some embodiments, an electrode 170 is formed on the III-V compound semiconductor layer 150. In this example, the electrode 170 is physically in contact with the III-V compound semiconductor layer 150. The electrode 170 is electrically connected to the first type semiconductor layer 120 through the III-V compound semiconductor layer 150. According to some embodiments, the electrode 170 and the III-V compound semiconductor layer 150 have low contact resistance, thereby forming a good ohmic contact.

In some embodiments, the first semiconductor layer 120 is an n-type semiconductor layer, and thus the electrode 170 electrically connected to the n-type semiconductor layer may also be referred to as an n-electrode, such as an n-metal electrode.

Furthermore, FIG. 6B is a top view of an insulating layer with an opening, a III-V compound semiconductor layer in the opening, and an electrode on the III-V compound semiconductor layer in a light-emitting element 10 according to an embodiment of the present disclosure, and FIG. 6A is drawn along the section line A-A' in FIG. 6B. The projection range of the first portion 121 of the first type semiconductor layer 120 is shown as the cross-dot area in FIG. 6B (i.e., the range surrounded by the dotted line in the figure). In some embodiments, when looking down from the top of the substrate 100, the projection range of the III-V compound semiconductor layer 150 on the first portion 121 of the first type semiconductor layer 120 covers the projection range of the electrode 170 on the first portion 121, as shown in FIG. 6B.

According to some embodiments, as shown in FIG. 6A , the first insulating layer 141 covers the side surface 150s of the III-V compound semiconductor layer 150 and the side surface 160s of the reflective structure 160, but does not contact or cover any part of the side surface of the electrode 170. In this example, the first insulating layer 141 has an inner side wall 142s at a location corresponding to the first opening 142. When viewed from a cross section, the inner side wall 142s and the electrode 170 are separated from each other. For example, in the D2 direction (X direction), the inner side wall 142s of the first insulating layer 141 and the side surface 170s of the electrode 170 have a distance ds1.

In some embodiments, the material of the electrode 170 includes a conductive material, such as nickel (Ni), gold (Au), silver (Ag), aluminum (Al), palladium (Pd), platinum (Pt), vanadium (V), zirconium (Zr), chromium (Cr), rhodium (Rh), titanium (Ti) and/or titanium nitride (TiN), other suitable materials, or a combination of the foregoing materials. Furthermore, the electrode 170 can be a single-layer structure or a multi-layer structure. In some embodiments, the electrode 170 has a different material composition from the reflective structure 160.

The electrode 170 shown in FIGS. 6A and 6B can be manufactured by, for example (but not limited to), the following method. First, a patterned photoresist layer (not shown) is formed on the first insulating layer 141, and the patterned photoresist layer covers the first insulating layer 141, the III-V compound semiconductor layer 150, and the reflective structure 160. The patterned photoresist layer has a hole corresponding to the top of the first portion 121 of the first type semiconductor layer 120, and exposes at least a portion of the upper surface 150a of the III-V compound semiconductor layer 150. Conductive material may be deposited on the patterned photoresist layer and filled into the hole by, for example, electron beam evaporation, magnetron sputtering, or other suitable methods to contact the III-V compound semiconductor layer 150. Afterwards, an electrode 170 may be formed in the hole by, for example, removing a portion of the conductive material by a suitable process. In this example, the width of the hole of the patterned photoresist layer in the direction D2 (e.g., the X direction) corresponds to, for example, the width W3 of the electrode 170 to be formed subsequently. After forming the electrode 170, the patterned photoresist layer is removed.

In addition, in some applications, such as ultraviolet light emitting diodes, as shown in FIG. 6A , the reflective structure 160 and the electrode 170 can be electrically connected to an external circuit board by flip-chip, and packaged through appropriate packaging steps to obtain a packaged structure of the ultraviolet light emitting diode.

According to some embodiments of the present disclosure, in the manufactured light-emitting element 10, a semiconductor material layer with low contact resistance, such as the above-mentioned III-V compound semiconductor layer 150, is formed between the electrode 170 (for example, an n-metal electrode) and the first portion 121 of the first type semiconductor layer 120 to reduce the contact resistance between the electrode 170 and the first type semiconductor layer 120, thereby reducing the starting voltage of the light-emitting element 10. According to some embodiments of the present disclosure, the III-V compound semiconductor layer 150 has a specific material composition, so that its conductivity is better than the first type semiconductor layer 120, for example, the material with less aluminum (Al) content than the first type semiconductor layer 120, the material with greater doping concentration than the first type semiconductor layer 120, and/or the material with greater doping concentration than 1x10 ¹⁸ cm ^-3 , so that the electrode 170 can form a good ohmic contact with the III-V compound semiconductor layer 150 at a lower alloying temperature. In addition, the lower alloying temperature can also avoid the precipitation of electrode metal, making the electrode 170 flatter, thereby improving the electrode reflectivity, so as to enhance the light extraction efficiency of the applied light-emitting element 10.

Furthermore, according to some embodiments of the present disclosure, the first opening 142 and the second opening 143 are fabricated using the same insulating material layer (i.e., the first insulating layer 141) during the manufacturing process, so as to form the III-V compound semiconductor layer 150 and the reflective structure 160 in the first opening 142 and the second opening 143, respectively. However, in the conventional manufacturing method, at least two deposition processes are required to deposit different insulating layers, respectively, and corresponding etching processes are used to form two holes in these insulating layers above the first portion 121 and the second portion 122 of the first type semiconductor layer 120, respectively. However, there are many hydrogen atoms (such as hydrogen ions, hydrogen gas, etc.) inside the machine used in the deposition process (such as an evaporation machine). These hydrogen atoms will enter the semiconductor material layer, including the first type semiconductor layer 120 (such as an n-AlGaN layer) and the second type semiconductor layer 132 (such as a p-AlGaN layer), and easily occupy the vacancies in the defects generated during the growth (such as epitaxial growth) of these semiconductor material layers, resulting in higher impedance and affecting the electrical performance of the light-emitting element 10. The more deposition processes are performed, the greater the impact of hydrogen atoms on the electrical properties of the light-emitting element 10.

Furthermore, the deposition process requires heating and cooling to deposit the insulating material, thus generating thermal budget. The more deposition processes there are, the more times the heating and cooling are performed. For example, two deposition processes will generate two thermal budgets, and the thermal budget will affect the epitaxially grown semiconductor material layer, such as accumulating improper thermal stress in the material. Therefore, the light-emitting element 10 manufactured is likely to have electrical abnormalities due to the influence of thermal stress.

In summary, compared to the above-mentioned conventional manufacturing method, the manufacturing method proposed in the embodiment forms a first opening 142 (FIG. 2) and a second opening 143 (FIG. 4) in the first insulating layer 141 of the same layer, thereby reducing at least one insulating layer deposition process. In a specific process, such as the process of forming the III-V compound semiconductor layer 150, the first insulating layer 141 protects the active region 131 and the second type semiconductor layer 132, thereby reducing the influence of hydrogen atoms on the electrical properties of the light-emitting element 10, and also reducing the accumulation of heat accumulation, thereby reducing the influence of heat accumulation on the semiconductor material layer, thereby improving the situation where the light-emitting element 10 generates electrical abnormalities due to thermal stress.

In addition, according to the manufacturing method proposed in some embodiments of the present disclosure, the first type semiconductor layer 120, the active region 131 (for example, having a multiple quantum well structure) and the second type semiconductor layer 132 are first formed, and the semiconductor platform 130 is formed by photolithography and etching processes, and then the III-V compound semiconductor layer 150 with low contact resistance is grown. Since the manufacturing method proposed in the embodiment is to first cover the entire structure with the first insulating layer 141, including covering the first type semiconductor layer 120 and the semiconductor platform 130, and then the first insulating layer 141 is etched to define the first opening 142, and then the III-V compound semiconductor layer 150 is formed. Therefore, the configuration and manufacturing process of the III-V compound semiconductor layer 150 proposed in the embodiment will not cause degradation of the active region 131 (i.e., the active layer with a multiple quantum well structure), and thus will not affect the luminescent properties of the original light-emitting element 10, and the light-emitting element 10 still has good luminescent efficiency.

Figures 7, 8, 9 and 10 are cross-sectional schematic diagrams of the light-emitting element 10 at multiple manufacturing stages after forming the n-electrode and the p-electrode in some embodiments of the present disclosure.

7, according to some embodiments, a first barrier layer 211 is formed on the electrode 170 (e.g., the n-electrode), and a second barrier layer 212 is formed on the reflective structure 160 (e.g., the p-electrode). According to some embodiments, the first barrier layer 211 and the second barrier layer 212 can be formed in the same process. According to some embodiments, the first barrier layer 211 and the second barrier layer 212 can be formed in different processes.

In this example, the formed first barrier layer 211 covers the upper surface 170 a and the side surface 170 s of the electrode 170 , and a portion of the first barrier layer 211 adjacent to the first opening 142 contacts the III-V compound semiconductor layer 150 , for example, directly contacts the upper surface 150 a of the III-V compound semiconductor layer 150 .

In some embodiments, in the stacking direction D1, the thickness H2 of the III-V compound semiconductor layer 150 is smaller than the thickness H1 of the first insulating layer 141 ( FIG. 3A ). Therefore, the lower portion of the first barrier layer 211, such as a portion adjacent to the first opening 142 , is located in the first opening 142 , as shown in FIG. 7 .

Furthermore, according to some embodiments, the side surface 211s of the first barrier layer 211 is separated from the first insulating layer 141. For example, in the D2 direction (X direction), the side surface 211s of the first barrier layer 211 and the inner side wall 142s of the first insulating layer 141 at the first opening 142 have a distance ds2. Therefore, the first barrier layer 211 of this example does not contact the III-V compound semiconductor layer 150 and the first insulating layer 141 at the same time.

The first barrier layer 211 can improve the reflectivity of the electrode 170 (e.g., the n-electrode). In particular, if the reflectivity of the manufacturing material of the electrode 170 (e.g., the n-electrode) is not high enough, the provision of the first barrier layer 211 and the appropriate material selection can improve the reflectivity of the electrode 170. Furthermore, the first barrier layer 211 covers the electrode 170 (including covering the side surface 170s and the upper surface 170a), which can prevent the diffusion of the material of the electrode 170 (e.g., preventing metal diffusion).

In some embodiments, the second barrier layer 212 located on the reflective structure 160 (e.g., the p-electrode) has a bottom area smaller than the area of the upper surface 160a of the reflective structure 160; that is, the second barrier layer 212 exposes a portion of the upper surface 160a of the reflective structure 160. In some embodiments, the second barrier layer 212 located on the reflective structure 160 has a bottom area greater than or equal to the area of the upper surface 160a of the reflective structure 160, that is, the second barrier layer 212 may completely cover the upper surface 160a of the reflective structure 160, or even cover the reflective structure 160.

The second barrier layer 212 can improve the reflectivity of the reflective structure 160. In particular, if the transmittance of the manufacturing material of the reflective structure 160 (such as the p-electrode) is greater than the reflectivity, the provision of the second barrier layer 212 and the appropriate material selection can improve the reflectivity of the reflective structure 160.

In some embodiments, the first barrier layer 211 and the second barrier layer 212 include chromium (Cr), aluminum (Al), other suitable materials, or a combination of the foregoing materials. In some examples, the first barrier layer 211 and the second barrier layer 212 include stacked chromium layers and aluminum layers. In some examples, the first barrier layer 211 and the second barrier layer 212 include a chromium-based material alloy, such as a chromium-aluminum (Cr-Al) binary alloy or a multi-component alloy containing chromium-aluminum. The materials of the first barrier layer 211 and the second barrier layer 212 can be the same or different. Furthermore, the first barrier layer 211 and the second barrier layer 212 can be manufactured by suitable optical lithography and etching processes, which are omitted here.

8, according to some embodiments, a second insulating layer 220 is formed to cover the structure shown in FIG. 7, for example, the second insulating layer 220 is formed on the first insulating layer 141, the reflective structure 160, the first barrier layer 211, the electrode 170, and the second barrier layer 212. In addition to strengthening the electrical insulation between the reflective structure 160 and the electrode 170, the second insulating layer 220 can also provide better protection for the structure, such as providing better mechanical strength and preventing moisture from entering the semiconductor material layer below, so as to prevent the material layers such as the first type semiconductor layer 120, the active region 131 (e.g., having a multiple quantum well structure) and the second type semiconductor layer 132 from being damaged by moisture erosion.

Furthermore, the second insulating layer 220 includes holes 221 and holes 222 to respectively expose the upper surface 211a of the first barrier layer 211 and the upper surface 212a of the second barrier layer 212. The holes 221 and holes 222 can be made by known optical lithography and etching methods, which will not be described in detail herein.

In some embodiments, since the side surface 211s of the first barrier layer 211 and the inner side wall 142s of the first insulating layer 141 at the first opening 142 have a distance ds2, the second insulating layer 220 will fill in the gap. Therefore, in this example, after the second insulating layer 220 is formed, a portion of the second insulating layer 220 is located in the first opening 142 of the first insulating layer 141. And, as shown in FIG. 8, a portion of the second insulating layer 220 contacts (e.g., physically contacts) the upper surface 150a of the III-V compound semiconductor layer 150. Therefore, in other words, in some embodiments, along the D2 direction (X direction), a portion of the first barrier layer 211 and a portion of the second insulating layer 220 are also disposed between the first insulating layer 141 and the electrode 170 (for example, between the inner wall 142s and the side surface 170s), as shown in FIG. 8 .

Furthermore, in this example, the upper surface 150a of the III-V compound semiconductor layer 150 in the first opening 142 is covered by multiple material layers, including being covered and contacted (such as physically contacted) by at least three material layers, including the electrode 170, the first barrier layer 211 and the second insulating layer 220.

In some embodiments, the material of the second insulating layer 220 includes oxides, or other suitable materials. For example, the second insulating layer 220 includes silicon-containing oxides, metal oxides, other suitable materials, or a combination of the foregoing materials. The second insulating layer 220 can be a single-layer structure or a multi-layer structure. In some embodiments, the second insulating layer 220 can be a multi-layer structure formed by alternating and stacking at least two materials with different refractive indices, such as a distributed Bragg reflector (DBR). In one example, the second insulating layer 220 includes silicon oxide (SiO ₂ ) and aluminum oxide (Al ₂ O ₃ ). In some other embodiments, the second insulating layer 220 can be a multi-layer structure, and the materials of each layer of the multi-layer structure are different. In some other embodiments, the second insulating layer 220 includes two or more non-conductive layers of different materials, for example, non-conductive layers of the same material (e.g., both are SiO ₂ ) but with different film properties (leakage current prevention). The different film properties refer to different physical properties (e.g., refractive index) or chemical properties (e.g., etching properties). Different film properties can be achieved by changing the formation method of the non-conductive layer. The second insulating layer 220 can be formed by chemical vapor deposition (CVD), physical vapor deposition (physical vapor deposition; PVD), atomic layer deposition (atomic layer deposition; ALD), plasma enhanced chemical vapor deposition (plasma enhanced chemical vapor deposition; PECVD), or other suitable methods. In some embodiments, the second insulating layer 220 and the first insulating layer 141 are formed in the same or different manners. In one example, the second insulating layer 220 is formed by first forming aluminum oxide by an atomic layer deposition process and then forming silicon oxide by a plasma assisted chemical vapor deposition process. Compared with other processes, the film layer formed by atomic level deposition has a higher density and better step coverage, which can enhance the barrier effect of the second insulating layer 220 against the outside world, reduce the probability of water vapor or other foreign matter invading the light-emitting element 10, and thus improve the reliability of the light-emitting element 10.

In some embodiments, the second insulating layer 220 and the first insulating layer 141 include different material compositions. Therefore, the side surface 150s and the upper surface 150a of the III-V compound semiconductor layer 150 are in contact with insulating layers of different material compositions. Specifically, as shown in FIG. 8 , the side surface 150s of the III-V compound semiconductor layer 150 is in contact with the first insulating layer 141, but not in contact with the second insulating layer 220; the upper surface 150a of the III-V compound semiconductor layer 150 is in contact with the second insulating layer 220, but not in contact with the first insulating layer 141.

9, according to some embodiments, a first connection portion 231 and a second connection portion 232 are respectively formed in the hole 221 and the hole 222 of the second insulating layer 220. In this example, the first connection portion 231 electrically connects the first barrier layer 211 and the electrode 170 below, and the second connection portion 232 electrically connects the second barrier layer 212 and the reflective structure 160 below.

In some embodiments, the materials of the first connection portion 231 and the second connection portion 232 include nickel (Ni), gold (Au), silver (Ag), aluminum (Al), palladium (Pd), platinum (Pt), vanadium (V), zirconium (Zr), chromium (Cr), titanium (Ti) and/or titanium nitride (TiN), other suitable materials, or a combination of the foregoing materials. The first connection portion 231 and the second connection portion 232 can be manufactured by suitable deposition processes, photolithography and etching processes, which are not described in detail here.

In some embodiments, the materials of the first connection portion 231 and the second connection portion 232 may be the same or different. Furthermore, the materials of the first connection portion 231 and the second connection portion 232 and the materials of the first barrier layer 211 and the second barrier layer 212 may be the same or different.

Referring to FIG. 10 , according to some embodiments, pads are formed on the connection portion for electrical connection between the light emitting element 10 and other components. In this example, a first pad 241 and a second pad 242 are formed on the first connection portion 231 and the second connection portion 232, respectively. In this example, the first pad 241 electrically connects the first connection portion 231, the first barrier layer 211, and the electrode 170 below, and the second pad 242 electrically connects the second connection portion 232, the second barrier layer 212, and the reflective structure 160 below.

In some embodiments, the materials of the first pad 241 and the second pad 242 include gold (Au), tin (Sn), other suitable materials, or a combination of the foregoing materials. The first pad 241 and the second pad 242 can be manufactured by suitable deposition processes, optical lithography and etching processes, which are not described in detail here.

In some embodiments, the first pad 241 and the second pad 242 include the same material. Furthermore, the material of the first pad 241 and the second pad 242 is the same as or different from the material of the first connecting portion 231 and the second connecting portion 232.

In some embodiments, the first pad 241 and the first connecting portion 231 can be continuously formed in the same process step, in which case the first pad 241 and the first connecting portion 231 have the same material and there is no obvious interface between the two; the second pad 242 and the second connecting portion 232 can be continuously formed in the same process step, in which case the second pad 242 and the second connecting portion 232 have the same material and there is no obvious interface between the two.

FIG. 11 is a cross-sectional view of another light emitting element 20 according to some embodiments of the present disclosure. The same (or similar) component numbers are used for the same (or similar) components as those in FIG. 10, and the contents of these components in the above embodiments can be referred to.

11 , according to some embodiments, the light emitting element 20 includes a first type semiconductor layer 120, a semiconductor platform 130 (including an active region 131 and a second type semiconductor layer 132) located on the second portion 122 of the first type semiconductor layer 120 and not covering the first portion 121, a first insulating layer 141 located on the first portion 121 of the first type semiconductor layer 120 and on the semiconductor platform 130, a III-V compound semiconductor layer 150 located in a first opening 142 of the first insulating layer 141, a reflective structure 160 located on the second type semiconductor layer 132, The electrode 170 is located on the III-V compound semiconductor layer 150, the first barrier layer 311 is located on the electrode 170 (e.g., the n-electrode), the second barrier layer 312 is located on the reflective structure 160 (e.g., the p-electrode), the second insulating layer 220 is located above the reflective structure 160, the electrode 170, the first barrier layer 311, and the second barrier layer 312, the first connecting portion 231 and the second connecting portion 232 are located on the first barrier layer 311 and the second barrier layer 312, respectively, and the first pad 241 and the second pad 242 are located on the first connecting portion 231 and the second connecting portion 232. The details of the configuration, materials, and manufacturing methods of the components shown in FIG. 11 can refer to the description of the relevant contents of the above-mentioned FIGS. 1 to 10, and will not be repeated here.

The structure shown in FIG. 11 is different from that shown in FIG. 10 in that the first barrier layer 311 located on the electrode 170 exposes the side surface 170s of the electrode 170. In this example, as shown in FIG. 11, the first barrier layer 311 is located on the upper surface 170a of the electrode 170 and exposes a portion of the upper surface 170a. Therefore, the side surface 170s of the electrode 170 is covered by the second insulating layer 220 deposited subsequently. The structure shown in FIG. 11 can be applied to (but not limited to) manufacturing light-emitting devices of small size/narrow size.

In some embodiments, in the stacking direction D1, the thickness H2 of the III-V compound semiconductor layer 150 is less than the thickness H1 of the first insulating layer 141 ( FIG. 3A ). Therefore, a portion of the second insulating layer 220 is located in the first opening 142 of the first insulating layer 141 and contacts the side surface 170s of the electrode 170 , as shown in FIG. 11 .

As shown in the structure of FIG. 10 , the upper surface 150a of the III-V compound semiconductor layer 150 is covered and contacted by the electrode 170, the first barrier layer 211, and the second insulating layer 220. Unlike FIG. 10 , in the example of FIG. 11 , the upper surface 150a of the III-V compound semiconductor layer 150 is covered and contacted by the electrode 170 and the second insulating layer 220, and the first barrier layer 311 does not contact the upper surface 150a of the III-V compound semiconductor layer 150.

In some embodiments, the second insulating layer 220 and the first insulating layer 141 include different material compositions. Therefore, the side surface 150s and the upper surface 150a of the III-V compound semiconductor layer 150 are in contact with insulating layers of different material compositions. Specifically, as shown in FIG. 11 , the side surface 150s of the III-V compound semiconductor layer 150 is in contact with the first insulating layer 141, but not in contact with the second insulating layer 220; the upper surface 150a of the III-V compound semiconductor layer 150 is in contact with the second insulating layer 220, but not in contact with the first insulating layer 141.

Furthermore, in some embodiments, the width W4 of the first barrier layer 311 in the direction D2 (eg, the X direction) is greater than the width W5 of the first connection portion 231 in the direction D2. In the embodiment where the electrode 170 is an n-electrode, the width W4 is greater than the width W5 so that the n-electrode can disperse the current well.

FIG. 12 is a cross-sectional view of another light-emitting element 30 according to some embodiments of the present disclosure. The same (or similar) components in FIG. 12 as those in FIG. 10 are labeled with the same (or similar) component numbers, and the contents of these components in the above embodiments can be referred to. The light-emitting elements in FIG. 12 and FIG. 10 include the same components, so the details of the configuration, materials and manufacturing methods of each component shown in FIG. 12 can refer to the description of the relevant contents of FIG. 1 to FIG. 10, and will not be repeated here.

The structure shown in FIG. 12 is different from that shown in FIG. 10 in that the upper surface 150 a of the III-V compound semiconductor layer 150 shown in FIG. 12 is covered and contacted by the electrode 170 and the first barrier layer 411 , while the second insulating layer 220 does not contact the upper surface 150 a of the III-V compound semiconductor layer 150 .

When the light emitted from the active region 131 irradiates the III-V compound semiconductor layer 150, light absorption may occur, and the degree of light absorption depends on the material of the III-V compound semiconductor layer 150. Reducing the area of the III-V compound semiconductor layer 150 can improve this light absorption. In some embodiments, the width W7 of the III-V compound semiconductor layer 150 in the direction D2 (e.g., the X direction) may be reduced, so that the width W6 of the first barrier layer 411 in the direction D2 may be close to or substantially equal to the width W7 of the III-V compound semiconductor layer 150 in the direction D2. In one example, the side surface 411s of the first barrier layer 411 is substantially aligned with the side surface 150s of the III-V compound semiconductor layer 150, as shown in FIG. 12 .

FIG. 13 is a cross-sectional view of another light-emitting element 40 according to some embodiments of the present disclosure. The same (or similar) component numbers are used for the components in FIG. 13 that are the same as (or similar to) those in FIG. 10, and the contents of these components in the above embodiments can be referred to. Furthermore, the details of the configuration, materials and manufacturing methods of the components shown in FIG. 13 can be referred to the description of the relevant contents of FIG. 1 to FIG. 10, and will not be repeated here.

In some embodiments, as shown in FIG. 13 , a first barrier layer 511 is formed on an electrode 172 (e.g., an n-electrode), and a second barrier layer 512 is formed on a reflective structure 160 (e.g., a p-electrode). The first barrier layer 511 exposes a portion of an upper surface 172a of the electrode 172 and exposes a side surface 172s of the electrode 172. Therefore, the side surface 172s of the electrode 172 is covered by the second insulating layer 220 deposited subsequently. The second barrier layer 512 exposes a portion of an upper surface 160a of the reflective structure 160.

Furthermore, as mentioned above, the material of the III-V compound semiconductor layer 150 may absorb light, so the reduced area of the III-V compound semiconductor layer 150 can improve the absorption. In some embodiments, the width W8 of the III-V compound semiconductor layer 150 in the direction D2 (e.g., the X direction) is smaller than the width W9 of the electrode 172 in the direction D2.

FIG. 14A and FIG. 14B are schematic diagrams of a structure including an electrode 172, a III-V compound semiconductor layer 150, and a first type semiconductor layer 120 according to the structure of FIG. 13. FIG. 14B is a top view, and FIG. 14A is a schematic cross-sectional view drawn along the section line A-A' in FIG. 14B. The projection range of the III-V compound semiconductor layer 150 on the first portion 121 of the first type semiconductor layer 120 is represented by the area surrounded by the dotted line in FIG. 14B. In some embodiments, when viewed from above the substrate 100, the projection range of the electrode 170 on the first portion 121 of the first type semiconductor layer 120 covers the projection range of the III-V compound semiconductor layer 150 on the first portion 121, as shown in FIG. 14B.

Therefore, unlike the structures shown in FIGS. 10 , 11 and 12 , the upper surface 150 a of the III-V compound semiconductor layer 150 shown in FIG. 13 is completely covered and contacted by the electrode 172 (e.g., the n-electrode), while the first barrier layer 511 and the second insulating layer 220 do not contact the upper surface 150 a of the III-V compound semiconductor layer 150 .

In this example, the electrode 172 extends to fill the first opening 142 of the first insulating layer 141 and contacts the first insulating layer 141. Specifically, as shown in FIG. 13 , the electrode 172 includes a protrusion 172P and a main body 172M connected to the protrusion 172P. The protrusion 172P and the main body 172M are, for example, formed in one piece. The area of the bottom surface of the main body 172M is larger than the area of the upper surface 150a of the III-V compound semiconductor layer 150. The protrusion 172P is located in the first opening 142, and the bottom 172M-b of the main body 172M contacts the first insulating layer 141.

According to some embodiments, as shown in FIG. 13 , the side surface 150s of the III-V compound semiconductor layer 150 is covered by the first insulating layer 141, and the first insulating layer 141 contacts some parts of the electrode 172. For example, the first insulating layer 141 contacts the side surface 172P-s of the protrusion 172P of the electrode 172 and contacts the bottom 172M-b of the main body 172M. Therefore, the electrode 172 in this example also does not contact the side surface 150s of the III-V compound semiconductor layer 150.

In summary, according to some embodiments of the present disclosure, a III-V compound semiconductor layer 150 is formed between the n-electrode (e.g., electrode 170 and electrode 172) of the light-emitting element and the first portion 121 of the first type semiconductor layer 120, so that the n-electrode can form a good ohmic contact with the III-V compound semiconductor layer 150. As in some of the above embodiments, the n-electrode (e.g., electrode 170) of the light-emitting element is directly in contact with the III-V compound semiconductor layer 150, or the n-electrode (e.g., electrode 172) is directly in contact with the III-V compound semiconductor layer 150 and the first insulating layer 141. The good ohmic contact between the n-electrode and the III-V compound semiconductor layer of the embodiment can reduce the alloy temperature of the electrode and the resistance of the current path under the n-electrode, make the electrode smoother, and improve the reflectivity, thereby improving the luminous efficiency of the light-emitting element. Furthermore, according to the process proposed in the embodiment, the opening for setting the III-V compound semiconductor layer and the p-electrode (such as the reflective structure 160) is formed by the same insulating material layer (such as the first insulating layer 141). This can reduce the number of deposition processes, thereby reducing the damage and heat accumulation (thermal budget) caused to the semiconductor material layer by the process gas and temperature during the deposition period. Therefore, the method of the embodiment can reduce the impact of the process on the electrical performance of the light-emitting element, so that the light-emitting element has more stable electrical performance and electronic properties with good reliability. In addition, according to the process proposed in the embodiment, the III-V compound semiconductor layer is manufactured after forming the n-type semiconductor layer (such as the first type semiconductor layer 120) and the semiconductor platform (such as the second type semiconductor layer 132 and the active region 131 having the active layer), so the process proposed in the embodiment does not affect the epitaxial quality of the structure. In summary, the light-emitting element and the manufacturing method thereof proposed in the embodiment can improve the light-emitting efficiency, improve the electronic characteristics and enhance the reliability.

10, 20, 30, 40: light emitting element 100: substrate 110: buffer layer 120: first type semiconductor layer 121: first portion 122: second portion 130: semiconductor platform 131: active region 132: second type semiconductor layer 141: first insulating layer 142: first opening 143: second opening 150: III-V compound semiconductor layer 160: reflective structure 170, 172: electrode 172P: protrusion 172M: main body 172M-b: bottom of the main body 121a, 132a, 141a, 1 50a, 160a, 170a, 172a, 211a, 212a: upper surface 131s, 132s, 150s, 160s, 170s, 211s, 172s, 172P-s: side surface 142s: inner side wall 211, 311, 411, 511: first barrier layer 212, 312, 412, 512: second barrier layer 220: second insulating layer 221, 222: hole 231: first connecting portion 232: second connecting portion 241: first pad 242: second pad H1, H2: thickness W _O1 , W _O2 , W1, W2, W3, W4, W5, W6, W7, W8, W9: Width ds1, ds2: Distance D1, D2: Direction A-A': Section line

Figures 1, 2, 3A, 4, 5, and 6A are schematic cross-sectional views of a light-emitting element at multiple intermediate manufacturing stages according to some embodiments of the present disclosure. Figures 3B and 6B are top views of a light-emitting element at an intermediate manufacturing stage of an embodiment, wherein Figures 3A and 6A are drawn along the section lines A-A’ in Figures 3B and 6B, respectively. Figures 7, 8, 9, and 10 are schematic cross-sectional views of a light-emitting element at multiple manufacturing stages after forming an n-electrode and a p-electrode according to some embodiments of the present disclosure. Figure 11 is a schematic cross-sectional view of another light-emitting element at multiple intermediate manufacturing stages according to some embodiments of the present disclosure. Figure 12 is a schematic cross-sectional view of another light-emitting element at multiple intermediate manufacturing stages according to some embodiments of the present disclosure. FIG. 13 shows a schematic cross-sectional view of another light-emitting element at multiple intermediate manufacturing stages according to some embodiments of the present disclosure. FIG. 14A and FIG. 14B are schematic views of a structure including an electrode, a III-V compound semiconductor layer, and a first-type semiconductor layer according to the structure of FIG. 13. Among them, FIG. 14B is a top view, and FIG. 14A is a schematic cross-sectional view drawn along the section line A-A’ in FIG. 14B.

100: Base

110: Buffer layer

120: Type I semiconductor layer

121: Part 1

122: Part 2

130:Semiconductor platform

131: Active area

132: Type II semiconductor layer

141: First insulation layer

150: III-V compound semiconductor layer

160:Reflection structure

170:Electrode

121a,141a,150a,160a: Upper surface

131s,132s,160s,170s: side surface

142s: medial wall

W1,W3:Width

ds1: Spacing

D1,D2: Direction

Claims (30)

A light-emitting element comprises: A first-type semiconductor layer having a first portion and a second portion connected to the first portion; A semiconductor platform located on the second portion and not covering the first portion, wherein the semiconductor platform comprises an active region and a second-type semiconductor layer sequentially stacked on the second portion in a stacking direction; A first insulating layer covering the first portion and the semiconductor platform, wherein the first insulating layer has a first opening located on the first portion and a second opening located on the second-type semiconductor layer; A III-V compound semiconductor layer located in the first opening and contacting the first portion, wherein, when viewed from above, the outline of the first opening surrounds the III-V compound semiconductor layer; A first electrode, located on the III-V compound semiconductor layer and electrically connected to the first type semiconductor layer; and A second electrode, located in the second opening and electrically connected to the second type semiconductor layer. The light-emitting element of claim 1, wherein the first insulating layer has a first thickness in the stacking direction, the III-V compound semiconductor layer has a second thickness in the stacking direction, and the first thickness is greater than the second thickness. A light-emitting device as claimed in claim 1, wherein a portion of the first electrode adjacent to the III-V compound semiconductor layer is located in the first opening. The light-emitting element of claim 1, wherein, in the stacking direction, the upper surface of the III-V compound semiconductor layer is lower than the upper surface of the first insulating layer adjacent to the III-V compound semiconductor layer. The light-emitting element of claim 1, wherein the first electrode contacts the upper surface of the III-V compound semiconductor layer and/or the upper surface of the first insulating layer. A light-emitting element as claimed in claim 5, wherein, when viewed from above, the projection range of the III-V compound semiconductor layer on the first part covers the projection range of the first electrode on the first part. A light-emitting element as claimed in claim 5, wherein, in a top view, a projection range of the first electrode on the first portion covers a projection range of the III-V compound semiconductor layer on the first portion. The light-emitting element of claim 1, wherein the first insulating layer includes an inner wall defining the first opening, and when viewed from a cross-section, there is a gap between the inner wall and the first electrode. As in claim 1, the light-emitting element further comprises a second insulating layer located above the first insulating layer, the first electrode and the second electrode. A light-emitting element as claimed in claim 9, wherein a portion of the second insulating layer contacts the upper surface of the III-V compound semiconductor layer. A light-emitting element as claimed in claim 9, wherein a portion of the second insulating layer is located in the first opening of the first insulating layer. A light-emitting element as claimed in claim 9, wherein the composition of the second insulating layer is different from the composition of the first insulating layer. The light-emitting element of claim 1 further comprises: a first barrier layer formed on the first electrode; and a second barrier layer formed on the second electrode. The light-emitting element of claim 13, wherein the first barrier layer covers the upper surface and the side surface of the first electrode, and a portion of the first barrier layer adjacent to the first opening contacts the III-V compound semiconductor layer. The light-emitting element of claim 13, wherein a portion of the first barrier layer is located in the first opening of the first insulating layer. A method for manufacturing a light-emitting element comprises: Forming a first-type semiconductor layer and a semiconductor platform on a substrate, wherein the first-type semiconductor layer has a first portion and a second portion connected to the first portion, the semiconductor platform is formed on the second portion and does not cover the first portion, and the semiconductor platform comprises an active region and a second-type semiconductor layer sequentially stacked on the second portion in a stacking direction; Forming a first insulating layer on the first portion and the semiconductor platform, the first insulating layer having a first opening located on the first portion; Forming a III-V compound semiconductor layer in the first opening, and the III-V compound semiconductor layer contacts the first portion, wherein, when viewed from above, the outline of the first opening surrounds the III-V compound semiconductor layer; A first electrode is formed on the III-V compound semiconductor layer, and the first electrode is electrically connected to the first type semiconductor layer; and a second electrode is formed in a second opening of the first insulating layer, wherein the second opening is located on the second type semiconductor layer, and the second electrode is electrically connected to the second type semiconductor layer. The method for manufacturing a light-emitting element as claimed in claim 16, wherein forming the first insulating layer comprises: Depositing an insulating material layer to conformally cover the first type semiconductor layer and the semiconductor platform; and Patterning the insulating material layer to form the first opening of the first insulating layer, wherein the first opening exposes a portion of the upper surface of the first portion. A method for manufacturing a light-emitting element as claimed in claim 16, wherein after the III-V compound semiconductor layer is formed, in the stacking direction, the upper surface of the III-V compound semiconductor layer is lower than the upper surface of the first insulating layer adjacent to the III-V compound semiconductor layer. A method for manufacturing a light-emitting element as claimed in claim 16, wherein the first insulating layer formed has a first thickness in the stacking direction, and the III-V compound semiconductor layer formed has a second thickness in the stacking direction, and the first thickness is greater than the second thickness. A method for manufacturing a light-emitting element as claimed in claim 16, wherein a portion of the first electrode adjacent to the III-V compound semiconductor layer is located in the first opening. A method for manufacturing a light-emitting element as claimed in claim 16, wherein, when viewed from above, a projection range of the III-V compound semiconductor layer on the first portion of the first type semiconductor layer covers a projection range of the first electrode on the first portion. A method for manufacturing a light-emitting element as claimed in claim 16, wherein, when viewed from above, a projection range of the first electrode on the first portion of the first-type semiconductor layer covers a projection range of the III-V compound semiconductor layer on the first portion. A method for manufacturing a light-emitting element as claimed in claim 16, wherein the first insulating layer includes an inner wall defining the first opening, and when viewed from a cross-section, there is a gap between the inner wall and the first electrode. A method for manufacturing a light-emitting element as claimed in claim 16, wherein the first electrode extends to fill the first opening of the first insulating layer and contacts the first insulating layer. The manufacturing method of the light-emitting element of claim 16 further comprises: forming a first barrier layer on the first electrode; and forming a second barrier layer on the second electrode. A method for manufacturing a light-emitting element as claimed in claim 25, wherein the first barrier layer formed covers the upper surface and the side surface of the first electrode, and a portion of the first barrier layer adjacent to the first opening contacts the III-V compound semiconductor layer. A method for manufacturing a light-emitting device as claimed in claim 25, wherein a portion of the first barrier layer adjacent to the first opening is located in the first opening. The manufacturing method of the light-emitting element of claim 28 further comprises: Forming a second insulating layer above the first insulating layer, the first electrode, the first barrier layer, the second electrode and the second barrier layer. A method for manufacturing a light-emitting element as claimed in claim 28, wherein a portion of the second insulating layer contacts the upper surface of the III-V compound semiconductor layer. A method for manufacturing a light-emitting element as claimed in claim 28, wherein a portion of the second insulating layer is located in the first opening of the first insulating layer.