TW202410620A - Power supply device with high output stability - Google Patents

Abstract

A power supply device with high output stability includes a bridge rectifier, a boost inductor, a power switch element, a first PWM (Pulse Width Modulation) IC (Integrated Circuit), a first output stage circuit, a switch circuit, a transformer, a resonant capacitor, a second output stage circuit, and a detection and control circuit. The switch circuit includes a second PWM IC. The detection and control circuit selectively adjusts the OCP (Over Current Protection) characteristics of the first PWM IC and the second PWM IC according to a communication voltage.

Description

High output stability power supply

The present invention relates to a power supply, and in particular to a power supply with high output stability.

The latch-off protection mechanism of traditional power supplies has a shortcoming, that is, when a fault occurs, the AC power supply must be re-plugged and unplugged before normal operation can be resumed, which results in reduced overall output stability. On the other hand, if a computer like an eSports computer requires a large output current, it can easily cause the protection mechanism to malfunction, thus affecting the overall user experience. In view of this, it is necessary to propose a new solution to overcome the difficulties faced by previous technologies.

In a preferred embodiment, the present invention provides a power supply with high output stability, comprising: a bridge rectifier, generating a rectified potential according to a first input potential and a second input potential; a boost inductor, receiving the rectified potential; a power switch, selectively coupling the boost inductor to a ground potential according to a first pulse width modulation potential; a first pulse width modulation integrated circuit, generating the first pulse width modulation potential; a first output stage circuit, coupled to the boost inductor, and generating an intermediate potential; a switching circuit, including a second pulse width modulation integrated circuit, and A switching potential is generated according to the intermediate potential; a transformer, including a main coil, a first secondary coil, and a second secondary coil, wherein the transformer has a built-in leakage inductor and an excitation inductor, and the main coil receives the switching potential through the leakage inductor; a resonant capacitor, coupled to the excitation inductor; a second output stage circuit, coupled to the first secondary coil and the second secondary coil, and generates an output potential; and a detection and control circuit, selectively adjusting the over-current protection characteristics of the first pulse width modulation integrated circuit and the second pulse width modulation integrated circuit according to a communication potential.

In order to make the purpose, features and advantages of the present invention more clearly understood, specific embodiments of the present invention are specifically listed below and described in detail with reference to the accompanying drawings.

Certain words are used in the specification and patent claims to refer to specific components. Those skilled in the art will understand that hardware manufacturers may use different names to refer to the same component. This specification and the patent application do not use differences in names as a way to distinguish components, but differences in functions of components as a criterion for distinction. The words "include" and "include" mentioned throughout the specification and the scope of the patent application are open-ended terms, and therefore should be interpreted as "include but not limited to." The term "approximately" means that within an acceptable error range, those skilled in the art can solve the technical problem and achieve the basic technical effect within a certain error range. In addition, the word "coupling" in this specification includes any direct and indirect electrical connection means. Therefore, if a first device is coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device via other devices or connections. Two devices.

FIG. 1 is a schematic diagram showing a power supply 100 according to an embodiment of the present invention. For example, the power supply 100 can be applied to a desktop computer, a laptop computer, or an all-in-one computer. As shown in FIG. 1 , the power supply 100 includes: a bridge rectifier 110, a boost inductor LU, a power switch 120, a first pulse width modulation integrated circuit (PWM IC) 130, a first output stage circuit 140, a switching circuit 150, a transformer 170, a resonant capacitor CR, a second output stage circuit 180, and a detection and control circuit 190. It should be noted that, although not shown in FIG. 1 , the power supply 100 may further include other components, such as a voltage regulator and/or a negative feedback circuit.

The bridge rectifier 110 can generate a rectified potential VR according to a first input potential VIN1 and a second input potential VIN2, wherein one of the first input potential VIN1 and the second input potential VIN2 can have any frequency and any amplitude. AC voltage. For example, the frequency of the AC voltage can be about 50Hz or 60Hz, and the root mean square value of the AC voltage can be about 90V to 264V, but it is not limited thereto. The boost inductor LU receives the rectified potential VR. The power switch 120 can selectively couple the boost inductor LU to a ground potential VSS (eg, 0V) according to a first pulse width modulation potential VM1. For example, if the first pulse width modulation potential VM1 is a high logic level (ie, logic “1”), the power switch 120 may couple the boost inductor LU to the ground potential VSS (ie, logic “1”). , the power switch 120 can be approximated as a short-circuit path); conversely, if the first pulse width modulation potential VM1 is a low logic level (ie, logic “0”), the power switch 120 will not Boost inductor LU is coupled to ground potential VSS (ie, power switch 120 may approximate an open path). The first pulse width modulation integrated circuit 130 may be used to generate the first pulse width modulation potential VM1. The first output stage circuit 140 is coupled to the boost inductor LU and can generate an intermediate potential VE. The switching circuit 150 includes a second pulse width modulation integrated circuit 160 . The switching circuit 150 can generate a switching potential VW according to the intermediate potential VE. The transformer 170 includes a main coil 171 , a first auxiliary coil 172 , and a second auxiliary coil 173 . The transformer 170 may further have a leakage inductor LR and a magnetizing inductor LM built-in. The leakage inductor LR, the magnetizing inductor LM, and the main coil 171 may be located on the same side of the transformer 170, and the first auxiliary coil 172 and the The two secondary coils 173 can be located on opposite sides of the transformer 170 . The primary coil 171 may receive the switching potential VW via the leakage inductor LR, and the first and second secondary coils 172 and 173 may operate in response to the switching potential VW. The resonant capacitor CR is coupled to the magnetizing inductor LM. The second output stage circuit 180 is coupled to the first secondary coil 172 and the second secondary coil 173 and can generate an output potential VOUT. For example, the output potential VOUT may be a DC potential, and its potential level may be between 18V and 20V, but is not limited thereto. The detection and control circuit 190 can selectively adjust the over-current protection characteristics (Over Current Protection) of the first pulse width modulation integrated circuit 130 and the second pulse width modulation integrated circuit 160 according to an AC potential VU. OCP). The AC potential VU can come from any external device. For example, the communication potential VU can be generated by an embedded controller (EC) of a notebook computer (not shown), but it is not limited to this. Under this design, since the over-current protection characteristics of the first pulse width modulation integrated circuit 130 and the second pulse width modulation integrated circuit 160 can be dynamically adjusted, no matter where the aforementioned notebook computer is operated, In both modes, the output stability of the power supply 100 can be greatly improved.

In some embodiments, the aforementioned laptop computer can be operated in a default mode or a high-performance mode. For example, in the default mode, the aforementioned laptop computer can only perform simple word processing, while in the high-performance mode, the aforementioned laptop computer can perform complex three-dimensional image operations. If the communication potential VU indicates that the laptop computer is operating in the high-performance mode, the detection and control circuit 190 can increase the over-current protection threshold value (OCP Threshold) and the over-current protection delay time (OCP Delay Time) of each of the first pulse width modulation integrated circuit 130 and the second pulse width modulation integrated circuit 160 by a gain factor. On the contrary, if the communication potential VU indicates that the laptop computer operates in the default mode, the detection and control circuit 190 can maintain the over-current protection threshold value and the over-current protection delay time of each of the first pulse width modulation integrated circuit 130 and the second pulse width modulation integrated circuit 160 unchanged.

The following embodiments will introduce the detailed structure and operation of the power supply 100. It must be understood that these drawings and descriptions are only examples and are not intended to limit the scope of the present invention.

FIG. 2 is a circuit diagram of a power supply 200 according to an embodiment of the present invention. In the embodiment of FIG. 2, the power supply 200 has a first input node NIN1, a second input node NIN2, and an output node NOUT, and includes: a bridge rectifier 210, a boost inductor LU, a power switch 220, a first pulse width modulation integrated circuit 230, a first output stage circuit 240, a switching circuit 250, a transformer 270, a resonant capacitor CR, a second output stage circuit 280, and a detection and control circuit 290. The first input node NIN1 and the second output node NIN2 of the power supply 200 can respectively receive a first input potential VIN1 and a second input potential VIN2 from an external input power source (not shown), and the output node NOUT of the power supply 200 can be used to output an output potential VOUT to an external device, such as a laptop (not shown).

The bridge rectifier 210 includes a first diode D1, a second diode D2, a third diode D3, and a fourth diode D4. The first diode D1 has an anode and a cathode, wherein the anode of the first diode D1 is coupled to the first input node NIN1, and the cathode of the first diode D1 is coupled to a first node N1 To output the rectified potential VR. The second diode D2 has an anode and a cathode, wherein the anode of the second diode D2 is coupled to the second input node NIN2, and the cathode of the second diode D2 is coupled to the first node N1. The third diode D3 has an anode and a cathode, wherein the anode of the third diode D3 is coupled to a ground potential VSS, and the cathode of the third diode D3 is coupled to the first input node NIN1. The fourth diode D4 has an anode and a cathode, wherein the anode of the fourth diode D4 is coupled to the ground potential VSS, and the cathode of the fourth diode D4 is coupled to the second input node NIN2.

The boost inductor LU has a first terminal and a second terminal, wherein the first terminal of the boost inductor LU is coupled to the first node N1 to receive the rectified potential VR, and the second terminal of the boost inductor LU is coupled to a second node N2.

The power switch 220 includes a first transistor M1. For example, the first transistor M1 may be an N-type Metal-Oxide-Semiconductor Field-Effect Transistor (NMOSFET). The first transistor M1 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the first transistor M1 is used to receive a first pulse width modulation potential VM1, the first terminal of the first transistor M1 is coupled to the ground potential VSS, and the second terminal of the first transistor M1 is coupled to the second node N2.

The first pulse width modulation integrated circuit 230 can generate the first pulse width modulation potential VM1. For example, the first pulse width modulation potential VM1 can be maintained at a fixed potential when the power supply 200 is first initialized, and can provide a periodic clock waveform after the power supply 200 enters the normal use stage. The first pulse width modulation integrated circuit 230 has a first over-current protection threshold TH1 and a first over-current protection delay time TD1, both of which are setting parameters of over-current protection characteristics.

The first output stage circuit 240 includes a fifth diode D5 and a first capacitor C1. The fifth diode D5 has an anode and a cathode, wherein the anode of the fifth diode D5 is coupled to the second node N2, and the cathode of the fifth diode D5 is coupled to a third node N3 to output an intermediate potential VE. The first capacitor C1 has a first terminal and a second terminal, wherein the first terminal of the first capacitor C1 is coupled to the third node N3, and the second terminal of the first capacitor C1 is coupled to the ground potential VSS.

The switching circuit 250 includes a second pulse width modulation integrated circuit 260, a second transistor M2, and a third transistor M3. The second pulse width modulation integrated circuit 260 can generate a second pulse width modulation potential VM2 and a third pulse width modulation potential VM3, wherein the second pulse width modulation potential VM2 and the third pulse width modulation potential VM3 The three pulse width modulation potentials VM3 may have complementary logic levels. The second pulse width modulation integrated circuit 260 has a second over-current protection threshold value TH2 and a second over-current protection delay time TD2, both of which are setting parameters of over-current protection characteristics. The second transistor M2 and the third transistor M3 may each be an N-type MOSFET. The second transistor M2 has a control terminal (for example, a gate), a first terminal (for example, a source), and a second terminal (for example, a drain), wherein the control terminal of the second transistor M2 The terminal is used to receive the second pulse width modulation potential VM2, the first terminal of the second transistor M2 is coupled to a fourth node N4 to output a switching potential VW, and the second terminal of the second transistor M2 The terminal is coupled to the third node N3 to receive the intermediate potential VE. The third transistor M3 has a control terminal (for example: a gate), a first terminal (for example: a source), and a second terminal (for example: a drain), wherein the control terminal of the third transistor M3 The terminal is used to receive the third pulse width modulation potential VM3. The first terminal of the third transistor M3 is coupled to the ground potential VSS, and the second terminal of the third transistor M3 is coupled to the fourth node. N4.

The transformer 270 includes a main coil 271, a first secondary coil 272, and a second secondary coil 273, wherein the transformer 270 further has a built-in leakage inductor LR and an excitation inductor LM. The leakage inductor LR and the excitation inductor LM can be inherent components generated when the transformer 270 is manufactured, and they are not external independent components. The leakage inductor LR, the main coil 261, and the excitation inductor LM can all be located on the same side of the transformer 270 (for example: the primary side), and the first secondary coil 272 and the second secondary coil 273 can both be located on the opposite side of the transformer 270 (for example: the secondary side, which can be isolated from the primary side). The leakage inductor LR has a first end and a second end, wherein the first end of the leakage inductor LR is coupled to the fourth node N4 to receive the switching potential VW, and the second end of the leakage inductor LR is coupled to a fifth node N5. The main coil 271 has a first end and a second end, wherein the first end of the main coil 271 is coupled to the fifth node N5, and the second end of the main coil 271 is coupled to a sixth node N6. The excitation inductor LM has a first end and a second end, wherein the first end of the excitation inductor LM is coupled to the fifth node N5, and the second end of the excitation inductor LM is coupled to the sixth node N6. The resonant capacitor CR has a first end and a second end, wherein the first end of the resonant capacitor CR is coupled to the sixth node N6, and the second end of the resonant capacitor CR is coupled to the ground potential VSS. For example, the leakage inductor LR, the excitation inductor LM, and the resonant capacitor CR can together form a resonant tank of the power supply 200. The first sub-coil 272 has a first end and a second end, wherein the first end of the first sub-coil 272 is coupled to a seventh node N7, and the second end of the first sub-coil 272 is coupled to a common node NCM. For example, the common node NCM can be regarded as another ground potential, which can be the same as or different from the aforementioned ground potential VSS. The second sub-coil 273 has a first end and a second end, wherein the first end of the second sub-coil 273 is coupled to the common node NCM, and the second end of the second sub-coil 273 is coupled to an eighth node N8.

The second output stage circuit 280 includes a sixth diode D6, a seventh diode D7, and a second capacitor C2. The sixth diode D6 has an anode and a cathode, wherein the anode of the sixth diode D6 is coupled to the seventh node N7, and the cathode of the sixth diode D6 is coupled to the output node NOUT. The seventh diode D7 has an anode and a cathode, wherein the anode of the seventh diode D7 is coupled to the eighth node N8, and the cathode of the seventh diode D7 is coupled to the output node NOUT. The second capacitor C2 has a first terminal and a second terminal, wherein the first terminal of the second capacitor C2 is coupled to the output node NOUT, and the second terminal of the second capacitor C2 is coupled to the common node NCM.

The detection and control circuit 290 includes: a first comparator (Comparator) 292, a second comparator 294, a microcontroller unit (MCU) 296, an eighth diode D8, and a ninth diode body D9, a third capacitor C3, a fourth capacitor C4, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5, and a sixth resistor R6.

The first resistor R1 has a first end and a second end, wherein the first end of the first resistor R1 is coupled to the first node N1 to receive the rectified potential VR, and the second end of the first resistor R1 is coupled to a ninth node N9 to output a first divided potential VD1. The second resistor R2 has a first end and a second end, wherein the first end of the second resistor R2 is coupled to the ninth node N9, and the second end of the second resistor R2 is coupled to the ground potential VSS. The first pulse width modulation integrated circuit 230 can be powered by the first divided potential VD1. In detail, the first divided potential VD1 can be as described in the following equation (1):

……………………………………(1) Wherein “VD1” represents the potential level of the first divided potential VD1, “VR” represents the potential level of the rectified potential VR, “R1” represents the resistance value of the first resistor R1, and “R2” represents the resistance value of the second resistor R2.

The first comparator 292 has a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the first comparator 292 is used to receive a first divided voltage VD1, the negative input terminal of the first comparator 292 is used to receive a first control voltage VC1, and the output terminal of the first comparator 292 is coupled to a tenth node N10 to output a first comparison voltage VB1. For example, if the first divided voltage VD1 is higher than or equal to the first control voltage VC1, the first comparator 292 will be able to output a first comparison voltage VB1 with a high logic level. On the contrary, if the first divided voltage VD1 is lower than the first control voltage VC1, the first comparator 292 will be able to output a first comparison voltage VB1 with a low logic level.

The third capacitor C3 has a first terminal and a second terminal, wherein the first terminal of the third capacitor C3 is coupled to the tenth node N10 , and the second terminal of the third capacitor C3 is coupled to the ground potential VSS. The eighth diode D8 has an anode and a cathode, wherein the anode of the eighth diode D8 is coupled to the tenth node 10 , and the cathode of the eighth diode D8 is coupled to an eleventh node N11 . The third resistor R3 has a first terminal and a second terminal, wherein the first terminal of the third resistor R3 is coupled to the eleventh node N11, and the second terminal of the third resistor R3 is coupled to Ground potential VSS.

The fourth resistor R4 has a first terminal and a second terminal, wherein the first terminal of the fourth resistor R4 is coupled to the third node N3 to receive the intermediate potential VE, and the second terminal of the fourth resistor R4 It is coupled to a twelfth node N12 to output a second divided voltage potential VD2. The fifth resistor R5 has a first terminal and a second terminal, wherein the first terminal of the fifth resistor R5 is coupled to the twelfth node N12, and the second terminal of the fifth resistor R5 is coupled to Ground potential VSS. The second pulse width modulation integrated circuit 260 may be powered by the second divided voltage potential VD2. In detail, the second divided voltage potential VD2 can be described in the following equation (2):

……………………………………(2) Wherein “VD2” represents the potential level of the second divided potential VD2, “VE” represents the potential level of the intermediate potential VE, “R4” represents the resistance value of the fourth resistor R4, and “R5” represents the resistance value of the fifth resistor R5.

The second comparator 294 has a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the second comparator 294 is used to receive the second divided voltage VD2, the negative input terminal of the second comparator 294 is used to receive a second control voltage VC2, and the output terminal of the second comparator 294 is coupled to a thirteenth node N13 to output a second comparison voltage VB2. For example, if the second divided voltage VD2 is higher than or equal to the second control voltage VC2, the second comparator 294 will be able to output a second comparison voltage VB2 with a high logic level. On the contrary, if the second divided voltage VD2 is lower than the second control voltage VC2, the second comparator 294 will be able to output a second comparison voltage VB2 with a low logic level.

The fourth capacitor C4 has a first terminal and a second terminal, wherein the first terminal of the fourth capacitor C4 is coupled to the thirteenth node N13, and the second terminal of the fourth capacitor C4 is coupled to the ground potential VSS. . The ninth diode D9 has an anode and a cathode, wherein the anode of the ninth diode D9 is coupled to the thirteenth node N13, and the cathode of the ninth diode D9 is coupled to a fourteenth node. N14. The sixth resistor R6 has a first terminal and a second terminal, wherein the first terminal of the sixth resistor R6 is coupled to the fourteenth node N14, and the second terminal of the sixth resistor R6 is coupled to Ground potential VSS.

The microcontroller 296 can generate a first control potential VC1, a second control potential VC2, and a parameter adjustment potential VT according to a communication potential VU. Generally speaking, the over-current protection characteristics of the first pulse width modulation integrated circuit 230 can be determined according to the first control potential VC1 and the parameter adjustment potential VT. In addition, the over-current protection characteristics of the second pulse width modulation integrated circuit 260 can be determined according to the second control potential VC2 and the parameter adjustment potential VT.

In some embodiments, the communication potential VU comes from an external device (eg, a laptop), and the external device can operate in a default mode or a high-performance mode. By analyzing the communication potential VU, the microcontroller 296 will be able to obtain relevant information about the operating mode of the external device.

If the communication potential VU indicates the preset mode, the microcontroller 296 will simultaneously output the first control potential VC1 and the second control potential VC2 with low logic levels. At this time, because the first comparison potential VB1 has a high logic level, the first pulse width modulation integrated circuit 230 will maintain the first overcurrent protection threshold value TH1 and the first overcurrent protection delay time TD1 at their original values. set value. In addition, because the second comparison potential VB2 has a high logic level, the second pulse width modulation integrated circuit 260 will maintain the second over-current protection threshold value TH2 and the second over-current protection delay time TD2 at their original settings. value.

If the communication potential VU indicates the high-performance mode, the microcontroller 296 will simultaneously output the first control potential VC1 and the second control potential VC2 with a high logic level. At this time, because the first comparison potential VB1 has a low logic level, the first pulse width modulation integrated circuit 230 will adjust the potential VT according to the parameter to correct the first over-current protection threshold TH1 and the first over-current protection delay time TD1. For example, the first pulse width modulation integrated circuit 230 can increase the first over-current protection threshold TH1 and the first over-current protection delay time TD1 by a gain multiple K. In some embodiments, the over-current protection characteristics of the first pulse width modulation integrated circuit 230 can be adjusted according to the following equations (3) and (4):

……………………………………(3)

…………………………………………(4) Among them, “TH1’” represents the revised first over-current protection threshold value TH1, and “TH1” represents the original first over-current protection threshold value TH1. "TD1'" represents the modified first over-current protection delay time TD1, "TD1" represents the original first over-current protection delay time TD1, and "K" represents the gain multiple K indicated by the parameter adjustment potential VT.

In addition, because the second comparison potential VB2 has a low logic level, the second pulse width modulation integrated circuit 260 will correct the second overcurrent protection threshold value TH2 and the second overcurrent protection delay according to the parameter adjustment potential VT. Time TD2. For example, the second pulse width modulation integrated circuit 260 can increase both the second overcurrent protection threshold value TH2 and the second overcurrent protection delay time TD2 by the aforementioned gain multiple K. In some embodiments, the over-current protection characteristics of the second pulse width modulation integrated circuit 260 can be adjusted according to the following equations (5) and (6):

…………………………………………(5)

…………………………………………(6)

Among them, "TH2'" represents the revised second over-current protection threshold value TH2, "TH2" represents the original second over-current protection threshold value TH2, and "TD2'" represents the revised second over-current protection delay time TD2. "TD2" represents the original second over-current protection delay time TD2, and "K" represents the gain multiple K indicated by the parameter adjustment potential VT.

Under the design of the present invention, before the external device enters the high-performance mode, it can first notify the power supply 200 by using the communication potential VU. In response, the power supply 200 will appropriately adjust its over-current protection characteristics to prevent itself from accidentally entering the latch-off state. Therefore, the overall output stability of the power supply 200 can be effectively improved.

The present invention proposes a novel power supply. According to the actual measurement results, the output stability of the power supply using the above-mentioned design can be greatly improved, so it is very suitable for use in various types of devices.

It is worth noting that the potential, current, resistance, inductance, capacitance, and other component parameters described above are not limiting conditions of the present invention. Designers can adjust these settings according to different needs. The power supply of the present invention is not limited to the state shown in Figures 1-2. The present invention may only include any one or more features of any one or more embodiments of Figures 1-2. In other words, not all of the features shown in the diagram need to be implemented in the power supply of the present invention at the same time. Although the embodiments of the present invention use metal oxide semi-conductor field effect transistors as an example, the present invention is not limited to this. People in the technical field can use other types of transistors, such as junction field effect transistors, or fin field effect transistors, etc., without affecting the effect of the present invention.

The ordinal numbers in this specification and the scope of the patent application, such as "first", "second", "third", etc., have no sequential relationship with each other. They are only used to distinguish two items with the same Different components with names.

Although the present invention is disclosed above in terms of preferred embodiments, they are not intended to limit the scope of the present invention. Anyone skilled in the art can make slight changes and modifications without departing from the spirit and scope of the present invention. Therefore, The protection scope of the present invention shall be determined by the appended patent application scope.

100,200:Power supply 110,210: Bridge rectifier 120,220:Power switcher 130,230: The first pulse width modulation integrated circuit 140,240: First output stage circuit 150,250: switching circuit 160,260: Second pulse width modulation integrated circuit 170,270:Transformer 171,271: Main coil 172,272: first secondary coil 173,273: Second secondary coil 180,280: Second output stage circuit 190,290: Detection and control circuit 292: First comparator 294: Second comparator 296:Microcontroller C1: first capacitor C2: Second capacitor C3: The third capacitor C4: The fourth capacitor CR: resonant capacitor D1: first diode D2: Second diode D3: The third diode D4: The fourth diode D5: The fifth diode D6: The sixth diode D7: The seventh diode D8: The eighth diode D9: Ninth Diode K: gain multiple LM: Magnetizing inductor LR: leakage inductor LU: Boost inductor M1: the first transistor M2: Second transistor M3: The third transistor N1: first node N2: second node N3: The third node N4: fourth node N5: fifth node N6: The sixth node N7: The seventh node N8: The eighth node N9: Ninth node N10: tenth node N11: The eleventh node N12: Twelfth node N13: The thirteenth node N14: The fourteenth node NCM: common node NIN1: first input node NIN2: second input node NOUT: output node R1: first resistor R2: second resistor R3: The third resistor R4: The fourth resistor R5: fifth resistor R6: The sixth resistor TD1: first overcurrent protection delay time TD2: Second overcurrent protection delay time TH1: The first overcurrent protection threshold value TH2: Second overcurrent protection threshold value VB1: first comparison potential VB2: second comparison potential VC1: first control potential VC2: second control potential VD1: first divided voltage potential VD2: second divided voltage potential VE: intermediate potential VIN1: first input potential VIN2: second input potential VM1: first pulse width modulation potential VM2: second pulse width modulation potential VM3: The third pulse width modulation potential VOUT: output potential VR: rectifier potential VSS: ground potential VT: parameter adjustment potential VU: communication potential VW: switching potential

Figure 1 is a schematic diagram of a power supply according to an embodiment of the present invention. Figure 2 is a circuit diagram showing a power supply according to an embodiment of the present invention.

100:Power supply

110: Bridge rectifier

120: Power switch

130: The first pulse width modulation integrated circuit

140: First output stage circuit

150: switching circuit

160: Second pulse width modulation integrated circuit

170:Transformer

171: Main coil

172: First coil

173: Second secondary coil

180: Second output stage circuit

190: Detection and control circuit

CR: Resonance capacitor

LM: Magnetizing inductor

LR: Leakage Inductor

LU: Boost inductor

VE: Middle potential

VIN1: first input potential

VIN2: Second input potential

VM1: First pulse width modulation potential

VOUT: output voltage

VR: Rectification potential

VSS: ground potential

VU: communication potential

VW: Switching potential

Claims (10)

A power supply with high output stability, comprising: A bridge rectifier, generating a rectified potential according to a first input potential and a second input potential; A boost inductor, receiving the rectified potential; A power switch, selectively coupling the boost inductor to a ground potential according to a first pulse width modulation potential; A first pulse width modulation integrated circuit, generating the first pulse width modulation potential; A first output stage circuit, coupled to the boost inductor, and generating an intermediate potential; A switching circuit, including a second pulse width modulation integrated circuit, and generating switching potentials according to the intermediate potential; A transformer includes a main coil, a first secondary coil, and a second secondary coil, wherein the transformer has a built-in leakage inductor and an excitation inductor, and the main coil receives the switching potential through the leakage inductor; a resonant capacitor coupled to the excitation inductor; a second output stage circuit coupled to the first secondary coil and the second secondary coil and generating an output potential; and a detection and control circuit selectively adjusting the over-current protection characteristics of the first pulse width modulation integrated circuit and the second pulse width modulation integrated circuit according to a communication potential. A power supply as claimed in claim 1, wherein if the communication potential indicates a high-performance mode, the detection and control circuit increases the over-current protection threshold and over-current protection delay time of each of the first pulse width modulation integrated circuit and the second pulse width modulation integrated circuit by a gain multiple. The power supply of claim 1, wherein the bridge rectifier includes: a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to a first input node to receive the first input potential, and the first diode The cathode is coupled to a first node to output the rectified potential; a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to a second input node to receive the second input potential, and the The cathode is coupled to the first node; a third diode having an anode and a cathode, wherein the anode of the third diode is coupled to the ground potential, and the cathode of the third diode is coupled to the first input node; and a fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the ground potential, and the cathode of the fourth diode is coupled to the second input node; The boost inductor has a first terminal and a second terminal, wherein the first terminal of the boost inductor is coupled to the first node to receive the rectified potential, and the third terminal of the boost inductor The two terminals are coupled to a second node. A power supply as claimed in claim 3, wherein the power switch comprises: A first transistor having a control end, a first end, and a second end, wherein the control end of the first transistor is used to receive the first pulse width modulation potential, the first end of the first transistor is coupled to the ground potential, and the second end of the first transistor is coupled to the second node. The power supply of claim 3, wherein the first output stage circuit includes: A fifth diode having an anode and a cathode, wherein the anode of the fifth diode is coupled to the second node, and the cathode of the fifth diode is coupled to a third node to output the intermediate potential; and a first capacitor having a first terminal and a second terminal, wherein the first terminal of the first capacitor is coupled to the third node, and the second terminal of the first capacitor is coupled to the ground potential. A power supply as claimed in claim 5, wherein the switching circuit further comprises: a second transistor having a control end, a first end, and a second end, wherein the control end of the second transistor is used to receive a second pulse width modulation potential, the first end of the second transistor is coupled to a fourth node to output the switching potential, and the second end of the second transistor is coupled to the third node to receive the intermediate potential; and a third transistor having a control end, a first end, and a second end, wherein the control end of the third transistor is used to receive a third pulse width modulation potential, the first end of the third transistor is coupled to the ground potential, and the second end of the third transistor is coupled to the fourth node; The second pulse width modulation integrated circuit is used to generate the second pulse width modulation potential and the third pulse width modulation potential. A power supply as claimed in claim 6, wherein the leakage inductor has a first end and a second end, the first end of the leakage inductor is coupled to the fourth node to receive the switching potential, the second end of the leakage inductor is coupled to a fifth node, the main coil has a first end and a second end, the first end of the main coil is coupled to the fifth node, the second end of the main coil is coupled to a sixth node, the excitation inductor has a first end and a second end, the first end of the excitation inductor is coupled to the fifth node, the second end of the excitation inductor is coupled to the sixth node, the resonant capacitor having a first end and a second end, the first end of the resonant capacitor being coupled to the sixth node, the second end of the resonant capacitor being coupled to the ground potential, the first secondary coil having a first end and a second end, the first end of the first secondary coil being coupled to a seventh node, the second end of the first secondary coil being coupled to a common node, the second secondary coil having a first end and a second end, the first end of the second secondary coil being coupled to the common node, and the second end of the second secondary coil being coupled to an eighth node. A power supply as claimed in claim 7, wherein the second output stage circuit comprises: a sixth diode having an anode and a cathode, wherein the anode of the sixth diode is coupled to the seventh node, and the cathode of the sixth diode is coupled to an output node to output the output potential; a seventh diode having an anode and a cathode, wherein the anode of the seventh diode is coupled to the eighth node, and the cathode of the seventh diode is coupled to the output node; and a second capacitor having a first end and a second end, wherein the first end of the second capacitor is coupled to the output node, and the second end of the second capacitor is coupled to the common node. A power supply as claimed in claim 8, wherein the detection and control circuit comprises: a first resistor having a first end and a second end, wherein the first end of the first resistor is coupled to the first node to receive the rectified potential, and the second end of the first resistor is coupled to a ninth node to output a first divided potential; a second resistor having a first end and a second end, wherein the first end of the second resistor is coupled to the ninth node, and the second end of the second resistor is coupled to the ground potential; A first comparator having a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the first comparator is used to receive the first divided voltage, the negative input terminal of the first comparator is used to receive a first control voltage, and the output terminal of the first comparator is coupled to a tenth node to output a first comparison voltage; A third capacitor having a first terminal and a second terminal, wherein the first terminal of the third capacitor is coupled to the tenth node, and the second terminal of the third capacitor is coupled to the ground potential; An eighth diode having an anode and a cathode, wherein the anode of the eighth diode is coupled to the tenth node, and the cathode of the eighth diode is coupled to an eleventh node; A third resistor having a first end and a second end, wherein the first end of the third resistor is coupled to the eleventh node, and the second end of the third resistor is coupled to the ground potential; and A microcontroller, generating the first control potential, a second control potential, and a parameter adjustment potential according to the communication potential; wherein the first pulse width modulation integrated circuit is powered by the first voltage division potential; wherein the over-current protection characteristic of the first pulse width modulation integrated circuit is determined according to the first control potential and the parameter adjustment potential. A power supply as claimed in claim 9, wherein the detection and control circuit further comprises: a fourth resistor having a first end and a second end, wherein the first end of the first resistor is coupled to the third node to receive the intermediate potential, and the second end of the fourth resistor is coupled to a twelfth node to output a second divided potential; a fifth resistor having a first end and a second end, wherein the first end of the fifth resistor is coupled to the twelfth node, and the second end of the fifth resistor is coupled to the ground potential; A second comparator having a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the second comparator is used to receive the second divided voltage, the negative input terminal of the second comparator is used to receive the second control voltage, and the output terminal of the second comparator is coupled to a thirteenth node to output a second comparison voltage; A fourth capacitor having a first terminal and a second terminal, wherein the first terminal of the fourth capacitor is coupled to the thirteenth node, and the second terminal of the fourth capacitor is coupled to the ground potential; A ninth diode having an anode and a cathode, wherein the anode of the ninth diode is coupled to the thirteenth node, and the cathode of the ninth diode is coupled to a fourteenth node; and A sixth resistor having a first end and a second end, wherein the first end of the sixth resistor is coupled to the fourteenth node, and the second end of the sixth resistor is coupled to the ground potential; wherein the second pulse width modulation integrated circuit is powered by the second voltage division potential; wherein the over-current protection characteristic of the second pulse width modulation integrated circuit is determined according to the second control potential and the parameter adjustment potential.

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