TW202408139A - Multiphase switching converter, control circuit and control method thereof - Google Patents

Abstract

A control method for a multiphase switching converter thereof is disclosed. The control method includes: providing a master control signal to a master switching circuit; providing a pulse signal with 0.5 duty cycle by frequency-dividing the master control signal under a phase-added operation. For each slave switching circuit to be enabled: setting a ratio of a charge current and a discharge current based on the number of the slave switching circuit to be enabled; charging a first capacitor with the charge current and discharging a second capacitor with the discharge current in response to high logic of the pulse signal; discharging the first capacitor with the discharge current and charging the second capacitor with the charge current in response to logic low of the pulse signal; comparing a voltage across the first capacitor with a voltage across the second capacitor; and generating a set signal to turn on a switch of a corresponding slave switching circuit to be enabled based on the comparison result.

Description

Multi-phase switching power supply and its control circuit and control method

Embodiments of the present invention relate to electronic circuits, and more specifically, the present invention relates to multi-phase switching power supplies and control circuits and control methods thereof.

In a multi-phase switching power supply (for example, a multi-phase buck converter), multiple switching circuits with switches and inductors are coupled in parallel, and each phase switching circuit operates out of phase. The output terminals of the plurality of switch circuits are coupled together to provide a total output current. Depending on the power requirements of the electronic equipment application, multi-phase switched power supplies can include one, two, three or multi-phase switching circuits. During the operation of electronic equipment, its power demand may vary greatly. In order to meet the changes in power demand, the current provided by the multi-phase switching power supply can be adjusted by increasing or reducing the number of phases of the switching circuit for power operation. When the load current is very small, only one phase of the switching circuit in the multi-phase switching power supply performs power operation to transfer energy to the load. However, if the load current rises transiently at this time, since the average PWM signal is estimated to cause a huge RC time delay (up to 1mS), the multi-phase switching power supply will not be able to quickly increase the number of phases of the switching circuit for power operation, resulting in an output voltage Large undershoot and slow load transient response appear.

The present invention proposes a multi-phase switching power supply and its control circuit and control method, which can improve the transient response performance of the multi-phase switching power supply.

According to an embodiment of the present invention, a control circuit for a multi-phase switching power supply is proposed, wherein the multi-phase switching power supply includes a multi-phase switching circuit that converts an input voltage into an output voltage, and the multi-phase switching circuit includes a main switch. circuit and at least one slave switch circuit that will be enabled. The control circuit includes: a master controller that provides a master control signal to control the switching of the master switch circuit; a pulse generator that divides the master control signal under a phase addition operation. To generate a pulse signal with a duty cycle of 0.5; at least one phase slave controller, each phase slave controller generates a slave control signal to control the switch of the corresponding slave switch circuit that will be enabled for one phase, wherein each phase The slave controller includes: a first circuit that uses a charging current to charge the first capacitor and uses a discharging current to discharge the second capacitor in response to the logic high of the pulse signal, wherein the ratio of the charging current to the discharging current is based on the slave to be enabled. The phase number of the switching circuit is set; the second circuit, in response to the logic low of the pulse signal, uses the charging current to charge the second capacitor, and uses the discharging current to discharge the first capacitor; and the comparison circuit connects the first capacitor at both ends of the first capacitor. The voltage is compared with the second voltage across the second capacitor, and a setting signal is generated to turn on the switch of the slave switching circuit corresponding to one phase to be enabled.

According to another embodiment of the present invention, a multi-phase switching power supply is also proposed, including: a multi-phase switching circuit, including a master switching circuit and at least one slave switching circuit to be enabled; and the control circuit as described above .

According to another embodiment of the present invention, a control method for a multi-phase switching power supply is also proposed, wherein the multi-phase switching power supply includes a multi-phase switching circuit that converts an input voltage into an output voltage, and the multi-phase switching circuit includes The master switch circuit and at least one phase of the slave switch circuit to be enabled, each phase of the slave switch circuit to be enabled includes a first capacitor and a second capacitor, the control method includes: providing a master control signal to the master switch circuit; Under phase operation, the main control signal is frequency divided to provide a pulse signal, in which the duty cycle of the pulse signal is 0.5; for each phase of the slave switching circuit that will be enabled: based on the number of phases of the slave switching circuit that will be enabled To set the ratio of charging current and discharging current; in response to the logic high of the pulse signal, the charging current is used to charge the first capacitor, and the discharge current is used to discharge the second capacitor; in response to the logic low of the pulse signal, the discharge current is used to charge the first capacitor. Discharging the capacitor, using the charging current to charge the second capacitor; comparing the first voltage across the first capacitor with the second voltage across the second capacitor; and generating a setting signal based on the comparison result to turn on the corresponding phase to be enabled. Switch from switch circuit.

In an embodiment of the present invention, a ratio of a charging current and a discharging current is set based on the phase number of the slave switching circuit to be enabled, and the charging current and the discharging current are used to charge and discharge the first capacitor and the second capacitor respectively, Then a setting signal for turning on the corresponding switch of the slave switching circuit is generated, which can quickly increase the number of phases of the switching circuit for power operation and improve the transient response performance of the multi-phase switching power supply.

Specific embodiments of the present invention will be described in detail below. It should be noted that the embodiments described here are only for illustration and are not intended to limit the present invention. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the invention. However, it will be apparent to one of ordinary skill in the art that these specific details need not be employed in order to practice the invention. In other instances, well-known circuits, materials or methods have not been described in detail in order to avoid obscuring the present invention.

Throughout this specification, references to "one embodiment," "an embodiment," "an example," or "an example" mean that a particular feature, structure, or characteristic described in connection with the embodiment or example is included in at least one aspect of the invention. in one embodiment. Thus, appearances of the terms "in one embodiment," "in an embodiment," "one example," or "example" in various places throughout this specification are not necessarily all referring to the same embodiment or example. It will be understood that when an element is referred to as being "coupled" or "connected to" another element, it can be directly coupled or coupled to the other element or intervening elements may be present. In contrast, when an element is said to be "directly coupled" or "directly connected to" another element, there are no intervening elements present. Furthermore, particular features, structures, or characteristics may be combined in one or more embodiments or examples in any suitable combination and/or subcombination. Furthermore, those of ordinary skill in the art will understand that the drawings provided herein are for illustrative purposes and that the drawings are not necessarily drawn to scale. The same reference numerals represent the same elements. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

Throughout this specification, relative terms such as first, second, etc. may be used only to distinguish one entity or action from another entity or action and do not necessarily or imply the existence of such an order between the entities or actions. . Numerical sequences such as "first", "second", "third", etc. only refer to different individuals within a plurality and do not imply any order or sequence unless specifically limited by the patent scope language. The order of text in any claim does not imply that the steps of processing must be performed in a provisional or logical sequence consistent with such order, unless the claim language specifically provides so. Without departing from the scope of the present invention, these processing steps may be interchanged in any order, as long as such interchange does not cause a contradiction in the language of the patent scope and does not lead to logical fallacies.

FIG. 1 illustrates a schematic diagram of a multi-phase switching power supply 100 according to an embodiment of the present invention. Multi-phase switching power supply 100 may be used in any electronic device that requires larger currents than can be provided by a single-phase switching power supply (eg, a single-phase buck converter). For example, the multi-phase switching power supply 100 may be used in battery-powered electronic devices to support fast charging of one or more battery cells of the electronic device.

The multi-phase switching power supply 100 includes multi-phase switching circuits 11~1N that convert input voltage VIN into output voltage VOUT to provide to the load 60, multi-phase controllers 21~22N corresponding to the multi-phase switching circuits 11~1N, Addition control circuit 30 and pulse generator 40. The multi-phase switching circuits 11 to 1N have a first phase switching circuit 11 configured as a master switching circuit and other phase switching circuits 12 to 1N configured as at least one phase slave switching circuit. Wherein, the at least one phase slave switch circuit can be enabled based on the phase addition signal PH_ADD, so that the multi-phase switching power supply 100 enters the phase addition operation.

In the embodiment shown in FIG. 1 , the main controller (illustrated as the first phase controller 21 in FIG. 1 ) generates the main control signal PWM1 to control the switching of the main switching circuit 11 . In one embodiment, the main switching circuit 11 generates the first phase current as the total output current provided to the load 60 . If the output current required by the load 60 increases beyond the current range that the main switch circuit 11 can provide, or exceeds the current output limit of the main switch circuit 11, the phase addition control circuit 30 provides the phase addition signal PH_ADD to enable at least one phase. The slave phase output current is provided to the load 60 from the switching circuit. In the embodiment shown in FIG. 1 , the phase addition control circuit 30 generates the phase addition signal PH_ADD based on the input current IIN and the phase addition threshold TH_ADD. This embodiment will be described in detail below with reference to FIG. 2 .

Under the adding operation, the pulse generator 40 generates the first pulse signal PL1 with a duty cycle of 0.5 by dividing the frequency of the main control signal PWM1. Each phase slave controller (ie, any phase controller among the multi-phase controllers 22~2n) generates a corresponding slave control signal for controlling the switch of the corresponding slave switch circuit to be enabled. In this way, each phase of the slave switch circuit to be enabled (any phase switch circuit in the multi-phase switch circuits 12~1n) provides the slave phase output current, and is combined with the first phase output current to jointly supply the load to the load. 60 provides a total output current to support the wide current range requirements of the load. Those with ordinary knowledge in the art can understand that activating a switching circuit means allowing the switching circuit to enter power operation.

FIG. 2 shows a schematic circuit structure diagram of a phase addition control circuit 30A and a pulse generator 40A for a multi-phase switching power supply according to an embodiment of the present invention.

As shown in FIG. 2 , the phase addition control circuit 30A includes an input current feedback circuit 301 and a phase number comparison circuit 302 . The input current feedback circuit 301 provides an input current feedback signal FBIIN, where the input current feedback signal FBIIN represents the input current IIN of the multi-phase switching power supply 100 shown in FIG. 1 . The phase number comparison circuit 302 includes a comparator COM1. The comparator COM1 receives the input current feedback signal FBIIN. In response to the input current feedback signal FBIIN being greater than or equal to the addition threshold TH_ADD, the comparator COM1 provides the addition signal PH_ADD. In one embodiment, the addition threshold TH_ADD may have multiple values for enabling one or more phase slave switching circuits. Based on the phase addition signal PH_ADD having multiple levels, the slave controllers 22 ~ 2N can activate one or more phase slave switch circuits through the phase addition operation to provide slave phase output current.

Accordingly, the phase addition control circuit 30A can activate at least one phase slave switching circuit of the multi-phase switching power supply 100 by providing the phase addition signal PH_ADD, thereby providing the total output current to the load together with the main switching circuit to complete the phase addition operation.

In the embodiment shown in FIG. 2 , the pulse generator 40A generates complementary first pulse signal PL1 and second pulse signal PL2 based on the main control signal PWM1 shown in FIG. 1 . In one embodiment, the frequency of the first pulse signal PL1 is related to the main control signal PWM1. In one embodiment, the frequency of the first pulse signal PL1 is approximately half of the frequency of the main control signal PWM1, and the duty cycle is approximately 50%.

As shown in FIG. 2 , pulse generator 40A includes latch 401 . In one embodiment, latch 401 is a D-latch. The clock terminal CLK of the latch 401 receives the main control signal PWM1, the enable terminal EN receives the phase addition signal PH_ADD, and the inverted output Q(—) of the latch 401 is provided to the input terminal D. In response to the rising edge of the main control signal PWM1, the latch 401 generates the first pulse signal PL1 having rising edges and falling edges. The output Q of the latch 401 is provided to the logic circuits (402~407) to generate non-overlapping first pulse signal PL1 and second pulse signal PL2. The frequency of the first pulse signal PL1 is equal to half the frequency of the main control signal PWM1, and the duty cycle is about 50%. When the first pulse signal PL1 is in a logic high state, the second pulse signal PL2 is in a logic low state, and vice versa.

In a further embodiment, the pulse generator 40A generates two short pulse signals RST1 and RST2 based on the first pulse signal PL1 and the second pulse signal PL2. In one embodiment, when the rising edge of the main control signal PWM1 causes the rising edge of the first pulse signal PL1 to come, the first short pulse signal RST1 is generated, and when the rising edge of the main control signal PWM1 causes the falling edge of the first pulse signal PL1 When the edge comes, a second short pulse signal RST2 is generated.

FIG. 3 illustrates a two-phase switching power supply 100A according to an embodiment of the present invention, wherein the two-phase switching power supply 100A is in a phase adding operation and a slave switching circuit is added.

In the embodiment shown in FIG. 3 , the two-phase switching power supply 100A is in a phase-adding operation, and one of the phase slave switching circuits will be enabled. The two-phase switching power supply 100A includes a main switching circuit 11A, a main controller 21A, a pulse generator 40A, a slave switching circuit 12A, and a slave controller 22A.

Each phase switching circuit of the master switching circuit 11A and the slave switching circuit 12 may include a driving circuit, an inductor, and one or more switches to receive the input voltage VIN and provide the output voltage VOUT. In the embodiment shown in FIG. 3 , the main controller 21A generates the main control signal PWM1 to control the switching (eg, high-side switch) of the main switching circuit 11A. The main controller 21A includes a feedback control loop 211 , a first conduction duration control circuit 212 and a main logic circuit 213 . The feedback control loop 211 provides the first setting signal SET1 for turning on the switch of the main switching circuit 11A based on the feedback information (eg, output voltage feedback signal, output current feedback signal, etc.) of the two-phase switching power supply 100A. The first conduction duration control circuit 212 provides a first conduction duration control signal TON1 for controlling the conduction duration of the switch of the main switch circuit 11A. The main logic circuit 213 includes a flip-flop FF1. The flip-flop FF1 has a setting terminal S, a reset terminal R and an output terminal Q. The setting terminal S receives the first setting signal SET1, the reset terminal R receives the first conduction duration control signal TON1, and the flip-flop FF1 is outputting Terminal Q provides a main control signal PWM1 for controlling the switching of the main switching circuit 11A.

The working principle of the pulse generator 40A shown in FIG. 3 is similar to that of the pulse generator 40A shown in FIG. 2 . Therefore, for the sake of clarity, the working principle of the pulse generator 40A shown in FIG. 3 will not be described again.

The slave controller 22A receives the first pulse signal PL1, the second pulse signal PL2 and the addition signal PH_ADD, and generates the slave control signal PWM2 to control the switch of the slave switch circuit 12A to be enabled. The slave controller 22A includes first and second circuits 22-1, a comparison circuit 22-2, a second on-time control circuit 22-3, and a slave logic circuit 22-4.

In the embodiment shown in FIG. 3, in response to the logic high of the first pulse signal PL1, the first and second circuits 22-1 use the charging current ICH to charge the first capacitor C1, and use the discharge current IDIS to charge the second capacitor C1. C2 discharges. At the same time, in response to the logic low of the first pulse signal PL1, the first and second circuits 22-1 use the charging current ICH to charge the second capacitor C2, and use the discharging current IDIS to discharge the first capacitor C1.

In one embodiment, the first and second circuits 22-1 include a first charging current source I1, a first discharging current source I2, a second charging current source I3, a second discharging current source I4, a first capacitor C1, a Two capacitors C2, a first switching unit and a second switching unit. The first switch unit includes switches S1 and S4 controlled by the logic high of the first pulse signal PL1, and the second switch unit includes switches S2 and S3 controlled by the logic high of the second pulse signal PL2.

In one embodiment, the first charging current source I1 has an input terminal for setting the charging current ICH for charging the first capacitor C1, and the first discharging current source I2 has an input terminal for setting the charging current ICH for the first capacitor C1. The discharge current IDIS of the discharge. In one embodiment, under the addition operation, the phase number of the slave switching circuit to be enabled is 1, and the charging current ICH is set equal to the discharging current IDIS.

As shown in Figure 3, by controlling the switch S1 and the switch S2, the first capacitor C1 can be alternately connected to the first charging current source I1 and the first discharging current source I2, thereby alternately charging and discharging the first capacitor C1 . Correspondingly, the first voltage V1 is generated across the first capacitor C1.

The second charging current source I3 has an input terminal for setting the charging current ICH for charging the second capacitor C2. The second discharging current source I4 has an input terminal for setting the discharging current IDIS for discharging the second capacitor C2. In one embodiment, the charging current ICH is equal to the discharging current IDIS.

As shown in FIG. 3 , by controlling the switch S3 and the switch S4, the second capacitor C2 can be alternately connected to the second charging current source I3 and the second discharging current source I4, thereby alternately charging and discharging the second capacitor C2. Correspondingly, a second voltage V2 is generated across the second capacitor C2. In the embodiment shown in FIG. 3 , the first capacitor C1 and the second capacitor C2 have the same capacitance value.

The comparison circuit 22-2 compares the first voltage V1 with the second voltage V2, and generates a second setting signal SET2 for turning on the switch of the slave switch circuit 12A to be enabled. In the embodiment shown in FIG. 3 , the comparison circuit 22 - 2 includes a comparator COM2, a rising edge latch A, a falling edge latch B, and an OR circuit OR2. The comparator COM2 generates a square wave signal based on the comparison result of the first voltage V1 and the second voltage V2. Rising edge latch A generates a rising edge pulse signal on the rising edge of the square wave signal. Falling edge latch B generates a falling edge pulse signal at the falling edge of the square wave signal. The OR circuit OR2 receives the rising edge pulse signal and the falling edge pulse signal and generates the second setting signal SET2.

The second conduction duration control circuit 22-3 provides a second conduction duration control signal TON2 for controlling the conduction duration of the switch of the slave switch circuit 12A. The slave logic circuit 22-4 includes a flip-flop FF2. The flip-flop FF2 has a setting terminal S, a reset terminal R and an output terminal Q. The setting terminal S receives the second setting signal SET2, and the reset terminal R receives the second on-time control signal TON2. The flip-flop FF2 provides the slave control signal PWM2 at the output terminal Q to control the switch of the corresponding slave switch circuit 12A.

FIG. 4 illustrates a signal waveform diagram of the two-phase switching power supply 100A shown in FIG. 3 according to an embodiment of the present invention. As shown in Figure 4, when the phase addition signal PH_ADD indicates that one-phase slave switching circuit is to be enabled, complementary first pulse signal PL1 and second pulse signal PL2 are generated according to the main control signal PWM1, where the first pulse signal PL1 and the second pulse signal PL1 are generated. The frequency of the second pulse signal PL2 is half of the frequency of the main control signal PWM1, and the duty cycle is 50%. By charging and discharging the first capacitor C1, a first voltage V1 with a period twice as long as the main control signal PWM1 (the same period as the first pulse signal PL1) is generated. By charging and discharging the second capacitor C2, a second voltage V1 is generated. Voltage V2. The intersection of the first voltage V1 and the second voltage V2 provides a phase offset of 180° to generate the second setting signal SET2. The slave control signal PWM2 is generated according to the second setting signal SET2 and the second conduction duration control signal TON2 to control the slave switch circuit 12A to be enabled.

Embodiments of the present invention provide an efficient and fast phase shifting scheme, which can quickly increase the number of phases of the switching circuit for power operation, realize phase addition, and meet the application requirements of a wide output current range. As described in the embodiment of the present invention, compared with other two-phase switching power supplies that do not use the pulse generator 40A and the slave controller 22A, the two-phase switching power supply 100A has better load transient response performance.

Those skilled in the art will understand that a boost converter with constant off-time control may also be applicable to embodiments of the present invention. The main control signal PWM1 is reset using the first setting signal generated by the feedback loop, and the main control signal PWM1 is set using the first off-duration control signal. Correspondingly, for the slave control signal PWM2 provided to the slave switch circuit to be enabled, the slave control signal PWM2 is reset using the second setting signal, and the slave control signal PWM2 is set using the second off-time control signal. .

FIG. 5 illustrates a slave controller 22B for the two-phase switching power supply 100A shown in FIG. 3 according to an embodiment of the present invention. The slave controller 22B shown in FIG. 5 is similar to the slave controller 22A shown in FIG. 3, except that the first and second circuits 22-1B include a charging current source I1B, a discharging current source I2B, a first switching unit and Second switch unit.

The charging current source I1B is coupled to the power supply VDD, and the first capacitor C1 is coupled to the reference ground, so that the charging current source I1B and the first capacitor C1 are coupled in series between the power supply VDD and the reference ground. In one embodiment, the first voltage V1 is not higher than the power supply VDD. The ratio of charging current ICH to discharging current IDIS is set to 1.

In one embodiment, the switching period of the main control signal PWM1 is T=(C*VP)/ICH, where C is the capacitance value of the first capacitor C1, ICH is the charging current, and VP is the peak value of the first voltage. If the capacitance value C is fixed, when the frequency of the main control signal PWM1 increases, the charging current ICH increases; when the frequency of the main control signal PWM1 decreases, the charging current ICH decreases. Correspondingly, the charging current source I1B has an input terminal for setting the charging current ICH according to the frequency of the main control signal PWM1.

The discharge current source I2B is coupled to the reference ground, such that the discharge current source I2B is coupled in parallel with the first capacitor C1. In one embodiment, the discharge current source I2B includes a plurality of identical current source units and switches corresponding to the plurality of current source units. Among them, in response to the phase addition signal PH_ADD, a plurality of current source units are coupled to the first capacitor C1 in sequence to set the discharge current IDIS for discharging the first capacitor C1.

The first switching unit (switches S1 and S2) alternately connects the first capacitor C1 to the charging current source I1B and the discharging current source I2B, thereby alternately charging and discharging the first capacitor C1. The second switching unit (switches S3 and S4) alternately connects the second capacitor C2 to the charging current source I1B and the discharging current source I2B, thereby alternately charging and discharging the second capacitor C2. In the embodiment shown in FIG. 5 , the first capacitor C1 and the second capacitor C2 have the same capacitance value.

Figure 6 illustrates a second phase controller 22C and a third phase controller 23C for a three-phase switching power supply according to an embodiment of the present invention, wherein the three-phase switching power supply is in a phase-adding operation and two additional phases are added. Phase slave switching circuit.

The second phase controller 22C shown in Figure 6 is similar to the slave controller 22B shown in Figure 5, except that the second phase controller 22C also includes a first discharge path 22-5 and a second discharge path 22- 6.

The first discharge path 22-5 resets the first voltage V1 based on the first short pulse signal RST1 shown in Figure 2, and the second discharge path 226 resets the second voltage based on the second short pulse signal RST2 shown in Figure 2 V2. In one embodiment, the first discharge path 22-5 includes a switch S5 coupled in parallel with the first capacitor C1, and the second discharge path 22-6 includes a switch S6 coupled in parallel with the second capacitor C2. In the embodiment shown in FIG. 6 , the first capacitor C1 and the second capacitor C2 have the same capacitance value.

The third phase controller 23C includes first and second circuits 23-1, a third comparison circuit 23-2, a third conduction duration control circuit 23-3, a slave logic circuit 23-4, and a first discharge path 23-5 and second discharge path 23-6. The third phase controller 23C shown in FIG. 6 is similar to the second phase controller 22C shown in FIG. 6 . Therefore, for the sake of clarity, the working principle of the third phase controller 23C will not be described again. In the embodiment shown in Figure 6, capacitor C3 and capacitor C4 have the same capacitance value.

In the addition operation of adding two-phase slave switching circuits, the ratio of the charging current ICH and the discharging current IDIS corresponding to the second-phase switching circuit to be enabled (i.e., the first-phase slave switching circuit) is set to 0.5, and is set to 0.5. The ratio of the charging current ICH and the discharging current IDIS corresponding to the activated third-phase switching circuit (ie, the second-phase slave switching circuit) is set to 2. In other embodiments, the ratio of the charging current ICH to the discharging current IDIS can be adjusted according to changes in the capacitance value of the capacitor.

FIG. 7 illustrates a signal waveform diagram of a three-phase switching power supply in a phase adding operation and with an added two-phase slave switching circuit according to an embodiment of the present invention. As shown in Figure 7, when the load changes transiently, the three-phase switching power supply activates the two-phase slave switching circuit through the phase addition operation to provide the slave phase output current. The complementary first pulse signal PL1 and the second pulse signal PL2 are generated according to the main control signal PWM1. The frequencies of the first pulse signal PL1 and the second pulse signal PL2 are half of the frequency of the main control signal PWM1, and the duty cycle is 50%. . In addition, the first short pulse signal RST1 and the second short pulse signal RST2 are generated based on the rising edges of the first pulse signal PL1 and the second pulse signal PL2 respectively.

For the second phase switching circuit to be enabled (ie, the first phase slave switching circuit), the ratio of charging current to discharging current is set to 0.5. The first capacitor C1 is charged and discharged to generate the first voltage V1, and the second capacitor C2 is charged and discharged to generate the second voltage V2. In addition, when the rising edge of the first pulse signal PL1 comes, the first voltage V1 is reset, and when the falling edge of the first pulse signal PL1 comes, the second voltage V2 is reset. The intersection of the first voltage V1 and the second voltage V2 provides a phase offset of 120° to generate a second setting signal SET2 for controlling the second phase switching circuit.

For the third phase switching circuit to be enabled (ie, the second phase slave switching circuit), the ratio of the charging current ICH to the discharging current IDIS is set to 2. The third capacitor C3 is charged and discharged to generate the third voltage V3, and the fourth capacitor C4 is charged and discharged to generate the fourth voltage V4. When the rising edge of the first pulse signal PL1 comes, the third voltage V3 is reset. When the falling edge of the first pulse signal PL1 comes, the fourth voltage V4 is reset. The intersection of the third voltage V3 and the fourth voltage V4 provides a phase offset of 240° to generate a third setting signal SET3 for controlling the third phase switch circuit.

FIG. 8 illustrates a signal waveform diagram of a four-phase switching power supply in a phase addition operation and with a three-phase slave switching circuit added according to an embodiment of the present invention.

As shown in Figure 8, when the load changes transiently, the four-phase switching power supply activates the three-phase slave switching circuit through the phase addition operation to provide the slave phase output current. Complementary first pulse signal PL1 and second pulse signal PL2 are generated according to the main control signal PWM1, wherein the frequency of the first pulse signal PL1 and the second pulse signal PL2 is half of the frequency of the main control signal PWM1, and the duty cycle is 50 %. In addition, the first short pulse signal RST1 and the second short pulse signal RST2 are generated based on the rising edges of the first pulse signal PL1 and the second pulse signal PL2 respectively.

For the second phase switching circuit to be enabled, the ratio of charging current ICH to discharging current IDIS is set to 1/3. The intersection of the first voltage V1 and the second voltage V2 provides a phase offset of 90° to generate a second setting signal SET2 for controlling the second phase switching circuit.

For the third phase switching circuit to be enabled, the ratio of charging current ICH and discharging current IDIS is set to 1. The intersection of the third voltage V3 and the fourth voltage V4 provides a phase offset of 180° to generate a third setting signal SET3 for controlling the third phase switch circuit.

For the fourth phase switching circuit to be enabled, the ratio of charging current ICH and discharging current IDIS is set to 3. The fifth capacitor C5 is charged and discharged to generate the fifth voltage V5, and the sixth capacitor C6 is charged and discharged to generate the sixth voltage V6. The intersection of the fifth voltage V5 and the sixth voltage V6 provides a phase offset of 270° to generate a fourth setting signal SET4 for controlling the fourth phase switching circuit.

FIG. 9 illustrates a flowchart of a control method 600 for a multi-phase switching power supply in a phase-adding operation according to an embodiment of the present invention. The multi-phase switching power supply has a plurality of switch circuits coupled in parallel to convert the input voltage into an output voltage, wherein the multi-phase switch circuit has a master switch circuit and at least one phase slave switch circuit. Each phase slave switching circuit is enabled based on the phase addition signal. The control method 600 includes steps 611 to 617.

In step 611, the main control signal is provided to the main switch circuit.

In step 612, under the addition operation, the main control signal is frequency divided to provide a pulse signal, where the duty cycle of the pulse signal is 0.5.

Let each of the at least one phase slave switch circuits to be enabled perform steps 613-617.

In step 613, under the addition operation, the ratio of the charging current to the discharging current is set based on the number of phases of the slave switching circuit to be enabled.

In step 614, in response to the logic high of the pulse signal, the charging current is used to charge the first capacitor, and the discharging current is used to discharge the second capacitor.

In step 615, in response to the logic low of the pulse signal, the discharge current is used to discharge the first capacitor, and the charging current is used to charge the second capacitor.

At step 616, the first voltage across the first capacitor is compared to the second voltage across the second capacitor.

In step 617, a setting signal is generated based on the comparison result to turn on the corresponding switch of the slave switch circuit to be enabled.

In one embodiment, if a phase slave switch circuit is to be enabled, in step 613, the ratio of the charging current and the discharging current is set to 1. In one embodiment, the first capacitor and the second capacitor have the same value.

In another embodiment, if the two-phase slave switch circuit is to be enabled, in step 613, the ratio of the charging current to the discharge current corresponding to the first phase slave switch circuit to be enabled is set to 0.5, and the ratio is set to 0.5. The ratio of the charging current and the discharging current corresponding to the activated second phase slave switch circuit is set to 2.

In another embodiment, if the three-phase slave switch circuit is to be enabled, in step 613, the ratio of the charging current and the discharge current corresponding to the first phase slave switch circuit to be enabled is set to 1/3, and The ratio of charging current to discharging current corresponding to the activated second phase slave switching circuit is set to 1, and the ratio of charging current to discharging current corresponding to the third phase slave switching circuit to be activated is set to 3.

In addition, the above embodiment only describes the case where one-phase, two-phase and three-phase slave switch circuits are enabled. However, those with ordinary knowledge in the art can understand that the phase shifting scheme disclosed in the embodiment of the present invention can be extended to the case where slave switching circuits with any number of phases are activated through a phase addition operation.

Note that in the flowcharts described above, the functions marked in the boxes may also occur in a different order than that shown in Figure 9. For example, two blocks shown one after the other may actually execute substantially in parallel, or they may sometimes execute in the reverse order, depending on the specific functionality involved.

While the present invention has been described with reference to several exemplary embodiments, it is to be understood that the terms used are illustrative and exemplary rather than limiting. Since the present invention can be embodied in various forms without departing from the spirit or essence of the invention, it should be understood that the above-described embodiments are not limited to any foregoing details, but are intended to be practiced broadly within the spirit and scope defined by the appended claims. Therefore, all changes and modifications falling within the scope of the patent application or its equivalent scope shall be covered by the scope of the accompanying patent application.

100,100A: Multi-phase switching power supply 11~1N: Multi-phase switching circuit 11A: Main switch circuit 12A: slave switch circuit 21~22N, 22C, 23C: multi-phase controller 21A:Controller 22A, 22B: slave controller 30,30A: phase addition control circuit 40,40A: Pulse generator 60:Load 301: Current feedback circuit 302: Phase number comparison circuit COM1: Comparator 401:Latch 402~407: Logic circuit 211: Feedback control loop 212: First conduction duration control circuit 213: Main logic circuit FF1, FF2: flip-flop 22-1, 22-1B: first circuit and second circuit 22-2: Comparison circuit 22-3: Second conduction duration control circuit 22-4: Logic circuit C1,C2,C3,C4: capacitor I1, I3, I1B: charging current source I2, I4, I2B: discharge current source S1~S12: switch A: Rising edge latch B: Drop edge latch OR2: OR circuit 22-5,23-5: first discharge path 22-6,23-6: Second discharge path PH_ADD,PWM1,PL1,PL2,SET,PWM2,TON1,TON2,PWMN,VIN,VOUT,IIN,FBIIN,RST1,RST2,SET1,SET2: Signal TH_ADD: threshold ICH: charging current IDIS: discharge current V1: first voltage V2: second voltage V3: The third voltage V4: fourth voltage V5: fifth voltage V6: sixth voltage 600:Control method 611~617: Process steps

In order to better understand the present invention, the present invention will be described in detail based on the following drawings. [Fig. 1] illustrates a block diagram of a multi-phase switching power supply 100 according to an embodiment of the present invention; [Fig. 2] illustrates a schematic diagram of a circuit of a phase addition control circuit 30A and a pulse generator 40A for a multi-phase switching power supply according to an embodiment of the present invention; [Fig. 3] illustrates a schematic diagram of a two-phase switching power supply 100A according to an embodiment of the present invention, in which the two-phase switching power supply 100A is in a phase addition operation and a slave switching circuit is added; [Fig. 4] illustrates a waveform diagram of a signal of the two-phase switching power supply 100A shown in Fig. 3 according to an embodiment of the present invention; [Fig. 5] illustrates a schematic diagram of the slave controller 22B for the two-phase switching power supply 100A shown in Fig. 3 according to an embodiment of the present invention; [Fig. 6] illustrates a schematic diagram of a second phase controller 22C and a third phase controller 23C for a three-phase switching power supply according to an embodiment of the present invention, wherein the three-phase switching power supply is in a phase-adding operation and A two-phase slave switch circuit is added; [Fig. 7] illustrates a waveform diagram of a signal of a three-phase switching power supply in an addition operation and with a two-phase slave switching circuit added according to an embodiment of the present invention; [Fig. 8] illustrates a waveform diagram of a signal of a four-phase switching power supply in addition operation and with a three-phase slave switching circuit added according to an embodiment of the present invention; [Fig. 9] illustrates a flowchart of a control method 600 for a multi-phase switching power supply in an additive phase operation according to an embodiment of the present invention. In the drawings, the same or corresponding reference numerals are used to represent the same or corresponding elements.

PH_ADD,PWM1,PL1,PL2,SET,PWM2,TON2: signal

ICH: charging current

IDIS: discharge current

V1: first voltage

V2: second voltage

Claims (15)

A control circuit for a multi-phase switching power supply, wherein the multi-phase switching power supply includes a multi-phase switching circuit, the multi-phase switching circuit includes a master switching circuit and a slave switching circuit in which at least one phase is to be enabled , the control circuit includes: a main controller for providing a main control signal to control a switch of the main switch circuit; A pulse generator for frequency dividing the main control signal under an addition operation to generate a pulse signal with a duty cycle of 0.5; At least one slave controller, each slave controller is used to generate a slave control signal to control a switch of the slave switch circuit corresponding to one phase to be enabled, wherein each slave controller includes: A first circuit, in response to the logic high of the pulse signal, using a charging current to charge a first capacitor, and using a discharging current to discharge a second capacitor, wherein a ratio of the charging current to the discharging current Set based on a phase number of the slave switching circuit to be enabled; a second circuit configured to use the charging current to charge the second capacitor and use the discharging current to discharge the first capacitor in response to the logic low of the pulse signal; and A comparison circuit for comparing a first voltage across both ends of the first capacitor with a second voltage across both ends of the second capacitor to generate a setting signal to turn on the slave that corresponds to a phase to be enabled. This switch of the switching circuit. The control circuit of claim 1, wherein when the adding operation adds a phase slave switch circuit, the ratio of the charging current and the discharge current corresponding to the slave switch circuit to be enabled is set to 1. The control circuit as claimed in claim 1, wherein when the phase adding operation adds two phases from the switching circuit, wherein: The ratio of the charging current and the discharging current corresponding to the first phase slave switching circuit to be enabled is set to 0.5; and The ratio of the charging current and the discharging current corresponding to the second phase slave switching circuit to be enabled is set to 2. The control circuit as claimed in claim 1, wherein when the phase addition operation adds a three-phase slave switch circuit, wherein: The ratio of the charging current corresponding to the first phase slave switching circuit to be enabled and the discharging current is set to 1/3; The ratio of the charging current and the discharging current corresponding to the second phase slave switching circuit to be enabled is set to 1; and The ratio of the charging current and the discharging current corresponding to the third phase slave switching circuit to be enabled is set to 3. The control circuit as claimed in claim 1, wherein each slave controller further includes: a first discharge path used to reset the first voltage when a rising edge of the main control signal causes the rising edge of the pulse signal to come; and A second discharge path is used to reset the second voltage when the rising edge of the main control signal causes a falling edge of the pulse signal to come. The control circuit as described in claim 1, wherein the comparison circuit includes: a comparator for generating a square wave signal based on the comparison result of the first voltage and the second voltage; a rising edge latch for providing a rising edge pulse signal on the rising edge of the square wave signal; a falling edge latch for providing a falling edge pulse signal on the falling edge of the square wave signal; and An OR gate circuit is used to receive the rising edge pulse signal and the falling edge pulse signal to generate the setting signal. The control circuit as claimed in claim 1, wherein each slave controller further includes: a conduction duration control circuit for generating a conduction duration control signal for controlling a conduction duration of the switch of the slave switching circuit corresponding to a phase to be enabled; and A first flip-flop has a setting terminal, a reset terminal and an output terminal, wherein the setting terminal is used to receive the setting signal, the reset terminal is used to receive the conduction duration control signal, the first positive flip-flop is The inverter is used to generate the corresponding slave control signal at the output end. The control circuit as claimed in claim 1, wherein each slave controller further includes: A turn-off duration control circuit for generating a turn-off duration control signal for controlling a turn-off duration of the switch of the slave switching circuit corresponding to one phase to be enabled; and A second flip-flop has a setting terminal, a reset terminal and an output terminal, wherein the setting terminal is used to receive the off-time control signal, the reset terminal is used to receive the setting signal, and the second The flip-flop is used to generate the corresponding slave control signal at the output end. The control circuit as claimed in claim 1, wherein the first circuit and the second circuit include: A charging current source having an input terminal for setting the charging current according to a frequency of the main control signal; A discharge current source having an input terminal for setting the discharge current; a first switch unit for alternately connecting the first capacitor to the charging current source and the discharging current source, thereby alternately charging and discharging the first capacitor; and A second switch unit is used to alternately connect the second capacitor to the charging current source and the discharging current source, thereby alternately charging and discharging the second capacitor. A multi-phase switched power supply including: a multi-phase switching circuit including the master switching circuit and the slave switching circuit in which at least one phase is to be enabled; and The control circuit as described in any one of claims 1-9. A control method for a multi-phase switching power supply, wherein the multi-phase switching power supply includes a multi-phase switching circuit, the multi-phase switching circuit includes a master switching circuit and a slave switching circuit in which at least one phase is to be enabled , the slave switching circuit to be enabled for each phase includes a first capacitor and a second capacitor, and the control method includes: providing a main control signal to a main switch circuit; Under an addition operation, a main control signal is frequency-divided to provide a pulse signal, wherein a duty cycle of the pulse signal is 0.5; where, for each phase, the slave switching circuit will be enabled: setting a ratio of a charging current and a discharging current based on a phase number of the slave switching circuit to be enabled; In response to the logic high of the pulse signal, the charging current is used to charge the first capacitor, and the discharge current is used to discharge the second capacitor; In response to the logic low of the pulse signal, the discharge current is used to discharge the first capacitor, and the charging current is used to charge the second capacitor; Comparing a first voltage across the first capacitor with the second voltage across the second capacitor; and A setting signal is generated based on the comparison result to turn on a switch of the slave switching circuit corresponding to a phase to be activated. The control method as claimed in claim 11, wherein when the phase addition operation adds a phase slave switch circuit, the ratio of the charging current and the discharge current corresponding to the slave switch circuit to be activated is set to 1. The control method as described in claim 11, wherein when the phase addition operation adds two phases to the slave switch circuit, wherein: The ratio of the charging current and the discharging current corresponding to the first phase slave switching circuit to be enabled is set to 0.5; and The ratio of the charging current and the discharging current corresponding to the second phase slave switching circuit to be enabled is set to 2. The control method as described in claim 11, wherein when the phase addition operation adds a three-phase slave switch circuit, wherein: The ratio of the charging current corresponding to the first phase slave switching circuit to be enabled and the discharging current is set to 1/3; The ratio of the charging current and the discharging current corresponding to the second phase slave switching circuit to be enabled is set to 1; and The ratio of the charging current and the discharging current corresponding to the third phase slave switching circuit to be enabled is set to 3. The control method as described in request item 11 also includes: When a rising edge of the main control signal causes the rising edge of the pulse signal to come, resetting the first voltage; and When the rising edge of the main control signal causes the falling edge of the pulse signal to come, the second voltage is reset.

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