TW202405258A - Single crystal silicon - Google Patents

Abstract

The present invention provides a single crystal silicon, which has a mark showing the boundary of each single crystal block in the single crystal silicon grown in the following manner: when the single crystal silicon is pulled by the Zhicholaski method, the melt is intermittently A secondary dopant is added into the liquid to form a plurality of single crystal blocks along the axial direction, and the type and resistivity of each single crystal block are controlled for cultivation. The aforementioned single crystal silicon system includes: a plurality of single crystal bulk bodies 1, which have a first resistivity with a variation range within a specification range in the direction of the crystal axis, and are formed continuously in the direction of the crystal axis; and a high resistivity layer 2, The second resistivity has a peak that protrudes higher than the aforementioned specification range at the boundaries of a plurality of the single crystal bulk bodies 1 .

Description

Single crystal silicon

The present invention relates to a single crystal silicon, and in particular to a single crystal silicon grown in the following manner: when pulling the single crystal silicon using the Czochralski method, by intermittently adding auxiliary materials to the silicon melt. The dopant is grown by counter doping (counter dope) to control the resistivity in the axial direction.

The CZ method (CZ method) is used to grow single crystal silicon in the following manner: the raw polycrystalline silicon is filled into a quartz crucible provided in a chamber, and the polycrystalline silicon is heated using a heater provided around the quartz crucible. Heated and melted to become silicon melt. Thereafter, the seed crystal (seed) mounted on the seed chuck is immersed in the aforementioned silicon melt, and the seed is pulled up while rotating the seed chuck and the quartz crucible in the same or opposite directions. Clamp.

Most of the single crystal silicon produced by this CZ method is used as a semiconductor material. The resistivity of the grown single crystal silicon is adjusted by adding dopants to the silicon melt. Dopants are classified into n-type and p-type, and P (phosphorus) is mostly used as a dopant when growing n-type crystals.

In single crystal silicon grown using the CZ method, when dopants are added, the resistivity changes in the crystal growth direction. This is caused by the segregation of the dopant, and the doping concentration in the residual liquid gradually becomes higher corresponding to the decrease in the silicon melt in the crucible as the single crystal grows, and the resistivity of the single crystal also continues. reduce. The segregation coefficient of P (phosphorus) is 0.35, which is lower than the segregation coefficient of B (boron), 0.8, which is widely used as a dopant for p-type crystals. Compared with p-type crystals, the resistivity from the top to the bottom is significantly lower. Therefore, there is a problem of reducing the portion that can be used as a product, making it difficult to improve the yield.

Regarding this issue, for example, Patent Document 1 discloses a method in which a main dopant is added (that is, co-doped) before pulling the crystallization, and the polarity of the main dopant is opposite and the segregation coefficient is smaller. of secondary dopants. By using this method, the decrease in resistivity caused by the main dopant is offset by the secondary dopant, thereby improving the resistivity distribution in the axial direction of the single crystal. However, as mentioned above, the most commonly used dopant in manufacturing n-type single crystals is P (phosphorus). The segregation coefficient of P (phosphorus) is about 0.35. However, as an element with opposite polarity, B ( The segregation coefficient of boron) is about 0.8 and is larger than that of P (phosphorus), so the above technology cannot be used directly.

Patent Document 2, which solves this problem, discloses a method of continuously adding B (boron) to P (phosphorus) as the main dopant (that is, reverse doping) during pulling of a single crystal. If this method is used, it is possible to produce an n-type single crystal in which the resistivity distribution in the axial direction is improved by reverse doping of P (phosphorus) as the main dopant and B (boron) as the secondary dopant. [Prior technical literature] [Patent Document]

[Patent Document 1] Japanese Patent Application Publication No. 2004-307305. [Patent Document 2] Japanese Patent Application Laid-Open No. 3-247585.

[Problem to be solved by the invention]

By the way, various dopants have been used to control the resistivity of single crystal silicon grown in the past. Generally speaking, one or multiple (multi-pulling) single crystals are During pulling, the same type of dopant is used for the secondary dopant doped with the main dopant from the beginning to the completion of pulling. However, the demand for low-volume and multi-item products has recently been high, and it is necessary to form a single crystal with multiple types (types with different sub-dopant types and resistivities) in the direction of the crystal axis. If multiple types of single crystal blocks are continuously formed along the axial direction of a single crystal, reverse doping can be achieved by changing, for example, the type and amount of secondary dopants during the pulling of the single crystal. .

However, when multiple types of single crystal blocks are formed continuously along the axial direction in one single crystal, there has been no technology to clearly determine the boundaries between adjacent single crystal blocks. Therefore, in order to extract a single crystal bulk with the specifications required by the customer, it is necessary to cut out a plurality of wafers at the estimated boundary portion and then evaluate whether these wafers meet the required specifications and determine the quality of the single crystal bulk. It takes a lot of time and labor to select a single crystal block based on the boundary and ship it. Furthermore, if the evaluation results of the plurality of cut wafers all do not meet the required specifications, it is necessary to cut out other parts of the wafer and evaluate it again. Therefore, there is the following problem: in addition to requiring more time and In addition to labor, there will also be losses incurred due to non-compliance with previous evaluations.

The inventor of this case worked hard to study and complete the present invention on the premise of reverse doping by adding a secondary dopant and controlling the resistivity in the axial direction during pulling of single crystal silicon. The object of the present invention is to provide a single crystal silicon, which has a mark showing the boundary of each single crystal block in the single crystal silicon grown in the following manner: when the single crystal silicon is pulled by the Zhicholaski method, intermittently A secondary dopant is added to the melt to form a plurality of single crystal blocks along the axial direction, and the type and resistivity of each single crystal block are controlled for cultivation. [Means used to solve problems]

The single crystal silicon system of the present invention, which was developed to solve the above-mentioned problems, includes a plurality of single crystal blocks, which have a first resistivity with a variation range within a specification range in the direction of the crystal axis, and are formed continuously in the direction of the crystal axis. ; and a high-resistivity layer having a second resistivity with a peak that protrudes higher than the aforementioned specification range at the boundaries of a plurality of the aforementioned single crystal blocks. In addition, preferably, each of the plurality of aforementioned single crystal blocks includes a p-type dopant and an n-type dopant; the p-type dopant is B (boron), Al (aluminum), Ga (gallium) , At least one of In (indium); the n-type dopant is at least one of P (phosphorus), As (arsenic), Sb (antimony), and Bi (bismuth). In addition, the maximum value of the first resistivity is preferably 50% or less of the peak value of the second resistivity. Alternatively, the maximum value of the first resistivity may be 90% or less of the peak value of the second resistivity.

In the single crystal silicon system configured in this way, the position of the high resistivity layer can be determined by measuring the resistance value of the crystal side surface and using the second resistivity peak as a mark. Therefore, the boundaries of multiple single crystal blocks can be distinguished with high accuracy. Therefore, according to the single crystal silicon of the present invention, if the dopant substance or resistivity contained in each single crystal block is different from each other, the boundaries of these blocks can be determined and cut with high precision, so that the blocks can be easily separated. By managing products in a single location, labor and losses can be significantly reduced compared to the past. [Invention effect]

According to the present invention, a single crystal silicon can be provided, which has a mark showing the boundary of each single crystal block in the single crystal silicon grown in the following manner: when the single crystal silicon is pulled by the Zhicholaski method, intermittently A secondary dopant is added to the melt to form a plurality of single crystal blocks along the axial direction, and the type and resistivity of each single crystal block are controlled for cultivation.

Hereinafter, the single crystal silicon of the present invention will be described using drawings. However, this embodiment is described as an example of the present invention, and the present invention is not limited thereto. FIG. 1 is a schematic perspective view of the single crystal silicon of the present invention, and FIG. 2 is a schematic graph showing an example of the change in resistivity along the crystal axis direction of the outer peripheral surface of the single crystal silicon of the present invention. In the graph of FIG. 2 , the vertical axis represents the resistivity, and the horizontal axis represents the solidification rate in the crystal axis direction.

The single crystal silicon C of the present invention is grown by intermittently adding a secondary dopant to the melt multiple times during reverse doping during the pulling process using the Czochralski method. Thereby, the single crystal silicon C system has: a plurality of single crystal blocks 1a to 1e, has a first resistivity RA with a variation range (R1 to R2) within the specification range in the crystal axis direction, and has a first resistivity RA in the crystal axis direction. are formed continuously; and the high-resistivity layers 2a to 2d have a second resistivity RB with a peak Rp that protrudes higher than the aforementioned specification range at the boundaries of the plurality of single crystal blocks 1a to 1e.

In this embodiment, the type and amount of the sub-dopant added can be changed each time, and the high-resistivity layers 2a to 2d are formed at the time when the sub-dopant is added. As mentioned above, each single crystal block 1 has a first resistivity RA, the first resistivity RA has a variation range (R1 to R2) within the specification range, and the maximum value of the first resistivity RA is the 2. Resistivity RB is less than 50% of the peak value. The peak value Rp of the second resistivity RB of the high resistivity layers 2a to 2d can be used as a mark to indicate the boundaries of a plurality of single crystal blocks 1a to 1e in the axial direction of a single crystal silicon C. That is, by performing resistivity measurement using, for example, the four-probe method from the side of the single crystal silicon C to detect a plurality of peaks Rp, the positions can be used as boundaries of a plurality of single crystal bulk bodies 1 .

In addition, the chart shown in FIG. 2 shows that four times of adding a secondary dopant through reverse doping (thereby obtaining five single crystal blocks 1 with different properties), however, the present invention is not limited to this form. The number of times the sub-dopant is added and the type of dopant added each time are not limited. Each of the plurality of aforementioned single crystal blocks contains a dopant; if it is a p-type dopant, it is preferably at least one of B (boron), Al (aluminum), Ga (gallium), and In (indium). One; if it is an n-type dopant, it is preferably at least one of P (phosphorus), As (arsenic), Sb (antimony), and Bi (bismuth).

FIG. 3 is a cross-sectional view showing an example of a single crystal pulling device for producing single crystal silicon C. This single crystal pulling device 100 is provided with a furnace body 10 formed by overlapping a pulling cavity 10b on a cylindrical main cavity 10a; the furnace body 10 is equipped with: a carbon crucible (or graphite crucible) 20, which can be wound The vertical axis rotates and can be lifted up and down; and the quartz glass crucible 3 (hereinafter referred to as the crucible 3) is held by the aforementioned carbon crucible 20. The crucible 3 can rotate around the vertical axis as the carbon crucible 20 rotates.

In addition, there is provided below the carbon crucible 20: a rotation drive part 14, which is a rotation motor, etc., for rotating the carbon crucible 20 around the vertical axis; and a lift drive part 15 for lifting and lowering the carbon crucible 20. Moreover, the rotation drive control part 14a is connected to the rotation drive part 14, and the lift drive control part 15a is connected to the lift drive part 15.

In addition, the single crystal pulling device 100 is equipped with: a resistance heating type side heater 4, which melts the semiconductor raw material (raw material polycrystalline silicon) loaded in the crucible 3 to become a silicon melt M (hereinafter also referred to as the melt M); and a pulling mechanism 9, which rolls up the thread 6 and pulls the grown single crystal silicon C. The seed crystal Sc is attached to the front end of the wire 6 included in the pulling mechanism 9 .

Furthermore, the heater control unit 4 a that controls the amount of power supplied is connected to the side heater 4 , and the rotation drive control unit 9 a that controls the rotation drive of the pull-up mechanism 9 is connected to the pull-up mechanism 9 . In addition, in this embodiment, for example, the single crystal pulling device 100 is provided with a magnetic field applying electromagnetic coil 8 on the outside of the furnace body 10 . When a predetermined current is applied to the electromagnetic coil 8 for applying a magnetic field, a horizontal magnetic field of a predetermined intensity (1000 Gauss to 4000 Gauss) is applied to the melt M in the crucible 3 . The electromagnetic coil control unit 8 a that controls the operation of the magnetic field application electromagnetic coil 8 is connected to the magnetic field application electromagnetic coil 8 . That is, in this embodiment, the MCZ method (Magnetic field applied CZ; CZC method with applied magnetic field) in which a transverse magnetic field is applied to the melt M to grow a single crystal is implemented, thereby controlling the properties of the silicon melt M. Convection to stabilize single crystallization.

In addition, a radiation shield 7 surrounding the single crystal silicon C is arranged above the melt M formed in the crucible 3 . The radiation shield 7 has openings formed in the upper and lower parts, and is used to shield the excess radiant heat from the side heater 4, the melt M, etc. to the single crystal silicon C being grown and to rectify the gas flow in the furnace. In addition, the gap between the lower end of the radiation shield 7 and the melt surface is controlled to maintain a fixed distance (for example, 50 mm) at a predetermined distance according to the required characteristics of the grown single crystal.

In addition, the single crystal pulling device 100 is equipped with an optical measurement sensor 16 such as a CCD (Charge Coupled Device) camera, which is used to measure the diameter and crystal length (solidification rate) of the silicon single crystal. A small window 10a1 for observation is provided on the upper surface of the main chamber 10a, and the position change of the solid-liquid interface is detected from the outside of the small window 10a1. From the measured single crystal diameter and crystal length, the solidification rate expressed as the weight of the single crystal/the weight of the initial silicon raw material was determined.

Regarding the relationship between dopant concentration and resistivity, the single crystal system produces a dopant concentration distribution in the length direction of the single crystal (the vertical direction during pulling). The concentration distribution Cs of the dopant when the solidification rate of silicon is g, is expressed by the following formula (1). Formula (1): Cs=k×C0×(1-g) ^k-1 In formula (1), k is the equilibrium segregation coefficient, and C0 is the initial dopant concentration of the silicon melt. Among them, the equilibrium segregation coefficient of boron (B), which is most commonly used as a p-type dopant, is 0.8, and the equilibrium segregation coefficient of phosphorus (P), which is most commonly used as an n-type dopant, is 0.35.

In order to set the resistivity within a predetermined range, it is only necessary to adjust as follows: the relationship between the dopant concentration and the solidification rate is determined in advance during the growth of single crystal silicon, and the dopant concentration is adjusted according to these relationships. The resistivity of the single crystal is within the required range. For example, when P (phosphorus) is used as a dopant and the resistivity of the single crystal head is set to 20Ω. cm (ohm-centimeter; ohm-centimeter) to 100Ω． cm range, just add 0.1g to 3.5g of dopant (silicon fragments containing P (phosphorus) with a high concentration (about 10 ¹⁹ cm ^-3 ) with a resistivity of 1mΩ.cm to 5mΩ.cm) into one batch A lot of about 150kg of silicon is sufficient.

In addition, the single crystal pulling device 100 has a dopant supply jig 17 for supplying, for example, wafer-like (or powdery, granular, etc.) dopant (sub-dopant) to the melt M. The dopant supply jig 17 has an input container 18 for temporarily storing the input dopant, and a tubular portion (quartz tube, etc.) 19 connected to the input container 18 and extending downward. An opening 10a2 is provided on the upper surface of the main cavity 10a, and the tubular portion 19 of the aforementioned dopant supply jig 17 passes through this opening 10a2. The front end of the tubular portion 19 is disposed at a position where liquid level vibration or adhesion of the dopant to the crystal does not occur due to the introduction of the dopant.

In addition, convection of the silicon melt is suppressed under application conditions of a horizontal magnetic field of 1000 Gauss to 4000 Gauss as in this embodiment. Therefore, when the sub-dopant is added to the silicon melt, the sub-dopant moves with convection in a high-concentration state without being stirred immediately, and reaches the solid-liquid gap between the single crystal and the melt. interface. Afterwards, the sub-dopants are stirred and uniformly incorporated into the entire melt.

In addition, in this embodiment, the wafer-shaped dopant thrown into the melt M is a high-purity dopant (99.9% or more), or is obtained from a single crystal silicon containing a secondary dopant or a primary dopant. A wafer obtained by cleaving a silicon wafer with a thickness of 500 μm or more and 1000 μm or less obtained by slicing each single crystal silicon is used as an additive material. The resistivity of the single-crystal silicon used as a dopant wafer is measured and processed into the required size. Calculating the dopant concentration from the resistivity allows the amount of added dopant to be managed based on the weight of the wafer.

More specifically, the wafer-shaped dopant needs a minimum weight to prevent it from being discharged out of the cavity by the inert gas directly above the melt surface when it is put into the melt surface. Therefore, the surface area of each wafer is preferably 4 mm ² or more. However, if the size of the wafer is too large, melting will take time and the risk of adhering to the growing single crystal will increase, so it is preferably 25 mm ² or less. Similarly, from the viewpoint of weight and easy solubility, the thickness of the wafer is preferably 500 μm or more and 1000 μm or less.

In addition, this single crystal pulling device 100 is provided with: a computer 11 having a memory device 11a and an arithmetic control device 11b; and a rotation drive control unit 14a, a lifting drive control unit 15a, an electromagnetic coil control unit 8a, and a rotation drive control unit. 9a, the measurement sensor 16, and the heater control unit 4a are respectively connected to the arithmetic control device 11b.

In the single crystal pulling device 100 configured in this way, if, for example, a single crystal silicon C with a diameter of 300 mm is to be grown, pulling is performed in the following manner. That is, first, the raw material polycrystalline silicon (for example, 470 kg) and the silicon wafer for dopant addition are loaded into the crucible 3, and the crystal growth process is started according to the program stored in the memory device 11a of the computer 11. Among them, when manufacturing n-type single crystal silicon, for example, silicon wafers containing P (phosphorus) are used as the n-type main dopant (in addition, As (arsenic), Sb (antimony), Bi ( bismuth) as an n-type dopant).

Next, the inside of the furnace body 10 becomes a predetermined atmosphere (mainly an inert gas such as argon gas). For example, the furnace atmosphere is formed such that the furnace pressure is 60 torr to 110 torr and the argon gas flow rate is 40 L/min to 110 L/min. Next, while the crucible 3 is rotating in a predetermined direction at a predetermined rotation speed (rpm), the raw material polycrystalline silicon and the main dopant loaded in the crucible 3 are melted by heating by the side heater 4 and become a molten liquid M ( Step S1 in Figure 4). The P (phosphorus) concentration in the melt is, for example, 2.92E14atoms/cm ³ . In addition, in this step S1, the silicon wafer for dopant addition may also be put into the crucible 3 while melting the raw material polycrystalline silicon.

Next, a predetermined current is passed through the electromagnetic coil 8 for applying a magnetic field, and a horizontal magnetic field is started to be applied to the melt M with a magnetic flux density of, for example, 2500 Gauss (step S2 in FIG. 4 ). By applying this magnetic field, convection of the melt is suppressed. In addition, the power supply to the opposite heater 4, the pulling speed, the magnetic field application intensity, etc. are used as parameters to adjust the single crystal oxygen concentration to a low oxygen concentration (for example, 0.8E18atoms/ ^cm3 ) and the diameter of the straight tube portion to 310 mm. The conditions are set so that the stirring of the melt becomes slow, and the seed crystal Sc starts to rotate around the axis at a predetermined speed. The rotation direction is opposite to the rotation direction of the crucible 3 . Then, the line 6 is lowered and the seed crystal Sc is brought into contact with the melt M, and the front end portion of the seed crystal Sc is dissolved and then necked to form a neck portion Sc1.

Then, the single crystal pulling process begins. That is, the crystal diameter gradually expands to form the shoulder portion C1, and then the process moves to the step of forming the straight cylindrical portion C2 that becomes the product part (step S3 in FIG. 4). After starting the cultivation of single crystal silicon C, the computer 11 uses the measurement results of the measurement sensor 16 to determine the curing rate of the single crystal silicon (step S4 in FIG. 4 ). When the preset curing rate (for example, 0.245) is reached ( In step S5 of FIG. 4 , a sub-dopant having a conductivity type opposite to that of the main dopant is injected into the melt surface using the dopant supply jig 17 . As a secondary dopant, for example, In (indium) with a purity of 99.9% is 1003 mg (the dopant dose is set to obtain the required resistivity) (step S6 in FIG. 4 ).

Among them, since the convection of the melt M is suppressed by the application of a magnetic field, the added sub-dopant reaches the solid surface of the single crystal silicon C along the convection of the melt M without being rapidly stirred in the melt M. liquid interface. At this solid-liquid interface, the secondary dopant (p-type) is a carrier that offsets the main dopant (n-type), and a high-resistivity layer 2a that becomes resistivity (second resistivity) is formed. The high-resistivity layer 2a The system has a peak Rp that stands out higher than the specification range. The peak value Rp of the resistivity of this high resistivity layer 2a can be used as a mark. After that, when the sub-dopant is incorporated into the entire melt M, the resistivity (first resistivity) drops sharply to near the upper limit R2 within the specification range, and as the pulling progresses, the resistivity gradually decreases.

When the resistivity reaches a solidification rate (for example, 0.398) that is reduced to near the lower limit R1 within the specification range (steps S4 and S5 in FIG. 4 ), the dopant supply jig 17 will have a conductivity type opposite to that of the main dopant. The secondary dopant is added to the melt surface. Examples of the secondary dopant include 25 mg of Ga (gallium) with a purity of 99.9% (the doping dose is set to obtain the required resistivity) (step S6 in FIG. 4 ).

Among them, the added secondary dopant reaches the solid-liquid interface of the single crystal silicon C along the slow convection of the melt M, just like when the secondary dopant was added last time. At this solid-liquid interface, the secondary dopant (p-type) is a carrier that offsets the main dopant (n-type), and a high-resistivity layer 2b that becomes resistivity (second resistivity) is formed. The high-resistivity layer 2b The system has a peak Rp that stands out higher than the specification range. After that, when the sub-dopant is incorporated into the entire melt M, the resistivity decreases sharply to near the upper limit R2 within the specification range, and as the pulling progresses, the resistivity gradually decreases.

Continue to form the straight cylindrical portion C2 (Step S7 in Figure 4). When the resistivity reaches a curing rate (for example, 0.542) that is reduced to near the lower limit R1 within the specification range (Steps S4 and S5 in Figure 4), use dopants to The supply jig 17 supplies a sub-dopant having a conductivity type opposite to that of the main dopant onto the melt surface. Examples of the secondary dopant include 1.2 mg of Al (aluminum) with a purity of 99.9% (the dopant dose is set to obtain the required resistivity) (step S6 in FIG. 4 ).

However, the injected sub-dopant reaches the solid-liquid interface of the single crystal silicon C along the convective flow of the melt M, just like when the sub-dopant was injected last time. At this solid-liquid interface, the secondary dopant (p-type) is a carrier that offsets the main dopant (n-type), and a high-resistivity layer 2c that becomes resistivity (second resistivity) is formed. The high-resistivity layer 2c The system has a peak Rp that stands out higher than the specification range. After that, when the sub-dopant is incorporated into the entire melt M, the resistivity decreases sharply to near the upper limit R2 within the specification range, and as the pulling progresses, the resistivity gradually decreases.

Furthermore, the straight tube portion C2 is continued to be pulled (Step S7 in Figure 4), and when the resistivity reaches a curing rate (for example, 0.654) that is reduced to near the lower limit R1 within the specification range (Steps S4 and S5 in Figure 4), use The dopant supply jig 17 supplies a sub-dopant having a conductivity type opposite to that of the main dopant onto the melt surface. As the secondary dopant, for example, a silicon wafer containing 5.303E19atoms/cm ³ of B (boron) is 57 mg (the doping dose is set to obtain the required resistivity) (step S6 in FIG. 4 ).

Among them, the added secondary dopant reaches the solid-liquid interface of the single crystal silicon C along the slow convection of the melt M, just like when the secondary dopant was added last time. At this solid-liquid interface, the secondary dopant (p-type) is a carrier that offsets the main dopant (n-type), and a high-resistivity layer 2d that becomes resistivity (second resistivity) is formed. The high-resistivity layer 2d The system has a peak Rp that stands out higher than the specification range. After that, when the sub-dopant is incorporated into the entire melt M, the resistivity drops sharply to near the upper limit R2 within the specification range, and as the pulling progresses, the resistivity gradually decreases.

Continue to grow the single crystal, and when the single crystal is pulled to the required length without dislocation (step S7 in Figure 4), the single crystal growth is completed. That is, after the straight cylindrical portion C2 is formed to a predetermined length, it moves to the final tail process. In this tail process, the contact area between the lower end of the crystal and the melt M is gradually reduced, and the single crystal silicon C and the melt M are Separate to produce single crystal silicon.

As described above, in the formation of single crystal silicon C, reverse doping is performed multiple times by adding a secondary dopant having a polarity opposite to the conductivity type of the main dopant, and the secondary doping is stirred along the slow convection of the melt M agent. Thereby, the high-concentration secondary dopant reaches the solid-liquid interface and high resistivity layers 2a to 2d are formed. The high resistivity layers 2a to 2d have peak Rp that protrudes higher than the specification range. That is, a plurality of single crystal blocks 1a to 1e are formed continuously with the timing of adding the sub-dopant as a dividing line, and high resistivity layers 2a to 2d are respectively formed at the boundaries of these blocks. Since the formed single crystal silicon C system can determine the positions of the high resistivity layers 2a to 2d by measuring the resistance value of the crystal side surface and using the peak value of the second resistivity RB as a mark, multiple layers can be distinguished with high accuracy. Boundaries of single crystal bulks 1a to 1e. Therefore, according to the single crystal silicon C of the present invention, when the dopant substances and resistivities contained in the single crystal blocks 1a to 1e are different from each other, the boundaries of these blocks can be determined and cut with high precision, so it is possible to It is easy to manage products in individual blocks, thus significantly reducing labor and losses compared to the past.

In addition, in the foregoing embodiments, as an explanation of the production of single crystal silicon of the present invention, an n-type single crystal silicon is produced using an n-type dopant as the main dopant. However, the present invention is not limited to this. It may also be p-type single crystal silicon using a p-type dopant as the main dopant. In addition, the maximum value of the first resistivity is not limited to 50% or less of the peak value of the second resistivity. As long as it is 90% or less of the peak value of the second resistivity, the present invention can be fully applied. [Example]

The single crystal silicon of the present invention will be further described based on examples. [Example 1] In Example 1, 470 kg of silicon raw material was filled into a quartz crucible with a diameter of 32 inches, and P (phosphorus) was added as a main dopant and melted. The P (phosphorus) concentration in the initial melt was set to 2.92E14atoms/cm ³ . In addition, the distance between the radiation shield and the melt surface was set to 50mm, the furnace pressure was set to 65torr, and argon gas was flowed in at a flow rate of 90L/min, thereby creating a furnace environment with a transverse magnetic field intensity of 2500 Gauss. Then, the crucible rotation speed was set to 1 rpm, the crystallization rotation speed was set to 7 rpm (in the opposite direction to the crucible rotation), and a single crystal was grown at a pulling speed of 1.5 mm/min with a crystal diameter of 310 mm as a target. In addition, set the resistivity specification to 35Ω. cm to 45Ω． cm.

Start pulling the single crystal, and reverse-dope 1003 mg of In (indium) with a purity of 99.9% as a secondary dopant at the position where the solidification rate is 0.245. After that, at the position where the solidification rate is 0.398, 25 mg of Ga (gallium) with a purity of 99.9% is used as a secondary dopant for reverse doping. In addition, at the position where the solidification rate is 0.532, 1.2mg of Al (aluminum) with a purity of 99.9% is used as a secondary dopant for reverse doping. Furthermore, at the position where the solidification rate is 0.654, silicon boron flakes with a concentration of 5.303E19 atoms/cm ³ were reversely doped with 57mg as a secondary dopant. As shown in FIG. 3 , a quartz tube is placed in a furnace to add secondary dopants, and various dopants are added to the melt.

After the pulled single crystal was cooled, the resistivity was measured using the four-probe method from the side of the crystal. FIG. 5 is a graph showing the measurement results of resistivity. In the graph of Figure 5, the vertical axis represents resistivity (Ω.cm), and the horizontal axis represents curing rate. The resistivity was measured at intervals of 10 mm along the solidification rate (crystalline axis). As shown in the graph of FIG. 5 , relative to the basic resistivity (resistivity within the specification range), a peak of high resistivity was detected near the crystal length position where each sub-dopant was added. The maximum value of the resistivity within the aforementioned specification range is 50% or less of the peak value of the aforementioned high resistivity. In this embodiment, the maximum value of the resistivity within the aforementioned specification range is less than 50% of the peak value of the aforementioned high resistivity, so it is preferably used as a mark; however, the maximum value of the resistivity within the aforementioned specification range is less than 50% of the peak value of the aforementioned high resistivity. It fully functions as a marker even if the resistivity is less than 90% of the peak value, allowing detection of high resistivity peaks. In addition, when this single crystal was cut into bulks based on the position of high resistivity, sliced into wafers, and evaluated, it was confirmed that a single crystal bulk into which various dopants were added could be obtained with high accuracy.

1,1a~1e: Single crystal bulk 2,2a~2d: high resistivity layer 3: Quartz glass crucible (crucible) 4: Side heater 4a: Heater control section 6: line 7: Radiation shielding 8: Electromagnetic coil for applying magnetic field 8a: Solenoid control part 9: Lifting mechanism 9a: Rotary drive control section 10: Furnace body 10a: Main cavity 10a1: small window 10a2: Open your mouth 10b: Lifting cavity 11:Computer 11a: Memory device 11b:Computational control device 14: Rotary drive part 14a: Rotary drive control section 15:Lifting drive part 15a: Lift drive control part 16:Measurement sensor 17: Dopant supply fixture 18: Put in the container 19: Tubular part 20:Carbon crucible 100:Single crystal pulling device C:Single crystal silicon C1: Shoulder C2:Straight section M: Silicon melt (melt) M1: Melt level R1: The lower limit of the resistivity specification range R2: The upper limit of the resistivity specification range RA: first resistivity RB: second resistivity Rp: peak value S1~S7: steps Sc: seed crystal Sc1: Neck

[Fig. 1] is a perspective view schematically showing the single crystal silicon of the present invention. [Fig. 2] is a schematic graph showing an example of the change in resistivity along the crystal axis direction on the outer peripheral surface of single crystal silicon of the present invention. [Fig. 3] is a cross-sectional view showing an example of a single crystal pulling device for producing single crystal silicon. [Fig. 4] is a flow chart showing an example of the single crystal silicon manufacturing method of the present invention. [Fig. 5] A graph showing the results of Example.

1,1a~1e: Single crystal bulk

2,2a~2d: high resistivity layer

C:Single crystal silicon

Claims (4)

A kind of single crystal silicon, which has: A plurality of single crystal blocks have a first resistivity with a variation range within a specification range in the direction of the crystal axis, and are formed continuously in the direction of the crystal axis; and The high resistivity layer has a second resistivity having a peak that protrudes higher than the specification range at the boundaries of a plurality of the single crystal blocks. The single crystal silicon as described in claim 1, wherein each of the plurality of aforementioned single crystal blocks contains a p-type dopant and an n-type dopant; The p-type dopant is at least one of B, Al, Ga, and In; The n-type dopant is at least one of P, As, Sb, and Bi. The single crystal silicon according to claim 1 or 2, wherein the maximum value of the first resistivity is 50% or less of the peak value of the second resistivity. The single crystal silicon according to claim 1 or 2, wherein the maximum value of the first resistivity is 90% or less of the peak value of the second resistivity.