TW202333341A - Semiconductor device without secondary soldering capable of easily selecting materials or processing conditions - Google Patents

Abstract

The object of the present invention is to provide a semiconductor device without secondary soldering, which may realize a structure without secondary soldering for easily selecting materials or processing conditions. The semiconductor device of the present invention comprises: a first conductor 16A; a second conductor 16B; a power semiconductor chip 7 disposed between the first conductor and the second conductor, wherein a first electrode is electrically connected to the first conductor and a second electrode is electrically connected to the second conductor; and, a third conductor 2 for fixing the aforementioned first conductor. The aforementioned power semiconductor chip is bonded to at least one of the aforementioned first conductor or the aforementioned second conductor by soldering 8. The aforementioned first conductor and the aforementioned third conductor may be electrically and mechanically connected through a concave-convex engaging structure without soldering.

Description

Semiconductor device without secondary soldering

The present invention relates to a secondary soldering-free semiconductor device that eliminates secondary soldering.

For example, when assembling a rectifier element used in an alternator, it is first formed as a primary molded body using multiple components such as power semiconductor chips, control ICs (Integrated Circuits), capacitors, conductive adhesives, or primary welding. . Furthermore, the primary molded body thus produced is sometimes used to produce rectifying elements used in alternators using leads or discs and secondary welding. In this way, in the manufacturing process of the rectifier element used in the alternator, there is a manufacturing process in which the primary formed body is formed by primary welding and then secondary welding is used. Related to this technology, there is Patent Document 1, for example.

The [Abstract] of Patent Document 1 discloses a technology for a semiconductor device, and it is stated that the [Project] is to provide a semiconductor device that is low-cost, does not require complicated manufacturing steps, and is easy to implement, and an alternator using the same. [Solution] This semiconductor device includes: a base 21 having a base 24; a lead 22 having a lead head 25; and an electronic circuit body 100; and there is an electronic circuit body between the base and the lead, and the base is connected to the electronic circuit body. On the first side, the lead head is connected to the second side of the electronic circuit body. The electronic circuit body includes a transistor circuit chip 11 with switching elements, a control circuit chip 12 for controlling the switching elements, a drain frame 14, and a source frame 15. It is integrally covered with resin 16, connects one of the drain frame and the source frame to the source, and connects the other of the source frame and the drain frame to the lead." As shown in Patent Document 1, after welding (one welding) is performed between the transistor circuit chip and the control circuit chip and either the drain frame or the source frame inside the electronic circuit body, the electronic circuit body is Welding (secondary welding) is performed between the source electrode and the lead head. [Prior technical literature] [Patent Document]

[Patent Document 1] Japanese Patent Application Publication No. 2017-098276

[Problem to be solved by the invention]

However, in the above-mentioned Patent Document 1, there is a primary soldering step inside the electronic circuit body, and a secondary soldering step between each of the external substrate of the electronic circuit body and the lead head. Therefore, when using the secondary soldering step, it is necessary to consider the internal thermal stress caused by the melting point of the primary soldering or conductive adhesive or the thermal history of the process to conduct research on material selection or manufacturing conditions.

The present invention was invented in view of the above problems, and its subject (objective) is to provide a structure without secondary welding that eliminates the need for secondary welding after primary welding, thereby making it easy to select the same material selection or manufacturing conditions. Secondary soldering of semiconductor devices. [Technical means to solve problems]

In order to solve the above-mentioned problems and achieve the object of this invention, it is comprised as follows. That is, the secondary soldering-free semiconductor device of the present invention is characterized by having: a first conductor; a second conductor; and a power semiconductor chip arranged between the first conductor and the second conductor, and the first electrode is electrically connected to The above-mentioned first conductor and the second electrode are electrically connected to the above-mentioned second conductor; and a third conductor, which fixes the above-mentioned first conductor; and the above-mentioned power semiconductor chip is bonded to at least one of the above-mentioned first conductor or the above-mentioned second conductor by soldering. 1. The above-mentioned first conductor and the above-mentioned third conductor are electrically and mechanically connected through a concave and convex fitting structure without welding. In addition, other mechanisms are described in the form for carrying out the invention. [Effects of the invention]

According to the present invention, it is possible to provide a semiconductor device without secondary soldering that can easily select materials or manufacturing conditions.

Hereinafter, the embodiment for implementing the present invention (hereinafter referred to as "embodiment") will be described with reference to the drawings as appropriate. In addition, in the respective drawings for explaining the embodiments, those having the same functions are assigned the same reference numerals, and repeated descriptions thereof are appropriately omitted. In addition, in the description of the following embodiments, no duplication will be made unless particularly necessary, and the description of the same or identical parts will be appropriately omitted. In addition, since the drawings referred to in the following description schematically show embodiments, the scale, spacing, positional relationship, etc. of each member may be exaggerated, or part of the member may be omitted from the illustration.

≪First Embodiment: Part 1≫ The structure of the secondary soldering-free semiconductor device according to the first embodiment of the present invention will be described with reference to FIGS. 1A and 1B. FIG. 1A is a diagram schematically showing an example of the cross-sectional structure of the secondary soldering-free semiconductor device 101 according to the first embodiment of the present invention. 1B shows the structure of the non-re-soldering semiconductor device 101 in the first embodiment of the present invention for easy understanding. The non-re-soldering semiconductor device 101 is decomposed into the disk 2, the screw 17, the built-in package 51 and the leads 4. An example of anatomical view. In addition, in FIGS. 1A and 1B , the description of the resin filled in the interior of the non-secondary soldering semiconductor device 101 (for example, the resin 6 of FIG. 4A or FIG. 5A to be described later) is omitted for easy understanding.

In FIG. 1A , the secondary soldering-free semiconductor device 101 is composed of a disk 2 (third conductor), a built-in package 51 , and a lead (lead electrode) 4 . Furthermore, the built-in package 51 includes a flat plate 16A (first conductor), a flat plate 16B (second conductor), a power semiconductor chip 7, a source block (spacer conductor) 11, a control IC chip (control IC, control circuit) 10, and a capacitor. 13 and an insulating film (an insulating film formed by printing a pattern) 18.

The power semiconductor chip 7 is, for example, a power MOSFET chip using a MOSFET (Metal Oxide Semiconductor Field-Effect Transistor: Metal Oxide Semiconductor Field-Effect Transistor). The power semiconductor chip 7 has two main surfaces. Specific electrodes (first electrodes) on the first side of the power semiconductor chip 7 (the lower side in the paper perspective) are connected via a welding (soldering) 8 and mounted on the second side of the flat plate 16A (the upper side in the paper perspective). noodle). In addition, a specific electrode (second electrode) on the second side of the power semiconductor chip 7 (the upper side in the paper perspective) is connected to the first side of the source block 11 (the upper side in the paper perspective) via a welding (soldering) 8 below). The second surface of the source block 11 (the upper surface in the paper perspective) is connected to the first surface of the flat plate 16B (the lower surface in the paper perspective) via the conductive bonding material 9 . In this way, the second electrode of the power semiconductor chip 7 and the flat plate 16B (second conductor) are electrically connected via the source block (spacer conductor) 11 which is the spacer conductor.

The control IC chip 10 and the capacitor 13 are mounted on an insulating film 18 with a conductive bonding material 9 interposed therebetween. In addition, the insulating film 18 means an insulating film in which a pattern is formed by printing. Electrical bonding between the insulating film 18 and the flat plate 16B using the conductive bonding material 9 is excluded as a portion of the insulating film on which the insulating pattern is printed. Therefore, by appropriately forming the insulating pattern, electrical connections between a plurality of specific terminals of the control IC chip 10 and the plate 16B and the capacitor 13 are selectively formed. In addition, a plurality of other terminals different from the above-mentioned terminals of the control IC chip 10 are connected to specific terminals of the power semiconductor chip 7 via bonding wires 14 . Through this connection, the power semiconductor chip 7 controls the electrical characteristics by controlling the IC chip 10 .

In addition, the first surface of the flat plate 16A (the lower surface in the paper perspective) is mechanically and Electrical bonding. That is, the first surface of the flat plate 16A (first conductor) and the second surface of the disk 2 (third conductor) are electrically and mechanically connected through a concave and convex fitting structure without soldering. In addition, the second surface of the flat plate 16B is mechanically and electrically connected through the lead 4, the screw 17 and the screw hole 19. In addition, in FIG. 1A , a recess is provided on the first surface of the flat plate 16A (first conductor), and a recess is provided on the second surface of the disk 2 (third conductor). Furthermore, it has a screw 17 (rod-shaped member) fitted into the two recessed portions.

With the above configuration, the secondary soldering-free semiconductor device 101 includes the disk 2, the built-in package 51, and the leads 4, and constitutes, for example, a rectifying element having a first terminal and a second terminal. In addition, the power semiconductor chip 7 included in the built-in package 51, the control IC chip (control IC) 10, and the capacitor 13 constitute a circuit, and the voltage is supplied to the circuit from the flat plate 16A connected to the disk 2 and the flat plate 16B connected to the lead 4. (electricity).

As mentioned above, FIG. 1B shows the structure of the non-re-soldering semiconductor device 101 according to the first embodiment of the present invention for easy understanding. The non-re-soldering semiconductor device 101 is decomposed into the disk 2, the screw 17 and the built-in package. An example of an anatomical view of 51 and lead 4. In FIG. 1B , the built-in package 51 is as described above, and repeated descriptions are omitted.

In addition, in FIG. 1B , a screw hole 19 (recessed portion) is provided in the center of the second surface of disk 2 (third conductor). Furthermore, a screw hole 19 (recessed portion) is provided in the center of the first surface of the flat plate 16A (first conductor) of the built-in package 51 . By inserting the screw 17 (rod-shaped member) into the two screw holes 19 (recessed portions), the flat plate 16A (first conductor) of the built-in package 51 and the disk 2 (third conductor) are mechanically and electrically joined. That is, it can also be expressed as follows. (1) "The first conductor and the third conductor are electrically and mechanically connected through a concave and convex fitting structure without welding." (2) "The first conductor has a recessed portion, the third conductor has a recessed portion, and has a rod-shaped member that fits into the recessed portion of the first conductor and the recessed portion of the third conductor."

In addition, a screw hole 19 is provided in the center of the screw 17 of the lead 4 and the second surface of the flat plate 16B of the built-in package 51. By inserting the screw 17 into the screw hole 19, the flat plate 16B of the built-in package 51 and the lead 4 are mechanically and electrically connected. In addition, it is desirable that flat plate 16A (first conductor) and flat plate 16B (second conductor) have the same shape. If the shapes are the same, components can be common and component costs and manufacturing costs can be reduced. With the above configuration, the secondary soldering-free semiconductor device 101 includes the disk 2, the built-in package 51, and the leads 4, and constitutes, for example, a rectifying element having a first terminal and a second terminal.

In order to illustrate the effects of the above configuration of the semiconductor device 101 without secondary soldering, a semiconductor device as a comparative example will be described next.

≪Comparative example 1≫ The structure of the semiconductor device of Comparative Example 1 will be described with reference to FIGS. 2A and 2B. FIG. 2A is a diagram schematically showing an example of the cross-sectional structure of the semiconductor device (press-fit semiconductor device) 1000R of Comparative Example 1. 2B is a diagram schematically showing an example of the cross-sectional structure of the built-in package 500R of the semiconductor device 1000R (press-fit type semiconductor device) of Comparative Example 1. In FIG. 2A , a semiconductor device (press-fit semiconductor device) 1000R is composed of a built-in package (primary molded body) 500R, a disk 2R, and leads 4R. In addition, in FIG. 2A , the semiconductor device 1000R includes secondary soldering 300R and sealing resin 6 .

In FIG. 2B , a built-in package (primary molded body) 500R includes a power semiconductor chip 7 , a lead frame 12R2 , a source block 11 , and a primary solder 8 . In addition, in FIG. 2B , the built-in package 500R includes the control IC chip 10 , the capacitor 13 , the conductive bonding material 9 , the lead frame 12R1 , the bonding wire 14 , and the sealing resin 65 .

In fact, overlapping descriptions of FIGS. 2A and 2B and the above-mentioned FIGS. 1A and 1B are omitted. An overview of the differences between Figures 2A and 2B and the above-mentioned Figures 1A and 1B, and the biggest difference is that in Figure 2A, secondary welding 300R is used. The step of the secondary welding 300R is different from the step of the primary welding 8 in Figure 2B. That is, after the primary soldering 8 is performed on the built-in package (primary molded body) 500R, when the semiconductor device 1000R is constructed using the built-in package 500R, there is a step of performing the secondary soldering 300R. In this way, the semiconductor device 1000R of Comparative Example 1 shown with reference to FIGS. 2A and 2B has a step of primary welding 8 and a step of secondary welding 300R. Therefore, when performing the step of secondary welding, it is necessary to consider the primary welding or conductivity. Topics (problems) for studying material selection or manufacturing conditions due to internal thermal stress caused by the melting point of the adhesive or the thermal history of the manufacturing process.

≪First Embodiment: Part 2≫ Next, the characteristics of the secondary soldering-free semiconductor device according to the first embodiment of the present invention will be described. As mentioned above, in the semiconductor device without secondary soldering shown in FIGS. 1A and 1B , the "welding" step is only one-time soldering 8 and there is no "secondary soldering" step. That is, it is possible to provide a secondary soldering-free structure that eliminates the need for secondary soldering after primary soldering, thereby making it easy to select materials or manufacturing conditions for a secondary soldering-free semiconductor device. In addition, in FIGS. 1A and 1B , the description of the sealing resin is omitted, but the structure of the sealing resin will be described later with reference to FIGS. 4A and 4B of the second embodiment or FIGS. 5A and 5B of the third embodiment. Narrative.

<Effects of the first embodiment> According to the first embodiment of the present invention, a secondary welding-free structure that eliminates the need for secondary welding after primary welding is achieved. Therefore, it is possible to provide a semiconductor device without secondary soldering in which material selection or manufacturing condition selection accompanying the soldering step can be easily performed.

<Modification example of the first embodiment> Although the first embodiment of the present invention is described with reference to FIGS. 1A and 1B , some changes may be made. Next, modification 1, modification 1, and modification 3 of the first embodiment will be described in order with reference to FIG. 1C, FIG. 1D, and FIG. 1E.

≪Modification 1 of the first embodiment≫ FIG. 1C is a diagram showing an example of the cross-sectional structure of Modification 1 of the first embodiment of the present invention. In FIG. 1C , the lead 4C and the flat plate 16C form an integrated structure. In the integrated structure of the lead 4C and the flat plate 16C shown in FIG. 1C , the assembly steps are reduced, the close contact between the lead 4C and the flat plate 16C, and the electrical and mechanical reliability are improved.

≪Modification 2 of the first embodiment≫ FIG. 1D is a diagram showing an example of the cross-sectional structure of Modification 2 of the first embodiment of the present invention. In FIG. 1D , the flat plate 16D (first conductor) and the screw 17D (rod-shaped member) have an integrated structure. That is, the flat plate 16D has a convex portion. And, it is engaged with the screw hole 19 (recessed portion) of the disk 2 (third conductor: Figure 1B). That is, it can also be expressed as follows. "The first conductor has a convex part, the third conductor has a concave part, and the convex part of the first conductor fits into the concave part of the third conductor." In the integrated structure of the flat plate 16D (16A: FIG. 1B) and the screw 17D shown in FIG. 1D, the assembly steps are reduced, the close contact between the flat plate 16D and the screw 17D, and the electrical and mechanical reliability are improved. In addition, the flat plate 16D shown in FIG. 1D is integrated with the screw 17D, so it is different from the flat plate 16A in FIG. 1B, and other symbols are used.

≪Modification 3 of the first embodiment≫ FIG. 1E is a diagram showing an example of the cross-sectional structure of Modification 3 of the first embodiment of the present invention. In FIG. 1E , the disc 2E (third conductor) and the screw 17E (convex portion) form an integrated structure. Moreover, the convex portion (17E) of the integrated structure is engaged with the screw hole 19 of the flat plate 16A shown in Figure 1B. That is, it can also be expressed as follows. "The first conductor has a concave portion, the third conductor has a convex portion, and the concave portion and the convex portion of the third conductor fit into the first conductor." In the integrated structure of the disc 2E and the screw 17E shown in FIG. 1E, the assembly steps are reduced, the close contact between the disc 2E and the screw 17E, and the electrical and mechanical reliability are improved.

≪Second Embodiment≫ The structure of the secondary soldering-free semiconductor device according to the second embodiment of the present invention will be described with reference to FIG. 3A. 3A is an exploded view showing an example of the cross-sectional structure of the secondary soldering-free semiconductor device 102 in order to facilitate easy understanding of the structure of the secondary-bonding-free semiconductor device 102 according to the second embodiment of the present invention.

In FIG. 3A , the difference from FIG. 1B in the above-described first embodiment lies in the structure of the fixed plate 16B and the source block 11 . In FIG. 3A , the flat plate 16B and the source block 11B are fixed by the screw 17B and the screw hole 19B. That is, screw holes 19B are provided in the flat plate 16B and the source block 11B, and the screws 17B are inserted to fix them. In addition, a conductive adhesive may be used when inserting the screw 17B. In addition, since the screw 17B is used to fix the flat plate 16B and the source block 11B, the conductive joining material 9 of FIG. 1B is not required. Except for the above source block 11B, the screw hole 19B provided in the source block 11B, and the need for the conductive bonding material 9, the structure is the same as that of FIG. 1B, so repeated explanations are omitted.

<Effects of the second embodiment> By providing the source block 11B and the screw hole 19B in the source block 11B, there is an effect that the conductive bonding material 9 is not required.

≪Modification 4 of the second embodiment≫ FIG. 3B is a diagram showing an example of the cross-sectional structure of Modification 4 of the second embodiment of the present invention. In FIG. 3B , the lead 4F, the flat plate 16F (second conductor), and the screw 7F have an integrated structure. In the integrated structure of the lead 4F, the flat plate 16F and the screw 17F shown in Figure 3B, the assembly steps are reduced, the tightness, electrical and mechanical properties between the lead 4F and the flat plate 16F, and the flat plate 16F and the screw 17F are reduced. Reliability is improved.

≪Third Embodiment≫ The structure of the secondary soldering-free semiconductor device according to the third embodiment of the present invention will be described with reference to FIGS. 4A and 4B. 4A is a diagram schematically showing an example of the cross-sectional structure of the main seat, that is, the P-pole structure, when potting resin is used in the non-secondary soldering semiconductor device 103P according to the third embodiment of the present invention. 4B is a diagram schematically showing an example of the cross-sectional structure of the counter-base or N-pole structure when potting resin is used in the non-secondary soldering semiconductor device 103N according to the third embodiment of the present invention.

In addition, the non-secondary soldering semiconductor device 103P shown in FIG. 4A uses the same built-in package 53P as the built-in package 51 of the non-secondary soldering semiconductor device 101 shown in FIG. 1A. As will be described later, it is made of potting resin. Resin sealer. In addition, the non-secondary soldering semiconductor device 103N shown in FIG. 4B has a structure in which the built-in package 53P shown in FIG. 4A is turned upside down to form a built-in package 53N, as will be described later. In addition, the built-in package 53N is resin-sealed with potting resin.

＜The relationship between the upright position, which is the P pole structure, and the reverse position, which is the N pole structure.＞ Next, the relationship between the upright seat, that is, the P-pole structure of FIG. 4A , and the reverse seat, that is, the N-pole structure of FIG. 4B , will be described in sequence. First, the P-pole structure of FIG. 4A is explained.

≪P pole structure, straight seat≫ In FIG. 4A , the secondary soldering-free semiconductor device 103P is composed of a disk 2 (third conductor), a built-in package 53P, and leads 4 . Furthermore, the built-in package 53P includes a flat plate 16A (first conductor), a flat plate 16B (second conductor), a power semiconductor chip 7, a source block (spacer conductor) 11, a control IC chip 10, a capacitor 13, and an insulating film (printed The insulating film formed is composed of 18. Furthermore, it is provided with primary welding 8 and conductive joining material 9 . Although the above structure is the same as that in FIG. 1A , the above structure will be described in detail from the perspective of the main seat, that is, the P-pole structure.

In FIG. 4A , the power semiconductor chip 7 is composed of, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). Furthermore, the drain electrode and the source electrode of the MOSFET are provided on the main surface of each of the power semiconductor chips 7 . The drain electrode is disposed on the main surface of the plate 16A side, and the source electrode is disposed on the source block 11 side, that is, the main surface of the plate 16B side. Furthermore, the gate electrode is controlled by a signal from the control IC chip (control IC, control circuit) 10 via the bonding wire (14: FIG. 1A).

Since the flat plate 16A is electrically connected to the disk 2, the drain electrode of the power semiconductor chip 7 is electrically connected to the disk 2. Since the flat plate 16B is electrically connected to the lead 4, the source electrode of the power semiconductor chip 7 is electrically connected to the lead 4. With the above configuration, the secondary soldering-free semiconductor device 103P forms a P-pole structure. Also, this structure is called "Main Seat".

In addition, FIG. 4A is different from FIG. 1A in that the sealing resin 6 shown in FIG. 1A is omitted, and the characteristic cylindrical resin case 20 in FIG. 4A is omitted. In FIG. 4A , in order to prevent resin leakage, the periphery of the built-in package 53P is covered with the resin case 20 , and resin (resin) is injected (potted) from the outside of the resin case 20 . The built-in package 53P is housed inside the resin case 20 and sealed with resin (sealing resin) 6, thereby ensuring insulation and durability.

≪N pole structure, reverse seat≫ Next, the N-pole structure in FIG. 4B will be described. As described above, FIG. 4B is a diagram schematically showing an example of the cross-sectional structure of the N-pole structure when potting resin is used in the non-secondary soldering semiconductor device 103N according to the third embodiment of the present invention. In FIG. 4B , the difference from FIG. 4A lies in the relationship between the built-in package 53N and the built-in package 53P. That is, in FIG. 4B , the power semiconductor chip 7 , the control IC chip 10 and the capacitor 13 are mounted on the flat plate 16C (second conductor) connected to the lead 4 . On the other hand, the source block 11 is connected to the flat plate 16D (first conductor) connected to the disk 2 (third conductor).

That is, the relationship between the flat plates 16C and 16D of FIG. 4B corresponds to the relationship between the flat plates 16A and 16B of FIG. 4A. That is, the relationship between the lead 4 and the disk 2 and the relationship between the built-in package 53N and the built-in package 53P are inverted.

Therefore, the semiconductor device 103P without secondary soldering shown in FIG. 4A has a positive seat structure of the P pole structure, while the semiconductor device 103N without secondary soldering shown in FIG. 4B has a reverse seat structure of the N pole structure. The non-re-soldering semiconductor device 103N shown in FIG. 4B is as described above. Compared with the non-re-soldering semiconductor device 103P shown in FIG. 4A , the relationship between the structures of the built-in package 53N and the built-in package 53P is reversed. Everything else is the same, so other repeated explanations are omitted.

<Overview of the third embodiment> In FIG. 4B , the built-in package 53P shown in FIG. 4A is intended to be inverted and used as a built-in package 53N. Furthermore, the built-in package 53P and the built-in package 53N are respectively sealed with potting resin and used. In FIG. 4A , it is desirable that the shapes and dimensions of the flat plate 16A (the first conductor) and the flat plate 16B (the second conductor) are the same. If the shape and size of the flat plate 16A (first conductor) and the flat plate 16B (second conductor) are the same, the built-in package 53P is inverted in the up-down direction to form the built-in package 53N in FIG. 4B .

In addition, when the built-in package 53P is inverted in the up-down direction, the flat plate 16A and the flat plate 16B are respectively equivalent to the flat plate 16C and the flat plate 16D in FIG. 4B. Furthermore, in FIGS. 4A and 4B , if common components are used for the control IC chip 10 , the capacitor 13 , the power semiconductor chip 7 , and the source block 11 , the built-in package 53P and the built-in package 53N can be shared. With the structures shown in FIGS. 4A and 4B , a semiconductor device without secondary soldering can be fabricated and manufactured with a positive seat (P-pole structure) and a reverse seat (N-pole structure).

In addition, although the semiconductor device 103P with no secondary soldering in the positive seat or P-pole structure shown in FIG. 4A and the semiconductor device 103N without secondary soldering in the reverse seat or N-pole structure shown in FIG. 4B can be used individually as rectifying elements, for example, However, multiple combinations of the P-pole structure-free secondary soldering semiconductor device 103P and the N-pole structure-free secondary soldering semiconductor device 103N can be used to form various circuits. For example, a circuit that converts three-phase AC into DC can also be constructed.

<Effects of the third embodiment> In the third embodiment, a P-electrode-free semiconductor device 103P using a built-in package 53P and a N-pole-free semiconductor device 103N using a built-in package 53N are configured. The built-in package 53P and the built-in package 53N are essentially the same parts, and by being flipped up and down, they can form two semiconductor devices (103P, 103N) in the upright and reverse seats without secondary soldering. Therefore, manufacturing costs can be reduced.

In addition, since the two semiconductor devices (103P and 103N) without secondary soldering in the third embodiment use the potting method using the resin case 20, the resin sealing step can be simplified. In addition, the secondary soldering-free semiconductor device (103P, 103N) is realized with a secondary soldering-free structure that does not require secondary soldering after a primary soldering joint, and can provide a material selection or manufacturing condition selection accompanying the soldering step that can be easily performed No secondary soldering of semiconductor devices.

≪Fourth Embodiment≫ The structure of the secondary soldering-free semiconductor device according to the fourth embodiment of the present invention will be described with reference to FIGS. 5A and 5B. FIG. 5A is a diagram schematically showing an example of the cross-sectional structure of the P-pole structure in the case of using the transfer mold of the non-secondary soldering semiconductor device 104P according to the fourth embodiment of the present invention. FIG. 5B is a diagram schematically showing an example of the cross-sectional structure of the N-pole structure in the case of using the transfer mold of the non-secondary soldering semiconductor device 104N according to the fourth embodiment of the present invention.

In FIG. 5A , the difference from FIG. 4A lies in the resin sealing method of the built-in package 54P. In FIG. 5A , the built-in package 54P is resin sealed by transfer molding. That is, an injection molding mold is used to cause the resin 6 to flow around the built-in package 54P. Moreover, it is a method of removing the mold after the resin 6 is hardened. In Figure 5A, the shape of the resin 6 corresponds to the shape of the cavity inside the mold. By thus sealing the built-in package 54P with the sealing resin 6, insulation and durability can be ensured. In addition, the resin case 20 of FIG. 4A is not required in the non-secondary soldering semiconductor device 104P of FIG. 5A.

FIG. 5B is a diagram schematically showing an example of the cross-sectional structure of the N-pole structure of the non-secondary soldering semiconductor device 104N using the transfer mold according to the fourth embodiment of the present invention. In FIG. 5B , the difference from FIG. 5A lies in the relationship between the built-in package 54N and the built-in package 54P. That is, in FIG. 5B , the power semiconductor chip 7 , the control IC chip 10 and the capacitor 13 are mounted on the flat plate 16C connected to the lead 4 . On the other hand, the source block 11 is connected to the flat plate 16D connected to the disk 2 . That is, the relationship between the flat plates 16C and 16D of FIG. 5B corresponds to the relationship between the flat plates 16A and 16B of FIG. 5A. That is, the relationship between the lead 4 and the disk 2 and the relationship between the built-in package 54N and the built-in package 54P are inverted.

That is, the semiconductor device 104P without secondary soldering shown in FIG. 5A has a positive seat structure of the P pole structure, while the semiconductor device 104N without secondary soldering shown in FIG. 5B has a reverse seat structure of the N pole structure. The non-re-soldering semiconductor device 104N shown in FIG. 5B is as described above. Compared with the non-re-soldering semiconductor device 104P shown in FIG. 5A , the relationship between the structures of the built-in package 54N and the built-in package 54P is reversed. Everything else is the same, so other repeated explanations are omitted.

<Effects of the fourth embodiment> In the fourth embodiment, a P-electrode-free semiconductor device 104P using a built-in package 54P and a N-pole-free semiconductor device 104N using a built-in package 54N are configured. The built-in package 54P and the built-in package 54N are essentially the same parts, and by being flipped up and down, they can form two semiconductor devices (104P and 104N) in the upright and reverse seats without secondary soldering. Therefore, manufacturing costs can be reduced. In addition, since the two non-re-soldering semiconductor devices (104P and 104N) of the fourth embodiment are resin-sealed using a transfer mold, there is no need for potting resin casings and the material cost can be reduced. In addition, a re-soldering-free structure that does not require re-soldering bonding can be realized, and a re-soldering-free semiconductor device can be provided in which material selection or manufacturing condition selection accompanying the soldering step can be easily performed.

≪Fifth Embodiment≫ The structure of the secondary soldering-free semiconductor device 104P and the fin 21F according to the fifth embodiment of the present invention will be described with reference to FIGS. 6A and 6B. FIG. 6A is a diagram showing an example of the structural relationship between the secondary soldering-free semiconductor device 104P and the fin 21F according to the fifth embodiment of the present invention. The non-re-soldering semiconductor device 104P of FIG. 6A has the same structure as the non-re-soldering semiconductor device 104P of FIG. 5A in the fourth embodiment. Repeated description of the non-secondary soldering semiconductor device 104P is appropriately omitted. In addition, the secondary soldering-free semiconductor device used in this embodiment is not limited to the fourth embodiment, and the first to third embodiments can also be used.

In FIG. 6A , the disk 2 (third conductor) of the non-secondary soldering semiconductor device 104P is pressed and fitted between the fins 21F (the fourth conductor) (holes). In addition, the disc 2 (third conductor) is press-fitted and fitted (press-fitted) between the fins 21F (fourth conductor) (holes), and the contact is made by the restoring force generated by the interference at this time. , power on. Therefore, when the disk 2 (third conductor) is fixed to the fin 21F (the fourth conductor), operations such as soldering are not required, which contributes to reduction of environmental load and reduction of manufacturing costs. Furthermore, with this structure, the non-secondary soldering semiconductor device 104P is fixed, and the heat generated by the non-secondary soldering semiconductor device 104P is transferred to the fins 21F for heat dissipation, thereby ensuring that the normal operation of the non-secondary soldering semiconductor device 104P is ensured. Operating temperature range.

FIG. 6B is a diagram showing an example of the structure of the horseshoe-shaped fin (radiation fin) 21F viewed from the upper surface (the direction from the lead 4 to the disk 2). In FIG. 6B , the fins 21F for heat dissipation configured in a horseshoe shape are provided with holes (fin gaps) 2H into which a plurality of non-secondary soldering semiconductor devices 104P are pressed. In FIG. 6A , the disk 2 without secondary soldering semiconductor device 104P is described as being sandwiched between the fins 21F. However, in fact, as shown in FIG. 6B , a hole 2H is pressed and embedded. Combined into one semiconductor device 104P without secondary soldering.

As shown in FIG. 6B , a plurality of holes (fin gaps) 2H are provided in the fin 21F, and a plurality of secondary soldering-free semiconductor devices 104P are pressed into the respective holes 2H. In addition, the heat dissipation fins 21F configured in a horseshoe shape are provided by, for example, an alternator (not shown) that is a generator. The reason why the fin 21F is shown in the shape of, for example, a horseshoe shape is that it is suitable for mounting on an alternator.

<Effects of the fifth embodiment> As shown in FIGS. 6A and 6B , the disk 2 of the non-secondary soldering semiconductor device 104P is pressed between the fins 21F. With this structure, the secondary soldering-free semiconductor device 104P is fixed, and the heat generated by the secondary soldering-free semiconductor device 104P can be transferred to the fins 21F for heat dissipation, thereby ensuring a temperature range for normal operation.

≪Sixth Embodiment≫ The structure of the secondary soldering-free semiconductor device 105P and the fin 21 according to the sixth embodiment of the present invention will be described with reference to FIGS. 7A and 7B. FIG. 7A is a diagram schematically showing an example of the cross-sectional structure of the non-secondary soldering semiconductor device 105 and the fins (radiating fins) 21 according to the sixth embodiment of the present invention. In FIG. 7A , the difference from FIG. 3A lies in that fins (heat dissipation fins) 21 are provided instead of the disk 2 . Furthermore, the built-in package 55 is directly fixed to the fin 21 . That is, instead of the disk 2 in FIG. 3A, the fins 21 are used in FIG. 7A. Therefore, the fin 21 is appropriately expressed as the third conductor. Since other components of FIG. 7A are the same as those of FIG. 3A , repeated descriptions are omitted.

The fin 21 in FIG. 7A is provided with a recessed portion for receiving a part of the lower part of the flat plate 16A (paper perspective), and a screw hole 19 . Receive the flat plate 16A in the recess of the fin 21, and fix the fin 21 and the flat plate 16A in the screw hole 19 through the screw rod 17. In FIG. 7A , the heat generated from the built-in package 55 can be easily dissipated by using fins (radiating fins) 21 . In addition, the fin 21 (third conductor) is provided with the secondary soldering-free semiconductor device 105, that is, it constitutes a component of the secondary soldering-free semiconductor device 105.

FIG. 7B is a diagram showing an example of the structure of the horseshoe-shaped fin (heat dissipation fin) 21 viewed from the upper surface (the direction from the lead 4 to the fin 21 ). In FIG. 7B , the fins (heat dissipation fins) 21 are also referred to as those provided by the secondary soldering-free semiconductor device 105 , and are a structure shared by a plurality of secondary soldering-free semiconductor devices 105 . In addition, FIG. 7B shows a structure in which a plurality of non-secondary soldering semiconductor devices 105 are mounted on a common fin (heat dissipation fin) 21. In addition, the built-in package 55 of the non-secondary soldering semiconductor device 105 is actually sealed with resin, and its condition is represented by a spotted circle. In addition, the white circle in the center of the non-secondary soldering semiconductor device 105 in FIG. 7B shows the lead 4 in FIG. 7A. In addition, the fins 21 for heat dissipation in FIG. 7B are provided by, for example, an alternator (not shown) that is a generator, like the fins 21F shown in FIG. 6B . The reason why the fins 21 are shown in a horseshoe shape, for example, is that they are suitable for being mounted on an alternator.

<Effects of the sixth embodiment> Since the non-resoldering semiconductor device 105 according to the sixth embodiment of the present invention is configured to include fins (radiating fins) 21, the heat generated by the non-resoldering semiconductor device 105 can be quickly dissipated through the fins 21. Effect. In addition, the semiconductor device 105 without secondary soldering can be expected to operate stably by dissipating heat through the fins 21 .

≪Seventh Embodiment≫ The structure of a semiconductor device without secondary soldering according to the seventh embodiment of the present invention will be described with reference to FIGS. 8A and 8B. FIG. 8A is a diagram schematically showing an example of the cross-sectional structure of the P-electrode structure of the non-secondary soldering semiconductor device 106P according to the seventh embodiment of the present invention. The semiconductor device 106P without secondary soldering in FIG. 8A is replaced with the disk 2 of the semiconductor device 103P without secondary soldering shown in FIG. 4A with fins (heat dissipation fins) 21 . Furthermore, the built-in package 56P is fixed on the fin 21 with the screw 17 .

In addition, the non-re-soldering semiconductor device 106P of FIG. 8A is also a structure in which the non-re-soldering semiconductor device 105 of FIG. 7A is covered with a resin case 20 and resin-sealed with a potting resin (sealing resin 6). Therefore, the built-in package 56P is directly fixed to the fin 21 . Since other structures are the same, repeated explanations are omitted.

FIG. 8B is a diagram schematically showing an example of the cross-sectional structure of the N-pole structure of the non-secondary soldering semiconductor device 106N according to the seventh embodiment of the present invention. The semiconductor device 106N without secondary soldering shown in FIG. 8B uses fins (heat sink fins) 21 to replace the disk 2 of the semiconductor device 103N without secondary soldering shown in FIG. 4B . Since other structures are the same, repeated explanations are appropriately omitted.

Since the non-secondary soldering semiconductor devices 106P and 106N of FIGS. 8A and 8B are equipped with fins (heat dissipation fins) 21, they have the effect of rapid heat dissipation. In addition, the non-secondary welding semiconductor devices 106P and 106N respectively constitute a positive P pole structure and a reverse N pole structure.

<Effects of the seventh embodiment> Since the non-secondary soldering semiconductor devices 106P and 106N of the seventh embodiment are provided with fins 21, they have the effect of rapid heat dissipation. In addition, the semiconductor devices 106P and 106N without secondary soldering can be expected to operate stably by dissipating heat through the fins 21 .

≪Eighth Embodiment≫ The structure of the secondary soldering-free semiconductor device according to the eighth embodiment of the present invention will be described with reference to FIGS. 9A and 9B. FIG. 9A is a diagram schematically showing an example of the cross-sectional structure of the P-electrode structure of the non-secondary soldering semiconductor device 107P according to the eighth embodiment of the present invention. The non-secondary soldering semiconductor device 107P of FIG. 9A replaces the resin case 20 and the resin 6 in the non-secondary soldering semiconductor device 106P shown in FIG. 8A by potting resin, and uses an injection molding mold for the built-in package 56P. A transfer molding method in which resin 6 is poured into the surroundings of the built-in package 56P. Since other structures are the same, repeated explanations are omitted.

FIG. 9B is a diagram schematically showing an example of the cross-sectional structure of the N-pole structure of the non-secondary soldering semiconductor device 107N according to the eighth embodiment of the present invention. The non-secondary soldering semiconductor device 107N of FIG. 9B is a built-in package 56P of the non-secondary soldering semiconductor device 107P of the P-pole structure in FIG. 9A. By using the built-in package 56N of the N-pole structure, the N-pole structure is formed without secondary soldering. The semiconductor device 107N is soldered. Since other structures are the same, repeated explanations are omitted.

<Effects of the 8th Embodiment> The non-secondary soldering semiconductor devices 107P and 107N shown in FIGS. 9A and 9B of the eighth embodiment are equipped with fins 21, so they have the effect of rapid heat dissipation. In addition, the semiconductor devices 107P and 107N without secondary soldering can be expected to operate stably by dissipating heat through the fins 21 .

≪Ninth Embodiment≫ The structure of the secondary soldering-free semiconductor device 111 according to the ninth embodiment of the present invention will be described with reference to FIG. 10 . FIG. 10 is a diagram schematically showing an example of the cross-sectional structure of the secondary soldering-free semiconductor device 111 according to the ninth embodiment of the present invention. In FIG. 10 , a circuit is accommodated in a power semiconductor chip 22 as a sub-assembly 61 .

That is, in FIG. 10 , circuit components such as the power semiconductor chip 7 in FIG. 1A , the control IC chip 10 , and the capacitor 13 are composed of one of the power semiconductor chips 22 , and are used as a sub-assembly 61 . In addition, in FIG. 10 , the description of the resin filled in the interior of the sub-assembly 61 (for example, the resin 6 in FIGS. 12 and 13 to be described later) is omitted.

In FIG. 10 , as mentioned above, for example, the circuit components such as the power semiconductor chip 7 , the control IC chip 10 , and the capacitor 13 in FIG. 1A , as well as the conductive bonding material 9 , the bonding wire 14 , the insulating film 18 , etc. are shown in each step in FIG. 10 It is composed of one wafer of the power semiconductor chip 22 and is used as a sub-assembly 61, thereby simplifying the structure of the secondary soldering-free semiconductor device 111 and providing a compact and cost-reduced secondary soldering-free semiconductor device. .

<Effects of the ninth embodiment> By simplifying the structure of the secondary soldering-free semiconductor device 111, a compact and cost-reduced secondary soldering-free semiconductor device can be provided.

≪Tenth Embodiment≫ The structure of the secondary soldering-free semiconductor device 112 according to the tenth embodiment of the present invention will be described with reference to FIG. 11 . FIG. 11 is a diagram schematically showing an example of the cross-sectional structure of the secondary soldering-free semiconductor device 112 according to the tenth embodiment of the present invention. In FIG. 11 , fins (cooling fins) 21 are used instead of the disk 2 in FIG. 10 . Other repetitive descriptions are appropriately omitted. In FIG. 11 , by using fins (heat dissipation fins) 21 , in addition to simplifying the structure of the semiconductor device 111 without secondary soldering shown in FIG. 10 , there is an effect of rapid heat dissipation.

<Effects of the 10th Embodiment> By simplifying the structure of the secondary soldering-free semiconductor device 112, a compact and cost-reduced semiconductor device without secondary soldering and excellent heat dissipation can be provided.

≪Eleventh Embodiment≫ The structure of the secondary soldering-free semiconductor device according to the eleventh embodiment of the present invention will be described with reference to FIG. 12 . FIG. 12 is a diagram schematically showing an example of the cross-sectional structure of the secondary soldering-free semiconductor device 113 according to the eleventh embodiment of the present invention. The non-re-soldering semiconductor device 113 shown in FIG. 12 is the re-soldering-free semiconductor device 111 shown in FIG. 10 using the resin case 20 shown in FIG. 4A, and resin (resin) is injected (potted) from the outside of the resin case 20. )6.

In FIG. 12 , a sub-assembly 61 and a resin casing 20 are used to form a non-secondary soldering semiconductor device 113 by potting resin. In this way, the semiconductor device 113 without secondary soldering, which is composed of one wafer of the power semiconductor wafer 22 and is resin-sealed using the resin case 20 as the sub-assembly 61, is realized.

In addition, in FIG. 12 , a single power semiconductor chip 22 is used. However, the power semiconductor chip 22 has the same circuit elements and conductivity as the power semiconductor chip 7 of FIG. 1A , the control IC chip 10 , the capacitor 13 , etc. The circuit implemented by each step of the bonding material 9, the bonding wire 14, the insulating film 18, etc. corresponds to the circuit structure. In addition, two main surfaces of the power semiconductor chip 22 are provided with two electrodes connected to the circuit inside the power semiconductor chip 22 . Furthermore, these two electrodes are used to form a circuit in such a way as to determine, for example, the rectification characteristics of the power semiconductor chip 22 . Therefore, when assembling the power semiconductor chip 22, by inverting the front and back directions of the two main surfaces of the power semiconductor chip 22, it becomes possible to achieve a P-pole structure or an N-pole structure.

That is, the structure of the non-secondary soldering semiconductor device 113 shown in FIG. 12 is essentially the same except for the power semiconductor chip 22, and by reversing the front and back of the power semiconductor chip 22, both the P-pole structure and the N-pole structure can be manufactured. A kind of semiconductor device without secondary soldering. Moreover, the two types of non-re-welding semiconductor devices (113) of P-pole structure and N-pole structure can be used individually as, for example, rectifier elements, or a plurality of P-pole structure and N-pole structure non-re-welding semiconductor devices (113) can be combined and constructed. Various circuits. Therefore, costs can be reduced in the manufacturing step and parts management step.

In addition, in FIG. 12 , although the power semiconductor chip 22 of one chip is used, the same as the semiconductor device without secondary soldering using the structure of the built-in package shown in FIGS. 1A , 4A and 4B , the single soldering joint is realized. Finally, there is no need for secondary welding to join the structure without secondary welding. Therefore, it is possible to provide a semiconductor device without secondary soldering in which material selection or manufacturing condition selection accompanying the soldering step can be easily performed.

<Effects of the 11th Embodiment> By realizing the semiconductor device 113 which is composed of one chip of the power semiconductor chip 22 and is resin-sealed as a sub-assembly 61 using the resin case 20 , the structure is simplified, thereby providing a compact and Reduce the cost of semiconductor devices without secondary soldering. In addition, the structures other than the power semiconductor wafer 22 are substantially the same, and by inverting the front and back of the main surface when assembling the power semiconductor wafer 22, two types of semiconductor devices with a P-pole structure and an N-pole structure can be manufactured without secondary soldering. , so it has the effect of reducing costs in the manufacturing steps and parts management steps.

In addition, although one wafer of power semiconductor chip 22 is used, a structure without secondary soldering that eliminates the need for secondary soldering after primary soldering is achieved, similar to the non-secondary soldering semiconductor device using a built-in package structure. Therefore, it is possible to provide a semiconductor device without secondary soldering in which material selection or manufacturing condition selection accompanying the soldering step can be easily performed.

≪Twelfth Embodiment≫ The structure of the secondary soldering-free semiconductor device according to the twelfth embodiment of the present invention will be described with reference to FIG. 13 . FIG. 13 is a diagram schematically showing an example of the cross-sectional structure of the secondary soldering-free semiconductor device 114 according to the twelfth embodiment of the present invention. The non-re-soldering semiconductor device 114 shown in FIG. 13 is a resin that partially assembles parts (Sub-assembly) 61 on the non-re-soldering semiconductor device 111 shown in FIG. 10 by the transfer molding method shown in FIG. 5A. Sealer. In FIG. 13 , a semiconductor device 114 without secondary welding is constructed from partially assembled parts 61 by a transfer forming method. Other repeated explanations are omitted.

<Effects of the twelfth embodiment> The difference between the twelfth embodiment shown in Figure 13 and the eleventh embodiment shown in Figure 12 lies in the difference between the resin sealing method of transferring the mold and potting resin. Therefore, the effect of the twelfth embodiment is different from that of the eleventh embodiment. The effect is roughly the same. Repeated descriptions are omitted.

≪Thirteenth Embodiment≫ The structure of the secondary soldering-free semiconductor device according to the thirteenth embodiment of the present invention will be described with reference to FIG. 14 . FIG. 14 is a diagram schematically showing an example of the cross-sectional structure of the secondary soldering-free semiconductor device 115 according to the thirteenth embodiment of the present invention. The non-re-soldering semiconductor device 115 shown in FIG. 14 is the re-soldering-free semiconductor device 112 shown in FIG. 11 using the resin case 20 shown in FIG. 4A, and resin (Resin) is injected (potted) from the outside of the resin case 20. )6.

In FIG. 14 , a sub-assembly 61 and a resin casing 20 are used to form a non-secondary soldering semiconductor device 115 by potting resin. In this way, by realizing the semiconductor device 115 that is composed of one chip of the power semiconductor chip 22 and is resin-sealed using the resin case 20 as the partially assembled component 61, the structure is simplified, thereby providing a compact and cost-effective device. Furthermore, the semiconductor device has the effect of rapid heat dissipation through the fins (heat dissipation fins) 21 without secondary soldering. In addition, the secondary soldering-free semiconductor device 115 of the thirteenth embodiment shown in FIG. 14 can produce two types of P-pole structure and N-pole structure without secondary soldering by inverting the forward and reverse directions when assembling the power semiconductor chip 22. Semiconductor devices.

<Effects of the 13th Embodiment> By realizing the semiconductor device 115 without secondary soldering, which is composed of one chip of the power semiconductor chip 22 and is resin-sealed as a sub-assembly 61 using the resin case 20, the structure is simplified, thereby providing a compact and The cost is reduced and the semiconductor device has the effect of rapid heat dissipation through the fins (cooling fins) 21 without secondary soldering. In addition, although the structures other than the power semiconductor wafer 22 are substantially the same, by inverting the forward and reverse directions when assembling the power semiconductor wafer 22, two types of semiconductor devices with a P-pole structure and an N-pole structure can be manufactured without secondary soldering. It has the effect of reducing costs in the manufacturing process and parts management process. In addition, a secondary soldering-free structure that eliminates the need for secondary soldering after primary soldering can provide a secondary soldering-free semiconductor device that can easily select materials or manufacturing conditions associated with the soldering step.

≪Fourteenth Embodiment≫ The structure of the secondary soldering-free semiconductor device according to the fourteenth embodiment of the present invention will be described with reference to FIG. 15 . FIG. 15 is a diagram schematically showing an example of the cross-sectional structure of the secondary soldering-free semiconductor device 116 according to the fourteenth embodiment of the present invention. The non-re-soldering semiconductor device 116 shown in FIG. 15 is a resin for sub-assembly 61 of the non-re-soldering semiconductor device 112 shown in FIG. 11 by the transfer molding method shown in FIG. 5A. Sealer. Other repeated explanations are omitted.

<Effects of the 14th Embodiment> The difference between the 14th embodiment shown in Figure 15 and the 13th embodiment shown in Figure 14 lies in the difference between the method of resin sealing being transfer mold and potting resin. Therefore, the effect of the 14th embodiment is different from that of the 13th embodiment. The effect is roughly the same. Repeated descriptions are omitted.

≪Other implementation forms and supplements≫ In addition, the present invention is not limited to the embodiment described above, and includes various modifications. For example, the above-mentioned embodiments are described in detail to facilitate understanding of the present invention, and are not limited to those having all the structures described. Furthermore, part of the configuration of a certain embodiment may be replaced with part of the configuration of another embodiment, and part or all of the configuration of another embodiment may be added to the configuration of a certain embodiment. Hereinafter, other embodiments or modifications will be described.

≪How to fix discs and fins≫ For example, when the disk 2 of the non-secondary soldering semiconductor device (103P, 103N, 104P, 104N) of FIGS. 4A, 4B, 5A, and 5B is bonded to a fin (not shown), the built-in package ( 53P, 53N, 54P, 54N), in addition to being fixed relative to the disc 2, there is also a method of providing screw holes 19 in the fins and directly connecting the screw members (fitting members) 17 to the fins.

≪How to fix the plate to the leads and disks≫ In addition to the combination of screws (rod-shaped members) and screw holes, the fixation between the plate and the leads, or the plate and the disk, can also be a combination of a rod (rod-shaped member) and a conductive bonding material, or a plug-in lead terminal ( e.g. banana plug). In addition, the method for fixing the lead wires and the flat plate is as shown in the above-mentioned FIG. 1C, and may also be integrated.

≪Power semiconductor wafer≫ In the description of the first embodiment of the present invention, an example in which the power semiconductor chip 7 is composed of MOSFETs will be described. However, it is not limited to MOSFET. For example, it can also be composed of IGBT (Insulated Gate Bipolar Transistor), super junction MOSFET, and other semiconductor components.

≪Combination of P-pole structure and N-pole structure without secondary soldering semiconductor device≫ Although the P-pole structure non-re-soldering semiconductor device and the N-pole structure non-re-soldering semiconductor device are respectively explained from the structural point of view, when a plurality of non-re-soldering semiconductor devices are used to form a circuit of a specific device, A plurality of semiconductor devices with P-pole structure and N-pole structure can be combined and constructed without secondary soldering.

≪Shape of fins≫ In FIGS. 6B and 7B , the shape of the fins 21F and 21 is exemplified as a horseshoe shape. However, the shape of the fins is not limited to the horseshoe shape. In addition, those who install fins are not limited to alternators. In applications where a plurality of semiconductor devices without secondary soldering are used, the shape of the fins or the objects to be mounted may be various depending on the purpose.

≪Complement of the 1st conductor, 2nd conductor and 3rd conductor≫ The first embodiment will be described with reference to FIGS. 1A and 1B . In this description, the flat plate 16A (first conductor), the flat plate 16B (second conductor), and the disk 2 (third conductor) are described. However, the definitions of the first conductor, the second conductor, and the third conductor are not limited to the above. For example, as described above, in FIG. 4B , the relationship between the flat plate 16D (the first conductor) and the flat plate 16C (the second conductor) is established. Moreover, for example, in FIG. 7A, it becomes the fin 21 (3rd conductor).

2: Disc (3rd conductor) 2E: Disc (3rd conductor) 2H: Hole (fin gap) 2R: Disc (3rd conductor) 4: Lead wire (lead circuit) 4C: Lead wire (lead circuit) 4F: Lead wire (lead circuit) 4R: Lead (lead circuit) 6: Sealing resin, resin, resin (resin) 7: Power semiconductor wafer 8: One welding (welding) 9: Conductive joining material 10: Control IC chip (control IC, control circuit) 11: Source block (separator conductor) 11B: Source block (separator conductor) 12R1: Lead frame 12R2: Lead frame 13:Capacitor 14:Joining wire 16A: Flat plate (1st conductor) 16B: Flat plate (2nd conductor) 16C: Flat plate (2nd conductor) 16D: Flat plate (1st conductor) 16F: Flat plate (2nd conductor) 17: Screw (screw member, rod member, fitting member) 17B: Screw (screw member, rod member, fitting member) 17D: Screw (screw member, rod member, fitting member) 17E: Screw (screw member, rod member, fitting member) 17F: Screw (screw member, rod member, fitting member) 18:Insulating film 19:Screw hole 19B:Screw hole 20: Resin shell 21: Fin (4th conductor) 21F: Fin (4th conductor) 22:Power semiconductor wafer 51: Built-in packaging 52: Built-in packaging 53P: Built-in package 53N: Built-in package 54P: Built-in package 54N: Built-in package 55: Built-in packaging 56P: Built-in package 56N: Built-in package 61: Partially assembled parts 65:Sealing resin, resin, resin (resin) 101: Semiconductor device without secondary soldering 102: Semiconductor device without secondary soldering 103P: Semiconductor device without secondary soldering (press-fit type semiconductor device without secondary soldering) 103N: Semiconductor device without secondary soldering (press-fit type semiconductor device without secondary soldering) 104P: Semiconductor device without secondary soldering (press-fit type semiconductor device without secondary soldering) 104N: Semiconductor device without secondary soldering (press-fit type semiconductor device without secondary soldering) 105: Semiconductor device without secondary soldering 106P: Semiconductor device without secondary soldering (press-fit type semiconductor device without secondary soldering) 106N: Semiconductor device without secondary soldering (press-fit type semiconductor device without secondary soldering) 107P: Semiconductor device without secondary soldering 107N: Semiconductor device without secondary soldering 111: Semiconductor device without secondary soldering 112: Semiconductor device without secondary soldering 113: Semiconductor device without secondary soldering 114: Semiconductor device without secondary soldering 115: Semiconductor device without secondary soldering 116: Semiconductor device without secondary soldering 300R: Secondary welding (welding) 500R: Built-in package (primary molded body) 1000R: Semiconductor device (press-fit semiconductor device)

FIG. 1A is a diagram schematically showing an example of the cross-sectional structure of a semiconductor device without secondary soldering according to the first embodiment of the present invention. 1B is a diagram showing an example of an exploded cross-sectional structure illustrating the structure of the secondary soldering-free semiconductor device according to the first embodiment of the present invention. FIG. 1C is a diagram showing an example of the cross-sectional structure of Modification 1 of the first embodiment of the present invention. FIG. 1D is a diagram showing an example of the cross-sectional structure of Modification 2 of the first embodiment of the present invention. FIG. 1E is a diagram showing an example of the cross-sectional structure of Modification 3 of the first embodiment of the present invention. FIG. 2A is a diagram schematically showing an example of the cross-sectional structure of the semiconductor device of Comparative Example 1. 2B is a diagram schematically showing an example of the cross-sectional structure of the built-in package of the semiconductor device of Comparative Example 1. 3A is a diagram showing an example of an exploded cross-sectional structure illustrating the structure of the secondary soldering-free semiconductor device according to the second embodiment of the present invention. FIG. 3B is a diagram showing an example of the cross-sectional structure of Modification 4 of the second embodiment of the present invention. 4A is a diagram schematically showing an example of the cross-sectional structure of the P-electrode structure when potting resin is used in the non-secondary soldering semiconductor device according to the third embodiment of the present invention. 4B is a diagram schematically showing an example of the cross-sectional structure of the N-electrode structure when potting resin is used in the non-secondary soldering semiconductor device according to the third embodiment of the present invention. 5A is a diagram schematically showing an example of the cross-sectional structure of the P-pole structure when a transfer mold is used in the semiconductor device without secondary soldering according to the fourth embodiment of the present invention. 5B is a diagram schematically showing an example of the cross-sectional structure of the N-pole structure when a transfer mold is used in the semiconductor device without secondary soldering according to the fourth embodiment of the present invention. FIG. 6A is a diagram showing an example of the structural relationship between a semiconductor device without secondary soldering and a fin according to the fifth embodiment of the present invention. FIG. 6B is a diagram showing an example of the structure of the horseshoe-shaped fin viewed from the upper surface. 7A is a diagram schematically showing an example of the cross-sectional structure of a semiconductor device and fins without secondary soldering according to the sixth embodiment of the present invention. FIG. 7B is a diagram showing an example of the structure of the horseshoe-shaped fin viewed from the upper surface. 8A is a diagram schematically showing an example of the cross-sectional structure of the P-electrode structure of the semiconductor device without secondary soldering according to the seventh embodiment of the present invention. 8B is a diagram schematically showing an example of the cross-sectional structure of the N-pole structure of the semiconductor device without secondary soldering according to the seventh embodiment of the present invention. 9A is a diagram schematically showing an example of the cross-sectional structure of the P-electrode structure of the semiconductor device without secondary soldering according to the eighth embodiment of the present invention. 9B is a diagram schematically showing an example of the cross-sectional structure of the N-pole structure of the semiconductor device without secondary soldering according to the eighth embodiment of the present invention. FIG. 10 is a diagram schematically showing an example of the cross-sectional structure of a semiconductor device without secondary soldering according to the ninth embodiment of the present invention. FIG. 11 is a diagram schematically showing an example of the cross-sectional structure of a semiconductor device without secondary soldering according to the tenth embodiment of the present invention. FIG. 12 is a diagram schematically showing an example of the cross-sectional structure of a semiconductor device without secondary soldering according to the eleventh embodiment of the present invention. FIG. 13 is a diagram schematically showing an example of the cross-sectional structure of a semiconductor device without secondary soldering according to the twelfth embodiment of the present invention. 14 is a diagram schematically showing an example of the cross-sectional structure of a semiconductor device without secondary soldering according to the thirteenth embodiment of the present invention. FIG. 15 is a diagram schematically showing an example of the cross-sectional structure of a semiconductor device without secondary soldering according to the fourteenth embodiment of the present invention.

2: Disc (3rd conductor)

4: Lead wire (lead circuit)

7: Power semiconductor wafer

8: One welding (welding)

9: Conductive joining material

10: Control IC chip (control IC, control circuit)

11: Source block (separator conductor)

13:Capacitor

14:Joining wire

16A: Flat plate (1st conductor)

16B: Flat plate (2nd conductor)

17: Screw (screw member, rod member, fitting member)

18:Insulating film

19:Screw hole

51: Built-in packaging

101: Secondary welding semiconductor device

Claims (11)

A semiconductor device without secondary welding, characterized by: 1st conductor; 2nd conductor; A power semiconductor chip arranged between the above-mentioned first conductor and the above-mentioned second conductor, the first electrode is electrically connected to the above-mentioned first conductor, and the second electrode is electrically connected to the above-mentioned second conductor; and a 3rd conductor that secures the above-mentioned 1st conductor; and The power semiconductor chip is bonded to at least one of the first conductor or the second conductor by soldering; The above-mentioned first conductor and the above-mentioned third conductor are electrically and mechanically connected through a concave and convex fitting structure without welding. For example, the semiconductor device without secondary soldering in claim 1, wherein The first conductor has a recessed portion, the third conductor has a recessed portion, and a rod-shaped member fitted into the recessed portion of the first conductor and the recessed portion of the third conductor is provided. For example, the semiconductor device without secondary soldering in claim 1, wherein The first conductor has a convex part, the third conductor has a concave part, and the convex part of the first conductor is fitted into the concave part of the third conductor. For example, the semiconductor device without secondary soldering in claim 1, wherein The first conductor has a recessed portion, the third conductor has a convex portion, and the recessed portion of the first conductor is fitted with the convex portion of the third conductor. For example, the semiconductor device without secondary soldering in claim 1, wherein The above-mentioned first conductor and the above-mentioned second conductor have the same shape. For example, the semiconductor device without secondary soldering in any one of claims 1 to 4, wherein The third conductor is press-fitted into the hole formed in the fourth conductor. For example, the semiconductor device without secondary soldering in claim 6, wherein The above-mentioned fourth conductor system is used in the fins of the alternator; The semiconductor device performs rectification operation without secondary soldering. For example, the semiconductor device without secondary soldering in any one of claims 1 to 4, wherein The above-mentioned third conductor system is used in the fins of the alternator; The semiconductor device performs rectification operation without secondary soldering. If the semiconductor device without secondary soldering in any one of claims 1 to 4 has: A control circuit is arranged between the first conductor and the second conductor and controls the power semiconductor chip to perform a rectifying operation. For example, the semiconductor device without secondary soldering in claim 9, wherein The power semiconductor chip and the second conductor are electrically connected via a spacer conductor. For example, the semiconductor device without secondary soldering in claim 1, wherein When assembling the above-mentioned power semiconductor chip, the two main surfaces of the power semiconductor chip are reversed, whereby the P-pole structure or the N-pole structure can be selected for manufacturing.