TW202332201A - Analog sinusoidal wave signal generating device and method - Google Patents

Abstract

An embodiment of the present disclosure provides an analog sinusoidal wave signal generating device and method that can reduce the number of registers required, which mainly utilizes properties of a symmetry and an odd function of the analog sinusoidal wave signal. Thus, rather than storing N/4 digital sample values, merely N/4+1 digital sample values are stored. To meet the above objectives, the analog sinusoidal wave signal generating device and method use two counters to count, one of which is to count up while the other one is to count down, and then according to two count values of the two counters, one or two of the N/4+1 digital sample values stored in a value storage table can be selected to generate a digital output value input to the digital analog converter, so that the digital analog converter generates a part of the analog sinusoidal wave signal according to the digital output value.

Description

Analog sine wave signal generating device and method

The present invention relates to an analog sine wave signal generation device and method, and in particular to an analog sine wave signal generation device and method which utilizes the symmetric and odd function properties of the analog sine wave signal to reduce the number of required registers.

Existing devices for generating analog sine wave signals can be realized through chip oscillators or quartz oscillators. Chip oscillators need to design a feedback loop so that the loop gain is 1, while quartz oscillators need to be configured with a quartz crystal. Another way to realize the analog sine wave signal generating device is to sample the analog sine wave signal in advance, and store multiple digital sampled values in a numerical temporary storage table with multiple temporary registers, and then pass through the digital to analog converter. Digital-to-analog conversion is performed on multiple digital sampling values according to time sequence to generate an analog sine wave signal.

Please refer to FIG. 1 , which is a block diagram of a conventional analog sine wave signal generating device. The traditional analog sine wave signal generating device 1 includes a digital-to-analog converter 11 and a value temporary storage table 12, wherein the N digital sampling values of the analog sine wave signal sampled in the phase interval [-π/2, 3π/2) will be It is recorded in the value temporary storage table 12, where the phase interval of [-π/2, 3π/2) means that the phase is greater than or equal to -π/2 and less than 3π/2. With the embodiment of Fig. 1, N is 32, so [sin(-π/2+i*π/16)+1]/2 32 digital sampling values will be recorded in the value temporary storage table 12, that is, need to use 32 12-bit scratchpads to store. The digital-to-analog converter 11 sequentially reads N digital sampling values from the value temporary storage table 12 and performs digital-to-analog conversion to generate an analog sine wave signal. The traditional analog sine wave signal generating device 1 is to store all the N digital sampling values of the phase interval [-π/2, 3π/2) in the value temporary storage table 12, so the gate count (gate count) of the whole circuit is relatively small. Many, increase the manufacturing cost and circuit area.

An embodiment of the present invention provides an analog sine wave signal generating device, which is used to generate an analog sine wave signal, and includes a value temporary storage table, a first counter, a second counter, a logic circuit, and a digital-to-analog converter, wherein the logic circuit The digital temporary storage table, the first counter, the second counter and the digital-to-analog converter are connected permanently. The value temporary storage table is used to store the N/4+1 digital sampling values obtained by sampling the analog sine wave signal in the phase interval [-π/2, 0), where N is the analog sine wave signal in [-π/ 2, 3π/2) The number of samples for sampling in the phase interval, and N is a multiple of 4 and greater than or equal to 8. The first counter starts counting up from 0 to generate a first count value, and when the first count value reaches N, the first count value is reset to 0. The second counter counts down from N to generate a second count value, and when the second count value reaches 0, the second count value is reset to N. The logic circuit is used to receive the first count value and the second count value, obtain one or both of the N/4+1 digital sampling values from the value temporary storage table according to the first count value and the second count value, and obtain One or both of the N/4+1 digital sample values of N/4+1 generate a digital output value. The digital-to-analog converter is used to receive the digital output value output by the logic circuit, and perform digital-to-analog conversion on the digital output value to generate a part of the analog sine wave signal.

An embodiment of the present invention also provides a method for generating an analog sine wave signal, which is used to generate an analog sine wave signal, and includes the following steps: through the first counter and the second counter, respectively provide the first counter counting up from 0 The value and the second count value counting down from N; through the logic circuit, according to the first count value and the second count value, obtain one of the stored N/4+1 digital sampling values from the value temporary storage table Or both, where N/4+1 digital sampling value refers to the N/4+1 digital sampling value obtained by sampling the analog sine wave signal in the phase interval [-π/2, 0), N is the analog Sine wave signal is sampled in the phase interval of [-π/2, 3π/2), and N is a multiple of 4 and greater than or equal to 8; through the logic circuit, according to the acquired N/4+1 digital sampling value One or both of them generate a digital output value; through a digital-to-analog converter, digital-to-analog conversion is performed on the digital output value to generate a part of the analog sine wave signal; through the first counter and the second counter, respectively increment the first counting the value and decrementing the second counting value; and judging whether the first counting value counts to N and whether the second counting value counts to 0 through a logic circuit, thereby resetting the first counting value and the second counting value to 0 and N.

To sum up, the analog sine wave signal generation device and method provided by the embodiments of the present invention can reduce the N digital sampling values that should be stored to only store N/4+1 digital sampling values, so the temporary storage can be reduced The number of devices reduces the number of gates in the overall circuit, and reduces the circuit area and manufacturing cost.

In order to further understand the techniques, means and effects of the present invention, reference can be made to the following detailed description and accompanying drawings, so that the purpose, features and concepts of the present invention can be thoroughly and specifically understood. However, the following detailed description and drawings are only for reference and illustration of the implementation of the present invention, and are not intended to limit the present invention.

Reference will now be made in detail to the exemplary embodiments of the invention, which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used in the drawings and description to refer to the same or like parts. In addition, the practice of the exemplary embodiment is only one of the implementations of the design concept of the present invention, and the following demonstrations are not intended to limit the present invention.

The embodiment of the present invention provides an analog sine wave signal generation device and method that can reduce the number of registers required, which mainly utilizes the symmetry and odd function properties of the analog sine wave signal to allow N digital samples that should be stored The value is reduced to only store N/4+1 digital sample values. In line with the above-mentioned purpose, the analog sine wave signal generation device and method use two counters to count, one of which counts up and the other counts down, and then, according to the count values of the two counters Obtain one or both of the N/4+1 digital sampling values from the value temporary storage table to generate a digital output value input to the digital-to-analog converter, so that the digital-to-analog converter can thereby generate a part of the analog sine wave signal share.

First, please refer to FIG. 2 . FIG. 2 is a schematic diagram of the relationship between an analog sine wave signal and N digital sampling values sampled in its phase interval [-π/2, 3π/2). In this embodiment, N=32, and the digital sample value Sine[n] is the value of [sin(-π/2+n*π/16)+1]/2, which defines Sine[n]=[sin( -π/2+n*π/16)+1]/2, wherein n is an integer from 0 to N-1. Based on the symmetrical nature of the analog sine wave signal, the intervals R2 and R3 are symmetrical about the symmetrical center line SYM (corresponding to the digital sampling value Sine[16]), and the intervals R1 and R33 are symmetrical about the symmetrical central line SYM, so the digital sampling value Sine[15] ]~Sine[1] are respectively the same as the digital sampling values Sine[17] to Sine[31]. In other words, the digital sampling values Sine[17]~Sine[31] can be stored by using , can only store digital sampling values Sine[0]~Sine[16]. According to the above characteristics, N is not limited to a specific value, but N must be a multiple of 4 and greater than or equal to 8 (if N is 4, the number of samples is insufficient at this time, and it is difficult to generate an analog sine wave signal), it can be deduced that Sine[j]= The relational expression of Sine[N-j], where j is an integer from N/2+1 to N-1.

Based on the odd function nature of the analog sine wave signal, the digital sampling values Sine[0]~Sine[16] have the relationship: Sine[8]-Sine[7]=Sine[9]-Sine[8], Sine[8] -Sine[6]=Sine[10]-Sine[8], Sine[8]-Sine[5]=Sine[11]-Sine[8], Sine[8]-Sine[4]=Sine[12] -Sine[8], Sine[8]-Sine[3]=Sine[13]-Sine[8], Sine[8]-Sine[2]=Sine[14]-Sine[8], Sine[8] -Sine[1]=Sine[15]-Sine[8], Sine[8]-Sine[0]=Sine[16]-Sine[8]. In other words, as long as the digital sampling values Sine[0]˜Sine[8] are stored, Sine[9]˜Sine[16] can be calculated. According to the above characteristics, N is not limited to a specific value, but N must be a multiple of 4 and greater than or equal to 8. It can be deduced that Sine[x]=2*Sine[N/4]-Sine[N/4-(x-N/4 )]= 2*Sine[N/4]- Sine[N/2-x], where x is an integer from N/4+1 to N/2. Preferably, when N is greater than or equal to 16, there will be a relatively high accuracy value. Accordingly, by analogy to the symmetric and odd function properties of the sine wave signal, the digital sampling values Sine[0]～Sine[N/4] can be obtained by storing the digital sampling values Sine[0]～Sine[N-1 ].

Please refer to FIG. 3 . FIG. 3 is a block diagram of an analog sine wave signal generating device according to an embodiment of the present invention. The analog sine wave signal generating device 3 is used to generate the analog sine wave signal, and includes a value temporary storage table 32, a counter module 35 (which includes a first counter 351 and a second counter 352), a logic circuit 33, a digital-to-analog converter 31 and The sequential circuit 34, wherein the logic circuit 33 is electrically connected to the value temporary storage table 32, the first counter 351, the second counter 352, the digital-to-analog converter 31, and the sequential circuit 34 is electrically connected to the logic circuit 33, the first counter 351 and the second Second counter 352.

According to the foregoing, the value temporary storage table 32 can only store N/4+1 digital sampling values, that is, only store the N/ 4+1 digital sampling values instead of storing N digital sampling values of the analog sine wave signal sampled in the phase interval of [-π/2, 3π/2). The value temporary storage table 32 can store N/4+1 digital sampling values respectively as Sine[0], Sine[1], . . . , Sine[N/4].

The timing circuit 34 is used to provide a clock signal to the logic circuit 33 , the first counter 351 and the second counter 352 so that the logic circuit 33 , the first counter 351 and the second counter 352 can work synchronously based on the clock signal. In other embodiments, the timing circuit 34 may be removed as an unnecessary component. For example, an external reference clock is used instead of setting the timing circuit 34 in the analog sine wave signal generating device 3 .

The first counter 351 and the second counter 352 are counters that count up from 0 and count down from N respectively, and the first count value of the first counter 351 and the second count value of the second counter 352 can be determined by the logic circuit 33 Reset to the first initial value and the second initial value, and the first initial value and the second initial value are 0 and N respectively. In other words, the logic circuit 33 will judge whether the first count value is less than N and whether the second count value is greater than 0, and when the first count value is greater than or equal to N and the second count value is less than or equal to 0, respectively compare the first count value and the second count value The second count value is reset.

The logic circuit 33 will compare the size of the first count value and the second count value, that is, judge whether the first count value is less than or equal to the second count value, and if the first count value is less than or equal to the second count value, then make its internal third count value The numerical value is the first count value, otherwise, the third count value is set to the second count value.

Next, the logic circuit 33 judges whether the third count value is less than or equal to N/4, and if the third count value is less than or equal to N/4, obtains the digital sampling value Sine[i] from the numerical temporary storage table 32 as a digital output value, wherein i is the third count value; if the third count value is greater than N/4, then obtain the digital sampling value Sine[k] and Sine[N/4] to the numerical temporary storage table 32 to calculate the digital output value, wherein the digital output value is 2*Sine[N/4]-Sine[k], and k=N/2-i.

The digital-to-analog converter 31 is used to receive the digital output value and perform digital-to-analog conversion on it to generate a part of the analog sine wave signal. A complete analog sine wave signal can be formed by N digital output values. In other words, the digital-to-analog converter 31 receives N digital output values in sequence and performs analog-to-digital conversion to generate a [-π/2, 3π /2) The analog sine wave signal of the phase interval.

In this embodiment, the number of samples N is 32 as an example, the first counter 351 and the second counter 352 are implemented with 6-bit counters, and each of the 9 temporary registers of the value temporary storage table 32 is It is implemented with a 12-bit register, but the present invention is not limited thereto. Through the practice of the present invention, the number of gates can be effectively reduced by about 3/4, so the manufacturing cost and circuit area can be reduced.

Please refer to FIG. 3 and FIG. 4 at the same time. FIG. 4 is a flowchart of a method for generating an analog sine wave signal according to an embodiment of the present invention. First, in step S41, the first count value CNT1 and the second count value CNT2 are initialized to be 0 and N (that is, CNT1=0 and CNT2=N), and then through the first counter 351 and the second counter 352, respectively provided by The first count value CNT1 that counts up from 0 and the second count value CNT2 that counts down from N start.

In step S42 , through the logic circuit 33 , it is judged whether the first count value CNT1 is less than or equal to the second count value CNT2 . When the first count value CNT1 is less than or equal to the second count value CNT2, then in step S43, make the third count value CNTVal inside the logic circuit 33 be the first count value CNT1 (i.e. CNTVal=CNT1), otherwise, in step S44 , let the third count value CNTVal be the second count value CNT2 (ie CNTVal=CNT2).

After steps S43 and S44, step S45 is executed. In step S45, through the logic circuit 33, it is judged whether the third count value CNTVal is less than or equal to N/4, and if the third count value CNTVal is less than or equal to N/4, then execute step S46, otherwise, execute step S47. In step S46 , through the logic circuit 33 , the digital output value DACout is made equal to the digital sampling value Sne[CNTVal] (ie, DACout=Sne[CNTVal]). In step S47, through the logic circuit 33, the digital output value DACout is equal to twice the digital sampling value Sine[N/4] minus the result of the digital sampling value Sine[k] (DACout=2*Sine[N/4] -Sne[k]), where k=N/2-CNTVal.

After steps S46 and S47, the first counter 351 and the second counter 352 receive the next clock signal, and increment the first count value CNT1 and the second count value CNT2 respectively, that is, CNT1=CNT1+1, CNT2=CNT2- 1. Afterwards, in step S49 , through the logic circuit 33 , it is determined whether the first count value CNT1 counts to N and whether the second count value CNT2 counts to 0. If the first count value CNT1 counts to N and the second count value CNT2 counts to 0, step S41 is executed, and the first count value CNT1 of the first counter 351 and the second count value CNT2 of the second counter 352 are calculated through the logic circuit 33 Respectively reset to 0 and N, otherwise, proceed to step S42.

Based on the above, the analog sine wave signal generation device and method provided by the embodiment of the present invention can reduce the N digital sampling values that should be stored to only store N/4+1 digital sampling values, so it can reduce temporary storage The number of devices reduces the number of gates in the overall circuit, and reduces the circuit area and manufacturing cost.

It should be understood that the examples and embodiments described herein are for illustrative purposes only, and that various modifications or changes in view thereof will be suggested to those skilled in the art, and will be included within the spirit and scope of the application and the scope of the appended claims. within range.

1: Traditional analog sine wave signal generator 11: Digital to analog converter 12: Value temporary storage table 3: Analog sine wave signal generator 31: Digital to analog converter 32: Value temporary storage table 33: Logic circuit 34: Sequential circuit 35: Counter module 351: first counter 352: second counter S41～S49: steps R1～R4: Interval

The accompanying drawings are provided to enable those skilled in the art to which the present invention pertains to further understand the present invention, and are incorporated in and constitute a part of the specification of the present invention. The drawings illustrate exemplary embodiments of the invention and together with the description serve to explain principles of the invention.

Fig. 1 is a block diagram of a traditional analog sine wave signal generating device.

FIG. 2 is a schematic diagram of the relationship between an analog sine wave signal and N digital sampling values sampled in its phase interval [-π/2, 3π/2).

FIG. 3 is a block diagram of an analog sine wave signal generating device according to an embodiment of the present invention.

FIG. 4 is a flowchart of a method for generating an analog sine wave signal according to an embodiment of the present invention.

3: Analog sine wave signal generator

31: Digital to analog converter

32: Value temporary storage table

33: Logic circuit

34: Sequential circuit

35: Counter module

351: first counter

352: second counter

Claims (10)

An analog sine wave signal generating device for generating an analog sine wave signal, comprising: Numeric temporary storage table for storing N/4+1 digital sampling values obtained by sampling the analog sine wave signal in the phase interval [-π/2, 0), where N is the analog sine wave signal The number of samples to be sampled in the phase interval of [-π/2, 3π/2), and N is a multiple of 4 and greater than or equal to 8; The first counter starts counting up from 0 to generate a first count value, and when the first count value counts to N, the first count value is reset to 0; The second counter counts down from N to generate a second count value, and when the second count value reaches 0, the second count value is reset to N; a logic circuit, electrically connected to the value temporary storage table, the first counter and the second counter, for receiving the first count value and the second count value, according to the first count value and the second count value The second count value obtains one or both of the N/4+1 digital sampling values from the value temporary storage table, and according to the obtained one of the N/4+1 digital sampling values or both produce a digital output value; and A digital-to-analog converter, electrically connected to the logic circuit, for receiving the digital output value output by the logic circuit, and performing digital-to-analog conversion on the digital output value to generate an analog sine wave signal part. The analog sine wave signal generating device as described in claim item 1, wherein the logic circuit judges whether the first count value is less than or equal to the second count value, if the first count value is less than or equal to the second count value value, setting a third count value as the first count value, and if the first count value is greater than the second count value, setting the third count value as the second count value, wherein the The logic circuit obtains one or both of the N/4+1 digital sampling values from the value temporary storage table according to the third count value. The analog sine wave signal generating device as described in claim 2, wherein the logic circuit judges whether the third count value is less than or equal to N/4, and if the third count value is less than or equal to N/4, the logic circuit The circuit obtains the i-th digital sampling value of the N/4+1 digital sampling values as the digital output value, and if the third count value is greater than N/4, the logic circuit obtains the N The digital output value is calculated by the k-th digital sampling value and the N/4th digital sampling value in /4+1 digital sampling values, wherein i is the third count value, and k=N/2 -i. The analog sine wave signal generating device as described in claim 3, wherein when the third count value is greater than N/4, the digital output value is twice the N/4th digital sampling value minus the The kth digital sample value. The analog sine wave signal generating device as described in claim 1 further includes: The timing circuit is electrically connected to the logic circuit, the first counter and the second counter, for providing a clock signal to the logic circuit, the first counter and the second counter. A method for generating an analog sine wave signal, for generating an analog sine wave signal, comprising: Through the first counter and the second counter, respectively provide a first count value counting up from 0 and a second count value counting down from N; Obtain one or both of the stored N/4+1 digital sampling values from the value temporary storage table according to the first count value and the second count value through a logic circuit, wherein the N/4 +1 digital sampling value refers to the N/4+1 digital sampling value obtained by sampling the analog sine wave signal in the phase interval [-π/2, 0), N is the analog sine wave signal in [-π/2, 3π/2) The number of samples for sampling in the phase interval, and N is a multiple of 4 and greater than or equal to 8; generating a digital output value according to one or both of the obtained N/4+1 digital sampling values through the logic circuit; performing digital-to-analog conversion on the digital output value through a digital-to-analog converter to generate a part of the analog sine wave signal; incrementing the first count value and decrementing the second count value through the first counter and the second counter, respectively; and Through the logic circuit, it is judged whether the first count value counts to N and whether the second count value counts to 0, thereby resetting the first count value and the second count value to 0 and N. The analog sine wave signal generation method as described in claim 6, wherein the logic circuit is used to determine whether the first count value is less than or equal to the second count value, and if the first count value is less than or equal to the second count value two count values, setting a third count value as the first count value, and setting the third count value as the second count value if the first count value is greater than the second count value, Wherein the logic circuit acquires one or both of the N/4+1 digital sampling values from the value temporary storage table according to the third count value. The analog sine wave signal generation method as described in claim item 7, wherein, through the logic circuit, it is judged whether the third count value is less than or equal to N/4, and if the third count value is less than or equal to N/4, then The logic circuit obtains the i-th digital sample value in the N/4+1 digital sample values as the digital output value, and if the third count value is greater than N/4, the logic circuit obtains The kth digital sampling value and the N/4th digital sampling value in the N/4+1 digital sampling value are used to calculate the digital output value, wherein i is the third count value, and k= N/2-i. The analog sine wave signal generation method as described in claim item 8, wherein when the third count value is greater than N/4, the digital output value is twice the N/4th digital sampling value minus the The kth digital sample value. The analogous sine wave signal generation method as described in claim item 8 further includes: A clock signal is provided to the logic circuit, the first counter and the second counter through the clock circuit.

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