TW202327145A - Method of manufacturing semiconductor devices and semiconductor structure using the same - Google Patents

Abstract

A manufacturing method for semiconductor devices is disclosed. A sacrificial semiconductor layer is formed on a substrate. First and second semiconductor devices, separate from each other, are formed on the sacrificial semiconductor layer. The first semiconductor device has a first semiconductor island and a first passivation layer, and the second semiconductor device has a second semiconductor island and a second passivation layer. The sacrificial semiconductor layer is then decomposed, to detach the first semiconductor device from the substrate. Before being detached, both the first semiconductor island and the first passivation layer directly contact a topmost surface of the sacrificial semiconductor layer. After being detached, both the first semiconductor island and the first passivation layer are separate from the sacrificial semiconductor layer while the first passivation layer covers on the first semiconductor island.

Description

Manufacturing method of semiconductor element and its semiconductor structure

The present invention mainly relates to a manufacturing method of a semiconductor element, and in particular relates to a manufacturing method of a light emitting diode and related products.

Light-emitting diode (Light-Emitting Diode, LED) is a semiconductor element with good characteristics such as low energy consumption, low heat generation, long operating life, shockproof, small size, and fast response, so it is suitable for various lighting and display purposes .

With continuous breakthroughs in semiconductor process technology, the size of LED chips is also shrinking, and when it is below the level of being visible to the naked eye, its use is no longer limited to the backlight of the display screen. Generally speaking, LED grains with a side length of less than 100 microns are collectively referred to as Micro LEDs (Micro LEDs) in the industry. Micro LEDs of R, G, and B colors can be directly combined into one pixel for use. This also means that the filter and liquid crystal layer in a typical liquid crystal panel are no longer needed. Micro LED emits light by itself, so there is no need for an additional backlight module. Compared with ordinary LCD screen displays, displays using Micro LED as pixels will have higher contrast and longer lifespan.

Micro LED has good luminous efficiency, but also needs to have good reliability. A packaged Micro LED often needs to go through many strict environmental tests to prove its durability for a certain service life, that is, reliability test. For example, after a long time of high-temperature and high-pressure environmental testing, water vapor may enter the Micro LED and cause an oxidation reaction with the semiconductor material in the Micro LED, resulting in damage to the Micro LED.

The present invention discloses a method for manufacturing a semiconductor element, comprising: providing a substrate; forming a semiconductor sacrificial layer on the substrate; forming a first semiconductor element and a second semiconductor element separated from each other on the semiconductor sacrificial layer, wherein , the first semiconductor element includes a first semiconductor island and a first protective layer, the second semiconductor element includes a second semiconductor island and a second protective layer; and, decomposing at least a part of the semiconductor sacrificial layer, to separate the first semiconductor element from the substrate. Before the decomposing step, both the first semiconductor island and the first protective layer are in direct contact with one of the uppermost surfaces of the semiconductor sacrificial layer. After the decomposing step, both the first semiconductor island and the first protective layer are separated from the semiconductor sacrificial layer, and the first protective layer still covers the first semiconductor island.

The invention discloses a semiconductor structure, comprising: a substrate; a semiconductor sacrificial layer formed on the substrate; and a plurality of semiconductor elements separated from each other formed on the semiconductor sacrificial layer. Each of the semiconductor elements includes: a semiconductor island with a side wall and a semiconductor surface layer connected to the side wall, the semiconductor surface layer and in contact with the semiconductor sacrificial layer; and a protective layer covering the side wall. The semiconductor sacrificial layer and the semiconductor surface layer have different materials. Each of the semiconductor elements has a light emitting surface at least including part of the protective layer and part of the semiconductor surface layer.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to drawings so that those skilled in the art of the present invention can fully understand the spirit of the present invention. The present invention is not limited to the following embodiments, but can be implemented in other forms. In this specification, there are some same symbols, which represent elements with the same or similar structure, function, and principle, and can be inferred by those with general knowledge in the industry based on the teaching of this specification. For the sake of brevity in the description, elements with the same symbols will not be repeated.

FIG. 1 shows a Micro LED produced according to the manufacturing method of the present invention, but the present invention is not limited thereto, and the manufacturing method of the present invention can also be used to manufacture other semiconductor devices.

The Micro LED MLD in FIG. 1 has a positive metal bonding pad 118p and a negative metal bonding pad 118n, which can be respectively used as positive and negative external pads of the Micro LED MLD. The positive type metal bonding pad 118p and the negative type metal bonding pad 118n are in contact with the two positive type conductive electrodes 114p and the negative type conductive electrode 114n respectively through the perforation in the protective layer 116 . An inverted semiconductor island (not shown in FIG. 1 ) is composed of a patterned semiconductor stack (not shown in FIG. 1 ), and the semiconductor stack includes intentionally doped semiconductor layer 104, n-type semiconductor layer 106, active layer 108, and the p-type semiconductor layer 110. The negative metal bonding pad 118n electrically contacts the n-type semiconductor layer 106 through the negative conductive electrode 114n; the positive metal bonding pad 118p electrically contacts the p-type semiconductor layer 110 through the positive conductive electrode 114p and the transparent conductive layer 112 . When an appropriate voltage is applied to the two metal bonding pads 118p and 118n of the Micro LED MLD, the electrons in the n-type semiconductor layer 106 and the holes in the p-type semiconductor layer 110 can be driven to move, and they are phased in the active layer 108. Recombine (recombine), and then release photons to emit light. The protective layer 116 covers the sidewall 128 of the semiconductor island, so that the light generated in the Micro LED MLD can be radiated toward the direction EMT.

When there is no capping layer 130 , the Micro LED MLD has a substantially flat light emitting surface LO, which is composed of a part of the protective layer 116 and a part of the unintentionally doped semiconductor layer 104 . In FIG. 1 , the cover layer 130 covers the light output surface LO. The capping layer 130, the protective layer 116, and the positive and negative metal bonding pads 118p and 118n roughly the patterned semiconductor stack (that is, the unintentionally doped semiconductor layer 104, the n-type semiconductor layer 106, the active layer 108, and the p-type semiconductor layer layer 110) to seal it and block the water vapor in the external environment, which can improve the reliability of the Micro LED MLD.

The cover layer 130 may be, for example, a protective layer that is transparent to the light emitted by the active layer 108 . For example, epoxy resin (Epoxy Resin), silicone resin (Silicone), polyimide (Polyimide) and other light-transmitting polymer adhesives or light-transmitting dielectric materials, made of silicon nitride, silicon oxide , alumina and other materials or their laminates.

2 to 6 show a manufacturing method according to the present invention for producing the Micro LED MLD shown in FIG. 1 .

FIG. 2 provides a substrate 100 having an upper surface 101 . For example, the substrate 100 is a sapphire substrate. FIG. 2 shows that a semiconductor sacrificial layer 102 and a semiconductor stack 111 are sequentially formed on the upper surface 101 , covering the upper surface 101 continuously. The semiconductor stack 111 is sequentially formed with the unintentionally doped semiconductor layer 104 , the n-type semiconductor layer 106 , the active layer 108 , and the p-type semiconductor layer 110 sequentially from bottom to top. For example, epitaxy can be used to sequentially stack the semiconductor sacrificial layer 102 , the unintentionally doped semiconductor layer 104 , the n-type semiconductor layer 106 , the active layer 108 , and the p-type semiconductor layer 110 .

In one embodiment, the semiconductor sacrificial layer 102 is an aluminum nitride (AlN) layer with a thickness ranging from 10 nm to 1000 nm, and may be 300 nm. According to the experimental results, if the thickness is less than 10nm, a uniform film cannot be formed, and the Micro LED MLD and the substrate 100 cannot be effectively separated by decomposing the semiconductor sacrificial layer 102; if the thickness is greater than 1000nm, decomposing the semiconductor sacrificial layer 102 will be too time consuming. The unintentionally doped semiconductor layer 104 may be a gallium nitride (GaN) layer or an aluminum gallium nitride (AlGaN) layer. The p-type semiconductor layer 106 and the n-type semiconductor layer 110 may be a gallium nitride (GaN) layer or an aluminum gallium nitride (AlGaN) layer.

The material of the active layer 108 may be AlGaN without intentional doping. In the active layer 108, the concentration of aluminum in AlGaN can be varied to facilitate the generation of quantum wells in the semiconductor energy band. In the quantum well, the recombination of electrons in the conduction band and holes in the valence band can release photons to make the active layer 108 emit light.

FIG. 3 shows the formation of isolated semiconductor islands ISO on the semiconductor sacrificial layer 102 . For example, the p-type semiconductor layer 110 , the active layer 108 , and part of the n-type semiconductor layer 106 in specific regions can be removed by lithography and etching processes, thus forming the mesa (MESA) in FIG. 3 . In other words, the p-type semiconductor layer 110 , the active layer 108 , and part of the n-type semiconductor layer 106 are patterned to form a flat-top MESA. Next, the n-type semiconductor layer 106 and the unintentionally doped semiconductor layer 104 in the designated area are removed similarly by lithography process and etching process, so that the isolated semiconductor island ISO in FIG. 3 is formed and part of the semiconductor is exposed. sacrificial layer 102 . That is, the n-conductivity type semiconductor layer 106 and the unintentionally doped semiconductor layer 104 are patterned to form the semiconductor island ISO. Each semiconductor island ISO is composed of a patterned semiconductor stack 111 with sidewalls 128 as shown in FIG. 3 .

In FIG. 3 , the semiconductor sacrificial layer 102 continuously covers the substrate 100 and has an uppermost surface 103 . Two semiconductor islands ISO are separately formed on the uppermost surface 103 . Each semiconductor island ISO is composed of a patterned semiconductor stack 111 and has sidewalls 128 . The unintentionally doped semiconductor layer 104 in each semiconductor island ISO contacts the semiconductor sacrificial layer 102 .

In some embodiments, the material of the unintentionally doped semiconductor layer 104 must be different from the material of the semiconductor sacrificial layer 102 to achieve a sufficiently high etching selectivity. In this way, when etching the unintentionally doped semiconductor layer 104 to form the semiconductor island ISO, the semiconductor sacrificial layer 102 can be used as an etching stop layer. For example, when etching the unintentionally doped semiconductor layer 104 in FIG. doped semiconductor layer 104 . On the one hand, the high etching selectivity can ensure that the unintentionally doped semiconductor layer 104 on the semiconductor sacrificial layer 102 is removed; When etching the unintentionally doped semiconductor layer 104, the method of grabbing the etching stop point can be used. When the etching reaction products of the unintentionally doped semiconductor layer 104 are almost no longer detected, it is determined that the unintentionally doped semiconductor layer After the 104 has been roughly removed, and at most a short period of over etch time is added, the process of etching the non-intentionally doped semiconductor layer 104 is stopped.

4 shows that a transparent conductive layer 112, positive and negative conductive electrodes 114p and 114n, a protective layer 116, and positive and negative metal bonding pads 118p and 118n are formed on the p-type semiconductor layer 110 of the semiconductor island ISO, and a separate semiconductor element LED1 is formed. with LED2. The cladding layer 116 covers the sidewalls 128 of the semiconductor island ISO. Part of the semiconductor sacrificial layer 102 is sandwiched between the protective layer 116 and the substrate 100 . Both the semiconductor elements LED1 and LED2 are attached on the upper surface 101 through the semiconductor sacrificial layer 102 . The bottom of each semiconductor element LED1 and LED2 has a light emitting surface LO, which is roughly composed of a part of the protective layer 116 and a part of the unintentionally doped semiconductor layer 104 .

The material of the transparent conductive layer 112 may be Indium Tin Oxide (ITO), which is used to disperse current while providing light transparency. The material of the conductive electrodes 114p and 114n may be aluminum or copper, providing a low resistance path to conduct current to some destination. The material of the protective layer 116 can be silicon dioxide (silicon oxide, SiO ₂ ), or a Bragg reflective laminate with a composite layer structure. In addition to isolating the semiconductor island ISO from the external environment, it can also be used to reflect light. The light generated by the active layer 108 is generally radiated toward the direction EMT. The material of the positive and negative metal bonding pads 118p and 118n can be aluminum Al, chromium (Cr), Au, platinum (platinum, Pt), etc., and can be used to provide electrical connection between the semiconductor elements LED1 and LED2 and external circuits.

In another embodiment, after the semiconductor elements LED1 and LED2 are formed by patterning the protective layer 116 , the semiconductor sacrificial layer 102 where the semiconductor elements LED1 and LED2 are not shielded can be removed immediately. That is to say, in another embodiment, there is a semiconductor sacrificial layer 102 in the area covered by the semiconductor elements LED1 and LED2 in FIG. 4 , but there is no semiconductor sacrificial layer 102 in the open area between the semiconductor elements LED1 and LED2 .

FIG. 5 shows that the transfer substrate 120 is attached to the semiconductor elements LED1 and LED2 in FIG. 4 . The transfer substrate 120 can be a carrier substrate with an adhesive material on its surface, such as a printed circuit board with solder on its surface, a sapphire substrate with an adhesive layer on its surface, a glass substrate with an adhesive layer on its surface, a UV curable tape layer, etc. according to subsequent use Different purposes can be used to transfer semiconductor components on the carrier substrate.

FIG. 6 shows that the semiconductor sacrificial layer 102 under the semiconductor element LED2 is decomposed by laser LSR using laser lift-off technology, so that the semiconductor element LED2 is transferred to the transfer substrate 120 . For example, the semiconductor element LED2 is irradiated upward from the bottom of the substrate 100 with a laser LSR with a wavelength shorter than 200 nm. The laser LSR penetrates through the substrate 100 , is roughly focused on the semiconductor sacrificial layer 102 , and is absorbed by the semiconductor sacrificial layer 102 . The semiconductor sacrificial layer 102 is thus heated and decomposed, so that the semiconductor element LED2 can be detached from the substrate 100 . As long as the heating time is long enough, the laser LSR may not only decompose the sacrificial semiconductor layer 102 , but may also decompose a small portion of the unintentionally doped semiconductor layer 104 .

After the semiconductor sacrificial layer 102 is decomposed, the semiconductor element LED2 in FIG. 6 has a light-emitting surface LO, which is composed of a part of the protective layer 116 and a part of the unintentionally doped semiconductor layer 104 .

The semiconductor element LED2 in FIG. 6 can then be provided with a cover layer 130 on the light-emitting surface LO to produce a Micro LED MLD as shown in FIG. 1 , which can have good reliability.

In order to introduce the importance of the semiconductor sacrificial layer 102 , the following describes how the reliability of the produced Micro LED may be adversely affected without the semiconductor sacrificial layer 102 .

FIG. 7 and FIG. 8 respectively show a possible process and result in the process of manufacturing a Micro LED when there is no semiconductor sacrificial layer 102 in FIG. 4 and FIG. 6 . The similarities between FIG. 7 and FIG. 4 , and the similarities between FIG. 8 and FIG. 6 can be known from the previous descriptions, and will not be repeated here. To put it simply, FIG. 7 is that the semiconductor sacrificial layer 102 and the substrate 100 in FIG. 4 are replaced by a single substrate 100 . Therefore, there is no semiconductor sacrificial layer 102 in FIG. 7 , and the semiconductor elements LED11 and LED12 are directly adhered on the substrate 100 . FIG. 8 shows a laser lift-off technology, using laser LSR to heat and decompose a small part of the unintentionally doped semiconductor layer 104 in FIG. 7 , so that the semiconductor element LED12 can be peeled off the substrate 100 . Compared with the semiconductor element LED11 , the unintentionally doped semiconductor layer 104 in the semiconductor element LED12 is thinner, because part of the unintentionally doped semiconductor layer 104 is decomposed by the laser LSR. It is important to note that the LSR does not decompose the sheath 116 due to the laser. In the two regions RK shown in FIG. 8 , the sheath 116 is still adhered to the substrate 100 . Therefore, when the semiconductor element LED12 is to be peeled off the substrate 100, the protective layer 116 in the region RK may crack due to stress, and then provides a possible path for moisture to infiltrate into the semiconductor element LED12 and destroy the semiconductor material therein, reducing the subsequent formation. The reliability of Micro LED.

9 and 10 respectively show another possible process and result in the process of manufacturing a Micro LED without the semiconductor sacrificial layer 102 in FIGS. 3 and 6 . The similarities between FIG. 9 and FIG. 3 , and the similarities between FIG. 10 and FIG. 6 can be known from the previous descriptions, and will not be repeated here. To put it simply, FIG. 9 shows that the semiconductor sacrificial layer 102 in FIG. 3 is replaced by a part of the unintentionally doped semiconductor layer 104 . The laser lift-off technology in FIG. 10 uses laser LSR to heat and decompose a small part of the unintentionally doped semiconductor layer 104 in FIG. 9 , so that the semiconductor element LED22 can be peeled off the substrate 100 .

To form the result shown in FIG. 9 , when etching the semiconductor layer 104 without deliberately doping to form the semiconductor island ISO, the method of grabbing the etching stop point cannot be used, and only the fixed time mode can be used. In other words, after the removal of the n-conductivity semiconductor layer 106, the non-intentionally doped semiconductor layer 104 is etched for a fixed period of time, so that the non-intentionally doped semiconductor layer 104 with a certain thickness of THK must remain in the area outside the semiconductor island ISO. semiconductor layer 104 . In order to overcome the variability (stability) and uniformity (uniformity) of the etching process, the thickness THK must be quite thick in the process. Outside of the semiconductor island ISO in FIG. 9 , the unintentionally doped semiconductor layer 104 with a thickness THK will be very easy to remain in the two regions EX marked in FIG. 10 in the laser lift-off of FIG. The hetero semiconductor layer 104 cannot be completely protected by the subsequently formed cap layer 130 . In other words, the exposed unintentionally doped semiconductor layer 104 in the region EX may react with moisture, or may introduce moisture to reduce the reliability of the subsequently formed Micro LED.

To sum up, although the present invention has been disclosed by the above embodiments, it is not intended to limit the present invention. Those skilled in the art of the present invention can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the scope of the appended patent application.

100: Substrate 101: upper surface 102: Semiconductor sacrificial layer 103: top surface 104: No intentional doping of semiconductor layers 106: n conductivity type semiconductor layer 108:Active layer 110:p conductivity type semiconductor layer 111: Semiconductor stack 112: transparent conductive layer 114n: negative conductive electrode 114p: Positive conductive electrode 116: protective layer 118n: Negative Metal Bonding Pad 118p: Positive Metal Bonding Pad 120: tape layer 128: side wall 130: cover layer EMT: Direction EX: area ISO: Semiconductor Island LED1, LED2, LED11, LED12, LED21, LED22: semiconductor components LO: light exit surface LSR: laser MESA: flat top MLD:Micro LED RK: area THK: Thickness

Fig. 1 shows a Micro LED produced according to the manufacturing method of the present invention.

2 to 6 show a manufacturing method according to the present invention, which can be used to produce the Micro LED shown in FIG. 1 .

FIG. 7 and FIG. 8 respectively show a possible process and result in the process of manufacturing a Micro LED when there is no semiconductor sacrificial layer 102 in FIG. 4 and FIG. 6 .

9 and 10 respectively show another possible process and result in the process of manufacturing a Micro LED without the semiconductor sacrificial layer 102 in FIGS. 3 and 6 .

100: Substrate

101: upper surface

102: Semiconductor sacrificial layer

104: No intentional doping of semiconductor layers

106: n-type semiconductor layer

108:Active layer

110: p-type semiconductor layer

112: transparent conductive layer

114n: negative conductive electrode

114p: Positive conductive electrode

116: protective layer

118n: Negative Metal Bonding Pad

118p: Positive Metal Bonding Pad

128: side wall

EMT: Direction

LED1, LED2: semiconductor components

Claims (10)

A method of manufacturing a semiconductor device, comprising: providing a substrate; forming a semiconductor sacrificial layer on the substrate; forming a first semiconductor element and a second semiconductor element separated from each other on the semiconductor sacrificial layer, wherein the first semiconductor element includes a first semiconductor island and a first protective layer, and the second semiconductor element includes a first two semiconductor islands and a second cladding layer; and dissolving at least a portion of the semiconductor sacrificial layer to separate the first semiconductor element and the substrate from each other; Wherein, before the decomposing step, both the first semiconductor island and the first protective layer are in direct contact with one of the uppermost surfaces of the semiconductor sacrificial layer; and After the decomposing step, both the first semiconductor island and the first protective layer are separated from the semiconductor sacrificial layer, and the first protective layer still covers the first semiconductor island. The manufacturing method described in claim 1 of the patent application, wherein the semiconductor sacrificial layer is an aluminum nitride layer, and the first semiconductor island has a gallium nitride layer in contact with the aluminum nitride layer. The manufacturing method described in item 1 of the scope of the patent application, wherein the first protective layer is a Bragg reflective laminate. The manufacturing method described in Item 1 of the scope of the patent application also includes: On the semiconductor sacrificial layer in sequence, epitaxy an unintentionally doped semiconductor layer, a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer; and etching the second conductivity type semiconductor layer and the active layer to form a plurality of mesa; and Etching the first conductive type semiconductor layer and the unintentionally doped semiconductor layer to expose part of the semiconductor sacrificial layer, and forming the first and second semiconductor islands. The manufacturing method described in claim 4 of the patent application, wherein the unintentionally doped semiconductor layer is a gallium nitride layer. The manufacturing method described in claim 1, wherein the step of decomposing the sacrificial semiconductor layer is heating the sacrificial semiconductor layer with a laser. A semiconductor structure comprising: a substrate; a semiconductor sacrificial layer formed on the substrate; and A plurality of semiconductor elements separated from each other are formed on the semiconductor sacrificial layer, and each of these semiconductor elements includes: A semiconductor island having a side wall and a semiconductor surface layer connected to the side wall, the semiconductor surface layer and contacts the semiconductor sacrificial layer; and a sheath covering the side wall; Wherein, the semiconductor sacrificial layer and the semiconductor surface layer have different materials, and each of the semiconductor elements has a light-emitting surface, at least partially including the protective layer and the semiconductor surface layer. The semiconductor structure as described in item 7 of the scope of the patent application, wherein the semiconductor island includes an unintentionally doped semiconductor layer, a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer. The semiconductor structure described in claim 7 of the patent application, wherein the semiconductor sacrificial layer includes an aluminum nitride layer, the semiconductor surface layer includes a gallium nitride layer, and the aluminum nitride layer and the gallium nitride layer are in contact with each other. The semiconductor structure as described in claim 7, wherein the semiconductor sacrificial layer is sandwiched between the protective layer and the substrate.