TW202320286A - A circuit board packaging structure, circuit board assembly and electronic equipment - Google Patents

Abstract

Embodiments of the present application provide a circuit board packaging structure, a circuit board assembly, and an electronic device, which relate to the technical field of circuit boards and are used to solve or at least partially solve the technical problem of high crosstalk noise during high-speed signal transmission. The circuit board packaging structure includes a circuit board, at least one signal via group and a shielding structure. The circuit board includes a substrate body, and signal traces and a ground layer disposed in the substrate body. The signal via hole group includes at least one signal via hole, the signal via hole penetrates at least a part of the substrate body, and the signal via hole is electrically connected with the signal wiring. The shielding structure penetrates at least a part of the substrate body, the shielding structure is arranged around the outer periphery of the signal via hole group, and is electrically connected to the ground layer. The circuit board package structure is used to connect electronic components.

Description

A circuit board packaging structure, circuit board components and electronic equipment

The present application relates to the technical field of circuit boards, in particular to a circuit board packaging structure, circuit board components and electronic equipment.

Signal transmission between electronic components is realized through a circuit board, and the circuit board is usually a printed circuit board (Printed Circuit Board, PCB). When the signal transmission rate is increased to 112Gbps or even higher 224Gbps, most signals are modulated with multi-level levels. Since the modulation of the signal is divided into more level stages, the loss of the signal swing increases, resulting in less crosstalk noise allowed by the signal swing under the same loss, and the performance requirements for crosstalk noise Also more stringent. As the signal transmission rate increases, the crosstalk noise will accumulate higher in a wider frequency band, which will directly cause the signal-to-noise ratio of signal transmission to fail to meet the transmission requirements, and cannot achieve a higher signal transmission bandwidth.

Embodiments of the present application provide a circuit board packaging structure, circuit board components and electronic equipment, which are used to solve or at least partially solve the technical problem of large crosstalk and noise during high-speed signal transmission.

In order to achieve the above object, the application adopts the following technical solutions:

The embodiment of the first aspect of the present application provides a circuit board packaging structure, which includes a circuit board, at least one signal via hole group, and a mask structure. The circuit board includes a substrate body and signal traces and a ground layer arranged in the substrate body. The signal via hole group includes at least one signal via hole, and the signal via hole penetrates at least a part of the substrate body, and the signal via hole is electrically connected to the signal wiring. The mask structure penetrates at least a part of the substrate body, and the mask structure is arranged around the periphery of the signal via hole group and is electrically connected to the ground layer.

In the embodiment of the present application, a mask structure is provided on the circuit board, and the grounded mask structure has the function of masking and isolating the crosstalk noise generated by the signal via hole. In this way, when the signal is transmitted at high speed, the mask structure can block and isolate the crosstalk noise in one signal via group from being transmitted to the adjacent signal via group. At the same time, the mask structure is arranged around the periphery of the signal via group, which can surround the crosstalk noise, thereby preventing the crosstalk noise from being transmitted to the outside, which is beneficial to reducing the crosstalk noise during high-speed signal transmission.

In some embodiments, the circuit board packaging structure is electrically connected to the electronic component, and the electronic component has a ground pin. The mask structure includes at least two first ground via groups and at least two second ground via groups, the first ground via groups and the second ground via groups are arranged alternately and arranged around the periphery of the signal via groups. Wherein, each first ground via group includes at least one first ground via, and the first ground via is electrically connected to the ground pin of the electronic component and electrically connected to the ground layer. Each second ground via group includes at least one second ground via, and the second ground via is electrically connected to the ground layer.

The mask structure is designed as a structure of the first ground via hole group and the second ground via hole group, so that the ground pins of the electronic components can be inserted into the first ground via holes, which facilitates the assembly of the electronic components and the circuit board. At the same time, both the second ground via hole and the first ground via hole can block and isolate the signal via hole from crosstalk noise, enhance the anti-interference performance of the circuit board packaging structure, and facilitate high-speed signal transmission.

In some embodiments, each first ground via group includes at least two first ground vias. The first ground via group further includes a third ground via, the third ground via is located between two adjacent first ground vias, and the third ground via is electrically connected to the ground layer. Adding a third ground via between the two first ground vias can improve the blocking and isolation density of the mask structure against crosstalk noise, and is beneficial to reduce the probability of the electromagnetic wave of the signal crosstalking to the adjacent signal via, thereby improving Anti-interference performance of circuit board packaging structure.

In some embodiments, the circuit board further includes leads, one end of which is electrically connected to the signal via hole, and the other end is electrically connected to the signal trace. Each group of second ground vias includes at least two second ground vias, and the lead wire passes through the gap between two adjacent second ground vias. Providing a gap between two adjacent second ground via holes can avoid the influence of the arrangement of the mask structure on the arrangement of the lead wires.

In some embodiments, the gap between two adjacent second ground vias on both sides of the lead is 0.6-2 mm. Set the gap between two adjacent second ground vias on both sides of the lead to 0.6-2mm, which can not only meet the wiring requirements of the lead, but also minimize crosstalk noise from two adjacent second ground vias on both sides of the lead. The probability of the gap between the holes to be transmitted outwards, thereby improving the effect of the mask structure on the masking of crosstalk noise.

In some embodiments, between adjacent first ground vias, between adjacent second ground vias, between first ground vias and second ground vias, between first ground vias and third ground vias The spacing between the holes is 0.2-0.6mm. Setting the spacing between the first ground via hole, the second ground via hole and the third ground via hole to 0.2-0.6mm can ensure the high-density arrangement of the mask structure, thereby improving the mask structure’s ability to shield against crosstalk noise Effect.

In some embodiments, the circuit board packaging structure includes at least two signal via groups. The first ground via group between two adjacent signal via groups is shared. Alternatively, the second ground via group between two adjacent signal via groups is shared. Sharing the first ground via group or the second ground via group between two adjacent signal via groups is beneficial to reducing the structural size of the circuit board and making the structure of the holes on the circuit board more compact.

In some embodiments, the circuit board packaging structure is electrically connected to the electronic component, and the electronic component has a ground pin. The substrate body is provided with a mask groove, the mask groove penetrates at least a part of the substrate body, and the mask groove is arranged around the periphery of the signal via hole group. The shelter structure consists of insulating retaining walls and metal cladding. The insulating retaining wall is filled in the shielding groove and is arranged around the periphery of the signal via hole group. The metal covering layer is located between the insulating retaining wall and the groove wall of the shielding groove, and is connected with the insulating retaining wall and the shielding groove. The metal covering layer is electrically connected to the ground layer and the ground pin of the electronic component.

The mask structure can also be designed as a structure of connected mask grooves. A metal covering layer is set in the mask groove and filled with an insulating retaining wall, so that the grounding pins of the electronic components can be fixed in the insulating retaining wall, which is also convenient. Assembly of electronic components and circuit boards. At the same time, both the masking groove and the insulation retaining wall can block the signal via hole and isolate crosstalk noise, enhance the anti-interference performance of the circuit board packaging structure, and facilitate high-speed signal transmission.

In some embodiments, the insulating retaining wall is provided with connection holes. The connection hole runs through at least a part of the insulating retaining wall, and a side wall of the connection hole exposes a part of the metal covering layer. The grounding pin of the electronic component is arranged in the connection hole, and is electrically connected with the metal covering layer through the side wall of the connection hole. Connecting holes are provided on the insulating retaining wall so that the grounding pins of the electronic components can also be inserted into the connecting holes, thereby realizing packaging and fixing of the electronic components and the circuit board. The ground pin can be in contact with the metal covering layer, so as to realize the electrical connection of the electronic components.

In some embodiments, the circuit board further includes leads, one end of which is electrically connected to the signal via hole, and the other end is electrically connected to the signal trace. The horizontal section of the mask slot is C-shaped, and the lead wire passes through the opening of the C-shaped mask slot. Wherein, the horizontal section is parallel to the surface of the circuit board. Likewise, setting the opening on the mask groove can avoid the influence of the setting of the mask structure on the arrangement of the lead wires.

In some embodiments, the opening size of the C-shaped mask groove is 0.6-2 mm. Similarly, setting the opening size of the C-shaped mask slot to 0.6-2mm can not only meet the wiring requirements of the leads, but also minimize the probability of crosstalk noise being transmitted from the opening of the mask slot, thereby improving the shielding. Effect of mask structure on crosstalk noise masking.

In some embodiments, the circuit board packaging structure includes at least two signal via groups. The mask grooves between two adjacent signal via hole groups are connected, and the mask structures between two adjacent signal via hole groups are shared. Similarly, two adjacent signal via groups share a connected mask slot, which is beneficial to reducing the structural size of the circuit board and making the structure of the holes and slots on the circuit board more compact.

In some implementations, at least one signal via group includes a pair of differential pair vias. Designing the signal via group as a structural form of a differential pair of vias can make the transmitted signal form a differential signal, which is conducive to enhancing the anti-interference ability of the signal against noise.

The embodiment of the second aspect of the present application provides a circuit board component, including an electronic component and any one of the above-mentioned circuit board packaging structures. The electronic component has a signal pin and a ground pin, the signal pin is electrically connected to the signal via hole of the circuit board packaging structure, and the ground pin is electrically connected to the mask structure of the circuit board packaging structure. The above-mentioned circuit board components have the same technical effect as the circuit board packaging structure provided by the foregoing embodiments, which will not be repeated here.

In some embodiments, the electronic component is a connector, and the connector includes a male end and a female end. The public end has a first signal pin and a first ground pin. The female terminal has a second signal pin and a second ground pin. The circuit board packaging structure includes a first circuit board packaging structure and a second circuit board packaging structure. Wherein, the first signal pin is plugged into the signal via hole of the first circuit board packaging structure, and the first ground pin is plugged into the mask structure of the first circuit board packaging structure. The second signal pin is plugged into the signal via hole of the packaging structure of the second circuit board, and the second ground pin is plugged into the mask structure of the packaging structure of the second circuit board. When the electronic component is a connector, the crosstalk noise of the circuit board component provided by the embodiment of the present application is smaller, and the connector can realize the function of high-speed signal transmission.

In some embodiments, the electronic component is a chip, and the chip has signal solder balls and ground solder balls. The signal solder ball is electrically connected to the signal via hole of the circuit board package structure, and the ground solder ball is electrically connected to the mask structure of the circuit board package structure. When the electronic component is a chip, the crosstalk noise of the circuit board component provided by the embodiment of the present application is smaller, and the chip can realize the function of high-speed signal transmission.

The third party embodiment of the present application provides an electronic device, which includes a housing and any one of the above-mentioned circuit board components, and the circuit board component is disposed in the housing. The above-mentioned electronic device has the same technical effect as that of the circuit board components provided by the above-mentioned embodiments, which will not be repeated here.

The following will describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them.

Hereinafter, the terms "first", "second", etc. are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features. Thus, a feature defined as "first", "second", etc. may expressly or implicitly include one or more of that feature.

In addition, in the present application, orientation terms such as "upper", "lower", "horizontal" and "vertical" are defined relative to the schematic placement orientations of components in the drawings. It should be understood that these directional terms are relative concepts, which are used for relative description and clarification, which may change accordingly according to changes in the orientation of parts placed in the drawings.

In this application, unless otherwise specified and limited, the term "connection" should be understood in a broad sense, for example, "connection" can be a fixed connection, a detachable connection, or an integral body; it can be a direct connection, or It can be connected indirectly through an intermediary.

The present application provides an electronic device, and the electronic device may include electronic devices such as a router, a switch, a server, or a base station. The embodiments of the present application do not place special limitations on the specific forms of the foregoing electronic devices. For the convenience of description, as shown in FIG. 1 , the foregoing electronic device 01 is used as an example for description. The electronic device 01 may include a housing 100 and a circuit board component 200 , and the circuit board component 200 may be installed in the housing 100 .

Wherein, the circuit board component 200 may include a circuit board packaging structure 210 and an electronic component 220 . The circuit board packaging structure 210 can be installed in the casing 100 through structures such as screws or screws, and the electronic component 220 can be arranged on the circuit board packaging structure 210 and electrically connected with the circuit board packaging structure 210 . The electronic component 220 may include components such as a chip, a connector, or a filter, and the embodiment of the present application does not place special limitations on the specific structure of the electronic component 220 .

In some implementations, as shown in FIG. 2 , the electronic component 220 is used as an example for illustration. The circuit board packaging structure 210 may include a first circuit board packaging structure 210a and a second circuit board packaging structure 210b, and the electronic component 220 may include a male terminal 220a and a female terminal 220b. Wherein, the male terminal 220a may be electrically connected to the first circuit board packaging structure 210a, and the female terminal 220b may be electrically connected to the second circuit board packaging structure 210b.

Wherein, the electrically connected male terminal 220a and the first circuit board packaging structure 210a may be called a daughter card, and the electrically connected female terminal 220b and the second circuit board packaging structure 210b may be called a backplane. Devices such as a central processing unit, a memory, and multiple control chips can be integrated on the backplane. As an extension of the function of the backplane, the daughter card can be mounted on the backplane through the insertion of the male end 220a and the female end 220b. For example, the daughter card can integrate more interfaces to increase the number of interfaces of the electronic device 01 . At this time, a plurality of female terminals 220b may be provided on one backplane for electrical connection with the male terminals 220a of each daughter card. The embodiment of the present application does not place a special limit on the number of backplanes and daughter cards in the casing 100 of the electronic device 01 .

Of course, the first circuit board encapsulation structure 210a and the second circuit board encapsulation structure 210b in the above embodiment are vertically connected. According to the difference in the structure of the male end 220a and the female end 220b, and the difference in the functions required by the electronic device 01, the first circuit board packaging structure 210a and the second circuit board packaging structure 210b can also be arranged in parallel as shown in FIG. connect. Alternatively, the first circuit board packaging structure 210a and the second circuit board packaging structure 210b may also be connected horizontally as shown in FIG. 4 . The embodiment of the present application does not place special limitations on the connection manner between the first circuit board packaging structure 210a and the second circuit board packaging structure 210b.

On this basis, specifically, as shown in FIG. 5 , a plurality of via holes 20 are respectively provided on the first circuit board packaging structure 210a and the second circuit board packaging structure 210b, and a part of the via holes 20 are signal via holes. , and the other part is the ground via. The public terminal 220 a has a plurality of pins distributed in an array, and some of the plurality of pins may be first signal pins 221 a for electrical connection with the signal vias in the vias 20 . The rest of the pins may be the first ground pins 222 a for electrical connection with the ground vias in the via holes 20 . The female terminal 220 b also has a plurality of pins distributed in an array, and some of the pins may be the second signal pins 221 b for electrical connection with the signal vias in the vias 20 . The rest of the pins can be the second ground pins 222 b for electrical connection with the ground vias in the via holes 20 .

Wherein, the first signal pin 221a, the first ground pin 222a, the second signal pin 221b and the second ground pin 222b can all be designed as fisheye pins. In this case, the male terminal 220a can be electrically connected to the first circuit board packaging structure 210a by plugging, and the female terminal 220b can be electrically connected to the second circuit board packaging structure 210b by plugging. Of course, the electronic component 220 can also use surface mount technology SMT or through-hole reflow soldering to realize the electrical connection with the circuit board packaging structure 210 .

The above-mentioned embodiment is illustrated by taking the electronic component 220 as a connector. In other embodiments, the electronic component 220 may also be a wafer 220c as shown in FIG. 6 . The wafer 220 c has a plurality of solder balls distributed in an array, and some of the plurality of solder balls may be signal solder balls 221 for electrical connection with the signal vias in the via holes 20 . The rest of the solder balls may be ground solder balls 222 for electrical connection with the ground vias in the via holes 20 . In this case, in order to realize the electrical connection between the chip 220c and the circuit board packaging structure 210, the signal solder balls 221 and the ground solder balls 222 of the chip 220c can be assembled by SMT or through-hole reflow soldering. on the circuit board packaging structure 210 .

When the rate of signal transmission increases to 112Gbps or even higher than 224Gbps, the frequency of signal transmission will correspondingly increase to 40GHz or even higher than 80GHz. However, as the signal transmission rate increases and the frequency increases, the crosstalk noise will accumulate higher in a wider frequency band, which requires the signal to be more stringent in the performance of the crosstalk noise. Among them, the packaging structure design of the circuit board is one of the main factors that lead to the increase of crosstalk noise when the signal is transmitted at high speed. The encapsulation structure of the circuit board will be described in detail below.

In order to effectively reduce the influence of crosstalk and noise during high-speed signal transmission and meet the requirements of high-speed signal transmission, as shown in FIG. 213. Multiple sets of signal via groups 212 and mask structures 213 are provided on the circuit board 211 , and one set of signal via groups 212 and mask structures 213 will be described below as an example.

The circuit board 211 may include a substrate body 2110 as shown in FIG. 8 , and a signal trace 2111 and a ground layer 2112 disposed in the substrate body 2110 , and a dielectric layer 2113 may be disposed between the signal trace 2111 and the ground layer 2112 . Specifically, the substrate body 2110 can be a double-sided copper clad laminate. The double-sided copper clad board includes a core board layer and copper foil layers covering both sides of the core board layer. One of the copper foil layers in the double-sided copper clad board can be used as the signal trace 2111, and the other copper foil layer can be used as the ground layer 2112. The core layer in the double-sided copper clad laminate can be used as the dielectric layer 2113 .

Of course, according to different structural designs of the circuit board 211 , the copper foil layers on both sides of the double-sided copper-clad laminate can also be used as the signal wiring 2111 or the ground layer 2112 . When the circuit board 211 requires multiple layers of signal traces 2111 and ground layers 2112, multiple double-sided copper-clad boards can also be selected for lamination, and adhesive layers 2114 such as prepregs can be used to press and form adjacent double-sided copper-clad boards.

The signal via group 212 may include two signal vias 2121 as shown in FIG. 8 . The two signal via holes 2121 are disposed through the substrate body 2110 and may be blind holes, buried holes or through holes. The wall of each signal via hole 2121 is plated with a conductive metal material, and the signal trace 2111 is electrically connected to the signal via hole 2121 . Of course, the circuit board 211 may also include a lead wire 214 as shown in FIG. 7 , one end of the lead wire 214 is electrically connected to the signal via hole 2121 , and the other end of the lead wire 214 is electrically connected to the signal trace 2111 .

It should be noted that when the signal via group 212 is two signal vias 2121 , the two signal vias 2121 may form a pair of differential pair vias. The two lead wires 214 and the two signal traces 2111 electrically connected to the two signal via holes 2121 are arranged with equal length, equal width, and equal spacing, so that the transmitted signal can form a differential signal, so that the signal is equal in amplitude and phase. The opposite differential transmission is beneficial to enhance the anti-interference ability of the signal to noise.

Certainly, the signal via group 212 may also include a signal via 2121 . The present application does not place any special limitation on the specific number of signal vias 2121 in the signal via group 212 . In addition, multiple pairs of differential pair via holes may be provided on the circuit board 211 , and the multiple pairs of differential pair via holes may be in a rectangular array or in a circular array. The embodiment of the present application does not place special restrictions on the specific distribution form of the differential pair vias.

When the electronic component 220 is a connector, the first signal pin 221a of the connector male end 220a can be plugged into the signal via hole 2121 of the first circuit board package structure 210a, and the second signal pin 221b of the connector female end 220b It can be inserted into the signal via hole 2121 of the second circuit board package structure 210b. When the electronic component 220 is a chip, the signal solder balls 221 of the chip can be electrically connected to the signal via holes 2121 of the circuit board package structure 210 .

The above is the introduction of the circuit board 211 and the signal via hole group 212 on the circuit board 211 . Since the signal is transmitted vertically through the signal vias 2121 between the signal traces 2111 of the circuit board 211, in order to realize the crosstalk noise shielding of the signal via groups 212, the distance between the adjacent signal via groups 212 is reduced. The crosstalk noise, the mask structure 213 will be introduced in detail below.

Example one:

In some implementations, as shown in FIG. 8 , the mask structure 213 can be designed as a via hole, which can be a blind hole, a buried hole or a through hole, and the via hole penetrates at least a part of the substrate body 2110 . The depth of the via hole penetrating through the substrate body 2110 is greater than or equal to the depth of the signal via hole 2121 , and the mask structure 213 surrounds the periphery of the signal via hole 2121 to achieve the function of blocking and isolating crosstalk noise. The via hole can be electrically connected to the ground layer 2112, and the ground layer 2112 can have an anti-pad at the position where the signal via hole 2121 penetrates, and the signal trace 2111 can bypass the position where the mask structure 213 penetrates to avoid short circuit.

In this way, since the signal traces 2111 and the ground layer 2112 are horizontally arranged on the substrate body 2110 , the signal via holes 2121 and the mask structure 213 are vertically arranged on the substrate body 2110 . The signal traces 2111 , the signal vias 2121 , the ground layer 2112 and the mask structure 213 form at least one loop on the substrate body 2110 . The current flows along the signal traces 2111 and the signal vias 2121 in the loop, while carrying high and low level signals for transmission in the loop. After the signal is transmitted, it returns along the ground layer 2112 and the shield structure 213 along with the circuit.

It can be seen that, when the signal is transmitted, the signal can be transmitted horizontally in the signal trace 2111 and vertically transmitted in the signal via hole 2121 . When the signal returns, the signal may return horizontally within the ground plane 2112 and return vertically at the shield structure 213 . Since the depth of the via hole penetrating the substrate body 2110 is not less than the depth of the signal via hole 2121, the transmission path of the signal is wrapped in the return path of the signal, so that the crosstalk noise generated in the signal via hole 2121 can be masked. 213 Obstruction, isolation.

Specifically, as shown in FIG. 9A, the mask structure 213 may include two first ground via groups 2131 and two second ground via groups 2132, the first ground via group 2131 and the second ground via group 2132 are respectively electrically connected to the ground layer 2112 (shown in FIG. 8 ). The first ground via group 2131 and the second ground via group 2132 may surround the outer periphery of the signal via group 212 (rectangular box with dotted lines shown in FIG. 7 ). Specifically, in FIG. 9A , two first ground via hole groups 2131 are arranged side by side along the X direction, and two second ground via hole groups 2132 are arranged side by side along the Y direction. Wherein, the X direction and the Y direction are set vertically. Certainly, the arrangement of the first ground via hole group 2131 and the second ground via hole group 2132 can also be arranged in a ring around the outer circumference of the signal via hole group 212 . For convenience of description, the following is an example in which the first ground via hole group 2131 and the second ground via hole group 2132 can be arranged in a rectangular shape around the periphery of the signal via hole group 212 .

Wherein, as shown in FIG. 9A , each group of first ground vias 2131 may include two first ground vias 2131a arranged along the Y direction, and the first ground vias 2131a are electrically connected to the ground layer 2112 (shown in FIG. 8 ). The wall of the first ground via hole 2131a is plated with a conductive metal material. When the electronic component 220 is a connector, the first ground pin 222a of the connector male end 220a can be inserted into the first ground via hole 2131a of the first circuit board package structure 210a, and the second ground pin 222a of the connector female end 220b The pin 222b can be plugged into the first ground via hole 2131a of the second circuit board package structure 210b. When the electronic component 220 is a chip, the ground solder ball 222 of the chip can be electrically connected to the first ground via hole 2131 a of the circuit board package structure 210 .

On this basis, as shown in FIG. 9A , each first ground via group 2131 may further include a third ground via 2131b, and the third ground via 2131b is located between two adjacent first ground vias 2131a. As shown in FIG. 9B , both ends of the third ground via hole 2131 b may be electrically connected to the ground layer 2112 . The difference from the first ground via hole 2131 a is that the third ground via hole 2131 b is not electrically connected to the pin (pin) of the electronic component 220 .

Wherein, the wall of the third ground via hole 2131b is plated with a conductive metal material. The third ground via hole 2131b can be filled with materials such as insulating plastic or conductive metal material, and the third ground via hole 2131b can also be set as a hollow structure. The specific structure makes special restrictions.

In addition, as shown in FIG. 9A, each group of second ground vias 2132 may include a plurality of second ground vias 2132a arranged along the X direction, and both ends of the second ground vias 2132a may also be connected to the ground layer 2112 (Fig. 9B) electrical connection. Similarly, the difference from the first ground via hole 2131 a is that the second ground via hole 2132 a is also not electrically connected to a pin (pin) of the electronic component 220 . Two groups of first ground via groups 2131 and two groups of second ground via groups 2132 may enclose a rectangular frame, and the signal via group 212 may be disposed within the rectangular frame.

Wherein, the wall of the second ground via hole 2132a is plated with a conductive metal material. The second ground via hole 2132a can be filled with materials such as insulating plastic or conductive metal material, and the second ground via hole 2132a can also be set as a hollow structure. The specific structure makes special restrictions.

On this basis, as shown in FIG. 9A , the lead wire 214 (shown in FIG. 7 ) can pass through the gap between two adjacent second ground via holes 2132a. At this time, the opening 2130 of the mask structure 213 is formed between the walls of the two second ground via holes 2132 a on both sides of the lead wire 214 . If the distance S1 of the opening 2130 is less than 0.6 mm, the narrow opening 2130 is not conducive to the arrangement of the leads 214 . If the distance S1 of the opening 2130 is greater than 2 mm, it will be unfavorable to shield the crosstalk noise. Optionally, the distance S1 of the opening 2130 may be set to 0.6-2 mm.

Similarly, if the distance S2 between adjacent second ground via holes 2132a, between the first ground via hole 2131a and the second ground via hole 2132a, and between the first ground via hole 2131a and the third ground via hole 2131b is less than 0.2mm, it is not conducive to the layout of the via holes. If the distance S2 is greater than 0.6 mm, it will be unfavorable to mask the crosstalk noise. Therefore, the spacing S2 between adjacent second ground vias 2132a, between the first ground via 2131a and the second ground via 2132a, and between the first ground via 2131a and the third ground via 2131b can be set as 0.2-0.6mm. When only two first ground via holes 2131a are provided in the first ground via hole group 2131, the distance S2 between the two first ground via holes 2131a can also be set to 0.2-0.6mm.

According to the impedance design of the circuit board 211, the layout of the pins of the electronic components 220, and the size of the vias arranged on the circuit board 211, the embodiment of the present application does not The specific number and size of the via holes 2131b are subject to special restrictions.

For example, as shown in FIG. 10 , four groups of signal via groups 212 are taken as an example for illustration. The opening distance S1 between the walls of the two second ground via holes 2132a in each group of signal via holes 212 is 0.6 mm. The distance S2 between the holes 2132a and between the first ground via hole 2131a and the third ground via hole 2131b is 0.2 mm. The four groups of signal vias 212 are arranged in a rectangular array along the X direction and the Y direction, and the adjacent first ground vias 2131a and the third ground vias 2131b are shared along the X direction.

As shown in FIG. 11 , the abscissa represents the frequency of signal transmission (in GHz), and the ordinate represents the crosstalk noise (in dB). The curve relationship between the crosstalk noise between the four signal via groups 212 and the signal transmission frequency can be seen from the figure, the circuit board package structure 210 can achieve a signal transmission frequency of 80 GHz, and at the same time, the far-end crosstalk of the signal can satisfy - 40dB requirement. As shown in FIG. 12 , the circuit board package structure 210 can realize the frequency of signal transmission up to 80 GHz, and at the same time, the near-end crosstalk of the signal can meet the requirement of -40 dB.

It should be noted that the embodiment of the present application does not impose special restrictions on the number of groups of signal vias 212 on the circuit board 211, and the outer circumference of each group of signal vias 212 is surrounded by a first grounding via group 2131 and a second group of vias. Ground via group 2132 . Each group of the first ground via hole group 2131 and the second ground via hole group 2132 are alternately arranged, and the second ground via hole group 2132 may also be shared between two adjacent signal via hole groups 212 .

In addition, if the opening distance S1 between the walls of two second ground via holes 2132a in each group of signal via holes 212 is 2mm, between the adjacent second ground via holes 2132a, the first ground via hole 2131a and the second ground via hole 2131a The distance S2 between the ground vias 2132 a and between the first ground vias 2131 a and the third ground vias 2131 b is 0.6 mm. Then the circuit board packaging structure 210 can realize the frequency of signal transmission up to 50GHz, and at the same time, the far-end crosstalk and near-end crosstalk of the signal can both meet the requirement of -40dB.

Example two:

The difference from Example 1 is that, as shown in FIG. 13A , the mask structure 213 can be designed in the form of a mask groove 215 . Specifically, a mask slot 215 may be provided on the circuit board 211 . Likewise, as shown in FIG. 13B , the depth of the mask groove 215 penetrating the circuit board 211 is greater than or equal to the depth of the signal via hole group 212 , and the mask groove 215 surrounds the periphery of the signal via hole group 212 . The mask groove 215 can be electrically connected to the ground layer 2112, and the ground layer 2112 can have an anti-pad at the position where the signal via hole 2121 penetrates, and the signal trace 2111 can bypass the position where the mask groove 215 penetrates to avoid short circuit.

On this basis, as shown in FIG. 13A , the horizontal section of the mask groove 215 can be designed as a C shape with an opening 2130 , and the horizontal section is parallel to the surface of the circuit board 211 . The lead wire 214 can pass through the opening 2130 of the C-shaped mask groove 215 . Wherein, as shown in FIG. 14 , the size S1 of the opening 2130 of the mask groove 215 on both sides of the lead wire 214 can be set to 0.6-2 mm. Of course, the mask groove 215 can also be designed in a U-shape or a circular shape, and the embodiment of the present application does not place special limitations on the specific structure of the mask groove 215 .

Specifically, as shown in FIG. 15 , the mask structure 213 may include an insulating barrier 2133 and a metal covering layer 2134 . The insulation retaining wall 2133 can be made of resin or glass fiber and filled in the mask groove 215 and arranged around the periphery of the signal via hole group 212 . The metal covering layer 2134 is located between the insulating retaining wall 2133 and the groove wall of the shielding groove 215, and the metal covering layer 2134 can be processed and manufactured by copper plating, etc. connect. The metal cover layer 2134 is also electrically connected to the ground layer 2112 (shown in FIG. 13B ) and pins of the electronic component 220 .

In some implementations, as shown in FIG. 15 , a connection hole 2135 may be opened on the insulating retaining wall 2133 for connecting the electronic component 220 (shown in FIG. 1 ). Specifically, the connection hole 2135 may pass through at least a part of the insulating barrier 2133 , and a side wall of the connection hole 2135 exposes a part of the metal covering layer 2134 for electrical connection with the electronic component 220 . Along the length direction of the insulation retaining wall 2133, the connection holes 2135 may be arranged at intervals.

When the electronic component 220 is a connector, the first grounding pin 222a of the connector male end 220a can be plugged into the connection hole 2135 of the first circuit board packaging structure 210a, and is electrically connected to the metal covering layer 2134; the connector female end The second ground pin 222b of the circuit board 220b can be plugged into the connection hole 2135 of the second circuit board package structure 210b and electrically connected to the metal covering layer 2134 .

When the electronic component 220 is a chip, there is no need to open the connection hole 2135 at this time. It is only necessary to set pads on the top of the insulating barrier 2133 to electrically connect the pads to the metal covering layer 2134 . The ground solder balls 222 of the die may be electrically connected to the pads of the circuit board package structure 210 .

According to the impedance design of the circuit board 211 and the layout of the pins of the electronic components 220 , the embodiment of the present application does not impose special restrictions on the width of the mask groove 215 and the mask structure 213 .

For example, as shown in FIG. 16 , four groups of signal via groups 212 are also taken as an example for illustration. Each group of signal via holes 212 is surrounded by a mask groove 215 and a mask structure 213 . The four groups of signal via groups 212 are also arranged in a rectangular array along the X direction and the Y direction, and the mask grooves 215 between two adjacent signal via groups 212 along the X direction are connected, and the adjacent two signal via groups The mask structure 213 between 212 is shared.

When the opening size S1 of the mask groove 215 on both sides of the lead wire 214 is set to 0.6mm, the circuit board packaging structure 210 can also realize the frequency of signal transmission up to 80 GHz, and at the same time, the far-end crosstalk and near-end crosstalk of the signal can satisfy - 40dB requirement. When the opening size S1 of the mask groove 215 on both sides of the lead wire 214 is set to 2 mm, the circuit board package structure 210 can also achieve a signal transmission frequency of 50 GHz, and at the same time, the far-end crosstalk and near-end crosstalk of the signal can both meet -40dB requirements.

It should be noted that the circuit board packaging structure 210 provided in the embodiment of the present application is not limited to the arrangement of the via hole-type mask structure 213 or the mask groove 215-type mask structure 213 on the outer periphery of the signal via hole group 212 . According to the packaging structure design of the circuit board and the arrangement of the pins of the electronic components 220 , the mask structure 213 of the via hole type and the mask structure 213 of the mask groove 215 type can also be combined and arranged on the circuit board 211 . The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the scope of the patent application of the present invention shall fall within the scope of the present invention.

100: shell 200: circuit board components 210: Circuit board packaging structure 220: Electronic components 210a: the first circuit board packaging structure 210b: second circuit board packaging structure 220a: public terminal 220b: female end 20: Via 221a: the first signal pin 221b: the second signal pin 222a: the first ground pin 222b: the second ground pin 220c: chip 222: Ground solder ball 221: Signal solder ball 211: circuit board 212: Signal via group 213: Mask structure 214: lead 2110: substrate body 2111: signal routing 2112: ground plane 2113: medium layer 2114: Adhesive layer 2130: opening 2131: The first ground via group 2131a: The first ground via 2131b: The third ground via 2132: The second ground via group 2132a: Second ground via S1: Distance S2: Spacing 215: Mask slot 2133: Insulation retaining wall 2134: metal covering 2135: connection hole

FIG. 1 is a schematic structural diagram of an electronic device provided in an embodiment of the present application; FIG. 2 is a schematic structural diagram of another electronic device provided by an embodiment of the present application; Fig. 3 is a schematic structural diagram of an embodiment of a circuit board element in Fig. 2; Fig. 4 is a schematic structural diagram of another embodiment of the circuit board element in Fig. 2; FIG. 5 is a schematic diagram of an exploded structure of the connector and circuit board packaging structure in FIG. 2; Fig. 6 is a structural schematic diagram of the connection between the chip and the circuit board packaging structure in Fig. 1; FIG. 7 is a schematic top view of a circuit board packaging structure provided by an embodiment of the present application; Fig. 8 is a schematic cross-sectional structure diagram of A-A in Fig. 7; FIG. 9A is a schematic structural diagram of an embodiment of the mask structure in FIG. 7; FIG. 9B is a schematic diagram of a circuit board packaging structure and an exploded structure of electronic components provided by the embodiment of the present application; FIG. 10 is a schematic top view of another circuit board packaging structure provided by the embodiment of the present application; FIG. 11 is a schematic diagram of far-end crosstalk results of the circuit board package structure in FIG. 10; FIG. 12 is a schematic diagram of near-end crosstalk results of the circuit board package structure in FIG. 10; FIG. 13A is a schematic top view of another circuit board packaging structure provided by the embodiment of the present application; Fig. 13B is a schematic cross-sectional structure diagram of B-B in Fig. 13A; Fig. 14 is a schematic structural diagram of an embodiment of the mask groove in Fig. 13A; FIG. 15 is a schematic structural diagram of an embodiment of the mask structure in FIG. 13A; FIG. 16 is a schematic top view of another circuit board packaging structure provided by the embodiment of the present application.

213: Mask structure

2130: opening

2131: The first ground via group

2131a: The first ground via

2131b: The third ground via

2132: The second ground via group

2132a: Second ground via

S1: Distance

S2: Spacing

Claims (17)

A circuit board packaging structure, characterized in that it comprises: A circuit board, including a substrate body and signal traces and ground layers arranged in the substrate body; At least one signal via group, the signal via group includes at least one signal via, the signal via penetrates at least a part of the substrate body; the signal via is electrically connected to the signal trace; and, The mask structure penetrates at least a part of the substrate body, the mask structure is arranged around the periphery of the signal via hole group, and is electrically connected to the ground layer. According to the circuit board packaging structure described in claim 1, it is characterized in that the circuit board packaging structure is electrically connected to an electronic component, and the electronic component has a grounding pin; The mask structure includes: At least two first ground via hole groups and at least two second ground via hole groups, the first ground via hole groups and the second ground via hole groups are alternately arranged around the periphery of the signal via hole groups set up; Wherein, each group of the first ground via group includes at least one first ground via, and the first ground via is electrically connected to the ground pin of the electronic component and electrically connected to the ground layer; Each set of the second ground via group includes at least one second ground via, and the second ground via is electrically connected to the ground layer. The circuit board packaging structure according to claim 2, wherein each group of the first ground vias includes at least two first ground vias; The first ground via group further includes a third ground via, the third ground via is located between two adjacent first ground vias, the third ground via is connected to the ground layer electrical connection. According to the circuit board packaging structure described in Claim 2 or 3, it is characterized in that the circuit board further includes a lead, one end of the lead is electrically connected to the signal via hole, and the other end is electrically connected to the signal trace ; Each set of the second ground vias includes at least two second ground vias, and the lead wire passes through a gap between two adjacent second ground vias. According to the circuit board packaging structure described in claim 4, it is characterized in that the gap between two adjacent second ground vias on both sides of the lead is 0.6-2 mm. According to the circuit board packaging structure described in claim 4, it is characterized in that, between the adjacent first ground vias, between the adjacent second ground vias, between the first ground vias and the A distance between the second ground vias and between the first ground vias and the third ground vias is 0.2-0.6 mm. The circuit board packaging structure according to claim 2, wherein the circuit board packaging structure includes at least two signal via groups; The first ground via group between two adjacent signal via groups is shared; or, The second ground via group between two adjacent signal via groups is shared. According to the circuit board packaging structure described in claim 1, it is characterized in that the circuit board packaging structure is electrically connected to an electronic component, and the electronic component has a grounding pin; The substrate body is provided with a mask groove, the mask groove penetrates at least a part of the substrate body, and the mask groove is arranged around the periphery of the signal via hole group; The mask structure includes: an insulating barrier, filled in the shielding groove, and arranged around the periphery of the signal via hole group; and, The metal covering layer is located between the insulating retaining wall and the groove wall of the shielding groove, and is connected with the insulating retaining wall and the shielding groove; the metal covering layer is connected with the grounding layer and the shielding groove The ground pin of the above-mentioned electronic components is electrically connected. According to the circuit board packaging structure described in claim 8, it is characterized in that the insulating retaining wall is provided with connection holes; The connection hole runs through at least a part of the insulating retaining wall, and a side wall of the connection hole exposes a part of the metal covering layer; The ground pin of the electronic component is disposed in the connection hole, and is electrically connected to the metal covering layer through the sidewall of the connection hole. According to the circuit board packaging structure described in claim 8, the circuit board further includes a lead wire, one end of the lead wire is electrically connected to the signal via hole, and the other end is electrically connected to the signal trace; The horizontal section of the mask groove is C-shaped, and the lead wire passes through the opening of the C-shaped mask groove; wherein, the horizontal section is parallel to the surface of the circuit board. According to the circuit board packaging structure described in claim 10, the opening size of the C-shaped mask groove is 0.6-2mm. The circuit board packaging structure according to claim 8, wherein the circuit board packaging structure includes at least two signal via groups; The mask grooves between two adjacent signal via hole groups are connected, and the mask structures between two adjacent signal via hole groups are shared. The circuit board packaging structure according to any one of claims 1-12, wherein the at least one signal via group includes a pair of differential pair vias. A circuit board component, characterized in that it comprises: an electronic component having a signal pin and a ground pin; and, The circuit board packaging structure according to any one of claims 1-13, the signal pin is electrically connected to the signal via hole of the circuit board packaging structure, and the ground pin is connected to the circuit board packaging structure. The mask structure of the structure is electrically connected. The circuit board component according to claim 14, wherein the electronic component is a connector, and the connector includes: a public terminal having a first signal pin and a first ground pin; and, The female terminal has a second signal pin and a second ground pin; The circuit board packaging structure includes a first circuit board packaging structure and a second circuit board packaging structure: Wherein, the first signal pin is plugged into the signal via hole of the first circuit board packaging structure, and the first ground pin is plugged into the mask structure of the first circuit board packaging structure. connected; the second signal pin is plugged into the signal via hole of the second circuit board packaging structure, and the second ground pin is plugged into the mask structure of the second circuit board packaging structure catch. The circuit board component according to claim 14, wherein the electronic component is a chip, and the chip has signal solder balls and ground solder balls; The signal solder balls are electrically connected to the signal via holes of the circuit board packaging structure, and the ground solder balls are electrically connected to the mask structure of the circuit board packaging structure. An electronic device, characterized in that it comprises: housing; and, The circuit board component as claimed in any one of claims 14-16 is arranged in the housing.

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