TW202307445A - Capacitance measuring system, measuring circuit and calculation device - Google Patents

Abstract

A capacitance measuring system, which includes: an alternating power, a measuring circuit and a calculation device. The measuring circuit includes a circuit input electrically connected to the alternating power, a circuit output electrically connected to the calculation device, an operational amplifier, and a switch device electrically connected to a capacitor under test. Wherein when the switch device is turned off, the measuring circuit outputs at least a output signal, and when the switch device is turned on, the measuring circuit outputs an another output signal, and the calculation device calculates a first gain and a second gain according to the output signals, and calculates a capacitance of the capacitor under test according to the first gain and the second gain.

Description

Capacitance measurement system, measurement circuit and calculation device

The present invention relates to a measurement system, a measurement circuit and a calculation device, in particular to a capacitance measurement system, a measurement circuit and a calculation device capable of measuring capacitance values.

Before the electrical test of some products (such as wafer test), it may be necessary to measure the capacitance to be used so as not to affect the electrical test. The current way of measuring capacitance is to charge and discharge the capacitance to be measured by supplying current from a power supply, and estimate the capacitance value of the capacitance to be measured according to the charging and discharging time. However, this measurement method not only takes a long time to measure, but also in the process of charging and discharging the capacitor, since the measurement environment (such as a measuring machine or measuring instrument, etc.) usually produces parasitic capacitance, it is easy to cause the measurement error. If you want to eliminate the parasitic capacitance, you must first calculate the capacitance value of the parasitic capacitance, but the capacitance value of the parasitic capacitance must be calculated by adjusting a large number of measurement parameters, which will increase the time cost and may also be measured mistake.

In addition, the current technology can accurately measure the level of capacitance value has its limitations. For example, the current measuring machine can only support the measurement of capacitance values above the nanofarad (nF) level (for example, the capacitance value is greater than or equal to 1nF). If the capacitance value of the picofarad (pF) level is directly measured (for example, the capacitance value is less than 1.0nF), a huge error will be generated, so it does not meet the requirement.

In view of this, the present invention provides a capacitance measuring system, a measuring circuit and a computing device to solve the above problems.

An object of the present invention is to provide a capacitance measurement system, including: an AC power supply, a measurement circuit, and a computing device. The measurement circuit includes a circuit input terminal electrically connected to the AC power supply, a circuit output terminal electrically connected to the computing device, an operational amplifier and a switcher, wherein the switcher is electrically connected to the capacitance to be measured. Wherein, the measurement circuit outputs at least one output signal when the switch is turned off, and another output signal is output by the measurement circuit when the switch is turned on, and the calculation device calculates the first amplification of the operational amplifier according to the output signals. gain and the second amplification gain, and calculate the capacitance value of the capacitor to be measured according to the first amplification gain and the second amplification gain.

Another object of the present invention is to provide a measurement circuit, which is set in the aforementioned capacitance measurement system, and includes a circuit input terminal electrically connected to the AC power supply of the capacitance measurement system, and electrically connected to the computing device of the capacitance measurement system. A circuit output end, an operational amplifier, and at least one switcher electrically connected to the operational amplifier, wherein the AC power supply is electrically connected to the operational amplifier through the circuit input end, and at least one switcher is electrically connected to the capacitor under test .

Yet another object of the present invention is to provide a computing device, which is installed in the aforementioned capacitance measuring system, and is used for electrically connecting with the circuit output end of the measuring circuit of the capacitance measuring system.

The implementation and operation principles of the capacitance measurement system, measurement circuit and calculation device of the present invention will be described below through multiple embodiments. Those skilled in the technical field of the present invention can understand the characteristics and effects of the present invention through the above-mentioned embodiments, and can combine, modify, replace or transfer based on the spirit of the present invention.

It should be noted that, herein, unless otherwise specified, “an” element is not limited to a single element, but may also refer to one or more elements.

In addition, descriptions such as "when..." or "when" in this disclosure represent aspects such as "now, before, or after", and are not limited to situations that occur at the same time, which is described first here. In this disclosure, similar descriptions such as “disposed on” refer to the corresponding positional relationship between the two components, and do not limit whether there is contact between the two components, unless otherwise specified, which will be described here first. Furthermore, when the present disclosure records multiple functions, if the word "or" is used between the functions, it means that the functions can exist independently, but it does not rule out that multiple functions can exist simultaneously.

The ordinal numbers used in this article, such as "first", "second", etc., are used to modify the request element, which does not imply and represent any previous ordinal number of the request element, nor does it represent a request The order of an element with another claimed element, or the order of the manufacturing method, these ordinal numbers are used only to clearly distinguish a claimed element with a certain designation from another claimed element with the same designation.

In addition, words such as "connected" or "coupled" in the description and claims not only refer to direct connection with another element, but also refer to indirect connection or electrical connection with another element. In addition, the electrical connection includes direct connection, indirect connection, or communication between two components by radio signals.

In addition, in the description and claims, the terms "about", "approximately", "essentially" and "approximately" usually mean that the difference between a value and a given value is within 10% of the given value, or Within 5%, or within 3%, or within 2%, or within 1%, or within 0.5%. The quantities given here are approximate quantities, that is, "about", "approximately", "approximately", "approximately", "approximately" and "approximately" may still be implied in the absence of specific instructions "about", "approximately", "substantially", The meaning of "substantially" and "approximately". In addition, the terms "the range is from the first value to the second value" and "the range is between the first value to the second value" indicate that the range includes the first value, the second value and other values therebetween.

In addition, each element can be implemented as a single circuit or an integrated circuit in an appropriate manner, and can include one or more active elements, such as transistors or logic gates, or one or more passive elements, such as resistors, capacitors , or inductance, but not limited thereto. The components can be connected to each other in a suitable manner, for example, using one or more lines to form a series connection or a parallel connection according to the input signal and the output signal respectively. In addition, each element can allow input signals and output signals to enter and exit sequentially or in parallel. The above configurations are determined according to the actual application.

In addition, technical features of different embodiments disclosed in this disclosure can be combined to form another embodiment.

In addition, in this article, terms such as "system", "equipment", "device", "module", or "unit" refer to an electronic component or a digital circuit composed of a plurality of electronic components, analogous circuits, or other broader circuits, and unless otherwise specified, they do not necessarily have a hierarchical or hierarchical relationship.

FIG. 1 is a schematic diagram of the basic structure of a capacitance measuring system 1 according to an embodiment of the present invention. As shown in FIG. 1 , the capacitance measurement system 1 includes a measurement circuit 10 , a computing device 20 and an AC power source 30 . The measurement circuit 10 may include a circuit input terminal IN, a circuit output terminal OUT, an operational amplifier 14 and a plurality of switches 11-13 (hereinafter referred to as the first switcher 11 to the third switcher 13), and wherein A switch (such as the third switch 13 ) is electrically connected to a capacitor 40 to be measured. The circuit input terminal IN is electrically connected to the AC power source 30 . The circuit output terminal OUT is electrically connected to the computing device 20 . The calculating device 20 can calculate according to the output result of the circuit output terminal OUT, and can output the capacitance value of the capacitor 40 to be tested.

The AC power source 30 can provide an input signal Vin to the measurement circuit 10 . The measurement circuit 10 can output different output signals Vo to the computing device 20 at different time points through the switching of at least one of the switches 11-13, for example, when at least one of the switches 11-13 (such as FIG. 2 When the third switcher 13) is turned off (turn off), the measurement circuit 10 can output at least one output signal Vo to the computing device 20, and the computing device 20 can calculate the output signal of the operational amplifier 14 according to the at least one output signal Vo. A first amplification gain; when at least one of the switches 11-13 (for example, the third switch 13 in FIG. 2 ) is turned on (turn on), the measurement circuit 10 can output another output signal to the computing device 20, And the calculation device 20 can calculate a second amplification gain of the operational amplifier 14 according to the at least one output signal Vo obtained previously and the output signal Vo obtained at present, and then calculate according to the first amplification gain and the second amplification gain The capacitance value of the capacitor 40 to be tested. Thereby, the present invention can measure the capacitance value of the capacitor 40 to be measured.

Next, details of each element will be described.

First, details of the AC power supply 30 will be described.

The AC power source 30 can provide the input signal Vin to the circuit input terminal IN of the measurement circuit 10 . In one embodiment, the AC power supply 30 can be, for example, various waveform generators (arbitrary waveform generator, AWG), which can provide signals of waveforms such as sine wave, square wave, triangular wave, etc., and is not limited thereto; for convenience of description, the following All take the AC power supply 30 providing a sine wave as an example. In addition, in one embodiment, the frequency of the signal generated by the AC power source 30 can be modulated, and is not limited thereto.

Next, details of the computing device 20 will be described.

In one embodiment, the computing device 20 may be, for example, a processor including a computer program product or firmware stored on a non-transitory computer readable medium for performing specific computing functions. In one embodiment, the computing device 20 can be set in a measuring machine (not shown in the figure), or can be set in a computer (not shown in the figure), but is not limited thereto. In one embodiment, the computing device 20 can also be an integrated circuit with computing functions, which can be loaded with special firmware or software to realize the computing functions. It should be noted that the aspect of the computing device 20 is not limited thereto.

Next, details of the measurement circuit 10 will be described.

The measurement circuit 10 can output different output signals Vo to the computing device 20 through switching of the switches 11 - 13 , for example. FIG. 2 is a detailed circuit diagram of the measuring circuit 10 according to the first embodiment of the present invention, and please refer to FIG. 1 at the same time.

As shown in Figure 2, the measurement circuit 10 may include a circuit input terminal IN, a circuit output terminal OUT, a first switcher 11, a second switcher 12, a third switcher 13, an operational amplifier 14, a rectifier 15, a first A resistor 16 and a second resistor 17 . The first switch 11 may include a first end 11a and a second end 11b. The second switch 12 may include a first end 12a and a second end 12b. The third switch 13 may include a first end 13a and a second end 13b, wherein the second end 13b of the third switch 13 may be electrically connected to the capacitor 40 to be measured. The operational amplifier 14 may include a first input terminal 14a, a second input terminal 14b and an output terminal 14c.

The first switch 11 can be arranged between the circuit input terminal IN and the circuit output terminal OUT, for example, the first terminal 11a of the first switch 11 can be electrically connected to the circuit input terminal IN, and the second terminal 11a of the first switch 11 can be electrically connected to the circuit input terminal IN. The terminal 11 b can be electrically connected to the anode terminal of the rectifier 15 and electrically connected to the circuit output terminal OUT through the rectifier 15 .

The operational amplifier 14 and the second switcher 12 can be arranged between the circuit input terminal IN and the circuit output terminal OUT, for example, the first input terminal 14a of the operational amplifier 14 can be electrically connected with the circuit input terminal IN, and the output terminal of the operational amplifier 14 14c can be electrically connected to the first terminal 12a of the second switch 12, the second terminal 12b of the second switch 12 can be electrically connected to the anode terminal of the rectifier 15, and is electrically connected to the circuit output terminal OUT through the rectifier 15 . In addition, the output terminal 14c of the operational amplifier 14 can also be electrically connected to the first resistor 16, for example, the output terminal 14c, the first terminal 12a of the second switch 12, and the first resistor 16 can be electrically connected to the measuring circuit 10. A node A. In addition, the second input terminal 14 b of the operational amplifier 14 , the first resistor 16 , the second resistor 17 and the third switch 13 can be electrically connected to a node B of the measurement circuit 10 .

The first terminal 13a of the third switch 13 can be electrically connected to the second input terminal 14b of the operational amplifier 14, the first resistor 16 and the second resistor 17 at node B, and the second terminal 13b of the third switch 13 can be It is electrically connected with the capacitor 40 to be tested.

In one embodiment, the AC power supply 30 can be electrically connected to the first terminal 11a of the first switch 11 and the first input terminal 14a of the operational amplifier 14 respectively through the circuit input terminal IN. Therefore, the input terminal 14a provided by the AC power supply 30 The signal Vin can enter the signal path of the first switch 11 or the signal path of the operational amplifier 14 .

In an embodiment, the first switch 11 , the second switch 12 , and the third switch 13 may be, for example, relays, switches or multiplexers, and are not limited thereto. In an embodiment, the aforementioned switches 11 , 12 , 13 may be, for example, mechanical switches or electronic switches, and are not limited thereto. In an embodiment, the aforementioned switches 11 , 12 , 13 may include transistors, or may be transistors themselves, but not limited thereto. In one embodiment, the first switch 11, the second switch 12 or the third switch 13 can be controlled by an external control element (such as but not limited to a timing controller or other mechanical controller, not shown in the figure), and The state of being on or off is shown, but not limited thereto.

In one embodiment, the operational amplifier 14 may be, for example, a non-inverting amplifier, wherein the first input terminal 14a may be a positive input terminal, and the second input terminal 14b may be a negative input terminal, but not limited thereto.

In one embodiment, the rectifier 15 can be, for example, a diode, or an integrated circuit including a diode, wherein the anode terminals of the diode can be electrically connected to the first switch 11 and the second switch 12 respectively. , and the cathode terminal of the diode can be electrically connected to the circuit output terminal OUT, and is not limited thereto.

Next, the operation of the measurement circuit 10 and the computing device 20 will be described.

In one embodiment, the first switch 11, the second switch 12 and the third switch 13 can be turned on at different time points, so the input signal Vin can pass through different signal paths at different time points, and the circuit output terminal OUT Different output signals Vo can be output at different time points. In an embodiment, the conduction period of the first switch 11 does not overlap with the conduction periods of the other switches 12 and 13 . In an embodiment, the conduction period of the second switch 12 may partially overlap with the conduction period of the third switch 13 .

In more detail, in one embodiment, during a first period, the first switch 11 can be turned on, and the second switch 12 and the third switch 13 can be turned off. At this time, the signal path where the first switcher 11 is located is in a conductive state, while the signal paths where the second switcher 12 and the third switcher 13 are located are in a non-conductive state, so the input signal Vin provided by the AC power supply 30 can pass through the first switcher. The device 11 is rectified by the rectifier 15 to form a first output signal, and then the first output signal is output to the computing device 20 at the circuit output terminal OUT. Since there is no operational amplifier in the signal path, the first output signal can be the same as or similar to the rectified input signal Vin, so the first output signal can be regarded as a DC signal after the rectified input signal Vin.

In one embodiment, during a second period, the second switch 12 can be turned on, and the first switch 11 and the third switch 13 can be turned off. At this time, the signal path where the second switcher 12 is located is in a conductive state, while the paths where the first switcher 11 and the third switcher 13 are located are in a non-conductive state, so the input signal Vin can pass through the operational amplifier 14 (the signal is thus amplified ), the second switcher 12 and the rectifier 15, and rectified by the rectifier 15 to form a second output signal, and then the second output signal is output to the computing device 20 at the circuit output terminal OUT. Since the operational amplifier 14 is provided on the signal path, the second output signal can be regarded as an amplified and rectified DC signal of the input signal Vin.

At this time, the calculation device 20 can calculate the current gain of the operational amplifier 14 (that is, the first amplification gain) through the previously obtained first output signal and the currently obtained second output signal, wherein the first amplification gain can be expressed as Formula (1): Av1=Vo2/Vo1;...Equation (1) Av1 is defined as the first amplification gain, Vo1 is defined as the potential of the first output signal, and Vo2 is defined as the potential of the second output signal.

In addition, according to the configuration of the operational amplifier 14, the first resistor 16 and the second resistor 17, it can be seen that the first amplification gain (Av1) can also be expressed as formula (2): Av1=1+(R1/R2);...Equation (2) R1 is defined as the resistance value of the first resistor 16 , and R2 is defined as the resistance value of the second resistor 17 . It should be noted that R1 and R2 are preset values, that is, the resistance values of the first resistor 16 and the second resistor 17 are preset values (ie known parameters).

In one embodiment, during a third period, the second switch 12 and the third switch 13 can be turned on, and the first switch 11 can be turned off. At this time, the signal paths where the second switcher 12 and the third switcher 13 are located are in a conductive state, while the signal path where the first switcher 11 is located is in a non-conductive state, so the input signal Vin will pass through the operational amplifier 14 (the signal is thus amplified ), the second switcher 12 and the rectifier 15, and a third output signal is formed after being rectified by the rectifier 15, and then the third output signal is output to the computing device 20 at the circuit output terminal OUT. Since there is an operational amplifier 14 on the signal path, the third output signal can be regarded as the amplified and rectified DC signal of the input signal Vin, and since the third switch 13 is turned on, the amplification gain of the operational amplifier 14 will be affected. Influenced by the reactance value Xc of the capacitor 40 to be tested, the potentials of the third output signal and the second output signal are different.

At this time, the calculation device 20 can calculate the current gain of the operational amplifier 14 (that is, the second amplification gain) according to the previously obtained first output signal and the currently obtained third output signal, wherein the second amplification gain can be expressed as a formula (3): Av2=Vo3/Vo1;...Equation (3) Av2 is defined as the second amplification gain, and Vo3 is defined as the potential of the third output signal.

In addition, according to the configuration of the operational amplifier 14, the first resistor 16, the second resistor 17, and the capacitor to be measured 40, it can also be known that the second amplification gain can also be expressed as formula (4): Av2=1+[R1/(R2//Xc)] =1+[R1/(R2*Xc)/(R2+Xc)] =1+[(R1*R2+R1*Xc)/(R2*Xc)] =1+(R1/Xc)+ (R1/R2) =(R1/Xc)+Av1;......Equation (4) Wherein Xc is defined as the reactance value of the capacitor 40 to be tested, and R2//Xc is defined as the resistance value of the second resistor 17 connected in parallel with the capacitor 40 to be tested.

In addition, in one embodiment, after the calculation module 20 calculates the first amplification gain and the second amplification gain through formula (1) and formula (3), the calculation module 20 can The gain, the resistance value of the first resistor and the formula (4) calculate the reactance value of the capacitor 40 to be measured (for example, Xc=R1/(Av2−Av1)). Also, the reactance value of the capacitor 40 to be measured can also be expressed as formula (5): Xc=1/(2πfC);......Equation (5) Wherein, π is the circumference ratio, f is the frequency of the input signal Vin (which is an adjustable value and is a known parameter), and C is the capacitance value. Therefore, after the calculation module 20 calculates the reactance value of the capacitor 40 to be tested, the capacitance value of the capacitor 40 to be tested can be calculated according to formula (5).

In this way, the capacitance value of the capacitor 40 to be tested can be calculated by the calculation module 20 .

To make the description clearer, the operation process of the computing device 20 is summarized below. FIG. 3 is an operation flowchart of the computing device 20 according to an embodiment of the present invention, and please refer to FIG. 1 and FIG. 2 at the same time.

As shown in FIG. 3 , first step S31 is executed, and the computing device 20 obtains the first output signal output by the measurement circuit 10 . Then step S32 is executed, and the computing device 20 obtains the second output signal output by the measurement circuit 10 . Then step S33 is executed, and the calculation device 20 calculates the first amplification gain of the operational amplifier 14 according to the first output signal and the second output signal (refer to formula (1)), wherein the first amplification gain can be regarded as the measurement circuit 10 is not The gain of the operational amplifier 14 when the capacitor 40 to be tested is connected. Then step S34 is executed, and the computing device 20 obtains the third output signal output by the measuring circuit 10 . Then step S35 is executed, and the calculation device 20 calculates the second amplification gain of the operational amplifier 14 according to the first output signal and the third output signal (refer to formula (3)), wherein the second amplification gain can be regarded as the measurement circuit 10 connected The gain of the operational amplifier 14 when the capacitor 40 is to be measured. Then step S36 is executed, and the calculation device 20 calculates the reactance value of the capacitor 40 to be measured according to the first amplification gain and the second amplification gain (refer to formula (4)). Then step S37 is executed, and the calculation device 20 calculates the capacitance value of the capacitor under test 40 according to the reactance value of the capacitor under test 40 and the frequency of the input signal Vin (refer to formula (5)).

In this way, the operation flow of the computing device 20 can be understood.

FIG. 4 is a schematic diagram of the experimental data results of an embodiment of the present invention, which shows the measured capacitance values obtained by measuring a plurality of capacitors 40 to be measured by the capacitance measurement system 1 of FIG. 2 (hereinafter referred to as measurement value C2), wherein the actual capacitance value (hereinafter referred to as the target value C1) of the capacitor 40 to be measured is known here, and the comparison result between the target value C1 and the measured value C2 is obtained through the computing device 20, and the target value C1 can be For example, an actual capacitance value, or a standard value tested by a standard laboratory, has a high degree of accuracy and can be used as a basis for numerical comparison or reference. Among them, C1 represents the capacitance value of the target value (unit is picofarad, pF), C2 represents the capacitance value of the measured value (unit is picofarad, pF), Vo1 represents the potential of the first output signal (unit is volt, V), Vo2 represents the potential of the second output signal (in volts, V), Vo3 represents the potential of the third output signal (in volts, V), Av1 represents the first amplification gain, Av2 represents the second amplification gain, and Freq represents the input signal The frequency of Vin (the unit is Hertz, Hz), and Xc represents the reactance value of the capacitor 40 to be tested (the unit is ohm, ohm).

Next, the actual calculation method of the present invention is further described with reference to the data in FIG. 4 by using the circuit structure in FIG. 2 with parameter settings. Wherein, the AC power supply 30 in FIG. 2 can be set to 0.2 (V), the first resistor 16 can be set to 25000 (ohm), and the second resistor 17 can be set to 5000 (ohm).

As shown in FIG. 4 , when the target value C1 of the capacitor 40 to be tested is 33 (pF), the frequency at which the AC power supply 30 provides the input signal Vin is set to 1091000 (Hz). When the first switch 11 is turned on and the other switches are turned off, the computing device 20 detects that the first output signal Vo1 is 0.194 (V). When the second switch is turned on and the other switches are turned off, the computing device 20 detects that the second output signal Vo2 is 1.19 (V). When the second switch 12 and the third switch 13 are turned on and the first switch 11 is turned off, the calculation device 20 detects that the third output signal Vo3 is 2.292 (V). Afterwards, the calculation device 20 calculates the first amplification gain (that is, Av1=Vo2/Vo1=1.19/0.194=6.134) according to formula (1), and the first amplification gain Av1 is known to be about 6.134 from the above formula, and the calculation device 20 according to The formula (3) calculates the second amplification gain (that is, Av2=Vo3/Vo1=2.292/0.194=11.8144), and the second amplification gain Av2 is about 11.814 from the above formula. Afterwards, the calculation device 20 calculates the reactance value Xc according to the formula (4) (that is, Xc=R1/(Av2-Av1)=25000/(11.814-6.134)=4401.089), and the reactance of the capacitor 40 to be measured is obtained from the above formula The value Xc is 4401.089 (ohm). Afterwards, the calculation device 20 calculates the measurement value C2 according to the formula (5) (that is, C2=1/(2πfXc)=1/(2π.1091000.4401.088929=33.163.10 ⁻¹² ), so the measurement of the capacitance to be measured 40 The value C2 is about 33.163 (pF). Accordingly, the error value between the target value C1 and the measured value C2 of the capacitance to be measured 40 can be calculated (ie |(C1-C2)|/C1=|(33. 10 ^-12 -33.163.10 ^-12 )|/ 33.10 ^-12 =0.00494), from the above formula, it can be known that the error value between the target value C1 and the measured value C2 of the capacitance 40 to be measured is about 0.494%.

When the target value C1 of the capacitance under test 40 is 305 (pF), the frequency of the input signal Vin provided by the AC power supply 30 is set to 329000 (Hz). When the first switch 11 is turned on and the other switches are turned off, the computing device 20 detects that the first output signal Vo1 is 0.194 (V). When the second switch is turned on and the other switches are turned off, the computing device 20 detects that the second output signal Vo2 is 1.19 (V). When the second switch 12 and the third switch 13 are turned on and the first switch 11 is turned off, the calculation device 20 detects that the third output signal Vo3 is 4.24 (V). Afterwards, the calculation device 20 calculates the first amplification gain Av1 to be about 6.134 and the second amplification gain Av2 to be about 21.856 according to formulas (1), (3), (4) and (5), and the reactance value Xc of the capacitance to be measured 40 It is about 1590.164 (ohm), and the measured value C2 of the capacitor under test 40 is about 304.371 (pF), wherein the error value between the target value C1 of the capacitor under test 40 and the measured value C2 is about 0.206%.

When the target value C1 of the capacitance under test 40 is 557 (pF), the frequency at which the AC power supply 30 provides the input signal Vin is set to 228000 (Hz). When the first switch 11 is turned on and the other switches are turned off, the computing device 20 detects that the first output signal Vo1 is 0.194 (V). When the second switch is turned on and the other switches are all turned off, the second output signal Vo2 is 1.19 (V). When the second switch 12 and the third switch 13 are turned on, and when the first switch 11 is turned off, the third output signal Vo3 is 4.24 (V). Afterwards, the calculation device 20 calculates the first amplification gain Av1 to be about 6.134 and the second amplification gain Av2 to be about 26.082 according to formulas (1), (3), (4) and (5), and the reactance value Xc of the capacitance to be measured 40 It is about 1253.23 (ohm), and the measured value C2 of the capacitor under test 40 is about 557.282 (pF), wherein the error value between the target value C1 of the capacitor under test 40 and the measured value C2 is about 0.051%.

When the target value C1 of the capacitance under test 40 is 792 (pF), the frequency of the input signal Vin provided by the AC power supply 30 is set to 184000 (Hz). When the first switch 11 is turned on and the other switches are turned off, the computing device 20 detects that the first output signal Vo1 is 0.194 (V). When the second switch is turned on and the other switches are all turned off, the second output signal Vo2 is 1.19 (V). When the second switch 12 and the third switch 13 are turned on, and when the first switch 11 is turned off, the third output signal Vo3 is 5.63 (V). Afterwards, the calculation device 20 calculates the first amplification gain Av1 to be about 6.134 and the second amplification gain Av2 to be about 29.021 according to formulas (1), (3), (4) and (5), and the reactance value Xc of the capacitance to be measured 40 It is about 1092.342 (ohm), and the measured value C2 of the capacitor under test 40 is about 792.253 (pF), wherein the error value between the target value C1 of the capacitor under test 40 and the measured value C2 is about 0.032%.

As shown in FIG. 4 , the error between the measured value and the target value displayed by each set of experimental data is less than 1%, which shows that the capacitance measuring system 1 of the present invention has good accuracy.

In addition, the measurement circuit 10 of the present invention may have different implementation aspects. FIG. 5 is a circuit diagram of a measurement circuit 10 according to a second embodiment of the present invention, and FIG. 6 is a circuit diagram of a measurement circuit 10 according to a third embodiment of the present invention. Please refer to FIGS. 1 to 4 at the same time.

As shown in Fig. 2, Fig. 5 and Fig. 6, the measurement circuit 10 of the second embodiment (Fig. 5) and the third embodiment (Fig. 6) is roughly similar to that of the first embodiment (Fig. 2), so the following only focuses on Differences are explained.

First, the structural part will be described.

Regarding the structure of the second embodiment ( FIG. 5 ), compared with the first embodiment, the measurement circuit 10 of the second embodiment further includes a fourth switch 18 and a fifth switch 19 . In addition, the third switch 13 of the second embodiment is indirectly connected to the capacitor 40 to be tested. For example, one end of the fourth switch 18 can be electrically connected to the second end 13b of the third switch 13, and the fourth switch 18 The other end of the switch 19 can be electrically connected to a reference capacitor 50, and one end of the fifth switch 19 can be electrically connected to the second end 13b of the third switch 13, and the other end of the fifth switch 19 can be connected to the capacitance to be measured. 40 are electrically connected, so that the third switch 13 is electrically connected in series with the fourth switch 18 and the fifth switch 19 respectively. In one embodiment, the conduction of the fourth switch 18 and the fifth switch 19 can also be controlled by an external control element (not shown in the figure), but it is not limited thereto.

Regarding the structure of the third embodiment ( FIG. 6 ), compared with the first embodiment, the measurement circuit 10 of the third embodiment ( FIG. 6 ) further includes a fourth switch 18 . The third switcher 13 of the third embodiment is directly connected to the capacitor 40 to be tested, and one end of the fourth switcher 18 can be electrically connected to the first end 13a of the third switcher 13, so that the third switcher 13 is connected to the first end 13a of the third switcher 13. The four switches 18 form a parallel electrical connection, the other end of the fourth switch 18 can be electrically connected to a reference capacitor 50, the second end 13b of the third switch 13 can be electrically connected to the capacitor 40 to be measured, through The third switch 13 controls the electrical connection of the capacitor under test 40 and controls the electrical connection of the reference capacitor 50 through the fourth switch 18, so that the circuit has a simple structure and reduces the cost of circuit manufacturing.

In an embodiment of FIG. 5 or FIG. 6, the reference capacitor 50 may have the same specifications as the capacitor 40 to be tested (for example, have the same capacitance value level or be the same capacitance value level distance, and not limited thereto). The target value (such as the actual capacitance value) of the capacitor 50 can be a known parameter, and the target value of the reference capacitor 50 is, for example, a standard value detected by a standard laboratory, which has a high degree of accuracy, so that the reference capacitor 50 can be used as a comparison or Reference benchmark. Therefore, the reference capacitor 50 can be used as a reference for the measurement results of the capacitance measurement system 1 .

Accordingly, before measuring the capacitance to be measured 40, the measurement circuit 10 in FIG. 5 or FIG. 6 can first measure the reference capacitance 50, and adjust the most suitable The frequency of the input signal Vin is then measured for the capacitor 40 to be measured. Next, the details of the operation process of the second embodiment and the third embodiment will be described.

In the second embodiment (FIG. 5), during the first period, the first switch 11 is turned on, and the other switches 12, 13, 18, and 19 are turned off. At this time, the measurement circuit 10 can output the first output signal to the computer. device 20. Also during the second period, the second switch 12 is turned on, and the other switches 11, 13, 18, 19 are turned off. At this time, the measurement circuit 10 can output the first output signal to the computing device 20, and the computing device 20 can therefore calculate The first amplification gain of the operational amplifier 14. During the third period, the second switcher 12, the third switcher 13, and the fourth switcher 18 are turned on, and the remaining switches 11 and 19 are turned off. At this time, the measurement circuit 10 can output a third output signal to the computing device 20, Therefore, the calculation device 20 can calculate the second amplification gain of the operational amplifier 14 , and then calculate a measurement value of the reference capacitor 50 .

Also, in the third embodiment (FIG. 6), during the first period, the first switch 11 is turned on, and the remaining switches 12, 13, and 18 are turned off. At this time, the measurement circuit 10 can output the first output signal to the calculation device 20. Also during the second period, the second switch 12 is turned on, and the other switches 11, 13, 18 are turned off. At this time, the measurement circuit 10 can output the first output signal to the computing device 20, and the computing device 20 can therefore calculate the operational amplifier The first amplification gain of 14. During the third period, the second switcher 12 and the fourth switcher 18 are turned on, and the remaining switches 11 and 13 are turned off. At this time, the measurement circuit 10 can output the third output signal to the computing device 20, and the computing device 20 can therefore calculate The second amplification gain of the operational amplifier 14 is obtained, and then a measured value of the reference capacitor 50 is calculated. The third embodiment can have fewer switches, has a simple structure, and can reduce circuit design costs.

Afterwards, by comparing the measured value of the reference capacitance 50 with the target value, the current accuracy of the capacitance measurement system 1 can be obtained. In one embodiment, by modulating the frequency of the input signal Vin provided by the AC power supply 30 , the accuracy of the capacitance measuring system 1 can be adjusted. In one embodiment, according to the difference between the measured value of the reference capacitor 50 and the target value, the frequency of the input signal Vin is continuously modulated to find the frequency corresponding to the minimum difference between the measured value and the target value, wherein This frequency can be regarded as a frequency suitable for the specification of the reference capacitor 50 or the capacitor under test 40 . After the appropriate frequency is determined, the measurement of the capacitance to be measured 40 can be performed.

In addition, in one embodiment, the capacitance measuring system 1 can automatically perform the steps of adjusting the frequency and finding a suitable frequency. For example, the capacitance measuring system 1 can include a controller (not shown in FIGS. 5 and 6 ), a memory Body (not shown in Figures 5 and 6) and a processor (not shown in Figures 5 and 6), wherein the controller can be used to control the AC power supply 30 to modulate the frequency of the input signal Vin within a specific period or at a preset number of times , the calculation device 20 can compare the difference between the measured value of each frequency and the target value, the memory can record each comparison result, and the processor can select the frequency corresponding to the result with the smallest difference from the comparison results as An appropriate frequency, so that the AC power supply 30 outputs an output signal of an appropriate frequency.

In one embodiment, the capacitance measurement system 1 stores the capacitance value or the data of the capacitance value range corresponding to the frequency of the input signal Vin. When the target value C1 of the reference capacitor 50 is a known parameter, the target value of the reference capacitor 50 The value C1 is input into the capacitance measurement system 1, and the AC power supply 30 can generate a suitable frequency corresponding to the target value of the reference capacitor 50, wherein the setting of the suitable frequency can be as follows: first, the AC power supply 30 provides an input signal Vin of any frequency, when When the first switch 11 is turned on and the rest of the switches are off, the computing device 20 detects the first output signal Vo1; when the second switch is turned on and the rest of the switches are off, the computing device 20 detects The second output signal Vo2, when the second switcher 12, the third switcher 13 and the fourth switcher 18 are turned on, and when the first switcher 11 and the fifth switcher 19 are turned off, the computing device 20 detects the third The output signal Vo3, then the calculation device 20 calculates the first amplification gain Av1 and the second amplification gain Av2 according to the formulas (1) and (3), and the calculation device 20 then calculates the first amplification gain Av1, the second amplification gain Av2, the formula ( 2) and (4) calculate the reactance value of the reference capacitor 50 (eg Xc=R1/(Av2-Av1)).

Since the target value of the reference capacitor 50 is a known parameter, the reactance value of the reference capacitor 50 is also calculated, and the appropriate frequency f=1/(2πC1Xc) provided by the AC power supply 30 can be obtained by deriving the formula (5). The calculation can be performed by a processor (not shown) in the capacitance measurement system 1, and then the capacitance measurement system 1 uses a suitable frequency as the input signal Vin of the AC power supply 30, and the target value C1 of the reference capacitor 50 and the corresponding AC power supply 30 provide The appropriate frequency can be stored in the memory (not shown) in the capacitance measuring system 1, so that when the same capacitance value or capacitance value range is input later, the controller (not shown) of the capacitance measuring system 1 is The AC power supply 30 can be controlled to generate an input signal Vin with an appropriate frequency corresponding to the input capacitance value. The above-mentioned method of obtaining the frequency of the input signal Vin has the advantage of being quickly obtained according to the corresponding capacitance value, and the measurement error of the capacitance measurement system 1 has a certain precision.

In addition, the method of obtaining the frequency of the input signal can be further matched with the method in the previous embodiment, that is, the basic value of the frequency adjustment of the input signal Vin of the AC power supply 30 is first obtained by calculation, and then within a specific period or in a preset period The AC power supply 30 is controlled to adjust the frequency of the input signal Vin to obtain the measured value of the reference capacitor 50. The calculation device 20 then compares the difference between the measured value of each frequency and the target value, and the memory can record each frequency. The processor then selects the frequency of the input signal Vin corresponding to the result with the smallest difference from the comparison results as an appropriate frequency. Because there may be parasitic elements (parasitic elements) in the measurement circuit 10, which will affect the measurement circuit 10 and cause errors in the results of the measurement values. In order to reduce the influence of parasitic elements on the measurement circuit 10, within a specific period Or control the frequency of the AC power supply 30 to modulate the input signal Vin at a preset number of times, and use the adjustment of the frequency to further obtain the output frequency of the AC power supply 30 suitable for the reference capacitor 50 or the capacitor to be measured 40, so that the measurement of the capacitance measurement system 1 The error value is minimized, and the frequency acquisition process of the AC power supply 30 has the advantages of both efficiency and accuracy.

FIG. 7 is an experimental data diagram of frequency modulation of an input signal according to an embodiment of the present invention.

As shown in FIG. 7 , when the target value C1 of the reference capacitor 50 is 33 (pF), when the frequency of the input signal Vin is not adjusted to an appropriate frequency (for example, when the frequency is 1000000 Hz), the measured value of the reference capacitor 50 C2 is 34.847 (pF), and the error value between the measured value C2 and the target value C1 is about 5.597%. And when the frequency of the input signal Vin is an appropriate frequency (for example, when the frequency is 1090000Hz), the measured value C2 of the reference capacitor 50 is 33.133 (pF), and the error value between the measured value C2 and the target value C1 is about 0.403%.

As shown in FIG. 7, when the target value C1 of the reference capacitor 50 is 305 (pF), and the frequency of the input signal Vin is not adjusted to a suitable frequency (for example, when the frequency is 300000 Hz), the reference capacitor 50 The measured value C2 is 281.261 (pF), and the error value between the measured value C2 and the target value C1 is about 7.783%. And when the frequency of the input signal Vin is a suitable frequency (for example, when the frequency is 333000Hz), the measured value C2 of the reference capacitor 50 is 305.437 (pF), so the error value between the measured value C2 and the target value C1 is about is 0.143%.

As shown in FIG. 7, when the target value C1 of the reference capacitor 50 is 557 (pF), when the frequency of the input signal Vin is not adjusted to an appropriate frequency (for example, when the frequency is 200000 Hz), the reference capacitor 50 The measured value C2 is 505.614 (pF), and the error value between the measured value C2 and the target value C1 is about 9.225%. And when the frequency of the input signal Vin is a suitable frequency (for example, when the frequency is 230000 Hz), the measured value C2 of the reference capacitor 50 is 557.281 (pF), so the error value between the measured value C2 and the target value C1 is about 0.05%.

Accordingly, each set of experimental data shows that when the frequency of the input signal Vin is adjusted to an appropriate frequency, the error between the measured value and the target value can be greatly reduced. It can be seen from this that the accuracy of the capacitance measuring system 1 can be changed indeed by modulating the frequency of the input signal Vin.

By setting an appropriate frequency mechanism, the influence of parasitic capacitance in the measurement environment can be greatly reduced. Moreover, by frequency modulation, the capacitance measurement system 1 can support capacitance measurement with a smaller capacitance (for example, pF level), thus solving the problem of capacity limitation in capacitance measurement in the prior art.

It is verified by the above experiments that the appropriate frequency can indeed make the error value between the measured value C2 of the reference capacitor 50 and the target value C1 smaller than a preset value (for example, smaller than 1%). Afterwards, the measurement of the capacitance under test 40 having the same specifications as the reference capacitance 50 can be performed according to an appropriate frequency. Next, the details of the second embodiment ( FIG. 5 ) and the third embodiment ( FIG. 6 ) when measuring the capacitor 40 to be measured will be described.

In the second embodiment, when the appropriate frequency is determined, the measurement circuit 10 can output the corresponding first output signal and second output signal. Afterwards, the second switcher 12, the third switcher 13 and the fifth switcher 19 can be turned on, while the remaining switches 11, 18 are turned off. At this time, the measurement circuit 10 can output the third output signal to the computing device 20, and calculate The device 20 can calculate the second amplification gain of the operational amplifier 14 , and then calculate the capacitance value of the capacitor 40 to be measured.

Moreover, in the third embodiment, when the appropriate frequency is determined, the measurement circuit 10 can output the corresponding first output signal and second output signal. Afterwards, the second switcher 12 and the third switcher 13 can be turned on, while the remaining switches 11, 18 are turned off, at this time, the measurement circuit 10 can output the third output signal to the computing device 20, and the computing device 20 can calculate the calculation The second amplification gain of the amplifier 14, and then calculate the capacitance value of the capacitor 40 to be measured.

FIG. 8 is an experimental data diagram of the appropriate frequency corresponding to the capacitance to be measured according to an embodiment of the present invention.

As shown in Figure 8, the measuring circuit 10 adopts the circuit design of the second embodiment or the third embodiment, and the capacitance to be measured 40 adopts a capacitance whose actual capacitance value (hereinafter referred to as target value C1) is known, so as to facilitate the calculation of the target The error value between the value C1 and the measured value C2. In addition, the values of the capacitors 40 to be tested are respectively selected as 33 (pF), 305 (pF) and 557 (pF) to meet the conditions of the same specifications as the reference capacitors 50, and to match the target value C1 of each reference capacitor 50 in FIG. 7 The corresponding appropriate frequency is calculated by the measuring circuit 10 to obtain the measured value C2 of the capacitance to be measured, and the calculation device 20 obtains the error value result between the target value C1 and the measured value C2.

As shown in Fig. 8 again, when the target value C1 of the capacitance to be measured 40 is 33 (pF), according to the result of Fig. 7, adopt the reference capacitance 50 (the target value C1 is 33 (pF) of the same specification as the capacitance to be measured 40) ) as the input signal Vin, the measured value C2 of the capacitor 40 to be measured is 33.193 (pF), and the error between the measured value C2 and the target value C1 is about 0.585%. Through the selection of an appropriate frequency, the result of the measurement circuit 10 detecting the capacitor 40 under test will be more accurate.

As shown in Fig. 8 again, when the target value C1 of the capacitance to be measured 40 is 305 (pF), according to the result of Fig. 7, adopt the reference capacitance 50 of the same specification as the capacitance to be measured 40 (the target value C1 is the same as 305 (pF) ) as the input signal Vin, the measured value C2 of the capacitor 40 to be tested is 306.432 (pF), and the error between the measured value C2 and the target value C1 is about 0.470%. Through the selection of an appropriate frequency, the result of the measurement circuit 10 detecting the capacitor 40 under test will be more accurate.

As shown in Fig. 8 again, when the target value C1 of the capacitance to be measured 40 is 557 (pF), according to the result of Fig. 7, adopt the reference capacitance 50 of the same specification as the capacitance to be measured 40 (the target value C1 is 557 (pF) ) as the input signal Vin, the measured value C2 of the capacitor 40 to be tested is 560.161 (pF), and the error between the measured value C2 and the target value C1 is about 0.568%. Through the selection of an appropriate frequency, the result of the measurement circuit 10 detecting the capacitor 40 under test will be more accurate.

Accordingly, through the above experiments, it is known that the capacitors 40 to be tested with different specifications can be connected to the measurement circuit 10 through the reference capacitor 50 of the same specification, and the input signal Vin can be modulated to obtain a suitable frequency, and then a suitable frequency can be obtained. The input signal is applied to the capacitors under test 40 of the same specification, so that the measured value C2 of each capacitor under test 40 detected by the measuring circuit 10 can be maintained below a predetermined error value (for example, the error value is less than 1%), and then It is more accurate to let the measurement circuit 10 detect the capacitance 40 to be measured.

In addition, when the accuracy of the capacitance measurement system of the present invention needs to be adjusted, the user only needs to adjust the frequency of the input signal of the AC power supply, compared to the situation in the prior art where a large number of parameters must be adjusted to adjust the accuracy , the present invention can possess high convenience in use.

Therefore, the present invention provides a capacitance measurement system, a measurement circuit and a computing device, which can provide high-accuracy measurement results and can solve the problems of the prior art.

The above-mentioned embodiments are only examples for convenience of description, and the scope of rights claimed by the present invention should be based on the scope of the patent application, rather than limited to the above-mentioned embodiments.

1: Capacitance measurement system 10: Measuring circuit IN: circuit input OUT: circuit output 11~13 (first switcher 11, second switcher 12, third switcher 13): switcher 14: Operational amplifier 20: Computing device 30: AC power 40: capacitance to be tested 11a: the first end of the first switcher 11b: the second end of the first switch 12a: the first end of the second switcher 12b: the second end of the second switcher 13a: the first end of the third switch 13b: the second end of the third switch 14a: first input terminal 14b: the second input terminal 14c: output terminal 15: Rectifier 16: The first resistance 17: Second resistor A: node B: node S31~S37: steps 18: Fourth switcher 19: Fifth switcher 50: Reference capacitance Vo1: The potential of the first output signal Vo2: potential of the second output signal Vo3: potential of the third output signal Av1: the first amplification gain Av2: second amplification gain Xc: reactance value Freq: frequency C2: measured value C1: target value

1 is a schematic diagram of the architecture of a capacitance measuring system according to an embodiment of the present invention; Fig. 2 is a detailed circuit diagram of the measurement circuit of the first embodiment of the present invention; FIG. 3 is an operation flow chart of a computing device according to an embodiment of the present invention; Fig. 4 is the schematic diagram of the experimental data result of an embodiment of the present invention; FIG. 5 is a circuit diagram of a measuring circuit according to a second embodiment of the present invention; FIG. 6 is a circuit diagram of a measuring circuit according to a third embodiment of the present invention; FIG. 7 is an experimental data diagram of frequency modulation of an input signal according to an embodiment of the present invention; FIG. 8 is an experimental data diagram of the appropriate frequency corresponding to the capacitance to be measured according to an embodiment of the present invention.

1: Capacitance measurement system

10: Measuring circuit

IN: circuit input

OUT: circuit output

11~13: switcher (first switcher~third switcher)

14: Operational amplifier

20: Computing device

30: AC power

40: capacitance to be tested

Claims (20)

A capacitance measuring system (1), comprising: An AC power supply (30); A measurement circuit (10), comprising a circuit input terminal (IN), a circuit output terminal (OUT), an operational amplifier (14) and at least one switcher (13), wherein the AC power supply (30) and the circuit The input terminal (IN) is electrically connected, and the at least one switch (13) is electrically connected to a capacitor to be measured (40); and a computing device (20), electrically connected to the output terminal (OUT) of the circuit; Wherein, when the at least one switch (13) is turned off, the measurement circuit (10) outputs at least one output signal (Vo1, Vo2), and when the at least one switch (13) is turned on, the measurement circuit (10) output another output signal (Vo3), and the computing device (20) calculates a first amplification gain (Av1) and a second amplification gain (Av2), and calculate a capacitance value (C1) of the capacitance to be measured (40) according to the first amplification gain (Av1) and the second amplification gain (Av2). The capacitance measurement system (1) as described in claim 1, wherein the measurement circuit (10) includes a first switch (11), a second switch (12) and a third switch (13) , and the third switcher (13) is electrically connected to the capacitor under test (40), wherein the AC power supply (30) is respectively connected to a first one of the operational amplifier (14) through the circuit input terminal (IN). The input terminal (14a) is electrically connected to a first terminal (11a) of the first switch (11), and an output terminal (14c) of the operational amplifier (14) is respectively connected to a terminal of the second switch (12). A first end (12a) is electrically connected to a first end (13a) of the third switcher (13), and a second end (13b) of the third switcher (13) is used for connecting with the tested The capacitor (40) is electrically connected, and a second terminal (11b) of the first switch (11) and a second terminal (12b) of the second switch (12) are respectively connected to the circuit output terminal (OUT) electrical connection. The capacitance measuring system (1) as described in claim 2, wherein the measuring circuit (10) further includes a first resistor (16) and a second resistor (17), and the operational amplifier (14) The output terminal (14c) is electrically connected with the second resistor (17) and the third switch (13) through the first resistor (16). The capacitance measuring system (1) as described in claim 3, wherein the operational amplifier (14) further includes a second input terminal (14b), and the second input terminal (14b), the first resistor (16) , the second electric group (17) and the third switch (13) are electrically connected to a node (B) on the measuring circuit (10). The capacitance measurement system (1) as described in claim 2, wherein the measurement circuit (10) further includes a rectifier (15), and the second end (11b) of the first switch (11) and the The second end (12b) of the second switcher (12) is electrically connected with the circuit output end (OUT) respectively through the rectifier (15). The capacitance measuring system (1) as described in claim 2, wherein during a first period, the first switch (11) is turned on, and the circuit output terminal (OUT) outputs a first output signal (Vo1) to the computing device (20), and during a second period, the second switch (12) is turned on, and the circuit output terminal (OUT) outputs a second output signal (Vo2) to the computing device (20), wherein the computing The device (20) calculates the first amplification gain (Av1) according to the first output signal (Vo1) and the second output signal (Vo2). The capacitance measuring system (1) as described in claim 6, wherein in a third period, the second switch (12) and the third switch (13) are turned on, and the circuit output terminal (OUT) outputs a The third output signal (Vo3) is sent to the calculation device (20), wherein the calculation device (20) calculates the second amplification gain (Av2) according to the first output signal (Vo1) and the third output signal (Vo3). , and the calculation device (20) calculates a reactance value (Xc) of the capacitance to be measured (40) according to the first amplification gain (Av1) and the second amplification gain (Av2), and according to the reactance value (Xc ) to calculate the capacitance value (C1) of the capacitance to be measured (40). The capacitance measurement system as described in claim 2, which further includes a fourth switch (18), electrically connected to a reference capacitor (50), and the third switch (13) and the fourth switch (18) Electrically connect in parallel or in series. A measuring circuit (10), arranged in a capacitance measuring system (1), and comprising: A circuit input terminal (IN), electrically connected to an AC power supply (30) of the capacitance measuring system (1); a circuit output terminal (OUT), electrically connected to a computing device (20) of the capacitance measuring system (1); an operational amplifier (14); and at least one switcher (13), electrically connected with the operational amplifier 14; Wherein the AC power supply (30) is electrically connected to the operational amplifier (14) through the circuit input terminal (IN), and the at least one switch (13) is electrically connected to a capacitor to be measured (40). The measurement circuit (10) according to claim 9, wherein when the at least one switch (13) is turned off, the measurement circuit (10) outputs at least one output signal (Vo1, Vo2), and at least When a switcher (13) is turned on, the measurement circuit (10) outputs another output signal (Vo3), wherein the calculating device (20) calculates the operational amplifier ( 14) a first amplification gain (Av1) and a second amplification gain (Av2), and calculate the capacitance of the capacitance to be measured (40) according to the first amplification gain (Av1) and the second amplification gain (Av2). A capacitance value (C1). The measurement circuit (10) as described in claim 10 further includes a first switch (11), a second switch (12), and the switch electrically connected to the capacitor to be measured (40) (13) is a third switcher (13), wherein the AC power supply (30) is respectively connected to a first input terminal (14a) and the first input terminal (14a) of the operational amplifier (14) through the circuit input terminal (IN). A first end (11a) of the switcher (11) is electrically connected, and an output end (14c) of the operational amplifier (14) is respectively connected to a first end (12a) of the second switcher (12) and the A first end (13a) of the third switcher (13) is electrically connected, and a second end (13b) of the third switcher (13) is used for electrically connecting with the capacitance to be measured (40), the A second end (11b) of the first switch (11) and a second end (12b) of the second switch (12) are electrically connected to the circuit output (OUT) respectively. The measurement circuit (10) as described in claim 11 further comprises a first resistor (16) and a second resistor (17), and the output terminal (14c) of the operational amplifier (14) passes through the first The resistor (16) is electrically connected with the second resistor (17) and the third switch (13). The measurement circuit (10) as claimed in claim 12, wherein the operational amplifier (14) further includes a second input terminal (14b), and the second input terminal (14b), the first resistor (16), The second electrical group (17) and the third switch (13) are electrically connected to a node (B) on the measurement circuit (10). The measurement circuit (10) as described in claim 11 further includes a rectifier (15), and the second end (11b) of the first switch (11) and the second end (12) of the second switch (12) The second end (12b) is electrically connected with the circuit output end (OUT) respectively through the rectifier (15). The measurement circuit (10) as claimed in claim 11, wherein during a first period, the first switch (11) is turned on, and the circuit output terminal (OUT) outputs a first output signal (Vo1) to the calculation device (20), and during a second period, the second switch (12) is turned on, and the circuit output terminal (OUT) outputs a second output signal (Vo2) to the computing device (20). The measurement circuit (10) as described in claim 15, wherein during a third period, the second switch (12) and the third switch (13) are turned on, and the circuit output terminal (OUT) outputs a first Three output signals (Vo3) are sent to the calculation device (20), wherein the measurement circuit (10) calculates the second amplification gain (Av2) according to the first output signal (Vo1) and the third output signal (Vo3). . The measurement circuit (10) as claimed in claim 11, further comprising a fourth switch (18) electrically connected to a reference capacitor (50), the third switch (13) and the fourth switch (18) Electrically connect in parallel or in series. A computing device (20), which is arranged in the capacitance measuring system (1) as described in claim 1, is used to communicate with the circuit output terminal (OUT) of the measuring circuit (10) of the capacitance measuring system (1) ) are electrically connected. The computing device (20) as described in claim 17, wherein during a first period (T1), the computing device (20) obtains a first output signal (Vo1) from the circuit output terminal (OUT), and during a During the second period (T2), the calculation device (20) obtains a second output signal (Vo2) from the circuit output terminal (OUT), and according to the first output signal (Vo1) and the second output signal (Vo2) This first amplification gain (Av1) is calculated. The computing device (20) as described in claim 18, wherein in a third period (T3), the computing device (20) obtains a third output signal (Vo3) from the circuit output terminal (OUT), and according to the The first output signal (Vo1) and the third output signal (Vo3) calculate the second amplification gain (Av2), and the calculation device (20) is based on the first amplification gain (Av1) and the second amplification gain ( Av2) Calculate a reactance value (Xc) of the capacitor under test (40), and calculate the capacitance value (C1) of the capacitor under test (40) according to the reactance value (Xc).

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