TW202306019A - Electrostatic chuck and plasma reaction device - Google Patents

Electrostatic chuck and plasma reaction device Download PDF

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TW202306019A
TW202306019A TW111106955A TW111106955A TW202306019A TW 202306019 A TW202306019 A TW 202306019A TW 111106955 A TW111106955 A TW 111106955A TW 111106955 A TW111106955 A TW 111106955A TW 202306019 A TW202306019 A TW 202306019A
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dielectric layer
electrostatic chuck
wafer
resistivity
base
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TW111106955A
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Chinese (zh)
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TWI823273B (en
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如彬 葉
吳昊
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大陸商中微半導體設備(上海)股份有限公司
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H01L21/6833Details of electrostatic chucks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32715Workpiece holder
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32715Workpiece holder
    • H01J37/32724Temperature

Abstract

The invention provides an electrostatic chuck. The electrostatic chuck comprises a base; the first dielectric layer is arranged on the base and is made of a doped ceramic material with first resistivity, and an electrode for generating electrostatic force is arranged in the first dielectric layer; the second dielectric layer is arranged on the first dielectric layer and covers the first dielectric layer, and the second dielectric layer is made of an undoped ceramic material with second resistivity; the second resistivity is greater than the first resistivity. The invention also provides a plasma reaction device. The electrostatic chuck is high in adsorption force, uniform in adsorption force distribution, easy to desorb, long in service life and less in particulate matter pollution, helium sparking on the back surface of the wafer is effectively prevented, and the wafer processing yield and the production efficiency are improved.

Description

靜電吸盤及等離子體反應裝置Electrostatic chuck and plasma reaction device

本發明涉及半導體的技術領域,特別涉及一種靜電吸盤及等離子體反應裝置。The invention relates to the technical field of semiconductors, in particular to an electrostatic chuck and a plasma reaction device.

在半導體元件的製造過程中,為了在晶圓上進行沉積、蝕刻等製程,一般通過靜電吸盤(Electrostatic chuck,簡稱ESC)來產生靜電吸力,以實現在製程過程中支撐、固定待處理的晶圓。In the manufacturing process of semiconductor components, in order to perform processes such as deposition and etching on the wafer, electrostatic chuck (ESC) is generally used to generate electrostatic attraction to support and fix the wafer to be processed during the process. .

靜電吸盤包含基座和設置在基座頂部的介電層。根據介電層的不同,靜電吸盤主要分為CB(Coulomb 庫侖)型靜電吸盤和J-R(Johnsen-Rahbek)型靜電吸盤兩種類型。CB型靜電吸盤(簡稱為CB ESC)、J-R型靜電吸盤(簡稱為J-R ESC)是以靜電吸附為基本原理,通過對CB ESC、J-R ESC內的電極施加外部直流電壓後,產生對晶圓的靜電吸附力來固定晶圓。An electrostatic chuck consists of a base and a dielectric layer disposed on top of the base. According to the different dielectric layers, electrostatic chucks are mainly divided into two types: CB (Coulomb Coulomb) type electrostatic chuck and J-R (Johnsen-Rahbek) type electrostatic chuck. CB type electrostatic chuck (referred to as CB ESC) and J-R type electrostatic chuck (abbreviated as J-R ESC) are based on the principle of electrostatic adsorption. After applying an external DC voltage to the electrodes in CB ESC and J-R ESC, the wafer will be generated. Electrostatic attraction to hold the wafer.

CB ESC的靜電吸附力小,且需要在其電極上施加較高的直流電壓;然而當施加的直流電壓過高會易引起晶圓與CB ESC間氦氣打火的問題。The electrostatic adsorption force of CB ESC is small, and a high DC voltage needs to be applied to its electrodes; however, when the applied DC voltage is too high, it will easily cause the problem of helium ignition between the wafer and CB ESC.

J-R ESC的漏電流大,停止對J-R ESC的電極施加外部直流電壓後,J-R ESC表面仍有較多殘餘電荷,使得晶圓解吸附難度高;且J-R ESC的粗糙表面易被侵蝕,容易造成顆粒物增多、使用老化、J-R ESC表面粗糙度變差,使用壽命較短的問題。同時也會造成放置在J-R ESC上的晶圓的溫度不均勻、影響晶圓的加工精度。The leakage current of J-R ESC is large. After stopping the application of external DC voltage to the electrodes of J-R ESC, there are still many residual charges on the surface of J-R ESC, which makes it difficult to desorb the wafer; and the rough surface of J-R ESC is easy to be corroded, which is easy to cause particles Increase, use aging, poor surface roughness of J-R ESC, and short service life. At the same time, it will also cause the temperature of the wafer placed on the J-R ESC to be uneven, which will affect the processing accuracy of the wafer.

本發明的目的是提供一種靜電吸盤及等離子體反應裝置,通過將不同電阻率的介電層相結合,不僅能夠提高靜電吸盤的使用壽命,且無需施加較高的直流電壓,能夠防止晶圓背面發生氦氣打火,同時吸附力強,吸附力分佈均勻,並易於解吸附晶圓。The purpose of the present invention is to provide an electrostatic chuck and a plasma reaction device. By combining dielectric layers with different resistivities, not only the service life of the electrostatic chuck can be improved, but also it is not necessary to apply a high DC voltage, which can prevent the backside of the wafer from Helium ignition occurs, and at the same time, the adsorption force is strong, the adsorption force is evenly distributed, and it is easy to desorb the wafer.

為了達到上述目的,本發明提供一種靜電吸盤,包含: 基座; 設置在所述基座上的第一介電層;所述第一介電層為具有第一電阻率的有摻雜陶瓷材質,第一介電層內設有產生靜電力的電極; 設置在所述第一介電層上並覆蓋第一介電層的第二介電層;所述第二介電層為具有第二電阻率的無摻雜陶瓷材質;第二電阻率大於第一電阻率。 In order to achieve the above object, the present invention provides an electrostatic chuck, comprising: base; A first dielectric layer disposed on the base; the first dielectric layer is a doped ceramic material with a first resistivity, and electrodes for generating electrostatic force are arranged in the first dielectric layer; A second dielectric layer disposed on the first dielectric layer and covering the first dielectric layer; the second dielectric layer is an undoped ceramic material with a second resistivity; the second resistivity is greater than the first A resistivity.

較佳的,第一介電層為有摻雜的AL 2O 3,其摻雜物包含Si、C、Mg,MgO,TiO 2中的任一種或多種。 Preferably, the first dielectric layer is doped AL 2 O 3 , and its dopant includes any one or more of Si, C, Mg, MgO, and TiO 2 .

較佳的,第二介電層為無摻雜的AL 2O 3Preferably, the second dielectric layer is undoped AL 2 O 3 .

較佳的,第一介電層的電阻率為10 10~10 12Ω.cm。 Preferably, the resistivity of the first dielectric layer is 10 10 -10 12 Ω.cm.

較佳的,第二介電層的電阻率大於10 14Ω.cm。 Preferably, the resistivity of the second dielectric layer is greater than 10 14 Ω.cm.

較佳的,所述第二介電層與晶圓接觸的表面設有多個均勻或非均勻分佈的凸起部;所述凸起部的高度範圍為2~3um。Preferably, the surface of the second dielectric layer in contact with the wafer is provided with a plurality of uniformly or non-uniformly distributed protrusions; the height of the protrusions ranges from 2 to 3 um.

較佳的,在第一介電層、第二介電層之間還設有用於固定連接第一、第二介電層的黏接層。Preferably, an adhesive layer for fixedly connecting the first and second dielectric layers is further provided between the first dielectric layer and the second dielectric layer.

較佳的,第一介電層的厚度為0.2~2mm。Preferably, the thickness of the first dielectric layer is 0.2-2mm.

較佳的,第二介電層的厚度為0.01~0.5mm。Preferably, the thickness of the second dielectric layer is 0.01-0.5 mm.

較佳的,第一介電層具有0.6~0.8um的表面粗糙度;第二介電層具有0.1~0.2um的表面粗糙度。Preferably, the first dielectric layer has a surface roughness of 0.6-0.8um; the second dielectric layer has a surface roughness of 0.1-0.2um.

較佳的,第一介電層的底部粘接基座的頂部,第二介電層的周邊向下延伸並完全覆蓋第一介電層的外側壁。Preferably, the bottom of the first dielectric layer is bonded to the top of the base, and the periphery of the second dielectric layer extends downwards and completely covers the outer sidewall of the first dielectric layer.

較佳的,第一介電層嵌入設置在基座的頂部,且第一介電層的頂面與基座的頂面平齊;第二介電層設置在基座上並完全覆蓋第一介電層。Preferably, the first dielectric layer is embedded on the top of the base, and the top surface of the first dielectric layer is flush with the top surface of the base; the second dielectric layer is arranged on the base and completely covers the first dielectric layer.

較佳的,基座的外側壁設有耐等離子體腐蝕的鍍膜。Preferably, the outer wall of the base is provided with a plasma-resistant coating.

較佳的,基座中設置有多個冷卻管道,所述冷卻管道包含氦氣通道,通過所述氦氣通道將氦氣通至晶圓與第二介電層之間的間隙,且氦氣通道避讓所述凸起部。Preferably, a plurality of cooling pipes are arranged in the susceptor, and the cooling pipes include a helium channel through which the helium is passed to the gap between the wafer and the second dielectric layer, and the helium The channel avoids the raised portion.

本發明還提供一種等離子體反應裝置,包括一等離子體反應腔,所述等離子體反應腔內底部設有如本發明所述的靜電吸盤,通過所述靜電吸盤吸附待加工的晶圓。The present invention also provides a plasma reaction device, comprising a plasma reaction chamber, the bottom of the plasma reaction chamber is provided with an electrostatic chuck according to the present invention, and the wafer to be processed is adsorbed by the electrostatic chuck.

與習知技術相比,本發明的有益效果在於: 1)本發明的靜電吸盤吸附力強,吸附力分佈均勻,易解吸附晶圓,提高了晶圓加工的生產效率及晶圓成品率; 2)由於在第一介電層上覆蓋有無摻雜的第二介電層,減少了顆粒污染物的產生,使得靜電吸盤的吸附力和溫度分佈均勻,不僅進一步提高了晶圓加工的成品率,同時還提高了靜電吸盤的使用壽命、降低了靜電吸盤的維護和製造成本; 3)本發明中使用了有摻雜且低電阻率的第一介電層,通過第一介電層內的自由移動的電子,實現“抬高”靜電吸盤的電極位置;並且由於第二介電層內無需設置電極,使得第二介電層可以具有一個較小的厚度,因而僅需在靜電吸盤內的電極上施加很小的直流電壓,也能夠為晶圓提供足夠的吸附力; 4)本發明的靜電吸盤工作時僅需施加很小的直流電壓,因而能夠有效防止晶圓背面發生氦氣打火,實現了安全生產,並進一步提高了晶圓加工的成品率。 Compared with prior art, the beneficial effect of the present invention is: 1) The electrostatic chuck of the present invention has strong adsorption force, uniform distribution of adsorption force, and easy desorption of wafers, which improves the production efficiency of wafer processing and the yield of wafers; 2) Since the first dielectric layer is covered with an undoped second dielectric layer, the generation of particle pollutants is reduced, and the adsorption force and temperature distribution of the electrostatic chuck are uniform, which not only further improves the yield of wafer processing , while also improving the service life of the electrostatic chuck, reducing the maintenance and manufacturing costs of the electrostatic chuck; 3) In the present invention, a doped and low-resistivity first dielectric layer is used, through the freely moving electrons in the first dielectric layer, the electrode position of the electrostatic chuck is "raised"; and because the second dielectric There is no need to set electrodes in the electrical layer, so that the second dielectric layer can have a smaller thickness, so only a small DC voltage needs to be applied to the electrodes in the electrostatic chuck to provide sufficient adsorption force for the wafer; 4) The electrostatic chuck of the present invention only needs to apply a small DC voltage when it works, so it can effectively prevent helium ignition on the back of the wafer, realize safe production, and further improve the yield of wafer processing.

下面將結合本發明實施例中的附圖,對本發明實施例中的技術方案進行清楚、完整地描述,顯然,所描述的實施例僅僅是本發明一部分實施例,而不是全部的實施例。基於本發明中的實施例,所屬技術領域中具有通常知識者在沒有做出具進步性的改變前提下所獲得的所有其他實施例,都屬於本發明保護的範圍。The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making progressive changes fall within the protection scope of the present invention.

實施例一Embodiment one

圖1A示出本發明靜電吸盤所應用的等離子體反應裝置的結構示意圖,圖1A中的等離子體反應裝置為電容耦合等離子體(CCP)反應裝置,本發明的靜電吸盤同樣適用於電感耦合型等離子體反應裝置(ICP)。圖1A中的電容耦合等離子體反應裝置是一種由施加在基座上的射頻電源通過電容耦合的方式在反應腔內產生等離子體並用於蝕刻的設備。其包括真空反應腔100,真空反應腔包括由金屬材料製成的大致為圓柱形的反應腔側壁101,反應腔側壁101上設置一開口102用於容納晶圓進出。真空反應腔100內設置一氣體噴淋頭120和一與所述氣體噴淋頭120相對設置的基座110。所述氣體噴淋頭120與一氣體供應裝置125相連,用於向真空反應腔100輸送反應氣體,同時作為真空反應腔100的上電極。基座110作為真空反應腔100的下電極,所述上電極和所述下電極之間形成一反應區域。至少一射頻電源150通過匹配網路152施加到所述上電極或下電極之一,在所述上電極和所述下電極之間產生射頻電場,用以將反應氣體解離為等離子體,等離子體中含有大量的電子、離子、激發態的原子、分子和自由基等活性粒子,上述活性粒子可以和待處理晶圓的表面發生多種物理和化學反應,使得晶圓表面的形貌發生改變,即完成蝕刻過程。真空反應腔100的下方還設置一排氣泵140,用於將反應副產物排出真空反應腔100,維持真空反應腔100的真空環境。Figure 1A shows a schematic structural view of the plasma reaction device used by the electrostatic chuck of the present invention. The plasma reaction device in Figure 1A is a capacitively coupled plasma (CCP) reaction device, and the electrostatic chuck of the present invention is also suitable for inductively coupled plasma body reaction device (ICP). The capacitively coupled plasma reaction device in FIG. 1A is a device for generating plasma in a reaction chamber by means of capacitive coupling from a radio frequency power source applied to a susceptor for etching. It includes a vacuum reaction chamber 100, the vacuum reaction chamber includes a substantially cylindrical reaction chamber side wall 101 made of metal material, and an opening 102 is provided on the reaction chamber side wall 101 for accommodating the entry and exit of wafers. A gas shower head 120 and a base 110 opposite to the gas shower head 120 are arranged in the vacuum reaction chamber 100 . The gas shower head 120 is connected with a gas supply device 125 for delivering reaction gas to the vacuum reaction chamber 100 and serving as an upper electrode of the vacuum reaction chamber 100 . The base 110 serves as the lower electrode of the vacuum reaction chamber 100, and a reaction area is formed between the upper electrode and the lower electrode. At least one radio frequency power source 150 is applied to one of the upper electrode or the lower electrode through the matching network 152, and a radio frequency electric field is generated between the upper electrode and the lower electrode to dissociate the reaction gas into plasma, and the plasma It contains a large number of active particles such as electrons, ions, excited atoms, molecules and free radicals. The above-mentioned active particles can undergo various physical and chemical reactions with the surface of the wafer to be processed, so that the morphology of the wafer surface changes, that is, Complete the etching process. An exhaust pump 140 is also provided below the vacuum reaction chamber 100 to discharge the reaction by-products out of the vacuum reaction chamber 100 to maintain the vacuum environment of the vacuum reaction chamber 100 .

靜電吸盤通過靜電吸附作用來固定放置在其上的晶圓W,其優點在於吸附作用均勻分佈於晶圓表面,晶圓W不會發生翹曲變形,對晶圓W無傷害,吸附作用力持續穩定,可以保證晶圓W的加工精度。如圖1A、圖1B、圖2所示,本發明的靜電吸盤包含基座110、第一介電層111、電極113、第二介電層112。The electrostatic chuck fixes the wafer W placed on it through electrostatic adsorption. Its advantage is that the adsorption is evenly distributed on the surface of the wafer, the wafer W will not warp and deform, and there will be no damage to the wafer W. Stable, can guarantee the machining accuracy of wafer W. As shown in FIG. 1A , FIG. 1B , and FIG. 2 , the electrostatic chuck of the present invention includes a base 110 , a first dielectric layer 111 , an electrode 113 , and a second dielectric layer 112 .

如圖1A、圖1B、圖2所示,所述第一介電層111設置在基座110上(示例的,第一介電層111的底部通過粘接方式固定在基座110的頂部),其為具有第一電阻率的有摻雜陶瓷材質。在本發明的實施例中,第一介電層111為有摻雜的AL 2O 3,其摻雜物包含Si、C、Mg,MgO,TiO 2中的任一種或多種。第一介電層111可通過粉末噴塗、等離子CVD(化學氣相沉積)等方式加工而成,也可以是由陶瓷粉末注模燒結後機加工而成。第一介電層111的電阻率為10 10~10 12Ω.cm。作為本發明的一個較佳實施例,第一介電層111的電阻率為10 11Ω.cm。在本實施例中,如圖1B、圖2所示,第一介電層111的厚度為 d 1 =0.2~2mm。第一介電層111的表面粗糙度為0.6~0.8um。 As shown in FIG. 1A, FIG. 1B, and FIG. 2, the first dielectric layer 111 is disposed on the base 110 (for example, the bottom of the first dielectric layer 111 is fixed on the top of the base 110 by bonding) , which is a doped ceramic material with a first resistivity. In an embodiment of the present invention, the first dielectric layer 111 is doped Al 2 O 3 , and its dopant includes any one or more of Si, C, Mg, MgO, and TiO 2 . The first dielectric layer 111 can be processed by powder spraying, plasma CVD (chemical vapor deposition), etc., or can be machined by injection molding and sintering of ceramic powder. The resistivity of the first dielectric layer 111 is 10 10 -10 12 Ω.cm. As a preferred embodiment of the present invention, the resistivity of the first dielectric layer 111 is 10 11 Ω.cm. In this embodiment, as shown in FIG. 1B and FIG. 2 , the thickness of the first dielectric layer 111 is d 1 =0.2˜2 mm. The surface roughness of the first dielectric layer 111 is 0.6-0.8um.

如圖1A、圖1B、圖2所示,所述電極113設置在第一介電層111內,用於產生靜電力。以實現在製程過程中對待處理的晶圓W的吸附固定。As shown in FIG. 1A , FIG. 1B , and FIG. 2 , the electrode 113 is disposed in the first dielectric layer 111 for generating electrostatic force. In order to realize adsorption and fixation of the wafer W to be processed during the manufacturing process.

如圖1A、圖1B、圖2所示,所述第二介電層112設置在第一介電層111上,且第二介電層112的周邊向下延伸(如圖2中虛圈所示)並完全覆蓋第一介電層111的外側壁。因此第一介電層111設置在由基座110和第二介電層112包圍形成的空間內。As shown in Fig. 1A, Fig. 1B and Fig. 2, the second dielectric layer 112 is arranged on the first dielectric layer 111, and the periphery of the second dielectric layer 112 extends downward (as indicated by the dotted circle in Fig. 2 shown) and completely cover the outer sidewall of the first dielectric layer 111. Therefore, the first dielectric layer 111 is disposed in a space surrounded by the base 110 and the second dielectric layer 112 .

由於無摻雜的AL 2O 3具有耐等離子體侵蝕的功能,因此通過第二介電層完全112覆蓋第一介電層111,能夠有效防止第一介電層111中的摻雜物被反應腔內的等離子體侵蝕,而產生顆粒污染物附著在晶圓W上。由於沒有產生顆粒污染物,本發明的靜電吸盤可以保證晶圓W的溫度均勻,並且對晶圓W的吸附力也分佈均勻。 Since the undoped Al 2 O 3 has the function of resisting plasma erosion, the first dielectric layer 111 is completely covered by the second dielectric layer 112, which can effectively prevent the dopant in the first dielectric layer 111 from being reacted The plasma in the chamber erodes, resulting in particulate contamination that adheres to the wafer W. Since no particle contamination is generated, the electrostatic chuck of the present invention can ensure that the temperature of the wafer W is uniform, and the adsorption force on the wafer W is also uniformly distributed.

在第一介電層111、第二介電層112之間還設有黏接層(圖中未示出),通過該黏接層實現固定連接第一介電層111和第二介電層112。An adhesive layer (not shown in the figure) is also provided between the first dielectric layer 111 and the second dielectric layer 112, through which the first dielectric layer 111 and the second dielectric layer are fixedly connected. 112.

第二介電層112為具有第二電阻率的無摻雜陶瓷材質。第二介電層112的電阻率大於10 14Ω.cm,作為本發明的一個較佳實施例,第二介電層112的電阻率為10 17Ω.cm。由於第二介電層112的電阻率大於第一介電層111的電阻率,因此也稱第二介電層112具有高電阻率,第一介電層111具有低電阻率。在本發明的實施例中,第二介電層112為無摻雜的AL 2O 3,其可以是通過機加工而成。如圖1B、圖2所示,在本實施例中,第二介電層112的厚度為 d 2 =0.1~0.5mm。第二介電層112的表面粗糙度為0.1~0.2um。 The second dielectric layer 112 is an undoped ceramic material with a second resistivity. The resistivity of the second dielectric layer 112 is greater than 10 14 Ω.cm. As a preferred embodiment of the present invention, the resistivity of the second dielectric layer 112 is 10 17 Ω.cm. Since the resistivity of the second dielectric layer 112 is greater than that of the first dielectric layer 111 , it is also said that the second dielectric layer 112 has a high resistivity, and the first dielectric layer 111 has a low resistivity. In an embodiment of the present invention, the second dielectric layer 112 is undoped Al 2 O 3 , which may be processed by machining. As shown in FIG. 1B and FIG. 2 , in this embodiment, the thickness of the second dielectric layer 112 is d 2 =0.1˜0.5 mm. The surface roughness of the second dielectric layer 112 is 0.1-0.2um.

本發明的靜電吸盤無需在電極113上施加過高的直流電壓,即可使第二介電層112對晶圓W產生足夠的吸附力,且有效防止晶圓W背面氦氣打火。並且,本發明的靜電吸盤漏電流小,因而非常容易解吸附晶圓W。The electrostatic chuck of the present invention can make the second dielectric layer 112 generate sufficient adsorption force on the wafer W without applying an excessively high DC voltage on the electrode 113 , and effectively prevent the helium gas on the back of the wafer W from sparking. Moreover, the electrostatic chuck of the present invention has a small leakage current, so it is very easy to detach the wafer W.

以下為本發明的原理說明: 靜電吸附的原理是,當一個帶電物體靠近另一個不帶電物體時,由於靜電感應的作用,使不帶電物體在內部靠近帶電物體的一側會彙聚與帶電物體所帶電荷相反極性的電荷(而在另一側產生相同數量的與帶電物體所帶電荷同性的電荷),由於接觸的兩表面上異性電荷之間的互相吸引作用,會使兩物體產生吸引力,也即“靜電吸附”作用。 The following is a description of the principles of the present invention: The principle of electrostatic adsorption is that when a charged object is close to another uncharged object, due to the effect of electrostatic induction, the side of the uncharged object close to the charged object will gather charges of the opposite polarity to that of the charged object (while in The other side produces the same number of charges of the same sex as the charged object), due to the mutual attraction between the opposite charges on the two surfaces in contact, the two objects will have an attractive force, that is, "electrostatic adsorption".

普通的靜電吸盤通常包含:由導熱材料製成的基座,設置在基座上的介電層及設置在介電層內的電極。介電層的性質對靜電吸盤的吸附力、解吸附能力、使用壽命等具有重要的影響。A common electrostatic chuck usually includes: a base made of thermally conductive material, a dielectric layer disposed on the base, and electrodes disposed in the dielectric layer. The properties of the dielectric layer have an important influence on the adsorption force, desorption capacity and service life of the electrostatic chuck.

如圖3中的靜電吸盤採用了較高電阻率的介電層112′(電阻量級為10 9Ohm),在該介電層112′內設有電極113′,圖3未示出該靜電吸盤的基座。如圖3所示,該介電層112′大致為盤狀,其直徑略小於吸附在其上的晶圓W的直徑,以保證晶圓W完全覆蓋介電層112′,防止等離子體對介電層112′造成損傷。在產生靜電吸附力時,該晶圓W作為上端電極,該電極113′作為下端電極。由於介電層112′具有較高電阻率,因此介電層112′具有絕對絕緣性,其內極少有可自由移動的電子,只能產生極化電荷。外部的直流電壓(圖3中為正電壓)被施加在該下端電極上,如此在上端電極(晶圓W)與下端電極之間產生電勢差,通過該電勢差實現晶圓W被吸附在靜電吸盤上。 As shown in Figure 3, the electrostatic chuck uses a dielectric layer 112' with a relatively high resistivity (the resistance level is 10 9 Ohm), and an electrode 113' is arranged in the dielectric layer 112', and the electrostatic chuck is not shown in Figure 3. The base of the suction cup. As shown in FIG. 3 , the dielectric layer 112 ′ is roughly disc-shaped, and its diameter is slightly smaller than the diameter of the wafer W adsorbed thereon, so as to ensure that the wafer W completely covers the dielectric layer 112 ′ and prevent the plasma from affecting the dielectric layer 112 ′. The electrical layer 112' causes damage. When electrostatic attraction is generated, the wafer W acts as an upper electrode, and the electrode 113' acts as a lower electrode. Since the dielectric layer 112' has a relatively high resistivity, the dielectric layer 112' has absolute insulation, and there are very few free-moving electrons therein, and only polarized charges can be generated. An external DC voltage (positive voltage in Figure 3) is applied to the lower electrode, so that a potential difference is generated between the upper electrode (wafer W) and the lower electrode, through which the wafer W is attracted to the electrostatic chuck .

該種靜電吸盤的吸附力 F chunk1 的計算公式如下所示:

Figure 02_image001
;  (1) The calculation formula of the adsorption force F chunk1 of this electrostatic chuck is as follows:
Figure 02_image001
; (1)

其中,ɛ為該絕緣介電層的相對介電常數,ɛ 0為真空介電常數, V為施加在下端電極的直流電壓伏值, d為下端電極與晶圓底部之間的間距。 Wherein, ɛ is the relative permittivity of the insulating dielectric layer, ɛ 0 is the vacuum permittivity, V is the DC voltage volts applied to the lower electrode, and d is the distance between the lower electrode and the bottom of the wafer.

根據公式(1)可以看出, F chunk1 d的二次方成反比。由於介電層112′內部需要設置電極113′,並且需要保證介電層112′的機械強度、平整度,導致介電層112′的加工難度大,且介電層112′不能太薄(通常該絕緣的介電層112′被設置為2mm)。介電層112′的厚度越大,靜電吸附力 F chunk1 越小,從而使得需要很高的直流電壓(2000伏左右)才能為晶圓W提供足夠的吸附力。 According to formula (1), it can be seen that F chunk1 is inversely proportional to the second power of d . Since the electrode 113' needs to be arranged inside the dielectric layer 112', and the mechanical strength and flatness of the dielectric layer 112' need to be ensured, the processing of the dielectric layer 112' is difficult, and the dielectric layer 112' should not be too thin (usually The insulating dielectric layer 112' is set to 2 mm). The greater the thickness of the dielectric layer 112 ′, the smaller the electrostatic adsorption force F chunk1 , so that a high DC voltage (about 2000 volts) is required to provide sufficient adsorption force for the wafer W.

在半導體加工中,晶圓W的散熱相當重要,若無法保證晶圓W的表面的均溫,則在晶圓W的加工過程中無法確保加工的均勻性,加工精度將受到極大的影響。通常通過提高晶圓W的背面的散熱性使局部的高溫可以立即散失,來保證晶圓W的表面均溫。該種方法依靠靜電吸盤對晶圓W導熱進行散熱,散熱效果主要依賴於靜電吸盤的材料。In semiconductor processing, the heat dissipation of the wafer W is very important. If the uniform temperature of the surface of the wafer W cannot be guaranteed, the uniformity of processing cannot be ensured during the processing of the wafer W, and the processing accuracy will be greatly affected. Generally, by improving the heat dissipation of the backside of the wafer W, the local high temperature can be dissipated immediately, so as to ensure the uniform temperature of the surface of the wafer W. This method relies on the electrostatic chuck to conduct heat on the wafer W to dissipate heat, and the heat dissipation effect mainly depends on the material of the electrostatic chuck.

晶圓W的散熱的另一種方法是通過增加晶圓W的表面的氣體對流,使用氣體對流散熱的方法來均勻晶圓W的表面的溫度。在基座110內包含用於將導熱氣體(如氦氣)路由到基座、介電層112′的第一通道(圖3中未示出)。介電層112′還穿設有多個個連通所述第一通道的第二通道(圖3中未示出),用於將所述導熱氣體輸送到介電層112′的上表面與晶圓W的底面之間,促進晶圓W與介電層112′之間的熱傳遞。如圖1A、圖1B所示,基座110內部還設有冷卻液通道,用於對基座110的溫度進行控制。Another method for dissipating heat from the wafer W is to increase the gas convection on the surface of the wafer W, and use the method of gas convection to dissipate heat to even out the temperature of the surface of the wafer W. Contained within the pedestal 110 is a first channel (not shown in FIG. 3 ) for routing a thermally conductive gas, such as helium, to the pedestal, dielectric layer 112 ′. The dielectric layer 112' is also pierced with a plurality of second channels (not shown in FIG. 3 ) communicating with the first channels, for delivering the heat-conducting gas to the upper surface of the dielectric layer 112' and the crystal. Between the bottom surfaces of the wafer W, the heat transfer between the wafer W and the dielectric layer 112' is promoted. As shown in FIG. 1A and FIG. 1B , a coolant channel is also provided inside the base 110 for controlling the temperature of the base 110 .

由於介電層112′需要保證有大約2mm的厚度,其內部的電極113′必須接入直流高壓,才能為晶圓提供足夠的吸附力,施加到電極113′上的高壓會帶來晶圓W的背面氦氣打火的風險。Since the dielectric layer 112' needs to have a thickness of about 2 mm, the internal electrode 113' must be connected to a DC high voltage to provide sufficient adsorption force for the wafer, and the high voltage applied to the electrode 113' will bring the wafer W risk of helium sparking on the back side.

如圖4中的靜電吸盤採用了較低電阻率的介電層112′′(該介電層112′′的電阻量級為10 6Ohm)。圖4中未示出該靜電吸盤的基座。圖4介電層112′′內部設置有電極113′′。介電層112′′不是理想的絕緣介質,即在介電層112′′中有許多可以自由移動的電子,使得介電層112′′具有有限電阻。在對介電層112′′內的電極113′′施加電壓(圖4中為正電壓)後,介電層112′′內的可移動粒子受到電極113′′作用使得電子遷移聚集在介電層112′′的下表面,而帶正電粒子聚集在介電層112′′的上表面。也即圖4所示的靜電吸盤通過漏電流將正電荷傳導至靜電吸盤的上表面。 The electrostatic chuck as shown in FIG. 4 uses a dielectric layer 112'' with a lower resistivity (the resistance of the dielectric layer 112'' is on the order of 10 6 Ohm). The base of the electrostatic chuck is not shown in FIG. 4 . In FIG. 4, an electrode 113'' is disposed inside the dielectric layer 112''. The dielectric layer 112'' is not an ideal insulating medium, that is, there are many electrons that can move freely in the dielectric layer 112'', so that the dielectric layer 112'' has a finite resistance. After applying a voltage (positive voltage in FIG. 4 ) to the electrode 113'' in the dielectric layer 112'', the mobile particles in the dielectric layer 112'' are affected by the electrode 113'' so that electron migration gathers in the dielectric layer 112''. The lower surface of the dielectric layer 112'', while the positively charged particles gather on the upper surface of the dielectric layer 112''. That is, the electrostatic chuck shown in FIG. 4 conducts positive charges to the upper surface of the electrostatic chuck through leakage current.

如圖4所示,由於介電層112′′的上表面不是理想平面,其粗糙度不可忽略,在介電層112′′的上表面形成多個個“山峰”與“山谷”。由於“尖端效應”,帶正電粒子聚集在“山峰”處。所述“山峰”與晶圓W的背面的負電子之間形成微型電場。無數個微型電場產生的電場力就構成了靜電吸盤的吸附力。該微型電場的電場強度隨著施加在電極113′′的直流電壓的增大而增強。As shown in FIG. 4 , since the upper surface of the dielectric layer 112 ″ is not an ideal plane, its roughness cannot be ignored, and a plurality of “peaks” and “valleys” are formed on the upper surface of the dielectric layer 112 ″. Due to the "tip effect", positively charged particles gather at the "mountain". A micro electric field is formed between the “mountain” and the negative electrons on the back of the wafer W. The electric field force generated by countless miniature electric fields constitutes the adsorption force of the electrostatic chuck. The electric field strength of the miniature electric field increases with the increase of the DC voltage applied to the electrode 113''.

微型電場的電場力 F chunk2 的計算公式如下所示:

Figure 02_image003
;  (2) 其中,
Figure 02_image005
為真空介電常數, V gap 為所述“山峰”與晶圓W的背面之間的電勢差, d gap 為微型電場的“山峰”與晶圓W的背面之間的距離。基於晶圓W的實際面積S,通過對公式(2)進行求積分運算,即可得到圖4中靜電吸盤的吸附力 F chunk3
Figure 02_image007
。 The calculation formula of the electric field force F chunk2 of the micro electric field is as follows:
Figure 02_image003
; (2) where,
Figure 02_image005
is the vacuum dielectric constant, V gap is the potential difference between the "mountain" and the back of the wafer W, and d gap is the distance between the "mountain" of the micro electric field and the back of the wafer W. Based on the actual area S of the wafer W, the adsorption force F chunk3 of the electrostatic chuck in Figure 4 can be obtained by integrating the formula (2):
Figure 02_image007
.

由於 d gap 通常只有1~2um,因而只需要在電極113′′施加較小的直流電壓(700~1000V)就可以產生足夠的吸附力,因此圖4所示靜電吸盤的吸附力要遠大於圖3所示靜電吸盤的吸附力,半導體業內通常使用如圖4所示的靜電吸盤。 Since the d gap is usually only 1-2um, it only needs to apply a small DC voltage (700-1000V) to the electrode 113'' to generate sufficient adsorption force, so the adsorption force of the electrostatic chuck shown in Figure 4 is much greater than that shown in Figure 4. The adsorption force of the electrostatic chuck shown in Figure 3, the electrostatic chuck shown in Figure 4 is usually used in the semiconductor industry.

但同時圖4的靜電吸盤也具有顯著的缺點: 1)在停止對該靜電吸盤的電極113′′施加直流電壓後,“山峰”的電荷仍較難釋放,因此帶來對晶圓W解吸附困難的問題; 2)當“山峰”的電荷聚集過多,會對晶圓W放電導致晶圓W損壞; 3)該靜電吸盤的吸附力還隨著溫度變化會產生較大變化,因而吸附力不夠穩定; 4)由於該靜電吸盤的介電層113′′有摻雜,摻雜物易被真空反應腔內的等離子體侵蝕,在使用中體現出靜電吸盤壽命短,易產生顆粒物污染,易導致晶圓W的溫度不均勻,吸附力分佈不均勻等一系列問題。 But at the same time, the electrostatic chuck in Figure 4 also has significant disadvantages: 1) After the application of DC voltage to the electrode 113'' of the electrostatic chuck is stopped, the charge of the "mountain" is still difficult to release, thus causing the problem of difficulty in desorbing the wafer W; 2) When the charge of the "mountain" accumulates too much, it will discharge the wafer W and cause damage to the wafer W; 3) The adsorption force of the electrostatic chuck will change greatly with the temperature change, so the adsorption force is not stable enough; 4) Since the dielectric layer 113'' of the electrostatic chuck is doped, the dopant is easily eroded by the plasma in the vacuum reaction chamber. In use, the life of the electrostatic chuck is short, and it is easy to generate particle contamination, which may easily cause wafer damage. There are a series of problems such as uneven temperature of W and uneven distribution of adsorption force.

本發明中,通過採用具有不同電阻率的兩個介電層,克服了上述問題與不足。如圖2所示,本發明中由於第一介電層111的電阻率較低,因此其內部會有許多可以自由移動的電子。圖2中,對第一介電層111內的電極113施加的是正電壓。當對第一介電層111內的電極113施加正電壓時,上述自由移動的電子聚集在第一介電層111的下表面。帶正電粒子聚集在第一介電層111的上表面。第一介電層111的上表面的帶正電粒子與第二介電層112的下表面產生靜電感應,因此第二介電層112的下表面會產生負電荷的極化電荷,第二介電層112的上表面產生正電荷的極化電荷。由於靜電感應,晶圓W的背面聚集有負電荷,通過晶圓W的下表面與第二介電層112的上表面的異性電荷之間的互相吸引作用,會使第二介電層112對晶圓W產生吸引力。也就是說,相當於將電極113的位置“抬高”至第二介電層112內,而實際上並不需要在第二介電層112內設置電極113,便可以使第二介電層112通過其極化電荷吸附晶圓W。由於第二介電層112內部不需要設置電極113,因此可以使本發明的第二介電層112相比於圖3所示靜電吸盤的介電層

Figure 02_image009
具有更小的厚度。即使該厚度可達0.01mm。根據公式(1),由於第二介電層112的厚度減小,本發明的靜電吸盤僅需較小的直流電壓(低於2000V),即可為晶圓W提供足夠的吸附力。當施加的直流電壓減小時,晶圓W的背面氦氣打火的隱患則自然被消除。 In the present invention, the above-mentioned problems and disadvantages are overcome by using two dielectric layers having different resistivities. As shown in FIG. 2 , in the present invention, due to the low resistivity of the first dielectric layer 111 , many electrons can move freely inside it. In FIG. 2 , a positive voltage is applied to the electrode 113 in the first dielectric layer 111 . When a positive voltage is applied to the electrodes 113 in the first dielectric layer 111 , the freely moving electrons gather on the lower surface of the first dielectric layer 111 . Positively charged particles gather on the upper surface of the first dielectric layer 111 . The positively charged particles on the upper surface of the first dielectric layer 111 generate electrostatic induction with the lower surface of the second dielectric layer 112, so the lower surface of the second dielectric layer 112 generates negatively charged polarized charges, and the second dielectric layer 112 The upper surface of layer 112 generates a positive polarized charge. Due to electrostatic induction, negative charges are accumulated on the back side of the wafer W, and the mutual attraction between the lower surface of the wafer W and the upper surface of the second dielectric layer 112 will make the second dielectric layer 112 opposite to the wafer. Circle W creates attraction. That is to say, it is equivalent to "lifting" the position of the electrode 113 into the second dielectric layer 112, but actually it is not necessary to arrange the electrode 113 in the second dielectric layer 112, so that the second dielectric layer 112 attracts the wafer W by its polarized charge. Since the second dielectric layer 112 does not need to be provided with electrodes 113, the second dielectric layer 112 of the present invention can be compared with the dielectric layer of the electrostatic chuck shown in FIG.
Figure 02_image009
Has a smaller thickness. Even if the thickness can reach 0.01mm. According to the formula (1), due to the reduced thickness of the second dielectric layer 112 , the electrostatic chuck of the present invention only needs a small DC voltage (less than 2000V) to provide sufficient adsorption force for the wafer W. When the applied DC voltage is reduced, the hidden danger of helium sparking on the back side of the wafer W is naturally eliminated.

由於本發明靜電吸盤的漏電流是由第一介電層111和第二介電層112的總電阻值決定的。第一介電層111的電阻在MOhm量級,第二介電層112的電阻在GOhm量級。因而通過將第一介電層111與第二介電層112相結合,與圖4所示的靜電吸盤相比,本發明的靜電吸盤可以顯著降低漏電流,對晶圓W解吸附更為容易。The leakage current of the electrostatic chuck of the present invention is determined by the total resistance of the first dielectric layer 111 and the second dielectric layer 112 . The resistance of the first dielectric layer 111 is on the order of MOhm, and the resistance of the second dielectric layer 112 is on the order of GOhm. Therefore, by combining the first dielectric layer 111 with the second dielectric layer 112, compared with the electrostatic chuck shown in FIG. 4, the electrostatic chuck of the present invention can significantly reduce the leakage current, and it is easier to desorb the wafer W. .

在另一些實施例中,也可以對第一介電層111內的電極113施加負電壓。當施加負電壓時第一介電層111內的電子受到電極113作用遷移聚集在第一介電層111的上表面,而帶正電粒子聚集在第一介電層111的下表面。也即通過漏電流將負電荷傳導至第一介電層111的上表面。同時第二介電層112的下表面的極化電荷為正電荷,第二介電層112的上表面的極化電荷為負電荷。通過靜電感應,晶圓W的背面聚集有正電荷。如此在晶圓W與第二介電層112之間產生電勢差,用於吸附晶圓W。In some other embodiments, a negative voltage may also be applied to the electrodes 113 in the first dielectric layer 111 . When a negative voltage is applied, electrons in the first dielectric layer 111 are moved and collected on the upper surface of the first dielectric layer 111 by the action of the electrode 113 , while positively charged particles are collected on the lower surface of the first dielectric layer 111 . That is, the negative charge is conducted to the upper surface of the first dielectric layer 111 through the leakage current. Meanwhile, the polarized charges on the lower surface of the second dielectric layer 112 are positive charges, and the polarized charges on the upper surface of the second dielectric layer 112 are negative charges. Positive charges are accumulated on the back side of the wafer W by electrostatic induction. In this way, a potential difference is generated between the wafer W and the second dielectric layer 112 for attracting the wafer W.

如圖7所示,第二介電層112與晶圓W接觸的表面設有多個均勻分佈或非均勻分佈的凸起部1121;所述凸起部1121的高度範圍為2~3um。相比於完全通過平面與晶圓W接觸,第二介電層112通過多個凸起部1121減少與晶圓W的接觸面積,可以方便快速解吸附晶圓W。同時通過該凸起部1121使得晶圓W與第二介電層112之間形成一定的間隙。當導熱氣體(如氦氣)注入該間隙中,通過導熱氣體與晶圓W之間熱傳遞,可以帶走晶圓W的熱量。As shown in FIG. 7 , the surface of the second dielectric layer 112 in contact with the wafer W is provided with a plurality of uniformly or non-uniformly distributed protrusions 1121 ; the height of the protrusions 1121 ranges from 2 to 3 μm. Compared with completely contacting the wafer W through the plane, the second dielectric layer 112 reduces the contact area with the wafer W through the plurality of protrusions 1121 , which can facilitate and quickly desorb the wafer W. At the same time, a certain gap is formed between the wafer W and the second dielectric layer 112 through the protruding portion 1121 . When a heat-conducting gas (such as helium) is injected into the gap, the heat of the wafer W can be taken away through the heat transfer between the heat-conducting gas and the wafer W.

本發明的基座110中還設置有多個冷卻管道,所述冷卻管道包含氦氣通道114。如圖7所示,通過所述氦氣通道114將氦氣通至晶圓W與第二介電層112之間的所述間隙,且氦氣通道114避讓所述凸起部1121。A plurality of cooling channels are also provided in the base 110 of the present invention, and the cooling channels include a helium channel 114 . As shown in FIG. 7 , the helium gas is passed to the gap between the wafer W and the second dielectric layer 112 through the helium gas channel 114 , and the helium gas channel 114 avoids the raised portion 1121 .

實施例二Embodiment two

如圖5所示,在本實施例中,第一介電層211嵌入設置在基座210的頂部,且第一介電層211的頂面與基座210的頂面平齊;第二介電層212設置在基座210上並完全覆蓋第一介電層211。第一介電層211位於第二介電層212與基座210包圍形成的空間內,防止第一介電層211中的摻雜物被等離子體侵蝕產生污染物。As shown in FIG. 5, in this embodiment, the first dielectric layer 211 is embedded on the top of the base 210, and the top surface of the first dielectric layer 211 is flush with the top surface of the base 210; The electrical layer 212 is disposed on the base 210 and completely covers the first dielectric layer 211 . The first dielectric layer 211 is located in the space surrounded by the second dielectric layer 212 and the base 210 to prevent the dopant in the first dielectric layer 211 from being eroded by the plasma to produce pollutants.

實施例三Embodiment Three

如圖6所示,在本實施例中,基座310的外側壁設有耐等離子體腐蝕的鍍膜314。通過該鍍膜314保護基座310不受真空反應腔內等離子體侵蝕,並進一步減少顆粒污染物的產生。有利於提高晶圓W加工的成品率。As shown in FIG. 6 , in this embodiment, the outer wall of the base 310 is provided with a plasma-resistant coating 314 . The coating film 314 protects the base 310 from plasma erosion in the vacuum reaction chamber, and further reduces the generation of particle pollutants. It is beneficial to improve the yield of wafer W processing.

本發明還提供一種等離子體反應裝置,包括一等離子體反應腔,所述等離子體反應腔內底部設有如本發明(如上)所述的靜電吸盤,通過所述靜電吸盤吸附待加工的晶圓W。The present invention also provides a plasma reaction device, including a plasma reaction chamber, the bottom of the plasma reaction chamber is provided with an electrostatic chuck as described in the present invention (above), and the wafer W to be processed is adsorbed by the electrostatic chuck .

本發明中,將高電阻率的無摻雜陶瓷材質的第二介電層112完全覆蓋低電阻率的有摻雜陶瓷材質的第一介電層111,並在第一介電層111中設置電極113,實現“抬高”電極113的位置,並且無需在第二介電層112內設置電極113即可使第二介電層112對晶圓W產生靜電吸附力。由於第二介電層112內不包含電極113,因而第二介電層112比習知技術中所使用的高電阻率材質介電層更薄,無需施加過高的直流電壓,即可使第二介電層112產生足夠的吸附力,且有效防止晶圓W背面氦氣打火。進一步,由於本發明的靜電吸盤相比習知技術採用高電阻率材質介電層的靜電吸盤漏電流更小,因而更容易解吸附晶圓W。In the present invention, the second dielectric layer 112 of high-resistivity non-doped ceramic material completely covers the first dielectric layer 111 of low-resistivity doped ceramic material, and is arranged in the first dielectric layer 111 The electrode 113 realizes “elevating” the position of the electrode 113 , and the second dielectric layer 112 can generate electrostatic attraction to the wafer W without disposing the electrode 113 in the second dielectric layer 112 . Since the second dielectric layer 112 does not contain the electrode 113, the second dielectric layer 112 is thinner than the high-resistivity material dielectric layer used in the prior art, and the second dielectric layer 112 can be made without applying an excessively high DC voltage. The second dielectric layer 112 produces sufficient adsorption force and effectively prevents the helium gas from sparking on the back of the wafer W. Further, since the electrostatic chuck of the present invention has a smaller leakage current than the electrostatic chuck using a high-resistivity material dielectric layer in the prior art, it is easier to detach the wafer W.

因此,本發明的靜電吸盤同時具備易於解吸附、無需施加高直流電壓的優點,同時不易被等離子體侵蝕,具有更長的使用壽命,並能夠有效防止氦氣打火,極大地提高了生產效率,並提高了晶圓加工的成功率。Therefore, the electrostatic chuck of the present invention has the advantages of being easy to desorb and does not need to apply a high DC voltage, and is not easily eroded by plasma, has a longer service life, and can effectively prevent helium ignition, greatly improving production efficiency , and improve the success rate of wafer processing.

以上所述,僅為本發明的具體實施方式,但本發明的保護範圍並不局限於此,任何熟悉的所屬技術領域中具有通常知識者在本發明揭露的技術範圍內,可輕易想到各種等效的修改或替換,這些修改或替換都應涵蓋在本發明的保護範圍之內。因此,本發明的保護範圍應以申專利範圍的要求保護範圍為原則。The above is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Anyone familiar with the technical field who has ordinary knowledge can easily think of various other methods within the technical scope disclosed in the present invention. Any effective modification or replacement shall fall within the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the patent application scope.

100:真空反應腔 101:反應腔腔壁 102:開口 110,210,310:基座 111,211:第一介電層 112,311:第二介電層 1121:凸起部 113:電極 114:氦氣通道 120:氣體噴淋頭 125:氣體供應裝置 140:排氣泵 150:射頻電源 152:匹配網路 314:鍍膜 W:晶圓 100: vacuum reaction chamber 101: Reaction cavity wall 102: opening 110,210,310: base 111,211: first dielectric layer 112,311: second dielectric layer 1121: Raised part 113: electrode 114: Helium channel 120: Gas sprinkler head 125: gas supply device 140: exhaust pump 150: RF power supply 152:Matching network 314: coating W: Wafer

為了更清楚地說明本發明技術方案,下面將對描述中所需要使用的附圖作簡單地介紹,顯而易見地,下面描述中的附圖是本發明的一個實施例,對於所屬技術領域中具有通常知識者來講,在不付出具進步性的改變的前提下,還可以根據這些附圖獲得其他的附圖: 圖1A為實施例一中,本發明的靜電吸盤所應用的等離子體反應裝置示意圖; 圖1B、圖2為實施例一中,本發明的靜電吸盤結構示意圖; 圖3為僅使用高電阻率材質介電層的靜電吸盤工作原理示意圖; 圖4為僅使用低電阻率材質介電層的靜電吸盤工作原理示意圖; 圖5為實施例二中,本發明的靜電吸盤結構示意圖; 圖6為實施例三中,本發明的靜電吸盤結構示意圖;以及 圖7為通過氦氣通道將導熱氣體通至晶圓與第二介電層之間的間隙示意圖。 In order to illustrate the technical solution of the present invention more clearly, the accompanying drawings that need to be used in the description will be briefly introduced below. Obviously, the accompanying drawings in the following description are an embodiment of the present invention, and have common knowledge in the technical field For the knowledgeable, other drawings can also be obtained from these drawings without making progressive changes: FIG. 1A is a schematic diagram of a plasma reaction device applied to an electrostatic chuck of the present invention in Embodiment 1; FIG. 1B and FIG. 2 are schematic structural diagrams of the electrostatic chuck of the present invention in Embodiment 1; Fig. 3 is a schematic diagram of the working principle of an electrostatic chuck using only a high-resistivity material dielectric layer; Fig. 4 is a schematic diagram of the working principle of an electrostatic chuck using only a low-resistivity material dielectric layer; Fig. 5 is a schematic structural diagram of the electrostatic chuck of the present invention in Embodiment 2; Fig. 6 is a schematic structural diagram of the electrostatic chuck of the present invention in Embodiment 3; and FIG. 7 is a schematic diagram of passing heat conduction gas to the gap between the wafer and the second dielectric layer through the helium gas channel.

110:基座 110: Base

111:第一介電層 111: the first dielectric layer

112:第二介電層 112: second dielectric layer

113:電極 113: electrode

W:晶圓 W: Wafer

Claims (15)

一種靜電吸盤,其中,包含: 一基座; 一第一介電層,其設置在該基座上;該第一介電層為具有一第一電阻率的一有摻雜陶瓷材質,該第一介電層內設有產生靜電力的一電極;以及 一第二介電層,其設置在該第一介電層上並覆蓋該第一介電層;該第二介電層為具有該第二電阻率的一無摻雜陶瓷材質;該第二電阻率大於該第一電阻率。 An electrostatic chuck, including: a base; A first dielectric layer, which is arranged on the base; the first dielectric layer is a doped ceramic material with a first resistivity, and a device for generating electrostatic force is arranged in the first dielectric layer electrodes; and A second dielectric layer, which is arranged on the first dielectric layer and covers the first dielectric layer; the second dielectric layer is an undoped ceramic material with the second resistivity; the second The resistivity is greater than the first resistivity. 如請求項1所述的靜電吸盤,其中,該第一介電層為有摻雜的AL 2O 3,其摻雜物包含Si、C、Mg,MgO,TiO 2中的任一種或多種。 The electrostatic chuck according to claim 1, wherein the first dielectric layer is doped AL 2 O 3 , and its dopant includes any one or more of Si, C, Mg, MgO, and TiO 2 . 如請求項1所述的靜電吸盤,其中,該第二介電層為無摻雜的AL 2O 3The electrostatic chuck as claimed in claim 1, wherein the second dielectric layer is undoped AL 2 O 3 . 如請求項1所述的靜電吸盤,其中,該第一介電層的電阻率為10 10~10 12Ω.cm。 The electrostatic chuck according to claim 1, wherein the resistivity of the first dielectric layer is 10 10 -10 12 Ω.cm. 如請求項1所述的靜電吸盤,其中,該第二介電層的電阻率大於10 14Ω.cm。 The electrostatic chuck as claimed in claim 1, wherein the resistivity of the second dielectric layer is greater than 10 14 Ω.cm. 如請求項1所述的靜電吸盤,其中,該第二介電層與晶圓接觸的表面設有多個均勻或非均勻分佈的凸起部;該凸起部的高度範圍為2~3um。The electrostatic chuck according to claim 1, wherein the surface of the second dielectric layer in contact with the wafer is provided with a plurality of uniformly or non-uniformly distributed protrusions; the height of the protrusions ranges from 2 to 3 um. 如請求項1所述的靜電吸盤,其中,在該第一介電層、該第二介電層之間還設有用於固定連接該第一介電層、該第二介電層的一黏接層。The electrostatic chuck according to claim 1, wherein an adhesive for fixedly connecting the first dielectric layer and the second dielectric layer is further provided between the first dielectric layer and the second dielectric layer layer. 如請求項1所述的靜電吸盤,其中,該第一介電層的厚度為0.2~2mm。The electrostatic chuck as claimed in claim 1, wherein the thickness of the first dielectric layer is 0.2-2mm. 如請求項1所述的靜電吸盤,其中,該第二介電層的厚度為0.01~0.5mm。The electrostatic chuck as claimed in claim 1, wherein the thickness of the second dielectric layer is 0.01-0.5 mm. 如請求項1所述的靜電吸盤,其中,該第一介電層具有0.6~0.8um的表面粗糙度;該第二介電層具有0.1~0.2um的表面粗糙度。The electrostatic chuck as claimed in claim 1, wherein the first dielectric layer has a surface roughness of 0.6-0.8um; the second dielectric layer has a surface roughness of 0.1-0.2um. 如請求項1所述的靜電吸盤,其中,該第一介電層的底部粘接該基座的頂部,該第二介電層的周邊向下延伸並完全覆蓋該第一介電層的外側壁。The electrostatic chuck as claimed in claim 1, wherein the bottom of the first dielectric layer is bonded to the top of the base, and the periphery of the second dielectric layer extends downward and completely covers the outside of the first dielectric layer wall. 如請求項1所述的靜電吸盤,其中,該第一介電層嵌入設置在該基座的頂部,且該第一介電層的頂面與該基座的頂面平齊;該第二介電層設置在該基座上並完全覆蓋該第一介電層。The electrostatic chuck as claimed in claim 1, wherein the first dielectric layer is embedded on the top of the base, and the top surface of the first dielectric layer is flush with the top surface of the base; the second The dielectric layer is disposed on the base and completely covers the first dielectric layer. 如請求項1所述的靜電吸盤,其中,該基座的外側壁設有耐等離子體腐蝕的一鍍膜。The electrostatic chuck as claimed in claim 1, wherein the outer wall of the base is provided with a coating film resistant to plasma corrosion. 如請求項6所述的靜電吸盤,其中,該基座中設置有多個冷卻管道,該冷卻管道包含一氦氣通道,通過該氦氣通道將氦氣通至晶圓與該第二介電層之間的間隙,且該氦氣通道避讓該凸起部。The electrostatic chuck as claimed in claim 6, wherein a plurality of cooling channels are arranged in the susceptor, and the cooling channels include a helium channel through which the helium gas is passed to the wafer and the second dielectric The gap between the layers, and the helium channel avoids the raised portion. 一種等離子體反應裝置,包括一等離子體反應腔,其中,該等離子體反應腔內底部設有如請求項1至14中任一所述的靜電吸盤,通過該靜電吸盤吸附待加工的晶圓。A plasma reaction device, comprising a plasma reaction chamber, wherein the bottom of the plasma reaction chamber is provided with an electrostatic chuck according to any one of Claims 1 to 14, and the wafer to be processed is adsorbed by the electrostatic chuck.
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