TW202244317A - Electrochemical assembly for forming semiconductor features - Google Patents
Electrochemical assembly for forming semiconductor features Download PDFInfo
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- TW202244317A TW202244317A TW111103828A TW111103828A TW202244317A TW 202244317 A TW202244317 A TW 202244317A TW 111103828 A TW111103828 A TW 111103828A TW 111103828 A TW111103828 A TW 111103828A TW 202244317 A TW202244317 A TW 202244317A
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- 239000004065 semiconductor Substances 0.000 title description 22
- 230000008021 deposition Effects 0.000 claims abstract description 312
- 238000000034 method Methods 0.000 claims abstract description 115
- 230000005684 electric field Effects 0.000 claims abstract description 13
- 229910052751 metal Inorganic materials 0.000 claims description 103
- 239000002184 metal Substances 0.000 claims description 103
- 239000000758 substrate Substances 0.000 claims description 95
- 239000003792 electrolyte Substances 0.000 claims description 76
- 238000009713 electroplating Methods 0.000 claims description 36
- 238000005259 measurement Methods 0.000 claims description 32
- 230000033001 locomotion Effects 0.000 claims description 15
- 238000005530 etching Methods 0.000 claims description 11
- 238000000926 separation method Methods 0.000 claims description 5
- 238000000151 deposition Methods 0.000 abstract description 289
- 238000004070 electrodeposition Methods 0.000 abstract description 9
- 239000010410 layer Substances 0.000 description 93
- 229920002120 photoresistant polymer Polymers 0.000 description 61
- 238000012545 processing Methods 0.000 description 61
- 230000008569 process Effects 0.000 description 58
- 238000007747 plating Methods 0.000 description 48
- 239000012530 fluid Substances 0.000 description 35
- 235000012431 wafers Nutrition 0.000 description 34
- 239000010949 copper Substances 0.000 description 32
- 229910052802 copper Inorganic materials 0.000 description 26
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 25
- 239000000463 material Substances 0.000 description 24
- 238000009826 distribution Methods 0.000 description 19
- 238000005240 physical vapour deposition Methods 0.000 description 19
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 18
- 230000004888 barrier function Effects 0.000 description 18
- 229910021645 metal ion Inorganic materials 0.000 description 17
- 238000001465 metallisation Methods 0.000 description 15
- 238000004519 manufacturing process Methods 0.000 description 11
- 150000002739 metals Chemical class 0.000 description 10
- 239000011135 tin Substances 0.000 description 10
- 239000000203 mixture Substances 0.000 description 9
- 229910052759 nickel Inorganic materials 0.000 description 9
- 229910000679 solder Inorganic materials 0.000 description 9
- 229910052718 tin Inorganic materials 0.000 description 9
- 230000015572 biosynthetic process Effects 0.000 description 8
- 238000013461 design Methods 0.000 description 8
- 238000011161 development Methods 0.000 description 8
- 230000009467 reduction Effects 0.000 description 8
- 230000004044 response Effects 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- 239000000243 solution Substances 0.000 description 8
- 239000000126 substance Substances 0.000 description 8
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 7
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 7
- 230000004913 activation Effects 0.000 description 7
- 238000000231 atomic layer deposition Methods 0.000 description 7
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 7
- 238000005229 chemical vapour deposition Methods 0.000 description 7
- 238000004891 communication Methods 0.000 description 6
- 238000001459 lithography Methods 0.000 description 6
- -1 nickel and cobalt Chemical class 0.000 description 6
- 239000001301 oxygen Substances 0.000 description 6
- 229910052760 oxygen Inorganic materials 0.000 description 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 6
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 5
- 230000003213 activating effect Effects 0.000 description 5
- 238000003491 array Methods 0.000 description 5
- 238000000429 assembly Methods 0.000 description 5
- 230000000712 assembly Effects 0.000 description 5
- 238000004140 cleaning Methods 0.000 description 5
- 239000003989 dielectric material Substances 0.000 description 5
- 239000007789 gas Substances 0.000 description 5
- 230000003647 oxidation Effects 0.000 description 5
- 238000007254 oxidation reaction Methods 0.000 description 5
- 238000000206 photolithography Methods 0.000 description 5
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 5
- 239000004332 silver Substances 0.000 description 5
- 239000000654 additive Substances 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 230000008859 change Effects 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- 229910017052 cobalt Inorganic materials 0.000 description 4
- 239000010941 cobalt Substances 0.000 description 4
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 4
- 229910001431 copper ion Inorganic materials 0.000 description 4
- 238000005260 corrosion Methods 0.000 description 4
- 230000007797 corrosion Effects 0.000 description 4
- 238000005137 deposition process Methods 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 238000004806 packaging method and process Methods 0.000 description 4
- 238000000059 patterning Methods 0.000 description 4
- 238000012546 transfer Methods 0.000 description 4
- 229910001316 Ag alloy Inorganic materials 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 3
- 238000013459 approach Methods 0.000 description 3
- 239000012298 atmosphere Substances 0.000 description 3
- 238000003486 chemical etching Methods 0.000 description 3
- 239000007795 chemical reaction product Substances 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 238000007772 electroless plating Methods 0.000 description 3
- 238000011049 filling Methods 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 238000003754 machining Methods 0.000 description 3
- 229910052763 palladium Inorganic materials 0.000 description 3
- 239000012071 phase Substances 0.000 description 3
- 239000011148 porous material Substances 0.000 description 3
- 239000010948 rhodium Substances 0.000 description 3
- 229910052715 tantalum Inorganic materials 0.000 description 3
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 3
- 238000011282 treatment Methods 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- QCEUXSAXTBNJGO-UHFFFAOYSA-N [Ag].[Sn] Chemical compound [Ag].[Sn] QCEUXSAXTBNJGO-UHFFFAOYSA-N 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- 230000000996 additive effect Effects 0.000 description 2
- 238000004380 ashing Methods 0.000 description 2
- 229910052797 bismuth Inorganic materials 0.000 description 2
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 235000020669 docosahexaenoic acid Nutrition 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- BWHMMNNQKKPAPP-UHFFFAOYSA-L potassium carbonate Chemical compound [K+].[K+].[O-]C([O-])=O BWHMMNNQKKPAPP-UHFFFAOYSA-L 0.000 description 2
- 239000000376 reactant Substances 0.000 description 2
- 229910052703 rhodium Inorganic materials 0.000 description 2
- MHOVAHRLVXNVSD-UHFFFAOYSA-N rhodium atom Chemical compound [Rh] MHOVAHRLVXNVSD-UHFFFAOYSA-N 0.000 description 2
- 229910052707 ruthenium Inorganic materials 0.000 description 2
- 150000003839 salts Chemical class 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- 238000004528 spin coating Methods 0.000 description 2
- 239000013589 supplement Substances 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- LEONUFNNVUYDNQ-UHFFFAOYSA-N vanadium atom Chemical compound [V] LEONUFNNVUYDNQ-UHFFFAOYSA-N 0.000 description 2
- YPFNIPKMNMDDDB-UHFFFAOYSA-K 2-[2-[bis(carboxylatomethyl)amino]ethyl-(2-hydroxyethyl)amino]acetate;iron(3+) Chemical compound [Fe+3].OCCN(CC([O-])=O)CCN(CC([O-])=O)CC([O-])=O YPFNIPKMNMDDDB-UHFFFAOYSA-K 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 239000002033 PVDF binder Substances 0.000 description 1
- 239000004698 Polyethylene Substances 0.000 description 1
- 239000004743 Polypropylene Substances 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910007637 SnAg Inorganic materials 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 150000007513 acids Chemical class 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 239000010405 anode material Substances 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 239000008346 aqueous phase Substances 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 229910052793 cadmium Inorganic materials 0.000 description 1
- BDOSMKKIYDKNTQ-UHFFFAOYSA-N cadmium atom Chemical compound [Cd] BDOSMKKIYDKNTQ-UHFFFAOYSA-N 0.000 description 1
- 238000004422 calculation algorithm Methods 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 230000003197 catalytic effect Effects 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000008139 complexing agent Substances 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000005094 computer simulation Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- YCKOAAUKSGOOJH-UHFFFAOYSA-N copper silver Chemical compound [Cu].[Ag].[Ag] YCKOAAUKSGOOJH-UHFFFAOYSA-N 0.000 description 1
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000002939 deleterious effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 239000010411 electrocatalyst Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- XUCNUKMRBVNAPB-UHFFFAOYSA-N fluoroethene Chemical compound FC=C XUCNUKMRBVNAPB-UHFFFAOYSA-N 0.000 description 1
- 238000009472 formulation Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 230000002209 hydrophobic effect Effects 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 229910052741 iridium Inorganic materials 0.000 description 1
- GKOZUEZYRPOHIO-UHFFFAOYSA-N iridium atom Chemical compound [Ir] GKOZUEZYRPOHIO-UHFFFAOYSA-N 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 239000010955 niobium Substances 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
- 229910000510 noble metal Inorganic materials 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 239000006174 pH buffer Substances 0.000 description 1
- MUJIDPITZJWBSW-UHFFFAOYSA-N palladium(2+) Chemical compound [Pd+2] MUJIDPITZJWBSW-UHFFFAOYSA-N 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 229920001155 polypropylene Polymers 0.000 description 1
- 239000004810 polytetrafluoroethylene Substances 0.000 description 1
- 229920001343 polytetrafluoroethylene Polymers 0.000 description 1
- 239000004800 polyvinyl chloride Substances 0.000 description 1
- 229920002981 polyvinylidene fluoride Polymers 0.000 description 1
- 229910000027 potassium carbonate Inorganic materials 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 238000004886 process control Methods 0.000 description 1
- 238000011112 process operation Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 238000007670 refining Methods 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 238000009877 rendering Methods 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000006557 surface reaction Methods 0.000 description 1
- 230000009897 systematic effect Effects 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 229910052716 thallium Inorganic materials 0.000 description 1
- BKVIYDNLLOSFOA-UHFFFAOYSA-N thallium Chemical compound [Tl] BKVIYDNLLOSFOA-UHFFFAOYSA-N 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001432 tin ion Inorganic materials 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- IUTCEZPPWBHGIX-UHFFFAOYSA-N tin(2+) Chemical compound [Sn+2] IUTCEZPPWBHGIX-UHFFFAOYSA-N 0.000 description 1
- SYRHIZPPCHMRIT-UHFFFAOYSA-N tin(4+) Chemical compound [Sn+4] SYRHIZPPCHMRIT-UHFFFAOYSA-N 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- 238000006276 transfer reaction Methods 0.000 description 1
- 229910052720 vanadium Inorganic materials 0.000 description 1
- 238000007704 wet chemistry method Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
- C25D5/022—Electroplating of selected surface areas using masking means
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D17/00—Constructional parts, or assemblies thereof, of cells for electrolytic coating
- C25D17/001—Apparatus specially adapted for electrolytic coating of wafers, e.g. semiconductors or solar cells
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D21/00—Processes for servicing or operating cells for electrolytic coating
- C25D21/12—Process control or regulation
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
- C25D5/026—Electroplating of selected surface areas using locally applied jets of electrolyte
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/08—Electroplating with moving electrolyte e.g. jet electroplating
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
- C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
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- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Life Sciences & Earth Sciences (AREA)
- Sustainable Development (AREA)
- Automation & Control Theory (AREA)
- Electroplating Methods And Accessories (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
本揭露係關於基板處理系統,更具體而言係關於提供半導體電性內連件的電化學組件。The present disclosure relates to substrate processing systems, and more particularly to electrochemical assemblies that provide semiconductor electrical interconnects.
此處所提供之先前技術描述係為了一般性呈現本揭露之背景的目的。本案列名發明人的工作成果、至此先前技術段落的所述範圍、以及申請時可能不適格作為先前技術的實施態樣,均不明示或暗示承認為對抗本揭露內容的先前技術。The prior art description provided here is for the purpose of generally presenting the context of the disclosure. The work achievements of the inventors listed in this case, the scope of the prior art paragraphs so far, and the implementation forms that may not qualify as prior art at the time of application are not explicitly or implicitly recognized as prior art against the content of the disclosure.
一般來說,係使用各種半導體工具實行半導體處理的態樣以沉積金屬,從而形成半導體內連件。此半導體工具可包括金屬沉積工具(例如,用以提供晶種金屬層及/或主體金屬層的物理氣相沉積(PVD)工具、化學氣相沉積(CVD)工具或原子層沉積(ALD)工具)、光阻沉積工具(例如,旋塗器或乾式光阻沉積工具)、微影工具(例如,光微影工具)、光阻顯影工具、除渣或灰化工具(例如,光阻除渣工具)、電鍍工具(例如,電鍍工具)、光阻剝除工具,及/或金屬蝕刻工具(例如,濕式金屬蝕刻工具)。Generally, it is an aspect of semiconductor processing performed using various semiconductor tools to deposit metal to form semiconductor interconnects. The semiconductor tool may include a metal deposition tool (e.g., a physical vapor deposition (PVD) tool, a chemical vapor deposition (CVD) tool, or an atomic layer deposition (ALD) tool to provide a seed metal layer and/or a bulk metal layer. ), photoresist deposition tool (for example, spin coater or dry photoresist deposition tool), lithography tool (for example, photolithography tool), photoresist development tool, descum or ashing tool (for example, photoresist descum tools), electroplating tools (eg, electroplating tools), photoresist stripping tools, and/or metal etching tools (eg, wet metal etching tools).
此等半導體工具可組合使用於鑲嵌處理(用以沉積金屬的加成處理),或是貫穿光阻處理及金屬化而使用。鑲嵌處理常使用於較高深寬比矽穿孔(TSV)的內連件,以及大於3且伴隨著亞0.5微米(μm)的流體孔洞及線內連件的階層。貫穿光阻處理及金屬化常使用於尺寸約大於1 μm且約小於3層的封裝內連件形成(重新分佈層、銅柱體凸塊、受控塌陷晶片連接件(C4)鍍焊料凸塊等)。These semiconductor tools can be used in combination for damascene processing (additive processing to deposit metal), or through photoresist processing and metallization. Damascene processing is often used for higher aspect ratio through-silicon via (TSV) interconnects, as well as levels greater than 3 with sub-0.5 micron (μm) fluidic holes and line interconnects. Through photoresist processing and metallization are often used for package interconnect formation (redistribution layers, copper pillar bumps, controlled collapse die connectors (C4) plated solder bumps) with dimensions greater than about 1 μm and about less than 3 layers Wait).
除了所欲的電流承載金屬內連件線/通孔的電鍍之外,這些半導體工具及處理的各者還使用複數輔助性處理及硬體(光阻塗覆、微影、光阻顯影、光阻剝除及清潔、化學機械研磨、濕式蝕刻)。In addition to the desired plating of current-carrying metal interconnect lines/vias, each of these semiconductor tools and processes employs a multitude of ancillary processes and hardware (photoresist coating, lithography, photoresist development, photoresist stripping and cleaning, chemical mechanical polishing, wet etching).
鑲嵌半導體處理(包括矽穿孔(TSVs)的形成)可在介電質膜(例如低介電質常數(K)二氧化矽(SiO 2))中形成凹陷空腔。使用光微影工具在介電質膜中界定蝕刻區域,以提供形成遮罩(例如,金屬膜)。此步驟後係接著以PVD工具進行暴露表面的PVD金屬化,以將外部及內部表面塗覆晶種層及阻障物層(通常是銅(Cu)及鉭(Ta)、鈦(Ti)、鈦氮化物(TiN)或鉭氮化物(TaN))。 Damascene semiconductor processing, including the formation of through-silicon vias (TSVs), can form recessed cavities in dielectric films such as low-K silicon dioxide (SiO 2 ). Etched areas are defined in the dielectric film using photolithography tools to provide a mask (eg, metal film). This step is followed by PVD metallization of the exposed surfaces with a PVD tool to coat the external and internal surfaces with a seed layer and a barrier layer (typically copper (Cu) and tantalum (Ta), titanium (Ti), Titanium Nitride (TiN) or Tantalum Nitride (TaN)).
PVD金屬化通常具有高的側壁覆蓋選擇性,使鑲嵌結構的邊緣壁(特別是該結構的底部處)被充分覆蓋,而允許完整的電性連接及電鍍從底至上的填充。接著,凹陷結構係「從底至上」進行電鍍,並且可使用金屬蝕刻工具進行該表面的化學機械研磨(CMP),以在通常表面下方留下孤立線/通孔。PVD metallization usually has high sidewall coverage selectivity, so that the edge walls of the damascene structure (especially at the bottom of the structure) are fully covered, allowing complete electrical connection and plating bottom-up filling. The recessed structures are then plated "bottom up" and chemical mechanical polishing (CMP) of the surface can be performed using metal etch tools to leave isolated lines/vias below the surface typically.
貫穿光阻處理及金屬化係用以形成凸塊及/或線,該凸塊及/或線在處理結束時會在通常表面上方產生內連件結構。貫穿光阻處理及金屬化通常涉及使用金屬沉積工具以對暴露表面(例如,Cu/2000埃(Å)覆蓋在Ta/200Å上方的毯覆PVD金屬層)埋種(seed)。接著,光阻沉積工具可用於塗覆光阻膜或濕式光阻層(藉由旋塗器,在該光阻層係接著乾燥/固化)。該光阻層可為正調性或負調性的(暴露區域在顯影後係被移除或保留)。接著,在微影步驟中使用光微影工具以將光阻曝光。接著,使用光阻顯影工具以藉由浸沒在適合該光阻的特定類型及化學配方的顯影溶液中而選擇性移除光阻。在顯影後,可使用除渣工具以移除存留在特徵部的基部處的殘留光阻,可將該晶圓表面暴露至氧電漿而移除該殘留光阻(有時稱作「除渣步驟」)。通常,在此步驟期間,氧末端基會取代光阻表面的疏水性有機末端基,使有機光阻膜更具親水性。接著,該晶圓具有往下到達晶種層的一組光阻開口,而電鍍工具係電鍍及填充這些開口以形成凸塊、線、厚焊料膜(其回流而形成球),或是位於銅凸塊頂部上的較薄焊料層以形成銅/焊料(例如Cu/SnAg)柱體。Through photoresist processing and metallization is used to form bumps and/or lines that, at the end of the process, result in interconnect structures above the surface typically. Through photoresist processing and metallization typically involves the use of metal deposition tools to seed exposed surfaces (eg Cu/2000 Å blanketed PVD metal layer over Ta/200 Å). Next, the photoresist deposition tool can be used to apply a photoresist film or a wet photoresist layer (by spin coater where the photoresist layer is then dried/cured). The photoresist layer can be toned or toned (exposed areas are removed or retained after development). Next, a photolithography tool is used in a lithography step to expose the photoresist. Next, a photoresist developing tool is used to selectively remove the photoresist by immersion in a developing solution appropriate for the particular type and chemical formulation of the photoresist. After development, a descum tool may be used to remove residual photoresist remaining at the base of the features, which may be removed by exposing the wafer surface to an oxygen plasma (sometimes referred to as "scum removal"). step"). Typically, during this step, the oxygen end groups replace the hydrophobic organic end groups on the resist surface, making the organic resist film more hydrophilic. The wafer then has a set of photoresist openings down to the seed layer, and the plating tools plate and fill these openings to form bumps, lines, thick solder films (which reflow to form balls), or on copper A thinner layer of solder on top of the bumps to form copper/solder (eg Cu/SnAg) pillars.
本文中的各種實施例係關於電化學沉積的方法,設備及系統。本文所述技術得以無光阻形成金屬特徵部,將用於形成此特徵部的處理方案實質簡化及使相關的資本及處理成本最小化。在某些實施例中,本文中的技術使用沉積頭(例如,印刷頭)以界定促進電化學沉積的電場。某些實施例任選地使用流體分佈頭(FDH)以提供可被進行沉積的金屬離子的來源。可使用系統及控制器,該系統及控制器可助於沉積頭及/或FDH在鄰近工件的對準或定位,補充沉積頭附近的電解質,及/或控制經沉積特徵部(例如,經印刷特徵部)的尺寸及位置。Various embodiments herein relate to methods, apparatus and systems for electrochemical deposition. The techniques described herein enable photoresist-free formation of metal features, substantially simplifying the processing scheme used to form such features and minimizing associated capital and processing costs. In certain embodiments, the techniques herein use a deposition head (eg, a print head) to define an electric field that promotes electrochemical deposition. Certain embodiments optionally use a fluid distribution head (FDH) to provide a source of metal ions that can be deposited. Systems and controllers can be used that can facilitate alignment or positioning of the deposition head and/or FDH adjacent to the workpiece, replenish electrolyte near the deposition head, and/or control deposited features (e.g., printed Features) size and location.
本揭示的某些態樣係關於組件,其特徵可再於下列特徵:(a) 沉積頭,包括設置在該沉積頭的近側表面上的複數陽極像素的陣列,其中陽極像素的該陣列包括複數惰性電極,以及配置以供應電流以選擇該複數惰性電極的其中一或更多者的複數控制裝置;(b) 間隙測量系統,包括一或更多感測元件,其中該間隙測量系統係配置以透過測量該一或更多感測元件的至少一感測元件與工件的下方部分之間的區域的阻抗,藉以測量該沉積頭的該近側表面與該工件的表面之間的距離;以及(c) 控制器,連接至該沉積頭,並且係配置以驅使對該陣列供應電流及/或電壓,或在該工件與該陣列之間供應電位差,從而形成由該等陽極像素的一或更多者所界定的電場。Certain aspects of the present disclosure relate to assemblies that may be further characterized by: (a) a deposition head comprising an array of anode pixels disposed on a proximal surface of the deposition head, wherein the array of anode pixels comprises a plurality of inert electrodes, and a plurality of control devices configured to supply current to select one or more of the plurality of inert electrodes; (b) a gap measurement system comprising one or more sensing elements, wherein the gap measurement system is configured measuring the distance between the proximal surface of the deposition head and the surface of the workpiece by measuring impedance of a region between at least one of the one or more sensing elements and a lower portion of the workpiece; and (c) a controller connected to the deposition head and configured to drive the supply of current and/or voltage to the array, or to supply a potential difference between the workpiece and the array, thereby forming one or more of the anodic pixels The electric field defined by the multiple.
在一些實施例中,該組件額外包括對準系統,該對準系統包括:複數精細致動器元件,附接至該沉積頭,其中該等精細致動器元件係配置以將該沉積頭的該近側表面定位在對於該工件的該表面為第一間隙距離內,及/或使該沉積頭的該近側表面位於平行該工件的該表面的平面上。在一些實施例中,該對準系統係配置以控制沿著五個軸的運動,包括三個互相垂直的線性軸,以及兩個轉動軸,其中該兩個轉動軸係經定向使該沉積頭的平面性可相對於該工件進行調整。在一些實施例中,該對準系統係配置以透過配置成三角形的三個精細致動器元件的組,或是配置成三角形的二個精細致動器元件及第三固定點,而沿著該二個轉動軸控制運動。In some embodiments, the assembly additionally includes an alignment system comprising: a plurality of fine actuator elements attached to the deposition head, wherein the fine actuator elements are configured to The proximal surface is positioned within a first gap distance to the surface of the workpiece and/or such that the proximal surface of the deposition head lies on a plane parallel to the surface of the workpiece. In some embodiments, the alignment system is configured to control motion along five axes, including three mutually perpendicular linear axes, and two rotational axes, wherein the two rotational axes are oriented such that the deposition head The planarity can be adjusted relative to the workpiece. In some embodiments, the alignment system is configured to move along the The two rotational axes control the movement.
在某些實施例中,該一或更多感測元件的至少一者係設置在該沉積頭的該近側表面上,並且與電路電性連接以判斷該感測元件與該工件的該表面之間的距離。在某些實施例中,該一或更多感測元件的至少一者係與供電電路及感測電路電性耦接。在某些實施例中,該至少一感測元件包括該複數惰性電極的其中一者。In some embodiments, at least one of the one or more sensing elements is disposed on the proximal surface of the deposition head and is electrically connected to circuitry for determining whether the sensing element is related to the surface of the workpiece the distance between. In some embodiments, at least one of the one or more sensing elements is electrically coupled to the power supply circuit and the sensing circuit. In some embodiments, the at least one sensing element includes one of the plurality of inert electrodes.
在一些實施例中,該控制器係配置以提供經沉積特徵部的方式供應該電流及/或該電壓,或是供應該電位差,且其中該經沉積特徵部係透過單一陽極像素或透過複數陽極像素而加以沉積。在一些情況下,該控制器係配置以驅使:供應該電流、該電壓或該電位差至一組相連陽極像素,以界定該經沉積特徵部的形狀或尺寸。In some embodiments, the controller is configured to supply the current and/or the voltage, or to supply the potential difference, in a manner to provide a deposited feature, and wherein the deposited feature is through a single anode pixel or through a plurality of anodes Pixels are deposited. In some cases, the controller is configured to cause: supply of the current, the voltage, or the potential difference to a group of connected anode pixels to define the shape or size of the deposited feature.
在一些實施例中,該組件額外包括供電電路,與該複數惰性電極電性耦接,其中該供電電路係配置以施予第一電位及/或電流使該等惰性電極相對於該工件係作為陽極,以及施予第二電位及/或電流使該等惰性電極相對於輔助電極係作為陰極。在一些實行例中,該輔助電極包括電鍍至該等惰性電極上的金屬。In some embodiments, the assembly additionally includes a power supply circuit electrically coupled to the plurality of inertial electrodes, wherein the power supply circuit is configured to apply a first potential and/or current so that the inertial electrodes act as an anode, and applying a second potential and/or current to make the inert electrodes act as cathodes relative to the auxiliary electrodes. In some implementations, the auxiliary electrode includes a metal plated onto the inert electrodes.
在一些實施例中,該間隙測量系統係配置以透過施加輸入信號波至該至少一感測元件而測量該至少一感測元件與該工件的該下方部分之間的該區域的該阻抗。In some embodiments, the gap measurement system is configured to measure the impedance of the region between the at least one sensing element and the lower portion of the workpiece by applying an input signal wave to the at least one sensing element.
該輸入信號波可具有約1至100毫伏的振幅。該輸入信號波可具有約100 kHz至10 MHz的頻率。該輸入信號波可具有約1 MHz至10 MHz的頻率。The input signal wave may have an amplitude of about 1 to 100 millivolts. The input signal wave may have a frequency of about 100 kHz to 10 MHz. The input signal wave may have a frequency of about 1 MHz to 10 MHz.
在某些實施例中,該控制器係進一步配置以使用從該間隙測量系統所測量的距離,以保持該沉積頭的該近側表面與該工件上的正在生長的經沉積特徵部的表面之間的距離。在某些實施例中,該控制器係進一步配置以保持該沉積頭的該近側表面與該工件上的該正在生長的經沉積特徵部的該表面之間的恆定距離。在一些實行例中,該控制器及/或該間隙測量系統使用一經驗模型,該經驗模型將阻抗資訊關聯於該沉積頭的該近側表面與該工件上的該正在生長的經沉積特徵部的該表面之間的該距離。In some embodiments, the controller is further configured to use the distance measured from the gap measurement system to maintain a distance between the proximal surface of the deposition head and the surface of a growing deposited feature on the workpiece. distance between. In certain embodiments, the controller is further configured to maintain a constant distance between the proximal surface of the deposition head and the surface of the growing deposited feature on the workpiece. In some implementations, the controller and/or the gap measurement system uses an empirical model that correlates impedance information between the proximal surface of the deposition head and the growing deposited feature on the workpiece The distance between the surfaces of .
在一些實施例中,該複數惰性電極在絕緣工件中的複數孔洞內為凹陷的,從而允許金屬從輔助電極電鍍至該複數惰性電極上,以及從該複數惰性電極除電鍍至工件上。在一些實行例中,該絕緣工件中的該等孔洞侷限著被電鍍至該複數惰性電極上的該金屬的位置。In some embodiments, the plurality of idle electrodes are recessed within the plurality of holes in the insulating workpiece to allow electroplating of metal from the auxiliary electrode onto the plurality of idle electrodes and deelectroplating from the plurality of idle electrodes onto the workpiece. In some implementations, the holes in the insulating workpiece confine the location of the metal that is plated onto the inert electrodes.
本揭示的某些態樣關於在工件上電鍍複數橫向分隔特徵部的方法。此方法的特徵可在於下列操作:(a) 將沉積頭定位於第一位置,且當位於該第一位置時,將金屬電鍍至該沉積頭的複數陽極像素的複數惰性電極上;(b) 在(a)之前或之後,測量該沉積頭與該工件,或位於該工件的位置處的另一基板之間的間隙,其中測量該間隙包括判斷該間隙附近的電解質的阻抗;以及(c) 使用從(b)所測量的該間隙,將該沉積頭定位於鄰近該工件的第二位置,且當位於該第二位置時,將金屬從該複數惰性電極電鍍至工件上,以至少部分形成該等橫向分隔特徵部。Certain aspects of the disclosure pertain to methods of electroplating a plurality of laterally spaced features on a workpiece. The method can be characterized by the following operations: (a) positioning the deposition head in a first position, and while in the first position, electroplating metal onto the plurality of inert electrodes of the plurality of anode pixels of the deposition head; (b) Before or after (a), measuring a gap between the deposition head and the workpiece, or another substrate at the location of the workpiece, wherein measuring the gap includes determining the impedance of an electrolyte adjacent the gap; and (c) Using the gap measured from (b), the deposition head is positioned in a second position adjacent the workpiece, and while in the second position, metal is electroplated from the plurality of inert electrodes onto the workpiece to at least partially form The lateral separation features.
在一些實施例中,該方法額外包括:(d) 判斷該等橫向分隔特徵部尚未完全形成;以及(e) 重複進行操作(a)、(b)及(c)。在一些實施例中,該方法額外包括:在將沉積頭定位於該第一位置後,且將金屬電鍍至該複數惰性電極上之前,在該沉積頭與該工件之間輸送電解質。In some embodiments, the method additionally includes: (d) determining that the lateral separation features are not fully formed; and (e) repeating operations (a), (b) and (c). In some embodiments, the method additionally includes delivering electrolyte between the deposition head and the workpiece after positioning the deposition head at the first position and prior to electroplating metal onto the plurality of inert electrodes.
在一些實施例中,該方法額外包括將該沉積移動至鄰近該工件的第三位置,並在該工件上電鍍額外的複數特徵部。在一些實施例中,該方法額外包括蝕刻該工件上的導電晶種層的一部份。In some embodiments, the method additionally includes moving the deposition to a third location adjacent the workpiece and plating an additional plurality of features on the workpiece. In some embodiments, the method additionally includes etching a portion of the conductive seed layer on the workpiece.
在某些實施例中,測量該工件與該沉積頭之間的該間隙包括測量不在一條線上的三或更多分隔位置處的間隙。在一些實行例中,將該沉積頭定位於鄰近該工件的第二位置包括更改該沉積頭的位置,使該工件及該沉積頭對準於平行平面上。In some embodiments, measuring the gap between the workpiece and the deposition head includes measuring gaps at three or more spaced locations that are not in a line. In some implementations, positioning the deposition head at the second position adjacent the workpiece includes repositioning the deposition head so that the workpiece and the deposition head are aligned on parallel planes.
在某些實施例中,將該沉積頭定位於鄰近該工件的第二位置包括將附接於該沉積頭的複數精細致動器元件的其中一或更多者進行作動,以將該沉積頭的近側表面定位在對於該工件的該表面為第一間隙距離內,及/或使該沉積頭的該近側表面位於平行該工件的該表面的平面上。在一些實行例中,將該沉積頭定位於鄰近該工件的第二位置包括控制沿著五個軸的其中一或更多者的運動,該五個軸包括三個互相垂直的線性軸,以及兩個轉動軸。In some embodiments, positioning the deposition head at a second position adjacent to the workpiece includes actuating one or more of a plurality of fine actuator elements attached to the deposition head to cause the deposition head to The proximal surface of the workpiece is positioned within a first gap distance to the surface of the workpiece, and/or the proximal surface of the deposition head is positioned on a plane parallel to the surface of the workpiece. In some implementations, positioning the deposition head at the second position adjacent the workpiece includes controlling movement along one or more of five axes, including three mutually perpendicular linear axes, and Two axes of rotation.
本發明內容的以下部分係辨別本揭示的某些替代性態樣。在第一此種態樣中,本揭露包含組件(例如,沉積頭組件或印刷頭組件),包括:沉積頭(例如,印刷頭),包括設置沉積頭的近側表面上的至少一陽極;以及流體分佈頭(FDH)。在一些實施例中,沉積頭至少部分被FDH圍繞,或是被結合至FDH中,其中該FDH包括與FDH的近側表面流體連通的複數埠口。在其他實施例中,埠口係配置以供應及/或移除至少一陽極附近的電解質。The following sections of this Summary identify certain alternative aspects of the disclosure. In a first such aspect, the present disclosure encompasses an assembly (eg, a deposition head assembly or a printhead assembly) comprising: a deposition head (eg, a printhead) including at least one anode disposed on a proximal surface of the deposition head; and Fluid Distribution Head (FDH). In some embodiments, the deposition head is at least partially surrounded by, or incorporated into, a FDH, wherein the FDH includes a plurality of ports in fluid communication with a proximal surface of the FDH. In other embodiments, the port is configured to supply and/or remove electrolyte proximate to at least one anode.
在第二態樣中,本揭露包含組件,包括:間隙測量系統,包括一或更多感測元件(例如,本文所述的任何者)。在一些實施例中,間隙測量系統係配置以測量沉積頭的近側表面或FDH的近側表面對於工件的表面之間的距離。In a second aspect, the present disclosure encompasses components including: a gap measurement system including one or more sensing elements (eg, any described herein). In some embodiments, the gap measurement system is configured to measure the distance between the proximal surface of the deposition head or the proximal surface of the FDH to the surface of the workpiece.
在第三態樣中,本揭露包括組件(例如,沉積頭組件或印刷頭組件),包括:沉積頭(例如,印刷頭),包括陽極像素陣列;FDH,配置以圍繞該陣列;以及間隙測量系統,包括一或更多感測元件,其中該間隙測量系統係配置以測量沉積頭的近側表面或FDH的近側表面對於工件的表面之間的距離。在一些實施例中,該陣列係設置在沉積頭的近側表面上,其中各陽極像素包括虛電極、活性電極或惰性電極。在其他實施例中,FDH包括與FDH的近側表面流體連通的複數埠口,其中該埠口係配置以供應及/或移除陽極像素附近的電解質。In a third aspect, the present disclosure includes an assembly (e.g., a deposition head assembly or a print head assembly) including: a deposition head (e.g., a print head) including an array of anode pixels; an FDH configured to surround the array; and a gap measurement A system comprising one or more sensing elements, wherein the gap measurement system is configured to measure a distance between a proximal surface of the deposition head or a proximal surface of the FDH and a surface of the workpiece. In some embodiments, the array is disposed on the proximal surface of the deposition head, wherein each anode pixel includes a dummy electrode, an active electrode, or an inert electrode. In other embodiments, the FDH includes a plurality of ports in fluid communication with the proximal surface of the FDH, wherein the ports are configured to supply and/or remove electrolyte proximate to the anode pixel.
在第四態樣中,本揭露包括組件(例如,沉積頭組件或印刷頭組件),包括:沉積頭(例如,印刷頭或本文所述的任何者);FDH(例如,本文所述的任何者),配置以圍繞該陣列;間隙測量系統(例如,本文所述的任何者)包括一或更多感測元件;以及對準系統。在一些實施例中,對準系統包括:複數精細致動器元件,直接或間接附接至該沉積頭;以及安裝組件,直接或間接附接至該FDH。在特定實施例中,精細致動器元件係配置以將該陣列定位在對於工件的表面的第一間隙距離內及/或使沉積頭的近側表面與工件的表面共平面。在其他實施例中,安裝組件包括粗致動器,以將FDH垂直定位在對於工件的表面的第二間隙距離內。In a fourth aspect, the present disclosure includes an assembly (e.g., a deposition head assembly or a print head assembly) including: a deposition head (e.g., a print head or any described herein); an FDH (e.g., any of the or) configured to surround the array; a gap measurement system (eg, any described herein) including one or more sensing elements; and an alignment system. In some embodiments, an alignment system includes: a plurality of fine actuator elements attached directly or indirectly to the deposition head; and a mounting assembly attached directly or indirectly to the FDH. In a particular embodiment, the fine actuator elements are configured to position the array within a first gap distance to the surface of the workpiece and/or to bring the proximal surface of the deposition head coplanar with the surface of the workpiece. In other embodiments, the mounting assembly includes a coarse actuator to vertically position the FDH within the second clearance distance to the surface of the workpiece.
在第五態樣中,本揭露包括提供經沉積特徵部(例如,經印刷特徵部)的方法,該方法包括:接收工件,包括設置在其表面上的晶種層,其中該晶種層係導電的;將沉積頭(例如,印刷頭或本文所述的任何者)定位在工件表面附近;透過被配置以圍繞該沉積頭的FDH將電解質輸送至陽極像素;以及活化一或更多陽極像素,從而在第一位置處提供經沉積特徵部(例如,經印刷特徵部)。在一些實施例中,沉積頭包括複數陽極像素的陣列,且FDH係配置以圍繞該陣列。In a fifth aspect, the present disclosure includes a method of providing deposited features (eg, printed features), the method comprising: receiving a workpiece including a seed layer disposed on a surface thereof, wherein the seed layer is Conductive; positioning a deposition head (e.g., a print head or any of those described herein) near the workpiece surface; delivering electrolyte to the anode pixels through an FDH configured to surround the deposition head; and activating one or more anode pixels , thereby providing deposited features (eg, printed features) at the first location. In some embodiments, the deposition head includes an array of anode pixels, and the FDH is configured to surround the array.
在一些實施例中,所述定位包括:判斷沉積頭的近側表面與工件的表面之間的距離;以及將沉積頭的近側表面對準在對於工件表面的第一間隙距離內及/或使沉積頭的近側表面與工件的表面為共平面的。在特定實施例中,第一間隙距離比上陣列尺寸的比率係從0.1:1至1:0.5。在其他實施例中,陣列尺寸為二個陽極像素之間的距離,或單一陽極像素的特徵部尺寸(例如,寬度、高度或直徑)。In some embodiments, the positioning includes: determining the distance between the proximal surface of the deposition head and the surface of the workpiece; and aligning the proximal surface of the deposition head within a first gap distance to the workpiece surface and/or The proximal surface of the deposition head is made coplanar with the surface of the workpiece. In a specific embodiment, the ratio of the first gap distance to the array size is from 0.1:1 to 1:0.5. In other embodiments, the array dimension is the distance between two anode pixels, or the feature dimension (eg, width, height, or diameter) of a single anode pixel.
在一些實施例中,所述定位包括(例如,在所述對準之前):將FDH的近側表面垂直定位在對於工件表面的第二間隙距離內。在特定實施例中(例如,在所述輸送期間),第一間隙(沉積頭的近側表面與工件表面之間)係小於第二間隙(FDH的近側表面與工件表面之間)。In some embodiments, said positioning includes (eg, prior to said aligning): vertically positioning a proximal surface of the FDH within a second clearance distance to a workpiece surface. In certain embodiments (eg, during said delivery), the first gap (between the proximal surface of the deposition head and the workpiece surface) is smaller than the second gap (between the proximal surface of the FDH and the workpiece surface).
在一些實施例中,所述輸送包括:透過FDH內設置的二或更多埠口流動電解質;以及透過該FDH內設置的一或更多埠口移除電解質。In some embodiments, the delivering includes: flowing electrolyte through two or more ports disposed within the FDH; and removing electrolyte through one or more ports disposed within the FDH.
在一些實施例中,所述活化包括供應電流及/或電壓至陣列,或在工件與沉積頭(或其陣列)之間供應電位差。在其他實施例中,所述活化包括:供應電流、電壓或電位差至一陽極像素或複數陽極像素。在又其他實施例中,所述供應包括供應電流、電壓或電位差至鄰接陽極像素的組,以界定經沉積特徵部(例如,經印刷特徵部)的形狀或尺寸。In some embodiments, the activation includes supplying current and/or voltage to the array, or supplying a potential difference between the workpiece and the deposition head (or array thereof). In other embodiments, the activating includes: supplying current, voltage or potential difference to an anode pixel or a plurality of anode pixels. In yet other embodiments, the supplying includes supplying a current, voltage or potential difference to groups of adjacent anode pixels to define the shape or size of the deposited features (eg, printed features).
在一些實施例中,該方法更包括(例如,在所述活化過後):將沉積頭移動至工件表面上的第二位置;透過FDH進一步輸送電解質至第二位置;以及在第二位置處進一步活化該一或更多陽極像素,從而在第二位置處提供經進一步沉積特徵部(例如,經進一步印刷特徵部)。在特定實施例中(例如,在所述活化及/或所述進一步活化過後),該方法更包括:分別在第一及第二位置處蝕刻缺少經沉積特徵部及經進一步沉積特徵部的晶種層的一部分。In some embodiments, the method further includes (e.g., after said activation): moving the deposition head to a second location on the workpiece surface; further delivering the electrolyte to the second location via FDH; and further The one or more anode pixels are activated, providing further deposited features (eg, further printed features) at the second location. In certain embodiments (eg, after said activating and/or said further activating), the method further comprises: etching the crystal lacking the deposited feature and the further deposited feature at the first and second locations, respectively. part of the seed layer.
在本文的任何實施例中,沉積頭為印刷頭。在其他實施例中,組件為包括一或更多印刷頭的印刷頭組件。In any of the embodiments herein, the deposition head is a print head. In other embodiments, the assembly is a printhead assembly including one or more printheads.
在本文的任何實施例中,該陣列係設置在沉積頭的近側表面上。In any of the embodiments herein, the array is disposed on the proximal surface of the deposition head.
在本文的任何實施例中,陽極或陽極像素包括虛電極、活性電極或惰性電極。In any of the embodiments herein, an anode or an anode pixel includes a dummy electrode, an active electrode, or an inert electrode.
在本文的任何實施例中,沉積頭包括內陽極、絕緣基板,以及形成在該內陽極與絕緣基板之間的內腔室;其中該絕緣基板包括複數孔洞;以及其中各孔洞形成虛電極。In any of the embodiments herein, the deposition head includes an inner anode, an insulating substrate, and an inner chamber formed between the inner anode and the insulating substrate; wherein the insulating substrate includes a plurality of holes; and wherein each hole forms a dummy electrode.
在本文的任何實施例中,沉積頭包括複數惰性電極,以及複數控制裝置,配置以供應電流至所選擇的陽極像素或所選擇的複數陽極像素。In any of the embodiments herein, the deposition head comprises a plurality of inert electrodes, and a plurality of control means configured to supply current to the selected anode pixel or the selected plurality of anode pixels.
在本文的任何實施例中,沉積頭與FDH可為直接或間接附接的。In any of the embodiments herein, the deposition head and the FDH may be directly or indirectly attached.
在本文的任何實施例中,沉積頭的近側表面延伸通過FDH的近側表面。In any of the embodiments herein, the proximal surface of the deposition head extends past the proximal surface of the FDH.
在本文的任何實施例中,(例如,FDH的)複數埠口圍繞著沉積頭的周緣。在一些實施例中,組件(例如,沉積頭組件或印刷頭組件)更包括與各埠口相關的閥,其中各閥可配置以透過各閥相關的埠口供應或移除壓力或流動。In any of the embodiments herein, a plurality of ports (eg, of a FDH) surround the periphery of the deposition head. In some embodiments, an assembly (eg, a deposition head assembly or a print head assembly) further includes a valve associated with each port, wherein each valve is configurable to supply or remove pressure or flow through the port associated with each valve.
在本文的任何實施例中,組件(例如,沉積頭組件或印刷頭組件)更包括:複數沉積頭(例如,複數印刷頭)及複數流體分佈頭,其中各FDH係配置以圍繞著一沉積頭。In any of the embodiments herein, the assembly (e.g., a deposition head assembly or a print head assembly) further includes: a plurality of deposition heads (e.g., a plurality of print heads) and a plurality of fluid distribution heads, wherein each FDH is configured to surround a deposition head .
在本文的任何實施例中,組件(例如,沉積頭組件或印刷頭組件)更包括:複數沉積頭(例如,複數印刷頭),其中該FDH係配置以圍繞著該複數沉積頭的各者。In any of the embodiments herein, an assembly (eg, a deposition head assembly or a print head assembly) further includes: a plurality of deposition heads (eg, a plurality of print heads), wherein the FDH is configured to surround each of the plurality of deposition heads.
在本文的任何實施例中,組件(例如,沉積頭組件或印刷頭組件)包括間隙測量系統。在一些實施例中,間隙測量系統包括一或更多感測元件(例如,本文所述的任何者)。在其他實施例中,間隙測量系統係配置以測量沉積頭的近側表面或FDH的近側表面對於工件的表面之間的距離。在又其他實施例,FDH包括與FDH的近側表面流體連通的複數埠口,其中該埠口係配置以供應及/或移除該陣列及/或陽極像素附近的電解質。In any of the embodiments herein, an assembly (eg, a deposition head assembly or a print head assembly) includes a gap measurement system. In some embodiments, a gap measurement system includes one or more sensing elements (eg, any described herein). In other embodiments, the gap measurement system is configured to measure the distance between the proximal surface of the deposition head or the proximal surface of the FDH to the surface of the workpiece. In still other embodiments, the FDH includes a plurality of ports in fluid communication with a proximal surface of the FDH, wherein the ports are configured to supply and/or remove electrolyte proximate to the array and/or anode pixels.
在本文的任何實施例中,一或更多感測元件係設置在沉積頭的近側表面上,並與判斷感測元件與工件表面之間的距離的電路電性連接。在一些實施例中,感測元件包括該複數陽極像素的其中一者。In any of the embodiments herein, one or more sensing elements are disposed on the proximal surface of the deposition head and are electrically connected to circuitry that determines the distance between the sensing elements and the workpiece surface. In some embodiments, the sensing element includes one of the plurality of anode pixels.
在本文的任何實施例中,組件(例如,沉積頭組件或印刷頭組件)更包括對準系統。在一些實施例中,該對準系統包括:複數精細致動器元件,直接或間接附接至該沉積頭,其中精細致動器元件係配置以將該陣列定位在對於工件的表面的第一間隙距離內,及/或使沉積頭的近側表面與工件的表面共平面。在其他實施例中,該對準系統更包括:安裝組件,直接或間接附接至該FDH,其中安裝組件更包括粗致動器,以將FDH垂直定位在對於工件的表面的第二間隙距離內。In any of the embodiments herein, an assembly (eg, a deposition head assembly or a print head assembly) further includes an alignment system. In some embodiments, the alignment system includes a plurality of fine actuator elements attached directly or indirectly to the deposition head, wherein the fine actuator elements are configured to position the array at a first relative to the surface of the workpiece. within the gap distance, and/or make the proximal surface of the deposition head coplanar with the surface of the workpiece. In other embodiments, the alignment system further includes: a mounting assembly attached directly or indirectly to the FDH, wherein the mounting assembly further includes a coarse actuator to vertically position the FDH at a second clearance distance to the surface of the workpiece Inside.
在本文的任何實施例中,組件(例如,沉積頭組件或印刷頭組件)更包括:控制器(例如,印刷頭控制器),與沉積頭(例如,印刷頭)連接,其中該控制器係配置以驅使:供應電流及/或電壓至陣列,或在工件與陣列之間供應電位差,從而形成由陽極像素的一或更多者所界定的電場。在一些實施例中,所述供應提供經沉積特徵部(例如,經印刷特徵部),其中該經沉積特徵部透過單一陽極像素或複數陽極像素而沉積(例如,印刷)。在其他實施例中,該控制器係配置以驅使:供應電流、電壓或電位差至鄰接陽極像素的組,以界定經沉積特徵部的形狀或尺寸。In any of the embodiments herein, the assembly (e.g., a deposition head assembly or a print head assembly) further includes: a controller (e.g., a print head controller) connected to the deposition head (e.g., a print head), wherein the controller is Configured to drive: supply current and/or voltage to the array, or supply a potential difference between the workpiece and the array, thereby forming an electric field defined by one or more of the anode pixels. In some embodiments, the supply provides deposited features (eg, printed features), wherein the deposited features are deposited (eg, printed) through a single anode pixel or a plurality of anode pixels. In other embodiments, the controller is configured to drive: supply current, voltage or potential difference to groups of adjacent anode pixels to define the shape or size of the deposited feature.
在本文的任何實施例中,組件更包括:流體控制器,與FDH連接,其中該流體控制器係配置以驅使:電解質流進及/或流出該複數埠口,從而補充反應物及移除在陣列與工件之間形成的反應產物。In any of the embodiments herein, the assembly further includes: a fluid controller coupled to the FDH, wherein the fluid controller is configured to drive: electrolyte flow into and/or out of the plurality of ports, thereby replenishing reactants and removing The reaction product formed between the array and the workpiece.
在下方敘述中,數具體細節係闡述以提供對所呈現實施例的透徹理解。所揭露實施例可在不具一些或所有這些具體細節的情況下實施。在其他實例中,並未詳細描述習知的處理操作以免不必要地模糊所揭露的實施例。雖然所揭露實施例將結合特定實施例進行描述,但將能理解的是這些特定實施例的用意並非在於限制所揭露的實施例。In the following description, several specific details are set forth to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail so as not to unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with specific embodiments, it will be understood that these specific embodiments are not intended to limit the disclosed embodiments.
根據本揭露的系統及方法係關於有效、高速率且二維(2D)(或單一層)及/或三維(3D)(多階)金屬印刷處理,其係利用半導體-內連件-尺度的解析度以較低成本、使用較少設備,並具有較高產量地製造內連件。更具體而言,本文所述的系統及方法可在無光阻微影、顯影、介電質蝕刻、清潔及/或上述其他步驟的通常步驟、設備及材料的情況下執行。Systems and methods according to the present disclosure relate to efficient, high-rate, two-dimensional (2D) (or single layer) and/or three-dimensional (3D) (multi-level) metal printing processes utilizing semiconductor-interconnect-scale Resolution manufactures interconnects at lower cost, using less equipment, and with higher throughput. More specifically, the systems and methods described herein can be performed without the usual steps, equipment, and materials for photoresist lithography, development, dielectric etching, cleaning, and/or other steps described above.
根據本揭露的系統及方法係關於使用直接電化學沉積處理形成積體電路-尺度的金屬內連件導線。在一些實行例中,電化學沉積係用以形成晶圓等級的封裝特徵部。藉由在工件與沉積頭之間的間隙中供應含金屬-陽離子電解液而將金屬內連件導線沉積在包括金屬-晶種層的基板上。Systems and methods according to the present disclosure relate to forming IC-scale metal interconnect wires using a direct electrochemical deposition process. In some implementations, electrochemical deposition is used to form wafer-level packaging features. Metal interconnect wires are deposited on the substrate including the metal-seed layer by supplying a metal-cation containing electrolyte in the gap between the workpiece and the deposition head.
三維(3D)電印刷(或3DEP)係使用微米-尺寸的陽極以在全域金屬化(或經埋種)工件上直接生長可電鍍金屬特徵部的處理。生長特徵部係逐步形成,並呈現由局部電極形狀、該電極對於表面的鄰近性,以及各種處理條件及電解質的組成所界定的形狀及尺寸。本文中的硬體及處理可允許產生封裝應用所用的經電鍍內連件特徵部,其中該硬體及處理係除去對複數光微影處理硬體及處理步驟的需求。本文所揭示的硬體及處理得以進行的應用包括沉積銅的內連件凸塊及線、阻障物金屬(例如,鎳及鈷),以及材料例如為錫及錫-銀合金的焊料球或封蓋膜。其他材料及沉積特徵部係於本文中描述。某些硬體及處理設計可能不足以產生適合在封裝特徵部尺寸尺度上形成無缺陷、大尺度且均勻沉積結構的條件。在特定實施例中,本文中的組件、設備、系統及處理可克服這些不足。Three-dimensional (3D) electroprinting (or 3DEP) is a process that uses micron-sized anodes to grow electroplatable metal features directly on full-area metallized (or seeded) workpieces. The growth features are formed stepwise and assume a shape and size defined by the local electrode shape, the proximity of the electrode to the surface, and various processing conditions and the composition of the electrolyte. The hardware and processing herein can allow for the generation of plated interconnect features for packaging applications, wherein the hardware and processing removes the need for complex photolithography processing hardware and processing steps. Applications in which the hardware and processes disclosed herein can be performed include depositing interconnect bumps and lines of copper, barrier metals such as nickel and cobalt, and solder balls of materials such as tin and tin-silver alloys or Lidding film. Other materials and deposition features are described herein. Certain hardware and process designs may not be sufficient to generate conditions suitable for forming defect-free, large-scale, and uniformly deposited structures on package feature scales. In particular embodiments, the components, devices, systems and processes herein overcome these deficiencies.
對於一些應用來說,傳統的半導體封裝處理係使用一系列的光微影相關硬體及處理步驟,以產生貫穿光阻可電鍍表面(圖1)。在典型實施例中,至少存在用以產生內連線或連接凸塊的8個序列式操作,如操作101-108所示。For some applications, conventional semiconductor packaging processing uses a series of photolithography-related hardware and processing steps to produce a plateable surface through photoresist (Figure 1). In an exemplary embodiment, there are at least 8 sequential operations to create interconnects or connection bumps, as shown by operations 101-108.
在圖1中,該方法從操作101開始,其中係在基板上沉積導電晶種層。此沉積可在物理氣相沉積設備、原子層沉積設備或化學氣相沉積設備中進行。接著,將該基板轉移至光阻沉積設備或旋塗器;在操作102中,在晶種層上形成光阻層。舉例來說,該光阻可經由濕式處理方法(例如,旋轉塗佈)而形成,或是該光阻可經由乾式方法(例如,在該基板上方塗覆一卷預形成光阻材料)而形成。In FIG. 1, the method begins at
在光阻層形成後,將該基板轉移至光阻圖案化設備或微影工具,在操作103中係經由將該光阻層暴露至特定光條件而進行圖案化。在操作104中,將該基板轉移至光阻(PR)顯影設備或PR顯影工具,其中係將暴露在基板上的圖案進行顯影。在一示例中係經由濕式化學處理將光阻進行顯影,其中該濕式化學處理涉及將該基板暴露至具有溶解鹽的溶液(例如,碳酸鉀於水中的溶液)。這些圖案化操作共同在光阻層中形成凹陷特徵部。這些凹陷特徵部界定出後續將沉積金屬的間隔。After the photoresist layer is formed, the substrate is transferred to a photoresist patterning device or lithography tool, where it is patterned in
接著,將該基板轉移至電漿蝕刻設備或除渣/灰化工具;在操作105處,進行除渣處理以從特徵部的底部移除過量光阻材料。該除渣處理通常涉及對於含氧電漿的暴露,其中該含氧電漿係用於將特徵部的底部處的過量光阻燒除。Next, the substrate is transferred to a plasma etch apparatus or a descum/ashing tool; at
接著,將該基板轉移至電鍍設備或電鍍工具;在操作106處,將金屬電鍍(例如,經由電鍍或無電電鍍)進入光阻層中所界定的特徵部。接著,將該基板轉移至光阻剝除設備或工具;在操作107中,將光阻層從該基板剝除。該光阻可經由乾式電漿蝕刻技術(例如,將基板暴露至含氧電漿),或經由濕式技術(例如,將該基板至光阻溶劑使該光阻膜溶解或膨脹,接著可利用高流量、超聲波能量或其他方法移除該光阻)而剝除。在移除光阻層後,將該基板轉移至化學蝕刻設備或濕式金屬蝕刻工具;在操作108中,將先前被光阻層所保護的區域中的晶種層移除。Next, the substrate is transferred to a plating apparatus or plating tool; at
在許多情況下,用於執行圖1所顯示的處理的設備為相異設備,其各自係配置以執行圖1所述的處理流程中的特定操作,因此說明用於形成金屬化特徵部(例如,細線內連件)的習知處理流程係複雜、耗時且昂貴的。需要許多不同的特殊半導體處理設備,且其各者必須適當配置以進行特定應用。習知處理流程所涉及的大量步驟及設備使得對於工件處理技術(包括,例如基板設計及布局)的任何改變或調整係困難的,原因在於必須對每一處理設備部分進行適當調整。而這使得在一種基板類型或基板設計的製造與另一者之間的切換是困難的。類似地,由於複雜的處理流程及所涉及的大量設備,因此運行測試、製造標準基板等係困難的。In many cases, the equipment used to perform the process shown in FIG. 1 is distinct equipment, each configured to perform specific operations in the process flow depicted in FIG. , thin-wire interconnects) are complex, time-consuming and expensive. Many different special semiconductor processing equipment are required, each of which must be properly configured for a particular application. The large number of steps and equipment involved in conventional processing flows makes any changes or adjustments to workpiece processing techniques (including, for example, substrate design and layout) difficult because appropriate adjustments must be made to each processing equipment section. This in turn makes switching between manufacturing of one substrate type or substrate design and another difficult. Similarly, running tests, manufacturing standard substrates, etc. is difficult due to the complex process flow and the large amount of equipment involved.
此外,圖1中的各步驟不僅需要工具,還涉及化學品/材料的消耗;例如,旋轉塗佈步驟102會消耗旋塗光阻。這些步驟的各者會增加製造操作的總成本,其通常係以$/晶圓-通過該序列來計量。對於晶粒-對-晶粒或晶粒-對-基板的凸塊-連接來說,該序列將會運行一次。當產生晶粒上(on-die)或封裝基板內連件時,該序列可隨著產生複數內連件層而重複進行。此種多晶粒級佈線(經常被稱作晶圓扇出(WFO)或重分布層(RDL)內連件)可包括具有複數水平及/或垂直內連件(例如,作為RDL、導線、柱體、焊料凸塊等)層的複數晶粒。各操作101-108的序列將必須為各內連件層重複進行。Furthermore, the steps in Figure 1 not only require tooling, but also involve consumption of chemicals/materials; for example, spin-
替代地,本文中的方法可使用3DEP硬體及處理以在晶種/阻障物層的表面上直接提供經沉積特徵部。本文所述的技術允許形成細線內連件,接墊及其他類似金屬化特徵部,而無圖1所述的許多處理及設備的需求。因此,製造處理係被大幅簡化、數量處理設備被大幅減少,而與處理相關的成本係類似地被減少(例如,由於涉及較少步驟,且由於大部分的處理成本係直接與取得處理設備的資本支出有關)。Alternatively, the methods herein can use 3DEP hardware and processing to provide deposited features directly on the surface of the seed/barrier layer. The techniques described herein allow for the formation of fine line interconnects, pads and other similar metallization features without many of the processing and equipment requirements described in FIG. 1 . Thus, the manufacturing process is greatly simplified, the amount of processing equipment is greatly reduced, and the costs associated with processing are similarly reduced (e.g., because fewer steps are involved, and because most of the processing costs are directly related to acquiring the processing equipment related to capital expenditures).
如圖2所示,非限制性方法從操作201開始,其中係在基板上形成導電晶種層。該晶種層可在PVD設備或工具中經由物理氣相沉積(PVD)而形成。如本發明所屬領域中所習知,可使用形成後續電鍍用的晶種層的替代方法,例如無電電鍍;在一些實施例中,無電電鍍係從無電活化(例如,利用錫離子暴露至基板)開始,接著利用含鈀離子電解質進行錫(II)至錫(IV)的置換/活化,這在基板表面上留下鈀的電催化劑,並允許將許多介電質材料進行金屬化。其他晶種沉積技術可包括化學氣相沉積(CVD)、原子層沉積(ALD)或其他導電材料(例如,金屬或合金)的沉積方法。晶種/阻障物層的非限制性材料包括銅(Cu)。As shown in FIG. 2, the non-limiting method begins at
該方法可更包括操作202,以包含所欲提供在經沉積特徵部中的金屬離子的溶液進行3D電化學沉積。本文所述的任何實用沉積頭、FDH或組件可與該溶液一起使用以進行沉積。在一些實施例中,電解質係提供自該沉積外部的來源。舉例而言,習知電解質供應系統可將電解質提供至工件,並且未使用FDH。在各種實施例中,並未使用頭部或其他類似可移動裝置來管理電解質流。在沉積特徵部過後,可將工件轉移至化學蝕刻設備或濕式金屬蝕刻工具;在操作203中係對該基板進行化學蝕刻以移除介於該等經沉積特徵部之間的區域中的晶種層。換言之,在3DEP期間經歷相對較低的沉積速率的區域中的晶種層係被移除。此蝕刻係用於將該等金屬特徵部在空間中彼此隔離。The method may further include an
本文中的方法及設備可用於提供經沉積特徵部,其中該經沉積特徵部例如為RDL。使用圖1的適宜處理,習知方法可包括下列步驟:在介電質層中所形成的通孔內沉積101晶種及/或阻障物層,以提供到達接墊的電性連接件;在晶種/阻障物層上旋轉塗佈102光阻;圖案化103該光阻以界定出鄰近該通孔的溝槽(即,界定RDL的從上至下2D圖案);顯影104圖案;進行除渣105以移除溝槽或通孔內的任何殘留光阻;在溝槽及通孔內電鍍106金屬以形成RDL特徵部;剝除107剩餘光阻以釋出RDL的線部分(形成在PR溝槽中);以及蝕刻108任何可及的晶種/阻障物層。相對地,使用本文中的3DEP設備及圖2的適宜處理,該方法可包括:在通孔內沉積201晶種及/或阻障物層以提供到達接墊的電性連接件;在晶種/阻障物層的表面上3D電化學沉積202 RDL特徵部;以及蝕刻203任何可及的晶種/阻障物層以進行電性隔離。RDL特徵部輪廓可透過沉積來界定,而並非藉由對光阻進行圖案化。The methods and apparatus herein can be used to provide deposited features, such as RDLs, for example. Using the appropriate processing of FIG. 1, the conventional method may include the steps of: depositing 101 a seed and/or barrier layer within the via formed in the dielectric layer to provide electrical connections to the pads; Spin-
圖6提供非限制性的經沉積特徵部,該經沉積特徵部為RDL 605,該RDL 605因此與晶種層604電性連接;圖案化介電質603具有在其中界定出的通孔;接墊602係與基板601、晶種層604及RDL 605電性連接。應注意到,RDL具有對介電質層603進行圖案化所界定的通孔部分,以及由電沉積(或電印刷)所界定的溝槽或線部分。6 provides a non-limiting deposited feature, the deposited feature is
得以各種方式將處理設備的各種部分進行組合。在一示例中,系統包括PVD設備、DEP設備及化學蝕刻設備,其中各設備係彼此相異且分離的。在另一實施例中,圖2所顯示的其中一或更多設備或工具可提供在執行複數處理的較大設備的模組中。舉例而言,PVD設備可為單獨設備,而3DEP設備及化學蝕刻設備可被提供為統一處理設備中的模組。在另一示例中,化學蝕刻設備為單獨且相異的設備,而PVD設備及3DEP設備各自被提供作為較大且統一處理設備中的模組。在又其他實施例中,可修改PVD設備及/或電鍍設備的其中一或更多者以包括執行3DEP所用的硬體。許多設備配置係可行的,且任何如此的組合皆被視為落入本文實施例的範疇內。如此配置的工具可為線性、多階層、旋轉料架、輸送器、群集或其他通常工具設計,而各處理類型的模組數量可明顯多於1(例如,10),其中平行操作的各處理模組類型的混合數量係基於工具的生產力/輸出而優化。 陽極 The various parts of the processing apparatus can be combined in various ways. In one example, a system includes PVD equipment, DEP equipment, and chemical etch equipment, wherein each equipment is distinct and separate from each other. In another embodiment, one or more of the devices or tools shown in FIG. 2 may be provided in a module of a larger device that performs multiple processes. For example, PVD equipment may be a single equipment, while 3DEP equipment and chemical etching equipment may be provided as modules in a unified processing equipment. In another example, the chemical etching equipment is a separate and distinct equipment, while the PVD equipment and 3DEP equipment are each provided as modules in a larger and unified processing equipment. In yet other embodiments, one or more of the PVD equipment and/or the electroplating equipment may be modified to include the hardware used to perform 3DEP. Many device configurations are possible, and any such combination is considered within the scope of the embodiments herein. Tools so configured may be linear, multi-stage, carousel, conveyor, cluster, or other common tool designs, and the number of modules for each process type may be significantly greater than 1 (e.g., 10), with each process operating in parallel The mix of mod types is optimized based on the productivity/output of the tool. anode
3DEP得以許多方式加以實施。在一些實行例中,藉由使用適當配置的硬體、控制及處理,3DEP將單一微電極電鍍操作擴展至得以進行大規模的平行處理。微電極電鍍處理的其中一種常見態樣為下列動作:將微尺寸陽極帶到工件的導電(例如,PVD金屬化或無電沉積金屬化)表面附近,並且在該陽極與該工件之間施加電位差(請參見圖3A-3D)。在一些實行例中,並未使用使用可消耗(活性金屬)的微陽極;並不需要重複補充陽極材料,且若形成高深寬比結構,在單一形成高深寬比特徵部期間會需要將電鍍至陽極上重複進行數次。因此,在特定實施例中,可使用虛遠端陽極或尺寸穩定的惰性陽極。3DEP can be implemented in many ways. In some implementations, 3DEP scales a single microelectrode plating operation to massively parallel processing by using appropriately configured hardware, controls, and processing. One common aspect of the microelectrode plating process is the act of bringing a microscale anode near a conductive (e.g., PVD metallization or electroless deposition metallization) surface of a workpiece and applying a potential difference between the anode and the workpiece ( See Figures 3A-3D). In some implementations, microanodes using consumable (active metal) are not used; repeated replenishment of anode material is not required, and if high aspect ratio structures are formed, plating to Repeat several times on the anode. Thus, in certain embodiments, a dummy distal anode or a dimensionally stable inert anode may be used.
在虛陽極配置(圖3A及圖3C所繪示的示例)中,不導電元件(或遮罩)303具有位於其中的微尺寸開口304。使用上,電解質係存在於孔洞內並將其圍繞。內腔室302A係設置在非導電性遮罩303與內陽極302B之間。內陽極302B可為連接至電源的正極(未顯示)的活性(腐蝕金屬)陽極或惰性陽極302B。使用上,內腔室亦包含電解質,據此提供圍繞著孔洞304,內陽極302B及工件301的導電媒體。在各種實施例中,虛陽極包括片電極,該片電極的表面遠大於該不導電元件的開口,並係藉由該不導電元件而與上方進行電沉積的工件分離。尤其,該不導電元件中的開口界定出電位場線及離子電流分佈,其促進在該開口下方的特徵部電沉積。In a dummy anode configuration (the example depicted in FIGS. 3A and 3C ), a non-conductive element (or mask) 303 has a
遮罩可包含複數開口或貫孔,其中該等開口或貫孔係彼此空間及電性孤立的,且在許多但非所有實行例中並未在不導電(或離子抗性)元件的本體內形成內連通道。此貫孔通常係在一維度中延伸,該維度經常(但非必須)係垂直於工件的經電鍍表面(在一些實施例中,不連通孔洞係與晶圓夾一角度,其中該晶圓通常係平行於離子抗性元件前表面)。在一些實施例中,貫孔係彼此平行。這些貫孔與3-D多孔網路不同(其中通道係在三維中延伸,並且形成內連孔洞結構),原因在於該等貫孔將平行於其內部表面的離子電流及(在某些情況下)流體流皆進行重構,並且使朝向工件表面的電流及流體流二者的路徑直化。在一些實施例中,不導電遮罩包括陶瓷材料(例如,鋁氧化物、錫氧化物、鈦氧化物,或金屬氧化物的混合物)或塑膠材料(例如,聚乙烯、聚丙烯、聚偏二氟乙烯(PVDF)、聚四氟乙烯、聚碸、聚氯乙烯(PVC)、聚碳酸酯等)。The mask may contain a plurality of openings or through-holes, where the openings or through-holes are spatially and electrically isolated from each other, and in many but not all implementations are not within the body of the non-conductive (or ion-resistant) element Create internal channels. The through hole typically extends in a dimension that is often (but not necessarily) perpendicular to the plated surface of the workpiece (in some embodiments, the non-connected hole is at an angle to the wafer, where the wafer typically parallel to the front surface of the ion-resistant element). In some embodiments, the vias are parallel to each other. These vias differ from 3-D porous networks (in which the channels extend in three dimensions and form interconnected hole structures) in that the vias direct ionic currents parallel to their internal surfaces and (in some cases ) fluid flow is reconstructed and the path of both the current and the fluid flow toward the workpiece surface is straightened. In some embodiments, the non-conductive mask comprises a ceramic material (eg, aluminum oxide, tin oxide, titanium oxide, or a mixture of metal oxides) or a plastic material (eg, polyethylene, polypropylene, polylidene Vinyl fluoride (PVDF), polytetrafluoroethylene, polyvinyl chloride (PVC), polycarbonate, etc.).
位於遮罩303下方且在工件301上方的是介於虛陽極孔洞開口305與金屬化工件301之間的小間隙307。該間隙的特徵可在於陽極尺寸(例如,開口或電極尺寸,例如寬度、直徑或本文所述的其他幾何參數)對於介在陽極與工件表面之間的間隙距離的從約0.5:1至1:0.1的深寬比。在一些實施例中,該深寬比約為1:1以下。在某些實施例中,該陽極尺寸係該電極面向該工件的面或表面上的最大橫截面尺寸。當遮罩的近側表面至工件的距離係小的時候,電流及流體流二者的發散係被局部限制、傳遞並與該開口對準。Located below the
在操作期間,經金屬化工件係連接至電源的負極(未顯示)。含金屬離子的電解質被放置在此間隙內,而金屬離子係從該電解質還原以在工件上電鍍/沉積/印刷金屬。在各孔洞開口內,電場係受侷限且準直的,而電流係以類似於該活性陽極就位在該處(因此為術語虛擬陽極)的方式從該孔洞開口排出。During operation, the metallized workpiece was connected to the negative terminal of a power supply (not shown). An electrolyte containing metal ions is placed within this gap, and metal ions are reduced from the electrolyte to plate/deposit/print metal on the workpiece. Within each pore opening, the electric field is localized and collimated, and current is expelled from the pore opening in a manner similar to where the active anode is located (hence the term virtual anode).
在尺寸穩定的陽極配置(圖3B及圖3D中的示例)中,基板318包含相關的佈線及電路系統以對位於其上方的複數惰性陽極319的各者進行連接、定址(選擇)及供電(佈線未顯示)。可將陽極表面塗覆本領域中所習知且使用於大尺度惰性陽極的尺寸穩定材料(例如,對水電解氧化反應具催化性且不會進行腐蝕的材料)。在間隙317中的是包含金屬離子的電解質,其中金屬離子係藉由在工件311的表面處的還原作用而從該電解質轉化電鍍金屬。In a dimensionally stable anode configuration (example in FIGS. 3B and 3D ), the
惰性陽極可由抗腐蝕惰性材料所製成。惰性陽極可將電解質(例如,水)的成分電化學氧化,而不將其自身氧化/腐蝕。惰性類型陽極可暴露至電解液,並且可由尺寸及氧化性化學-穩定的材料所製成。舉例而言,惰性類型電極可由一或更多貴金屬所製成,所述貴金屬的氧化電位相對於水的氧化電位(1.23V vs. NHE)及可形成穩定氧化膜的其他金屬的氧化電位為正性的,從而可氧化水而不對其本身進行顯著腐蝕。舉例而言,陽極可由金、鉑、鈀、釕、銠、鈮、釩,以及這些材料的合金所製成。若電解液的組成不會造成大幅氧化,則還可將碳(包括各種非晶形及石墨形式)使用作為惰性陽極。Inert anodes can be made of corrosion resistant inert materials. An inert anode can electrochemically oxidize components of the electrolyte (eg, water) without oxidizing/corroding itself. Inert type anodes can be exposed to the electrolyte and can be made of dimensionally and oxidatively chemically-stable materials. For example, inert type electrodes can be made of one or more noble metals whose oxidation potential is positive relative to that of water (1.23 V vs. NHE) and other metals that form stable oxide films Positive so that water can be oxidized without significant corrosion of itself. For example, the anode can be made of gold, platinum, palladium, ruthenium, rhodium, niobium, vanadium, and alloys of these materials. Carbon (including various amorphous and graphite forms) can also be used as an inert anode provided the composition of the electrolyte does not cause substantial oxidation.
尺寸穩定惰性陽極可隨時間在陽極表面與工件表面之間提供可預測且恆定的距離。然而,使用惰性陽極會在沉積期間導致電解質中的金屬離子的供給耗盡。Dimensionally stable inert anodes provide a predictable and constant distance between the anode surface and workpiece surface over time. However, the use of an inert anode leads to depletion of the supply of metal ions in the electrolyte during deposition.
可將二個發生的半反應結合而產生系統中的總反應,該等半反應可如下: 工件/基板/陰極還原: M +z+ze - →M (1); 微惰性陽極氧化: z/2*[2H 2O →O 2+2H ++2e -] (2);以及 總反應: M +z+zH 2O →M+z/2O 2+zH +(3), 其中M +z為已溶解金屬離子(例如,銅、鎳、錫、銀等),其具有氧化態z(例如,二價銅離子的z=+2)。在不補充的情況下,金屬離子係隨著半反應(1)進行且金屬沉積而在該小間隙中耗盡。較大的間隙將允許沉積更多金屬。然而,該小間隙係被保持,使得各分離陽極僅在其位置直接相對的區域中顯露。利用大於約1:1(間隙距離/陽極尺寸)的間隙,電場從該元件延伸,而電鍍區域係大的並且可與相鄰陽極的電鍍重疊。 The two occurring half-reactions can be combined to produce the total reaction in the system, which can be as follows: Workpiece/substrate/cathode reduction: M +z +ze - → M (1); Slightly inert anodic oxidation: z/ 2*[2H 2 O → O 2 +2H + +2e - ] (2); and the overall reaction: M +z +zH 2 O → M+z/2O 2 +zH + (3), where M +z is Dissolved metal ions (eg, copper, nickel, tin, silver, etc.), which have oxidation state z (eg, z=+2 for divalent copper ions). Without replenishment, metal ions are depleted in this small gap as half-reaction (1) proceeds and metal deposits. A larger gap will allow more metal to be deposited. However, this small gap is maintained so that each split anode is only exposed in the area where it is directly opposite. With a gap greater than about 1:1 (gap distance/anode size), the electric field extends from the element while the plating area is large and can overlap the plating of adjacent anodes.
此陽極可提供在陣列內,從而提供陽極像素的陣列。作為旁白,在一些實施例中,術語陽極像素指的是包括惰性電極的結構。其中該惰性電極在工件電鍍期間係作為陽極,但當從輔助陽極將金屬電鍍至該惰性電極上時係作為陰極。請參見本文他處所述的二步驟處理的敘述。This anode can be provided within an array, thereby providing an array of anode pixels. As an aside, in some embodiments, the term anode pixel refers to a structure that includes an inert electrode. Wherein the inert electrode acts as an anode during workpiece plating, but acts as a cathode when metal is plated onto the inert electrode from an auxiliary anode. See the description of the two-step process described elsewhere in this article.
單一像素可界定經沉積特徵部的整個區域,或是像素集合可界定經沉積特徵部的區域。在一實施例中,單一沉積區域包括複數像素,該複數像素共同界定單一沉積區域的形狀及尺寸。在一些實施例中,一陣列的各像素係可隨機啟動的,以基於在給定時間啟動的像素集合而界定不同沉積圖案。A single pixel can define the entire area of the deposited feature, or a collection of pixels can define the area of the deposited feature. In one embodiment, the single deposition area includes a plurality of pixels, which collectively define the shape and size of the single deposition area. In some embodiments, each pixel of an array is randomly actuatable to define different deposition patterns based on the set of pixels actuated at a given time.
各陽極或陽極像素可包括電極,例如虛電極、活化電極或惰性電極。此外,各電極可具有微型尺寸(例如,具有從約1至1000 µm,或約10 µm以下的尺寸)。此尺寸可包括半徑、直徑、圓周、寬度、長度、高度、傾斜高度、長軸、短軸、周長、多邊形的二相對頂點之間的距離、電極之間的間隙距離、電極之間的中心至中心距離,或其他橫截面幾何參數。Each anode or anode pixel may include an electrode, such as a dummy electrode, an active electrode, or an inert electrode. In addition, each electrode can be of microscopic size (eg, have a size of from about 1 to 1000 μm, or about 10 μm or less). Such dimensions may include radius, diameter, circumference, width, length, height, slope height, major axis, minor axis, perimeter, distance between two opposing vertices of a polygon, gap distance between electrodes, center between electrodes Distance to center, or other cross-sectional geometric parameters.
在一實例中,電極為微電極。該電極本身可為任何實用的幾何形狀,例如圓錐、圓柱、圓盤、管、矩形稜柱、環狀圓柱、半球、球體、三角稜柱等。該電極的橫截面(例如,該電極最接近工件表面的橫截表面)可具有任何實用的幾何形狀,例如圓形、橢圓形、正方形、矩形、三角形等。陣列內的各陽極像素可具有任何實用配置,例如週期性、交錯或隨機配置。此外,陣列可包括許多不同電極配置的任何者,例如一排電極,或是可界定矩形、圓形等的二維配置。In one example, the electrodes are microelectrodes. The electrodes themselves may be of any practical geometric shape, such as cones, cylinders, disks, tubes, rectangular prisms, annular cylinders, hemispheres, spheres, triangular prisms, and the like. The cross-section of the electrode (eg, the cross-sectional surface of the electrode closest to the workpiece surface) can have any practical geometric shape, such as circular, oval, square, rectangular, triangular, and the like. The individual anode pixels within the array can have any practical configuration, such as periodic, staggered, or random. Furthermore, an array may include any of a number of different electrode configurations, such as a row of electrodes, or a two-dimensional configuration that may define a rectangle, circle, or the like.
舉例而言,如圖3C所示,存在於工件的電極的橫截面係描繪為圓形,該電極的尺寸可包括該圓形開口的半徑305a或直徑305b。在另一示例中,如圖3D所示,存在於工件的電極的橫截面係描繪為矩形,該電極的尺寸可包括可包括惰性電極319的寬度319a及長度319b。其他尺寸可包括二個電極之間的間隙距離305c/319c,以及二個電極之間的中心至中心距離305d/319d。For example, as shown in FIG. 3C , the cross-section of an electrode present on a workpiece is depicted as a circle, and the dimensions of the electrode may include the
該電極(包括微電極)可與基板一起提供,或是被提供作為基板。在一實例中,該電極可為從絕緣基板的表面延伸的凸出且導電結構。在另一實例中,該電極可為平面電極,其中導電表面係與周圍的絕緣基板共平面。在又另一實例中,該電極可為凹陷電極,其中導電表面凹陷於周圍絕緣基板內所提供的開口。在活化陽極後,電場係建立在陽極的導電結構/表面與接地工件之間。The electrodes, including microelectrodes, can be provided with or as a substrate. In one example, the electrodes can be protruding and conductive structures extending from the surface of the insulating substrate. In another example, the electrode may be a planar electrode, wherein the conductive surface is coplanar with the surrounding insulating substrate. In yet another example, the electrode may be a recessed electrode, wherein the conductive surface is recessed into an opening provided in the surrounding insulating substrate. After activating the anode, an electric field is established between the conductive structure/surface of the anode and the grounded workpiece.
在一些實例中,該電極為虛電極,其中具有一或更多開口的絕緣基板係被放置在惰性陰極與工件之間。藉由在該惰性陰極與接地工件之間施加電流或電壓,電場係由絕緣表面內的開口所界定。In some examples, the electrode is a dummy electrode, wherein an insulating substrate having one or more openings is placed between the inert cathode and the workpiece. By applying a current or voltage between the inert cathode and the grounded workpiece, an electric field is defined by the opening in the insulating surface.
在虛陽極及惰性陽極的二個案例中,可將該3DEP設備配置以在陽極與表面之間具有非常小的間隙。否則,從來源或虛擬來源位置發出的電場及電流可能會結合在一起,形成模糊且失焦的電流分佈圖案,因此造成模糊的電鍍厚度分佈。因此,該系統及處理可使用受控制的近接聚焦程度(degree of proximity focus)。圖4顯示對於1 µm的陽極源,在增加間隙尺寸下的一系列電場及電流分佈電腦模擬結果。陽極寬度比間隙的比率大於約1:1的間隙具有較低的解析度,並且係失焦的。因此,在某些實施例中,本文中的設備,系統及方法包括一間隙距離,該間隙距離的特徵在於陽極尺寸(例如,開口或電極尺寸,例如寬度、直徑或本文所述的其他幾何參數)比上該陽極與工件表面之間的間隙距離的比率係從約0.5:1至1:0.1。在某些實施例中,陽極尺寸(例如,陽極寬度)為該電極面向工件的面或表面上的最大橫截面尺寸。取決於陽極形狀,陽極尺寸可為多邊形的二相對頂點之間的直徑或距離。In both cases of dummy and inert anodes, the 3DEP device can be configured to have a very small gap between the anode and the surface. Otherwise, the electric field and current emanating from the source or virtual source location may combine to form a blurred and out-of-focus current distribution pattern, thus resulting in a blurred plating thickness distribution. Accordingly, the system and process can use a controlled degree of proximity focus. Figure 4 shows a series of computer simulation results of the electric field and current distribution for a 1 µm anode source at increasing gap sizes. Anode width to gap ratios greater than about 1:1 have lower resolution and are out of focus. Accordingly, in certain embodiments, the devices, systems and methods herein include a gap distance characterized by anode dimensions (e.g., opening or electrode dimensions, such as width, diameter, or other geometric parameters described herein ) to the gap distance between the anode and the workpiece surface is from about 0.5:1 to 1:0.1. In certain embodiments, the anode dimension (eg, anode width) is the largest cross-sectional dimension on the workpiece-facing face or surface of the electrode. Depending on the anode shape, the anode dimension can be the diameter or the distance between two opposing vertices of a polygon.
在活化一或更多陽極或陽極像素(在陣列-類型沉積頭的案例中)後,可在晶種層的表面上沉積經沉積特徵部。相對於施予沉積頭的陽極或一或更多陽極像素的正性電位,藉由將負性(陰極)電位施加至晶種層而在該工件上進行該沉積。通常,要從電解液中的金屬離子將金屬電沉積至金屬化晶種工件上需要該工件的電位係低於該溶液中的金屬離子的還原電位。舉例而言,為了將純銅鍍在銅晶種層上,電解液應包含銅(且無還原電位更加正性的任何其他金屬),且金屬膜的電位係比銅的還原電位更負性/陰極的。這是藉由在晶種層與所選擇的陽極(及電解液)之間施加電位差而達成。控制器可供應控制信號,以控制沉積頭的裝置及所選擇的陽極及/或任意一些陽極像素(假定該沉積頭具有多於一個陽極)以將其活化。After activation of one or more anodes or anode pixels (in the case of an array-type deposition head), deposited features can be deposited on the surface of the seed layer. The deposition is performed on the workpiece by applying a negative (cathode) potential to the seed layer relative to a positive potential applied to the anode of the deposition head or to one or more anode pixels. In general, electrodeposition of metal from metal ions in an electrolyte onto a metallized seed workpiece requires the potential of the workpiece to be below the reduction potential of the metal ions in the solution. For example, in order to plate pure copper on a copper seed layer, the electrolyte should contain copper (and no other metal with a more positive reduction potential), and the potential of the metal film should be more negative than the reduction potential of copper/cathode of. This is achieved by applying a potential difference between the seed layer and the selected anode (and electrolyte). The controller may supply control signals to control the arrangement of the deposition head and the selected anode and/or any number of anode pixels (assuming the deposition head has more than one anode) to activate them.
仍以銅作為示例,銅沉積在晶種層上的速率係取決於所施予的還原電位及橫跨晶種層表面的各點處所存在的還原電位是多負性。換言之,較負性的電位通常對應於將二價銅離子還原成銅離子的較快速電荷轉移速率或高表面反應速率。該沉積速率亦取決於銅離子到達晶種層表面的質量轉移抗性,其中該質量轉移抗性可利用流動強度及溶液溫度而減低。Still using copper as an example, the rate at which copper is deposited on the seed layer depends on the applied reduction potential and how negative the reduction potential exists at various points across the surface of the seed layer. In other words, a more negative potential generally corresponds to a faster rate of charge transfer or a higher surface reaction rate for the reduction of divalent copper ions to copper ions. The deposition rate also depends on the mass transfer resistance of the copper ions to the surface of the seed layer, where the mass transfer resistance can be reduced using flow strength and solution temperature.
經沉積特徵部的形狀及尺寸將由局部電極形狀、陽極內的電極配置、電極對於表面的鄰近性、供應至特定位置的電流或電壓的時間及量值、各種與電解質相關的處理條件,以及其他因素。在一些示例中,陽極的形狀係以金屬內連件形式而映射至晶種層上。The shape and size of the deposited feature will be determined by the local electrode shape, electrode configuration within the anode, proximity of the electrode to the surface, timing and magnitude of current or voltage supplied to a particular location, various electrolyte-related processing conditions, and other factor. In some examples, the shape of the anode is mapped onto the seed layer in the form of metal interconnects.
舉例來說,影響電場線的規模及圖案的因素可影響經沉積特徵部的尺寸及形狀,其中因素可包括電極的形狀。電極對於工件的鄰近性可影響經沉積特徵部的解析度。舉例而言,可將陽極與工件的晶種層緊密地設置在一起,使得該陽極所產生的電場不會具有傳開或擴散的空間,且因此被聚焦(鄰近聚焦)且高選擇性地顯露在緊鄰經活化陽極的區域中。For example, factors that affect the scale and pattern of electric field lines can affect the size and shape of deposited features, where factors can include the shape of electrodes. The proximity of the electrodes to the workpiece can affect the resolution of deposited features. For example, the anode and the seed layer of the workpiece can be placed so close together that the electric field generated by the anode has no room to spread out or diffuse, and is thus focused (proximity focused) and highly selectively revealed In the immediate vicinity of the activated anode.
與電解質有關的因素可包括例如溫度、電解質流率、電解質組成、pH等。在一實例中,電解質的對流度可影響某些金屬結合至電沉積材料中的程度。舉例來說,在具有相對高的對流度的情況下,某些金屬可較容易結合至電沉積材料(例如,銅-銀合金或錫-銀合金)。在其他情況下,不同流動圖案可用於提供基於在期間電鍍的任何給定時間點的特徵部形狀所制定的流體動力學條件。舉例來說,當特徵部具有高深寬比時,可使用一流動圖案或一組流動圖案;而當該特徵部再被填充而因此具有較低的深寬比時,可使用另一流動圖案或另一組流動圖案。在一些實施例中,可將流動圖案選擇以在沉積期間於經沉積材料中達成相對均勻組成(例如,銀(或其他金屬)的程度)(例如,使沉積深入該特徵部的材料的組成與在該特徵部中較淺的後續沉積材料為均勻的)。Electrolyte-related factors may include, for example, temperature, electrolyte flow rate, electrolyte composition, pH, and the like. In one example, the degree of convection of the electrolyte can affect the degree to which certain metals are incorporated into the electrodeposited material. For example, certain metals may bond more readily to electrodeposited materials (eg, copper-silver alloys or tin-silver alloys) with relatively high convection. In other cases, different flow patterns may be used to provide hydrodynamic conditions formulated based on the shape of the feature at any given point in time during plating. For example, one flow pattern or set of flow patterns can be used when the feature has a high aspect ratio, and another flow pattern or set of flow patterns can be used when the feature is refilled and thus has a lower aspect ratio. Another set of flowing patterns. In some embodiments, the flow pattern can be selected to achieve a relatively uniform composition (e.g., the extent of silver (or other metal)) in the deposited material during deposition (e.g., the composition of the material deposited deep into the feature is consistent with Subsequent deposited material shallower in this feature is uniform).
經沉積特徵部可包括一或更多導電材料。經沉積特徵部的非限制性材料可包括銅(Cu)、鎳(Ni)、鈷(Co)、鐵(Fe)、錫(Sn)、銀(Ag)、金(Au)、鋅(Zn)、鎘(Cd)、鉻(Cr)、釩(V)、鈀(Pd)、鉑(Pt)、銠(Rh)、釕(Ru)、銥(Ir)、銦(In)、鉈(Tl)、鉍、銻(Sb)、鉛(Pb),以及其組合或或合金,例如銅/鈷、銅/鎳、銅/鐵/鎳、銅/錫/銀、鎳/金、鎳/鈷/鐵、錫/鉛、錫/銦、錫/銀或錫/鉍。此經沉積特徵部可包括任何實用的金屬化特徵部,例如內連件凸塊、內連件、導電線、導線、重新分佈線(RDL)、矽穿孔(TSV)的填充、2合1通孔、阻障物金屬、封蓋膜、凸塊下金屬化(UBM)、柱體(例如,有或無封蓋層)、大柱體、微柱體、蓋部、鉛化或無鉛控制塌陷晶片連接件(C4)凸塊、微凸塊、焊料凸塊或焊料球。在一些實施例中,經沉積特徵部的特徵可在於通常約為1:1(高度比寬度)以下的深寬比,但其範圍可高達約2:1左右,而TSV結構可具有非常高深寬比(例如,約20:1附近)。在其他實施例中,經沉積特徵部可具有大於約2 µm的尺寸,且在主要尺寸中通常約為5-200 µm。在又其他實施例中,經沉積特徵部可具有從約0.5至100 µm的橫截面尺寸。The deposited features may include one or more conductive materials. Non-limiting materials for deposited features may include copper (Cu), nickel (Ni), cobalt (Co), iron (Fe), tin (Sn), silver (Ag), gold (Au), zinc (Zn) , Cadmium (Cd), Chromium (Cr), Vanadium (V), Palladium (Pd), Platinum (Pt), Rhodium (Rh), Ruthenium (Ru), Iridium (Ir), Indium (In), Thallium (Tl) , bismuth, antimony (Sb), lead (Pb), and combinations or alloys thereof, such as copper/cobalt, copper/nickel, copper/iron/nickel, copper/tin/silver, nickel/gold, nickel/cobalt/iron , tin/lead, tin/indium, tin/silver or tin/bismuth. The deposited features may include any practical metallization features such as interconnect bumps, interconnects, conductive lines, wires, redistribution lines (RDLs), filling of through-silicon vias (TSVs), 2-in-1 vias, etc. Via, barrier metal, capping film, under bump metallization (UBM), pillar (e.g., with or without capping layer), macropillar, micropillar, cap, leaded or lead-free controlled collapse Die attach (C4) bumps, micro bumps, solder bumps or solder balls. In some embodiments, deposited features can be characterized by aspect ratios typically below about 1:1 (height to width), but can range up to around 2:1, while TSV structures can have very high aspect ratios. ratio (for example, around 20:1). In other embodiments, the deposited features may have dimensions greater than about 2 μm, and are typically about 5-200 μm in a major dimension. In yet other embodiments, the deposited features may have a cross-sectional dimension of from about 0.5 to 100 μm.
經沉積特徵部可為任何實用的晶圓級封裝(WLP)及矽穿孔(TSV)電性連接技術。舉例來說,經沉積特徵部可包括各種封裝內連件,伴隨著各種尺寸的特徵部,包括銅導線、RDL,以及不同尺寸的柱體,包括微柱體、標準柱體及經整合的高密度扇出形(HDFO)及大柱體。特徵部寬度的範圍可為廣泛的,其中該方法對於較大的特徵部係特別實用的,例如對於寬度從約1-300 µm的特徵部,例如從5 µm(RDL)至約200 µm(大柱體)。舉例而言,該方法可在製造具有寬度約為20 µm的複數微柱體的工件,或是製造具有寬度約為200 µm的複數大柱體的工件期間使用。特徵部的深寬比係可改變的,而在一些實施例中特徵部的深寬比係從約1:2(高度比寬度)至2:1以上。The deposited features can be any practical wafer level packaging (WLP) and through silicon via (TSV) electrical connection technology. For example, deposited features can include various package interconnects, along with features of various sizes, including copper wires, RDLs, and pillars of different sizes, including micropillars, standard pillars, and integrated high Density Fan-Out (HDFO) and large cylinders. The range of feature widths can be wide, with the method being particularly useful for larger features, for example, for features from about 1-300 µm in width, e.g., from 5 µm (RDL) to about 200 µm (Large column). For example, the method can be used during the manufacture of workpieces with a plurality of micropillars with a width of about 20 µm, or with a plurality of large pillars with a width of about 200 µm. The aspect ratio of the features can vary, and in some embodiments the aspect ratio of the features ranges from about 1:2 (height to width) to more than 2:1.
在本申請案中,術語「半導體晶圓」、「晶圓」、「基板」、「晶圓基板」及「部分製造積體電路」係互換使用。本發明所屬技術領域中具有通常知識者將能理解的是,術語「部分製造積體電路」可指的是在上方進行積體電路製造的許多階段的任何者期間的矽晶圓。在半導體裝置工業中使用的晶圓或基板通常具有200 mm、300 mm或450 mm的直徑。In this application, the terms "semiconductor wafer", "wafer", "substrate", "wafer substrate" and "partially fabricated integrated circuits" are used interchangeably. Those of ordinary skill in the art to which the present invention pertains will understand that the term "partially fabricated integrated circuit" may refer to a silicon wafer upon which any of the many stages of integrated circuit fabrication are performed. Wafers or substrates used in the semiconductor device industry typically have a diameter of 200 mm, 300 mm or 450 mm.
此外,術語「電解質」、「電鍍浴」、「浴」及「電鍍液」係互換使用。電解質包括離子導電液體,例如水相液體。電解質包括至少一金屬離子,該金屬離子係從電解質電鍍至工件上以形成經沉積特徵部。電解質可包括其他成分,例如pH緩衝劑、傳導性增強成分,例如酸,金屬離子錯合試劑、一或更多有機電鍍添加物(例如,促進劑、抑制劑及/或勻平劑),及其任何者的組合。在特定實施例中,電解質包括本文中的任何金屬。在一些實施例中,金屬包括容易順應電化學分解的金屬,例如Cu、Ni、Co、Sn,以及包括這些金屬的合金。電解液可包括金屬鹽,例如其可包括銅硫酸鹽水溶液。電解液可更包括用以增強溶液傳導性且改善溶液均鍍力的酸(例如硫酸),以及不同添加劑類別的一或更多電鍍添加物(例如,電鍍促進劑、抑制劑、勻平劑、晶粒精煉劑等)。亦可使用本發明所屬技術領域中習知的其他電解液。In addition, the terms "electrolyte", "plating bath", "bath" and "plating bath" are used interchangeably. Electrolytes include ionically conductive liquids, such as aqueous phase liquids. The electrolyte includes at least one metal ion from which the metal ion is electroplated onto the workpiece to form deposited features. The electrolyte may include other components such as pH buffers, conductivity enhancing components such as acids, metal ion complexing agents, one or more organic plating additives (e.g., accelerators, suppressors, and/or levelers), and any combination thereof. In particular embodiments, the electrolyte includes any metal herein. In some embodiments, the metal includes metals that are readily amenable to electrochemical decomposition, such as Cu, Ni, Co, Sn, and alloys including these metals. The electrolyte may include a metal salt, for example it may include an aqueous solution of copper sulphate. The electrolyte may further include an acid (e.g., sulfuric acid) to enhance solution conductivity and improve solution throwing power, and one or more electroplating additives of different additive classes (e.g., plating accelerators, suppressors, levelers, grain refining agent, etc.). Other electrolytes known in the art to which the present invention pertains can also be used.
本文中的敘述係假設實施例在任何實用工件上實施。工件可為各種形狀、尺寸及材料。除了半導體晶圓之外,可利用所揭露實施例的其他工件包括各種製品,例如印刷電路板、磁性記錄媒體、磁性記錄感測器、鏡體、光學元件、微機械裝置等。The description herein assumes that the embodiments are implemented on any practical artifact. Workpieces can be of various shapes, sizes and materials. In addition to semiconductor wafers, other workpieces that may utilize disclosed embodiments include various articles such as printed circuit boards, magnetic recording media, magnetic recording sensors, mirrors, optical components, micromechanical devices, and the like.
在一些實施例中,工件包括一或更多下方層、配置在在一或更多下方層上的阻障物/附著層,及配置在該阻障物/附著層上的金屬晶種層。在一些示例中,金屬晶種層包括沉積在阻障物/附著層二者上的1000Å銅(Cu),其中該阻障物/附著層及銅均係使用PVD沉積工具而沉積。在一些示例中,阻障物/附著層包括使用PVD而沉積的100Å鉭(Ta)。一或更多層可包括矽晶圓、玻璃基板、有機基板等。 組件及其構件 In some embodiments, the workpiece includes one or more underlying layers, a barrier/adhesion layer disposed on the one or more underlying layers, and a metal seed layer disposed on the barrier/adhesion layer. In some examples, the metal seed layer includes 1000Å copper (Cu) deposited on both the barrier/attachment layer, where both the barrier/attachment layer and the copper are deposited using a PVD deposition tool. In some examples, the barrier/adhesion layer includes 100Å tantalum (Ta) deposited using PVD. One or more layers may include silicon wafers, glass substrates, organic substrates, and the like. Components and their components
在一些實施例中,經濟上實用的3DEP處理需要在大面積上方同時電鍍複數獨立特徵部(例如,數萬以上的獨立特徵部)。對於用以產生所欲結構的這些特徵部的各者(例如,對於各特徵部的相同結構),他們必須在實質相同的條件下產生。可變的電鍍條件包括不同間隙及不同電解質條件(例如,金屬離子濃度)。舉例而言,為了在5x5 cm面積(300 mm晶圓的約1/30面積)上方以100 µm節距沉積具有寬度50 µm特徵部的表面,250000個特徵部的各者可具有最多約50 µm的均勻間隙,且其電解質的濃度係足夠高以支持高速率沉積。假設間隙公差為10%以下,共平面度跳動必須小於+/- 5 µm/5 cm,或是小於+/-0.01%。另外,假設高金屬含量的電解質(例如,80g/L二價銅離子的銅),計算顯示在間隙中的所有金屬將被消耗以產生高度僅約為2.5µm的柱體/凸塊。因此,在本文中還描述的是在間隙下流動及補充電解質以維持連續電鍍操作而不將工件及陽極分開的硬體及控制器,其中將工件及陽極分開可能是緩慢且無效率的,並且需要一遍又一遍地精確回到同一間隙及橫向位置。本揭露描述能夠進行高速、共平面間隙找尋/形成以開始生長或續行生長特徵部,使得工件對陽極的間隙在整個處理期間係受控制的,且在間隙中的電解質係有效率地進行補充的硬體及處理。In some embodiments, an economically practical 3DEP process requires simultaneous plating of multiple individual features (eg, tens of thousands of individual features) over large areas. For each of these features to be used to produce the desired structure (eg, for the same structure for each feature), they must be produced under substantially the same conditions. Variable plating conditions include different gaps and different electrolyte conditions (eg, metal ion concentration). For example, to deposit a surface with features of 50 µm width at 100 µm pitch over a 5x5 cm area (approximately 1/30 of the area of a 300 mm wafer), each of the 250,000 features could have a width of at most approximately 50 µm uniform gap, and its electrolyte concentration is high enough to support high deposition rates. Assuming a gap tolerance of 10% or less, coplanarity runout must be less than +/- 5 µm/5 cm, or less than +/-0.01%. Also, assuming a high metal content electrolyte (eg, 80g/L Cu2+ copper), calculations show that all the metal in the gap will be consumed to produce pillars/bumps with a height of only about 2.5µm. Accordingly, also described herein are hardware and controllers that flow and replenish electrolyte under the gap to maintain a continuous plating operation without separating the workpiece and anode, which can be slow and inefficient, and Need to come back to exactly the same gap and lateral position over and over again. The present disclosure describes the ability to perform high-speed, co-planar gap finding/formation to initiate growth or to continue growing features such that the workpiece-to-anode gap is controlled throughout processing and the electrolyte in the gap is efficiently replenished hardware and processing.
可用於從微陽極或陽極陣列進行沉積的其中一處理是先將沉積頭與該工件直接接觸。可藉由以顯微鏡簡易觀測該間隙、藉由監測z運動控制裝置的馬達功率或力矩,或藉由使荷重元(例如,力轉換器)作為該設備的一部分而偵測該接觸。此方法的潛在困難點在於對於該工件的損害,其中在二表面之間的碰撞發生在該工件的待鍍表面上。刮痕及金屬缺失可能會造成有缺陷的電鍍及產量損失。接著,該處理續行將位置機構後退一目標量而移開該表面,藉以形成間隙。伴隨此方法的問題在於該第一步驟通常會對該組件施予未知的壓縮量,而這會導致未知且可變的所需後退移動量。此外,若該二表面在被進行接觸之前並未完全共平面,則該表面的不同部分將會比其他地方被壓縮更多,以及在後退後將會保持原始的不共平面性或是因為在間隙歸零步驟中所引進的可變壓縮應力而被改變。最終,該處理在退後至特定的目標間隙後繼續進行,並且開始進行電鍍。為了補充金屬離子,會定期使該間隙變得非常大(例如,數毫米)以從陽極陣列的周圍汲取新的流體。這種間歇性電鍍/間隙加寬處理係重複進行數十或數百次以產生所欲的電鍍高度。One of the treatments that can be used for deposition from a microanode or anode array is to first bring the deposition head into direct contact with the workpiece. The contact can be detected by simply observing the gap with a microscope, by monitoring the motor power or torque of the z-motion control device, or by having a load cell (eg, a force transducer) as part of the device. A potential difficulty with this method is damage to the workpiece where collisions between two surfaces occur on the surface of the workpiece to be plated. Scratches and missing metal can cause defective plating and yield loss. The process then continues by retracting the positioning mechanism a target amount to move the surface away, thereby creating a gap. The problem with this approach is that this first step typically imposes an unknown amount of compression on the assembly, which results in an unknown and variable amount of back movement required. Furthermore, if the two surfaces are not perfectly coplanar before being brought into contact, different parts of the surfaces will be compressed more than elsewhere, and will retain the original non-coplanarity after receding either because of the The variable compressive stress introduced in the gap zeroing step is changed. Finally, the process continues after stepping back to a specific target gap and plating begins. To replenish metal ions, this gap is periodically made very large (eg, several millimeters) to draw new fluid from around the anode array. This intermittent plating/gap widening process is repeated tens or hundreds of times to produce the desired plating height.
本文中所描述的是一組件,其中該組件包括沉積頭及流動分佈頭(FDH)。該FDH可包括硬體配置以產生電解質流動,該電解質流動係朝向該沉積頭與該工件之間的間隙,以及取代該間隙內的流體流及對流。在各種實施例中,該FDH係任選或未使用的。Described herein is an assembly including a deposition head and a flow distribution head (FDH). The FDH may include hardware configurations to generate electrolyte flow towards the gap between the deposition head and the workpiece and displace fluid flow and convection within the gap. In various embodiments, the FDH is optional or not used.
尤其,沉積頭包括一或更多微陽極,該微陽極可為尺寸穩定的陽極及/或虛陽極。在一些情況下,沉積頭包括陽極像素的陣列。在任一情況下,可將一或更多陽極設置在沉積頭的近側表面上,其中該近側表面係面向該工件。沉積頭還可包括透過佈線及控制電子元件(例如,具有終端連接件以透過外部電源及控制器進行控制的電晶體/開關)而往陽極或陽極像素或內陽極的各種連接件。舉例來說,沉積頭可包括基板,該基板具有內連件層、控制裝置的陣列,及陽極像素的陣列。在一些示例中,控制裝置包括開關,例如一或更多電晶體、保險絲及/或其他控制裝置。在其他示例中,沉積頭基板係被配置一次,接著重複使用。在又其他示例中,控制裝置包括開關/電晶體,該開關/電晶體係取決於待由陽極產生的所欲圖案而配置及重新配置。內連件層可提供從控制器、電源及/或位於外部的其他裝置至沉積頭基板的路由及佈線連接件,包括導體、軌跡、通孔等。In particular, the deposition head includes one or more microanodes, which may be dimensionally stable anodes and/or dummy anodes. In some cases, the deposition head includes an array of anode pixels. In either case, one or more anodes may be disposed on a proximal surface of the deposition head, where the proximal surface faces the workpiece. The deposition head may also include various connections to the anode or anode pixel or inner anode through wiring and control electronics such as transistors/switches with terminal connections for control through an external power supply and controller. For example, a deposition head may include a substrate having an interconnect layer, an array of control devices, and an array of anode pixels. In some examples, the control device includes a switch, such as one or more transistors, a fuse, and/or other control device. In other examples, the deposition head substrate is configured once and then reused. In yet other examples, the control means includes a switch/transistor system that is configured and reconfigured depending on the desired pattern to be produced by the anode. The interconnect layer may provide routing and wiring connections, including conductors, traces, vias, etc., from the controller, power supply, and/or other devices located externally to the deposition head substrate.
該組件可包括一或更多控制器。舉例來說,該控制器可包括經由佈線連接件而到達沉積頭、陽極像素、內陽極及/或控制電子元件的一或更多連接件。該控制器可用於控制電子元件切換、對陽極像素或內陽極施予電流或電壓,及/或調整一或更多陽極像素的電流及電壓。在另一實例中,該控制器可包括對於FDH或對於與FDH流體連通的流體元件的一或更多連接件。此流體元件可包括流體閥、流體幫浦、流度計,或其他流體感測器。在又另一實例中,控制器可包括對於本文所述的其他系統(例如,間隙測量系統或對準系統)的一或更多連接件。The assembly may include one or more controllers. For example, the controller may include one or more connections via wiring connections to the deposition head, anode pixels, internal anodes, and/or control electronics. The controller can be used to control switching of electronic components, apply current or voltage to the anode pixel or inner anode, and/or adjust current and voltage of one or more anode pixels. In another example, the controller may include one or more connections to the FDH or to a fluid element in fluid communication with the FDH. Such fluidic components may include fluid valves, fluid pumps, flow meters, or other fluid sensors. In yet another example, the controller may include one or more connections to other systems described herein (eg, gap measurement systems or alignment systems).
該組件可包括間隙測量系統。此系統可包括硬體(例如,一或更多感測元件),該硬體能夠測量介於沉積頭表面與陽極像素元件之間相對於該工件的間隙距離。此系統的進一步細節係描述於本文中。The assembly may include a gap measurement system. The system may include hardware (eg, one or more sensing elements) capable of measuring the gap distance between the surface of the deposition head and the anode pixel elements relative to the workpiece. Further details of this system are described herein.
該組件可包括對準系統。此系統可包括硬體(例如,一或更多致動器),該硬體能夠將該組件移動及定位以與工件表面對準。此對準可不僅包括沉積頭對於該工件的x-、y-及/或z-定位,還可包括使沉積頭的表面或陣列與該工件的表面共平面。此系統的進一步細節係描述於本文中。The assembly can include an alignment system. The system may include hardware (eg, one or more actuators) capable of moving and positioning the component into alignment with the workpiece surface. This alignment may include not only x-, y-, and/or z-positioning of the deposition head to the workpiece, but may also include making the surface or array of deposition heads coplanar with the surface of the workpiece. Further details of this system are described herein.
在一些實施例中,該間隙測量系統及該對準系統使用感測元件、致動器(例如,機械致動器及/或壓電致動器),以及該感測元件與對於該等致動器的控制器之間的回饋以達成對準及/或共平面性。In some embodiments, the gap measurement system and the alignment system use sensing elements, actuators (e.g., mechanical actuators and/or piezoelectric actuators), and the sensing elements are associated with the actuators. feedback between the controllers of the actuators to achieve alignment and/or coplanarity.
在特定實施例中,使用具有FDH、間隙測量系統及對準系統的沉積頭可允許在大面積的裝置上方高速電鍍半導體尺度的內連件,包括封裝銅柱體(具有或不具有封蓋層)、重新分佈佈線、高密度扇出型(HDFO)「圍繞晶粒」的高深寬比內連件(有時稱做大柱體(通常高度為200 µm))、C4焊料凸塊等。In certain embodiments, the use of a deposition head with FDH, gap measurement system, and alignment system may allow high-speed plating of semiconductor-scale interconnects over large area devices, including packaged copper pillars (with or without capping layer ), redistribution wiring, high-density fan-out (HDFO) "around the die" high-aspect-ratio interconnects (sometimes called large pillars (typically 200 µm in height)), C4 solder bumps, etc.
任選FDH可用於補充電解質的流體流,從而避免金屬離子耗盡,以及依需求移除陽極反應產物(包括氧)以避免氣泡形成或其他有害影響。尤其,該FDH允許將流體引進圍繞著該沉積頭的區域,以及從該區域移除。如圖5A所示,在一些實施例中,FDH 502係附接至沉積頭501本身,其可為a)永久接合,或是b)以允許將FDH移除並再次附接的方式進行接合(例如使用螺釘或其他固定硬體),或是c)進行附接,使FDH得以某種方式且使用其本身的個別定位控制硬體而移動朝向或遠離沉積頭。此組合可被稱作沉積頭組件(DHA)500。Optionally FDH can be used to supplement the fluid flow of the electrolyte to avoid depletion of metal ions, and to remove anode reaction products (including oxygen) as needed to avoid bubble formation or other deleterious effects. In particular, the FDH allows fluid to be introduced into and removed from the area surrounding the deposition head. As shown in FIG. 5A , in some embodiments, the
FDH可具有複數埠口,該複數埠口在使用中可作為輸入口或輸出口。在圖5A-5B中,FDH包括位於沉積頭501的外側區域的一或更多輸入口埠口(503)及輸出口埠口(504)。此埠口係用於將電解質引進第一間隙506(介於工件表面509與FDH 502之間)及引進第二間隙507(介於工件表面509與沉積頭501之間),以及用於產生將反應產物移除並補充沉積頭間隙中的反應物的流動。The FDH can have a plurality of ports, which can be used as input ports or output ports in use. In FIGS. 5A-5B , the FDH includes one or more input port ( 503 ) and output port ( 504 ) located in the outer region of the
一般而言,FDH間隙506將等於或或大於沉積頭間隙507,至少部分是因為該FDH間隙506可高於已沉積的工件區域,而留存在該處的經沉積特徵部可大於後續電鍍操作的所欲起始間隙。如前所述,通常可能需要在等於或小於代電鍍或經沉積特徵部的最小平面尺寸的間隙尺寸下開始進行處理。舉例而言,此可為目標柱體特徵部的寬度,在一實例中,對於寬度25 µm的特徵部來說,其可小於25 µm。對於具有多於一臨界尺寸或長線變化尺寸的特徵部來說,該間隙可小於最小橫向長度。舉例來說,200 µm長且10 µm寬的特徵部可具有小於或等於10 µm的間隙。Generally speaking, the
在又另一示例中,若工件表面上的電鍍結構為100 µm高且25 µm寬,則沉積頭間隙507的起始間隙應為25 µm以下。然而,若是將落在FDH間隙506之下的區域已藉由此或另一沉積組件而鍍有100 µm的特徵部,則該FDH間隙506應大於該100µm的特徵部尺寸,以避免損害已沉積的特徵部。在二個間隙設定可經由獨立自動化致動而獨立設定的實施例中,可將不同FDH間隙用於同一基板的先前經處理區域與初始(未沉積)區域。流體係經由輸入口503而被引進間隙並衝擊位於下方的基板。接著,該流體可依循下列三個路徑的其中一者:1)移動至並進入位於沉積頭501下方的沉積頭間隙507,並且進入該FDH的相對側處的輸出口504附近的FDH間隙,2)大致圍繞著FDH間隙區域中的沉積頭,以及3)穿過該FDH間隙506進入圍繞著FDH的開口間隔508,並且回到沉積頭及流動分佈頭的相對側處的FDH間隙中。一或更多輸入口及輸出口得以任何組合及相對位置同時使用、實用於在沉積頭間隙下方產生較均勻流動,以及隨時間改變各種輸入口及輸出口之間的流動數量、位置及方向(藉由改變DHA外部的閥(未顯示)可將各輸入口使用作為輸出口)。其中一種此用途係提供於圖8中,其係描述於後。In yet another example, if the plated structure on the workpiece surface is 100 µm high and 25 µm wide, the initial gap of the
圖7A-7D顯示在工件上產生經沉積結構的硬體及處理變體。該工件可具有任何實用材料及/或幾何形狀。非限制性工件可包括矽半導體晶圓或面板。工件可包括位於其上的矽氧化物層及/或導電晶種層。該導電晶種層通常為金屬性的,且經常包括銅、鉭、鎳或其混合物。在一些情況下亦可使用其他金屬。晶種層可具有約50-2000 Å之間的厚度。在沉積過後且蝕刻之前,優先電鍍特徵部可具有約0.25-250 μm之間的厚度。在沉積過後可使用化學蝕刻將經沉積特徵部之間的非所欲晶種層蝕除。在蝕刻過後,該等經沉積特徵部在空間中係彼此孤立的。孤立特徵部可具有約0.20-200 μm之間的高度。Figures 7A-7D show hardware and process variations for producing deposited structures on a workpiece. The workpiece can be of any practical material and/or geometry. Non-limiting workpieces may include silicon semiconductor wafers or panels. The workpiece may include a silicon oxide layer and/or a conductive seed layer thereon. The conductive seed layer is typically metallic and often includes copper, tantalum, nickel or mixtures thereof. Other metals may also be used in some cases. The seed layer may have a thickness between about 50-2000 Å. After deposition and before etching, the preferentially plated feature may have a thickness between about 0.25-250 μm. The undesired seed layer between deposited features may be etched away using chemical etching after deposition. After etching, the deposited features are spatially isolated from each other. The isolated features may have a height between about 0.20-200 μm.
請參照圖7A,可使用一或更多沉積頭組件對工件701(例如,圓形晶圓)進行電鍍,其中各DHA在三維中係可獨立移動的。這些包括在平行於工件平面的平面中的運動(x-及y-方向)而定位該沉積頭下方的區域以執行沉積操作,以及進出該工件平面(z-方向)而控制在各種陽極像素與該工件之間的間隙。沉積頭組件(DHA)703可在該工件上方移動並處理該表面的區域,而不同DHA係同時處理不同區域,藉以減低完成整個工件上的沉積的時間。DHA 703或沉積頭705各者可在三維中獨立移動。Referring to FIG. 7A , a workpiece 701 (eg, a circular wafer) can be electroplated using one or more deposition head assemblies, wherein each DHA is independently movable in three dimensions. These include movement in a plane parallel to the workpiece plane (x- and y-directions) to position the region under the deposition head to perform deposition operations, and in and out of the workpiece plane (z-direction) to control the various anode pixels and The gap between the workpieces. A deposition head assembly (DHA) 703 can move over the workpiece and treat regions of the surface, while different DHAs treat different regions simultaneously, thereby reducing the time to complete deposition on the entire workpiece. Each of the
在其他實施例中,DHA為沉積桿(例如,印刷桿),其具有圍繞著複數沉積頭的單一FDH。該單一FDH可為單一大框架,其具有複數局部流動分佈區域及相關的複數沉積頭、微陽極或陽極陣列,各自被其相關的局部流動分佈埠口的輸入口及輸出口所圍繞。在一些實施例中,沉積頭可包括單一電極或電極陣列。在特定實施例中,沉積桿可用於在圓形晶圓或面板的工件上進行沉積。In other embodiments, the DHA is a deposition bar (eg, a print bar) with a single FDH surrounding a plurality of deposition heads. The single FDH may be a single macroframe having a plurality of local flow distribution regions and associated plurality of deposition heads, microanodes or anode arrays, each surrounded by the input and output of its associated local flow distribution ports. In some embodiments, a deposition head may include a single electrode or an array of electrodes. In certain embodiments, deposition rods may be used to deposit on circular wafer or panel workpieces.
圖7B-7C顯示使用複數沉積頭桿704進行電鍍的晶圓701或面板基板702的工件,其中該沉積頭桿704為沉積頭組件的示例。沉積頭組件704可包括單一大結構,其具有複數局部流動分佈區域706及相關的複數微陽極或陽極陣列705,各自被其相關的局部流動分佈埠口的輸入口及輸出口所圍繞。7B-7C show workpieces of a
在所繪示的實施例中,沉積頭組件704(沉積桿)包括複數沉積頭705,以及提供單一大FDH的功能的單一桿。各沉積頭705可為尺寸穩定陽極,虛擬陽極,或陽極像素的陣列。在一實施例中,構成桿704的複數沉積頭705的相對位置係配置在該框架的平面中,且對於該桿及彼此是固定的。然而,各沉積頭可包括獨立機構,以進出該工件表面的平面且相對於該框架而進行定位。使用複數較小沉積頭(其可在平面中共同移動,但可獨立控制其沉積頭間隙,並且通常在工件中並行操作)允許以較大距離較局部且精確控制陽極陣列元件與工件表面之間的間隙,同時以相對簡單組織的線性處理(底至頂)方法進行操作。單獨在基板或沉積頭形成且維持小於數微米的不平坦性跳動係困難,且在整個300 mm晶圓或更大的平板上方達成長範圍的固定間隙尺寸及共平面性可為極端困難的。因此,將處理間隔拆為較小的處理區域群組(各自具有其獨自的機械控制以在單一沉積頭上方達成精細解析度的共平面性)可為實用的。取決於所需的膜建構操作模式,可將桿以連續或逐步方式從基板的底部掃描至頂部。In the depicted embodiment, the deposition head assembly 704 (deposition rod) includes a plurality of deposition heads 705, and a single rod that provides the function of a single large FDH. Each
在圖7B-圖7C的桿實施例中且圍繞著該桿的各沉積頭705,DHA 704可被一組流體埠口(輸入口及輸出口)圍繞,以在該工件與DHA 704的各獨立沉積頭705之間的間隙下方產生流動。細節請參照圖7D。桿DHA包括具有輸入口及輸出口的重複性流體流動結構706,該流體流動結構706係用於各沉積頭705且圍繞著各沉積頭705。在一實施例中,改變輸入口流動通道及輸出口流動通道的處理(以改變橫越間隙的流動的方向)係為所有主動式沉積頭而同時重複進行。舉例而言,在圖7D中位於12點鐘位置(相對於沉積頭705)的所有輸入口通道706可經配置且操作以同時具有流動。所述輸入口通道706可進一步經配置以具有相同的輸入口流率。一或更多輸入口通道可圍繞著各種桿陣列而同時操作。類似地,位於相同位置中的一或更多輸出口通道可在相同時間及流率下進行操作。在構形對稱的案例中(在圖7D中,輸入口/輸出口具有90度間隔的雙重對稱性),具有相同對稱位置的元件可同時進行操作。In the rod embodiment of FIGS. 7B-7C and around each
請參照圖8,可將輸入口/輸出口埠口組織成三組均等對稱陣列輸入口/輸出口結構801-804。FDH內的各沉積頭可具有在「A」秒的時間段內操作為輸入口的第一埠口陣列801,其中流體係從第二埠口陣列802流出。接著,在另一時間段A內,輸入口及輸出口可分別切換至第三埠口陣列803及第二埠口陣列802;接著將輸入口及輸出口分別切換至第四埠口陣列804及第一陣列801;最後將輸入口及輸出口分別切換至第二陣列802及第三陣列803。在此方式中,可對於該FDH的單一框架內的整個沉積頭陣列達成系統性流體流。在此情況下,段A的長度應當要足夠短,使得在經過所有所使用的輸入口/輸出口流動配置後(例如,A秒的四倍)的該循環最後,特徵部在此段期間的生長可小於所欲總特徵部大小,尺寸或高度的約10%、5%、3%、1%或更低。Please refer to FIG. 8 , the input ports/output ports can be organized into three sets of equal and symmetrical array input port/output port structures 801-804. Each deposition head within the FDH may have a first array of
最後一點,流動輸入口及輸出口的各者不需要在任何時間皆以相同的指向方式進行操作,但在整個電鍍處理期間(例如,A時間段的四倍)必須在沉積頭及工件之間的間隙中經歷實質相同的時間可變流動方向輪廓。因此,在一些實施例中,與各沉積頭相關的流動結構所用的循環週期應為相同的,在該等流動分佈頭(或是在桿實施例中的流動分佈區域)之間可為異相的。在圖8的示例中,數沉積頭的各者可在任一時間時從801-804流動,但在流動方向中具有相同的持續時間並且以相同週期循環通過全部的組合組。為了強調,理想中在間隙及沉積頭下方的流動將在時間段期間經歷來自所有方向且相同強度的均勻流動,其中晶電鍍特徵部實質上不改變高度,例如在該期間該等特徵部改變其高度小於約10%、5%、3%、1%或更少。沉積頭陣列中各種流道的入口和出口的來源,其用於控制流速並及時創建可變的流向(利用一組複數獨立移動頭或固定在單一桿上的移動頭),可以來自相對較小的一組隨時間變化的流源,並為大量的入口和出口供料。As a final note, each of the flow inlets and outlets need not operate in the same orientation at all times, but must be between the deposition head and the workpiece during the entire plating process (e.g., four times the time period A) experience substantially the same time-variable flow direction profile in the gap. Thus, in some embodiments, the cycle period used for the flow configuration associated with each deposition head should be the same, which may be out of phase between the flow distribution heads (or flow distribution regions in the rod embodiment) . In the example of FIG. 8, each of several deposition heads may flow from 801-804 at any one time, but have the same duration in flow direction and cycle through all combined groups with the same cycle. To emphasize, ideally the flow under the gap and deposition head will experience uniform flow from all directions and the same intensity during the time period in which the crystal plating features do not substantially change height, for example during which the features change their The height is less than about 10%, 5%, 3%, 1% or less. The sources of inlets and outlets for the various flow channels in the array of deposition heads, which are used to control flow rates and create variable flow directions in time (using a set of plural independently moving heads or moving heads fixed to a single rod), can come from relatively small A set of time-varying flow sources and feeds a large number of inlets and outlets.
DHA可包括間隙測量系統900,該間隙測量系統900包括感測元件(例如,感測電極或微開關)。在圖9A-9C中繪示一示例,其中一或更多微電極感測元件係使用以產生一或更多信號,該信號係實用於判斷沉積頭與工件之間的局部距離(間隙902a/902b)。沉積頭901可包括感測元件903a,以及與金屬化工件904及該工件的表面904a結合操作的電流承載引線906a。沉積頭901還可包括供電及感測電路。電解質填充感測元件903a與表面904a之間的間隙。在此實施例中,感測元件903a與工件904的下方部分之間的區域(間隙)的阻抗係經量測;基於該電解質的電阻,該阻抗允許判斷間隙距離902a。在一些實施例中,存在著往感測元件903a的表面的電流承載引線906a,以及用以感測該感測元件903a附近的電壓的第二平行非電流承載引線906b。以非電流承載引線906b感測電壓響應係消除了電流引線中的電壓降(其可為顯著的,且等於或大於橫越間隙902a的電阻),使得以測量該間隙更為困難。舉例而言,其可避免必須包括橫跨任何切換電晶體(若存在,例如若此元件亦使用於電鍍特徵部)的歐姆電壓降的貢獻,以及任何電力引線906b電阻的製造中的線電阻變異性,使得間隙信號的判斷更加複雜或甚至不可能簡化。或者,監測電路使用單一引線906a以承載電流,但與電流承載線連接的感測引線在該切換電晶體後。The DHA may include a
對於一或更多感測元件的輸入信號波可用於判斷局部間隙。該輸入可為電壓控制或電流控制輸入,其中相應電路響應電性信號(電壓-輸入所用的電流,或反之亦然)係受監測及分析。在一些實施例中,使用交錯或脈衝電性輸入波或列,並且分析該響應。在另一實施例中,白噪音為輸入,並且分析輸入信號及響應的傳立葉變換。Input signal waves to one or more sensing elements can be used to determine local gaps. The input can be a voltage control or a current control input, wherein the corresponding circuit is monitored and analyzed in response to an electrical signal (voltage - current used by the input, or vice versa). In some embodiments, a staggered or pulsed electrical input wave or train is used and the response is analyzed. In another embodiment, white noise is the input, and the input signal and the Follier transform of the response are analyzed.
在一些實施例中,感測電流從一或更多感測元件903a流動橫跨間隙902a或902b,並遍及工件表面904a。在其他實施例中(如圖9B中),感測電流流動通過感測元件903a,以及表面上的凸塊或突出部904b(任選地由先前在特徵部生長模式中所操作的電極而產生/生長)及下方的整體工件904。在其他實施例中(如圖9C中),感測電流在二或更多感測元件903a/b之間流過電解質,並且在平行於沉積頭及該工件的大體方向中較小程度地流進,橫跨及流出金屬化工件904的表面904a,以在感測元件903a/c與工件904的表面904a之間提供間隙902a/c。在第一種情況(單一電極伴隨通過基板的信號)中,對於電解質中的間隙中的電流的主電阻係相關於電解質的比電阻、感測元件的橫截面積,以及感測元件對於表面間隙902a(圖9A)。該配置的電容係有關於電解質的介電常數,及電極的尺寸,以及電極與工件之間的間隙及/或電極感測對之間的間隙。若該電極還使用生長特徵部的個別操作中,則這些方法可對於特徵部904b及間隙902b的存在為敏感的,而較小程度地對於工件904的間隙902a為敏感的。通常,間隙中的電解質的電阻大致正比於該電解質的溶解離子物種(離子強度)的濃度,但系統間隙及特徵部配置的電容係關於溶劑(例如,水)的基本介電常數。通過分析對輸入電擾動波的響應的同相(電阻的電阻或實部)和異相(電阻的電容/虛部)分量,通常可以獲得足夠的信息來確定在突出特徵904b與感測元件903a之間的間隙902b,以及到達工件904的間隙902a。In some embodiments, the sense current flows from the one or
感測波的電壓或電流擾動的大小(幅度)可能是小的,例如輸入電壓波為幾毫伏到幾十毫伏,例如大約 10 mV 或更小,或是導致幾十毫伏的響應的適當大小的電流波。例如,相對較小的電流擾動在惰性陽極表面和基板或基板上的特徵部之間驅動小的電壓差。通過將電壓相對於驅動陽極陣列電極或基板上的電鍍所需的電位保持為小的,只有極化電荷會以電雙層形式在各表面上發生積累。這避免了不需要的電荷轉移反應(例如,金屬的電鍍或腐蝕),以及利用電鍍金屬或金屬腐蝕對基板或感測電極進行改質。由於電極像素與表面之間的間隙以及電解質電阻相對於界面電荷轉移電阻是很小的,因此等效電路的基本時間常數是非常小/短的,並且需要非常高的頻率才能超過該時間常數並測量間隙電阻。因此,通常位使用高頻輸入波,例如中至高射頻範圍中的波係常見的。例如,約100kH至10MHz,或約1Mhz至5MHz,或約2MHz至5MHz的頻率是較佳的。The magnitude (amplitude) of the voltage or current perturbation of the sensing wave may be small, such as an input voltage wave of several millivolts to tens of millivolts, such as about 10 mV or less, or one that results in a response of tens of millivolts A current wave of appropriate size. For example, relatively small current perturbations drive small voltage differences between the inert anode surface and the substrate or features on the substrate. By keeping the voltage small relative to the potential required to drive the plating on the anode array electrode or substrate, only polarized charge will accumulate on each surface in the form of an electrical double layer. This avoids unwanted charge transfer reactions (eg, metal plating or corrosion), and modification of the substrate or sensing electrodes with plated metal or metal corrosion. Since the gap between the electrode pixel and the surface and the electrolyte resistance are small relative to the interfacial charge transfer resistance, the fundamental time constant of the equivalent circuit is very small/short and very high frequencies are required to exceed this time constant and Measure gap resistance. Therefore, it is common to use high frequency input waves, such as waves in the mid to high radio frequency range. For example, frequencies of about 100 kHz to 10 MHz, or about 1 Mhz to 5 MHz, or about 2 MHz to 5 MHz are preferred.
為了能夠在整個大沉積頭(例如,由共平面性所決定,例如,在 50 mm x 50 mm 的區域上)上自動設置及控制工件和沈積頭之間的間隙的小(例如,小於約 100 或 50 µm)尺寸為相同的,需要精確的定位硬體及處理以與上述的間隙感測設備協同運作。對於包含一或更多小陽極或惰性陽極陣列(作為沈積頭)的 DHA而言,可使用粗定位致動器(例如,基於線性螺釘的致動器或步進驅動器)將 DHA 從表面移開足夠的距離,而允許插入和移除工件,例如晶圓或面板。這樣的DHA還可包括一或更多精細定位致動器,例如壓電致動器或基於高精確度線性螺桿的致動器。因此,DHA可與包括粗致動器和精細致動器元件的對準系統結合使用。在一些實施例中,一或更多精細定位致動器具有至少約5µm或至少約1µm的精確度。In order to be able to automatically set up and control the gap between the workpiece and the deposition head to be small (eg, less than about 100 or 50 µm) dimensions are the same, requiring precise positioning hardware and processing to work with the gap sensing devices described above. For DHAs containing one or more small anodes or arrays of inert anodes (as deposition heads), coarse positioning actuators (e.g., linear screw-based actuators or stepper drives) can be used to move the DHA away from the surface Sufficient distance to allow insertion and removal of workpieces such as wafers or panels. Such a DHA may also include one or more fine positioning actuators, such as piezoelectric actuators or high precision linear screw based actuators. Thus, DHA can be used in conjunction with alignment systems comprising coarse and fine actuator elements. In some embodiments, the one or more fine positioning actuators have an accuracy of at least about 5 µm or at least about 1 µm.
請參照圖10A-10B及圖11A-11B,其顯示具有垂直定位及共平面控制能力的DHA 1000的元件,而某些內部構件細節係為了簡潔及清晰而未顯示。DHA 1000包括被設置在該沉積頭1001面向工件1007的近側表面上的陽極像素的陣列1001a(例如,惰性陽極陣列);位於該沉積頭1001的該近側表面上或作為沉積頭1001的一部分(未顯示對於功率控制系統的電性連接件)的一或更多間隙感測元件(未具體顯示),在其表面上具有惰性陽極陣列1001a;周邊FDH 1002(未顯示對於流動控制系統的流體連接件細節);安裝組件1005,具有較長途距離垂直位置致動器1003,該致動器1003包括具有馬達的定位螺釘1004及齒輪1006;其中該安裝組件1005進一步附接至升降基部板1009,該升降基部板1009可被上下移動。該升降基部板1009因此可附接至FDH 1002及三或更多的精細(例如,小於約1µm)解析度致動器元件1010a/b/c。致動器元件因此附接至沉積頭1001,允許該沉積頭1001上下移動,還能夠透過獨立改變1010a/b/c的各者而相對於工件及剩餘DHA改變陽極陣列1001a的前表面的空間平面。垂直位置致動器1003係用於將整個DHA(沉積頭1001、FDH 1002及其他部分)移動朝向或遠離工件1007,從而允許對沉積頭1001與工件1007之間的間隙1008a的尺寸進行相對粗調整。同樣地,沉積頭1001僅經由精細致動器1010a/b/c而附接至升降基部板1009,允許沉積頭1001的移動獨立於其餘的DHA並垂直於其平均平面。在較佳實施例中,精細定位致動器可為壓電致動器或複數致動器的串聯組合(以延伸裝置的運動範圍)的。在特定實施例中,使用粗及細調整可提供所欲的FDH間隙1008b(在FDH 1002的近側表面與工件1007的表面之間)及/或所欲的沉積頭間隙1108a(在沉積頭1001的近側表面與工件1007的表面之間)。在特定實施例中,FDH間隙係大於沉積頭間隙。Please refer to FIGS. 10A-10B and 11A-11B , which show components of the
在典型操作中(例如,如圖10A-10B中),在將工件放置在DHA下方之後,該DHA在表面附近移動並使用長途垂直定位致動器1003將工件1007與DHA 1000之間的間隙減小至200到2000 µm之間的間隙尺寸。若在此步驟之前,電解質未位於表面上以填充間隙,則此時藉由流動流體並將該流體從 FDH 輸送到間隙而淹沒該工件和陽極陣列之間的間隙。使用感測元件(包括先前描述及參照圖9A-9C的感測元件)可用於確定間隙尺寸。在一實施例中,至少三個感測器(其各自在沉積頭上或陽極像素陣列內的不同點處鄰近圖 11A-11B 中的壓電致動器 1010a/b/c)在該壓電被充能以減小間隙時測量該間隙,直到達到目標間隙大小。例如,壓電元件的運動一直持續到各感測器間隙指示目標間隙1008(例如,從10到50 µm或10到25 µm)為止。各對感測器和致動器的動作可為獨立的,並且每對具有一控制器,該控制器具有用於減小尺寸並將間隙尺寸保持在目標尺寸的演算法。In a typical operation (eg, as in FIGS. 10A-10B ), after a workpiece is placed beneath the DHA, the DHA is moved near the surface and the gap between the
對於採用惰性陽極或虛陽極的實施例,可配置具有陽極像素陣列的沉積頭(如圖12A-12B所示)。利用此結構,各陽極1201可被配置或活化以沉積單一特徵部1204,或者被配置或活化使得複數較小陽極的組一起被開啟1202或關閉1203以沉積單一特徵部1205。圖 12A 中的先前配置允許使用尺寸在特徵尺寸數量級上相對較大的陽極,但是以這種方式生產的沉積頭只能用於單個模具設計或非常相似的模具設計的一小部分選擇,因為各特徵1204的位置由對應陽極的位置所確定。For embodiments employing inert or dummy anodes, a deposition head may be configured with an array of anode pixels (as shown in Figures 12A-12B). With this configuration, each
通過採用具有更多數量的相對較小的陽極像素的沉積頭(如圖12B所示),特徵部可通過這些陽極的組而加以沉積,因此特徵部1205的位置僅由沉積處理的編程所確定,且區域1206可以簡單地藉由將像素留在該處而保持空置。後一種方法具有幾個優點:1)特徵尺寸及位置的靈活性允許單一沉積頭設計用於任何模具設計,以及 2)可在沉積處理中改變哪些陽極是活化的,以改變特徵部的直徑、位置等。尤其,在沉積處理的優化中可能需要改變特徵部尺寸。如本文所討論的,陽極和工件之間的電流分佈範圍可能是一個重要的問題,尤其是在該處理的剛開始時。因此,以較小的活性陽極區域開始沉積處理,以將電流局部化至工件上的較小區域可為有益的。接著,在特徵開始形成後,可開啟初始位置周圍的更多陽極以將特徵部加寬至所需尺寸,而不會大幅增加經沉積特徵部周圍的場中的沉積。在欲沉積多種金屬的情況下,可使用類似的方法。可利用比第一金屬更小的陽極組來沉積第二金屬,以促進在第一金屬的頂部上的沉積,並最小化已沉積特徵部的側部上的沉積。By using a deposition head with a greater number of relatively small anode pixels (as shown in FIG. 12B ), features can be deposited by groups of these anodes, so the position of
請參照圖13A-C,在一些實施例中,兩步驟電鍍處理係用於在基板上產生結構。在這些情況下,該設備包含額外輔助電極元件,用於將金屬電鍍至沉積陣列的像素上。在操作期間,DHA與基板、輔助電極或兩者電解連接和連通,但在DHA電鍍期間與該輔助電極連通,並且在電鍍到基板上期間與基板連通。 在某些實施例中,陽極陣列包含在陽極陣列組件的外圍或在某些情況下附接到陽極陣列組件的一部分的輔助陽極。Referring to Figures 13A-C, in some embodiments, a two-step electroplating process is used to create structures on a substrate. In these cases, the device contains additional auxiliary electrode elements for electroplating metal onto the pixels of the deposited array. During operation, the DHA is in electrolytic connection and communication with the substrate, the auxiliary electrode, or both, but communicates with the auxiliary electrode during DHA electroplating, and communicates with the substrate during electroplating onto the substrate. In certain embodiments, the anode array comprises an auxiliary anode at the periphery of, or in some cases attached to, a portion of the anode array assembly.
圖13A中描繪了此實施例的示例,其中沉積頭1321包含附接的輔助電極1325。因此,輔助電極1325與沈積頭1321一起移動。在此實施例中,比起從沉積頭電鍍到基板期間,在電鍍到沉積頭的惰性電極期間沉積頭1321係被定位成更遠離基板 1325。這些位置之間的移動由圖 13A 中的垂直箭頭所描繪。An example of this embodiment is depicted in FIG. 13A , where a deposition head 1321 includes an
在其他實施例中,沉積頭係與第二陽極分開。圖13B中描繪此實施例的示例,其顯示說明基板1323上方的沉積頭1321的俯視圖。如圖所示,輔助電極1327從基板1323橫向偏移。在第一步驟期間,沉積頭1321在其像素作為陰極及被電鍍至惰性電極上的金屬進行操作時在輔助電極1327上方。在第二步驟中,沉積頭1321在其像素作為陽極操作並且將金屬從惰性電極電鍍到基板上時在基板1323上方移動。In other embodiments, the deposition head is separate from the second anode. An example of this embodiment is depicted in FIG. 13B , which shows a top view illustrating deposition head 1321 above
其他配置係可考慮的。例如,輔助電極可從沉積頭分離並設置在沉積頭上方。在操作期間,沉積頭可在靠近輔助電極的位置(用於電鍍到惰性電極上)和靠近基板(用於從惰性電極電鍍到基板上)的位置之間沿z方向移動。在其他示例中,輔助電極附接到沉積頭,而沉積頭在基板上方的位置之間橫向移動(用於從惰性電極電鍍到基板上)和橫向偏離基板(用於電鍍到惰性電極上)。Other configurations are contemplated. For example, the auxiliary electrode may be separated from the deposition head and provided above the deposition head. During operation, the deposition head is movable in the z-direction between a position close to the auxiliary electrode (for plating onto the inert electrode) and a position close to the substrate (for plating from the inert electrode onto the substrate). In other examples, the auxiliary electrode is attached to the deposition head, and the deposition head is moved laterally between positions above the substrate (for plating from the inert electrode onto the substrate) and laterally offset from the substrate (for electroplating onto the inert electrode).
在操作中,在設備接收到具有晶種層的工件之後,系統可以溢滿電解質,並且在基板、工件與輔助電極之間的區域中都溢滿。輔助電極可為惰性陽極或由在電解質中且待電鍍到基板上的可電鍍金屬組成的活性金屬電極。此外,(陽極像素的)惰性電極係設置在介電質材料的空腔或井中,該空腔或井係在此處理中電鍍金屬所填充及移除之處。請參見圖13C,其中由絕緣介電質材料構成的基板1331具有複數空腔或阱。各空腔或井具有設置在一端處的惰性電極1333。各惰性電極 1333 可通過單獨的電引線 1335 而獨立電性尋址。In operation, after the device receives the workpiece with the seed layer, the system can be flooded with electrolyte, and in the area between the substrate, the workpiece, and the auxiliary electrode. The auxiliary electrode can be an inert anode or an active metal electrode consisting of an electroplatable metal in an electrolyte to be electroplated onto the substrate. In addition, an inert electrode (of the anode pixel) is disposed in the cavity or well of the dielectric material that is filled and removed by the plating metal in this process. Please refer to FIG. 13C , where the
在第一步驟中,將金屬鍍到陽極像素的一或更多惰性電極上至目標厚度,該目標厚度通常等於或小於像素阱的深度。在圖13C的實施例中,這種經電鍍金屬係由層1337示出。如圖所示,像素尺寸穩定的金屬(即,惰性電極)可被經圖案化的介電質材料包圍,而金屬在其底部係暴露的。在該步驟期間,頭組件的位置被設置為不靠近基板的第一目標位置。在某些實施例中,在此步驟中,基板與DHA之間的該距離可大於DHA的最小平面內尺寸,並且允許電流從輔助電極自由地並以實質均勻的方式通過基板和DHA之間的間隙空間內。 例如,若DHA的寬度為25公分,長度為100公分,則25公分的間隙是合適的。在電鍍成像素期間,印刷頭和工件之間的間隔可大於電流必須行進的最大距離(因此至少是印刷頭的最小橫向尺寸),而不在工件中引起電壓梯度。In a first step, metal is plated onto one or more inert electrodes of the anodic pixel to a target thickness, which is typically equal to or less than the depth of the pixel well. In the embodiment of FIG. 13C , this plated metal is shown by
使用橫跨所有像素的恆定電流密度以將電解質金屬從電解質中的離子金屬鍍到各種惰性電極上。這會在所有惰性電極上產生恆定量的金屬電鍍。在其他情況下,在此步驟中鍍覆的金屬量在該等惰性電極各處可為不均勻的,例如以允許對處理可變的像素到像素的電流效率進行校正。A constant current density across all pixels is used to plate the electrolyte metal from the ionic metal in the electrolyte onto various inert electrodes. This produces a constant amount of metal plating on all inert electrodes. In other cases, the amount of metal plated in this step may be non-uniform across the inert electrodes, eg, to allow correction for process variable pixel-to-pixel current efficiency.
在用金屬填充像素井之後,將該頭移動並定位到靠近工件的第二個目標位置。如參照圖4所討論的,頭部和電鍍表面之間的距離可小於被電鍍特徵部的尺寸。例如,為了電鍍50 µm的圓柱,此步驟中的間隙可小於約50 µm。該距離最初是經埋種基板與 DHA 之間的距離,但在該過程的後期(當結構已生長時),該距離是 DHA與經沉積結構的頂部之間的距離。在整個過程的各循環中,間隙不必為相同的,而是可以經編程以響應各種可編程的期望需求而加以改變。接著,通過適當的電源將惰性電極活化,使基板為陽極性,並且金屬沉積在各活性像素的表面下方的基板上,其中該表面可由具有孔洞的絕緣基板的表面而加以界定。若在鍍覆於惰性電極上的金屬耗盡之前(或是另外需要)未達到結構的目標厚度,則終止該基板上電鍍步驟,並將頭部從表面移開並到達第一個目標位置,在該位置上重複該過程。該處理藉此以循環逐步的方式執行,直到達到目標特徵部厚度。 系統 After the pixel wells are filled with metal, the head is moved and positioned to a second target position close to the workpiece. As discussed with reference to FIG. 4, the distance between the head and the plated surface may be smaller than the dimension of the feature being plated. For example, to plate a 50 µm cylinder, the gap in this step can be less than about 50 µm. This distance is initially the distance between the seeded substrate and the DHA, but later in the process (when the structure has grown) it is the distance between the DHA and the top of the deposited structure. The gap need not be the same throughout each cycle of the process, but can be programmed to vary in response to various programmable desired requirements. Next, the inert electrodes are activated by a suitable power source, rendering the substrate anodic, and metal is deposited on the substrate below the surface of each active pixel, which surface may be bounded by the surface of the insulating substrate with holes. If the target thickness of the structure is not reached before the metal plated on the inert electrode is depleted (or otherwise required), the plating step on the substrate is terminated and the head is moved away from the surface and to the first target location, Repeat the process on that location. The process is thereby performed in a cyclic step-by-step fashion until the target feature thickness is reached. system
本文中還揭示使用DHA的系統。圖14提供一系統1400,其包括具有陽極像素陣列1401a的沉積頭1401、FDH 1402、感測元件1403、致動器元件1404、附接至升降基底板1409的安裝組件1405、附接至沉積頭1401的升降基底板1409,以及控制器1410。或者,感測元件1403係被配置為一或更多感測電極的陣列1401a的一或更多電極代替。系統1401可更包括藉由幫浦1422及閥1420而與FDH 1402流體連通的電解質源1424。控制器1410可與系統1400的任何構件(例如,閥1420及/或幫浦1422)電連接以向FDH 1402提供電解質;沉積頭1401,其可包括用於將一或更多陽極像素、感測元件或陽極像素操作以用作感測元件的電路;致動器元件1404,以相對於工件1407的金屬化表面1407a(其為接地的)對準及定位沉積頭的近側表面;及/或安裝組件1405,以操作致動器、螺桿及/或馬達來定位DHA。Also disclosed herein are systems using DHA. Figure 14 provides a
該系統可包括用於將電解質從大容量儲存容器受控制地輸送到 FDH 的硬體(例如,幫浦、管、過濾器等)。該設備可包括複數特徵部,其支持同時獨立地流體存取FDH內的端口。該系統可以包括用於控制熱量去除或添加的元件,以及用於電解質、工件、沉積頭的溫度控制的元件,或是二者。該設備可被設計成使得沉積頭及工件上方的區域為實質密封的(例如,形成腔室),使得頭部周圍的空間及/或沉積頭與晶圓之間的間隙中的大氣環境 在溫度及/或存在的氣體方面係受控制的。例如,環境腔室可用於去除不希望的氣體(例如,氧氣)。在這些或其他示例中,可將一或更多氣體(例如,反應性氣體或惰性氣體)添加至腔室中,例如以與工件反應或產生惰性氣氛(例如,氬氣)。在這些或其他示例中,該設備可包括用於調節氣氛以包含受控制的蒸發電解質量及/或在受控制條件下執行沉積的硬體。其他常見的設備特徵可包括流體條件輸送控制設備(例如,加熱器/冷卻器及熱交換器、位準控制器等),以及回饋控制計量,例如用於調節流體輸送(例如,使用基板上的液體膜的光學分析)。多通道電力及/或電力切換裝置亦設想以實現對沉積頭陣列的開關控制,以在更大的沉積頭內單獨操作。The system may include hardware (eg, pumps, tubes, filters, etc.) for the controlled delivery of electrolyte from the bulk storage vessel to the FDH. The device may include a plurality of features that support simultaneous and independent fluid access to ports within the FDH. The system may include elements for controlled heat removal or addition, and elements for temperature control of the electrolyte, workpiece, deposition head, or both. The apparatus can be designed such that the area above the deposition head and workpiece is substantially sealed (e.g., forming a chamber) such that the space around the head and/or the atmosphere in the gap between the deposition head and the wafer is at a temperature and/or the presence of gases is controlled. For example, an environmental chamber can be used to remove unwanted gases (eg, oxygen). In these or other examples, one or more gases (eg, reactive gases or inert gases) may be added to the chamber, eg, to react with the workpiece or to create an inert atmosphere (eg, argon). In these or other examples, the apparatus may include hardware for adjusting the atmosphere to contain a controlled amount of evaporated electrolyte and/or to perform deposition under controlled conditions. Other common device features may include fluid condition delivery control devices (e.g., heater/coolers and heat exchangers, level controllers, etc.), and feedback control metering, such as for regulating fluid delivery (e.g., using on-board Optical analysis of liquid films). Multi-channel power and/or power switching devices are also contemplated to enable on-off control of arrays of deposition heads for individual operation within larger deposition heads.
控制器可用於控制與沈積頭、閥、幫浦、間隙感測元件或對準系統的致動器相關聯的控制裝置或其他電路的狀態。對準系統或另一定位系統可用於定位工件、沉積頭及/或陽極像素陣列。在一些示例中,對準或定位系統將工件、沉積頭及/或陽極像素陣列進行定位,接著執行金屬內連件的沉積。然後,對準或定位系統將工件、沉積頭和/或陽極像素陣列重新定位,接著在同一工件上執行金屬內連件的沉積。該處理可涉及電鍍、停止電鍍、移動,接著再次電鍍。或者,該處理可涉及簡單地將工件相對於沉積頭以恆定速度連續移動,其中陽極係經通電/開啟或以時變速度移動。相對運動的方向亦可在電鍍過程中改變。這些處理步驟可以針對同一工件重複一或多次以創建金屬內連件圖案。The controller may be used to control the state of control devices or other circuitry associated with the deposition head, valves, pumps, gap sensing elements, or actuators of the alignment system. An alignment system or another positioning system may be used to position the workpiece, deposition head and/or anode pixel array. In some examples, an alignment or positioning system positions the workpiece, deposition head, and/or anode pixel array prior to performing deposition of metal interconnects. An alignment or positioning system then repositions the workpiece, deposition head, and/or anode pixel array before performing metal interconnect deposition on the same workpiece. The process may involve plating, stopping plating, moving, and then plating again. Alternatively, the process may involve simply moving the workpiece continuously at a constant velocity relative to the deposition head, with the anode being energized/turned on or moving at a time-varying velocity. The direction of relative motion can also be changed during the electroplating process. These processing steps may be repeated one or more times on the same workpiece to create the metal interconnect pattern.
在一些實行例中,控制器為系統的一部份且該系統可為上述示例的一部分。此系統可包括半導體處理設備,而該半導體處理設備包括一或更多處理工具、一或更多腔室、一或更多處理平台及/或特定處理構件(晶圓基座、氣體流動系統等)。可將這些系統與電子元件進行整合以在處理半導體晶圓或基板之前、期間及之後控制它們的操作。所述電子元件可被稱為「控制器」,其可控制一或更多系統的各種構件或子部件。取決於處理需求及/或系統類型,可將控制器進行編程以控制本文所揭露的任何處理,包括電解質的輸送、DHA或其構件的定位、活化一或更多陽極像素或陽極像速組、感測該DHA與該工件之間的一或更多間隙、蝕刻晶種/阻障層等。In some implementations, the controller is part of a system and the system can be part of the examples described above. The system may include semiconductor processing equipment including one or more processing tools, one or more chambers, one or more processing platforms, and/or specific processing components (wafer susceptors, gas flow systems, etc. ). These systems can be integrated with electronic components to control the operation of semiconductor wafers or substrates before, during and after processing them. The electronic components may be referred to as "controllers," which may control various components or subcomponents of one or more systems. Depending on the treatment requirements and/or system type, the controller can be programmed to control any of the treatments disclosed herein, including delivery of electrolytes, positioning of DHA or components thereof, activation of one or more anodic pixels or groups of anodic pixels, One or more gaps, etched seed/barrier layers, etc. between the DHA and the workpiece are sensed.
廣義來說,可將控制器定義成具有各種積體電路、邏輯、記憶體、及/或軟體的電子元件,以接收指令、發送指令、控制操作、啟用清潔操作、啟用端點測量等。所述積體電路可包括以韌體形式儲存程式指令的晶片、數位訊號處理器(DSP)、定義為特殊應用積體電路(ASIC)的晶片、及/或執行程式指令(例如,軟體)的一或更多微處理器或微控制器。程式指令得為以各種獨立設定(或程式檔案)形式而被傳送至控制器的指令,而定義出用於在半導體晶圓上、或針對半導體晶圓、或對系統執行特定步驟的操作參數。在一些實施例中,操作參數可為製程工程師所定義之配方的一部分,以在將一或更多層、材料、金屬、氧化物、矽、二氧化矽、表面、電路、及/或晶圓的晶粒或另一工件的製造期間完成一或更多的處理步驟。Broadly speaking, a controller can be defined as an electronic component having various integrated circuits, logic, memory, and/or software to receive commands, send commands, control operations, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips storing program instructions in the form of firmware, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or chips that execute program instructions (e.g., software) One or more microprocessors or microcontrollers. Program instructions may be instructions transmitted to the controller in the form of various individual settings (or program files) defining operating parameters for performing specific steps on or for the semiconductor wafer or for the system. In some embodiments, the operating parameters may be part of a recipe defined by a process engineer to process one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or wafers One or more processing steps are performed during the fabrication of a die or another workpiece.
在一些實行例中,控制器可為電腦的一部分、或耦接至電腦,所述電腦係整合並耦接至所述系統,或以其他方式與所述系統網路連接,或是其組合。例如,控制器可位於「雲端」、或FAB主電腦系統的全部或一部分中而可允許基板處理的遠端存取。電腦可使對系統的遠端存取能夠監控加工操作的當前進程、檢視過去加工操作的歷史、檢視來自複數加工操作的趨勢或性能度量、變更當前處理的參數、設定當前處理之後的處理步驟,或是開始新的處理。在一些示例中,遠端電腦(例如,伺服器)可透過網路向系統提供處理配方,其中該網路可包括區域網路或網際網路。遠端電腦可包括使用者介面,而能夠對參數及/或設定進行輸入或編程,所述參數及/或設定則接著從遠端電腦傳送至系統。在一些示例中,控制器接收數據形式的指令,其中所述指令係指明一或更多操作期間待執行之各處理步驟所用的參數。應當理解的是,所述參數可特定於待執行的步驟類型,及控制器所配置以連接或控制的工具類型。因此,如上所述,控制器可例如藉由包括一或更多離散控制器而進行分佈,其中所述離散控制器係彼此以網路連接且朝向共同的目的(例如本文所述的步驟與控制)而運作。為此目的所分佈的控制器之示例將係位於腔室上的一或更多積體電路,其與遠端設置(例如,位於平台層或作為遠端電腦的一部分)且結合以控制腔室上之處理的一或更多積體電路連通。In some implementations, the controller can be part of, or coupled to, a computer that is integrated and coupled to the system, or otherwise networked with the system, or a combination thereof. For example, the controller can reside in the "cloud," or in all or part of the FAB's main computer system, allowing remote access for substrate processing. The computer enables remote access to the system to monitor the current progress of the machining operation, view the history of past machining operations, view trends or performance metrics from multiple machining operations, change the parameters of the current process, set the processing steps after the current process, Or start a new process. In some examples, a remote computer (eg, a server) may provide processing recipes to the system over a network, which may include a local area network or the Internet. The remote computer may include a user interface to enable input or programming of parameters and/or settings which are then transmitted from the remote computer to the system. In some examples, the controller receives instructions in the form of data specifying parameters for various processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of step to be performed, and the type of implement the controller is configured to connect to or control. Thus, as noted above, the controllers may be distributed, for example, by including one or more discrete controllers networked with each other and directed toward a common purpose, such as the steps and controls described herein. ) to operate. An example of a controller distributed for this purpose would be one or more integrated circuits located on the chamber that are located remotely (e.g., at the platform level or as part of a remote computer) and combined to control the chamber One or more integrated circuits for the above processing are connected.
不具限制地,示例性系統可包括具有沉積頭組件的3DEP腔室、電漿蝕刻腔室或模組、沉積腔室或模組、旋轉-淋洗腔室或模組、金屬電鍍腔室或模組、清潔腔室或模組、晶邊蝕刻腔室或模組、物理氣相沉積(PVD)腔室或模組、化學氣相沉積(CVD)腔室或模組、原子層沉積(ALD)腔室或模組、原子層蝕刻(ALE)腔室或模組、離子植入腔室或模組、軌道腔室或模組,以及可能有關於或使用於半導體晶圓之加工及/或製造中的任何其他半導體處理系統。Without limitation, exemplary systems may include a 3DEP chamber with a deposition head assembly, a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module group, cleaning chamber or module, edge etch chamber or module, physical vapor deposition (PVD) chamber or module, chemical vapor deposition (CVD) chamber or module, atomic layer deposition (ALD) Chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, orbital chambers or modules, and which may relate to or be used in the processing and/or fabrication of semiconductor wafers any other semiconductor processing system.
如上所述,取決於工具所待執行的一或更多處理步驟,控制器可連通至一或更多其他工具電路或模組、其他工具組件、群集式工具、其他工具介面、相鄰工具、鄰近工具、遍布於工廠的工具、主電腦、另一控制器,或材料輸送中所使用的工具,而將基板的容器帶進及帶出半導體製造工廠的工具位置及/或裝載埠口。 方法 As noted above, depending on one or more processing steps to be performed by the tool, the controller may communicate to one or more other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, A tool location and/or a load port adjacent to a tool, a tool throughout the fab, a host computer, another controller, or a tool used in material handling to bring containers of substrates into and out of a semiconductor fabrication facility. method
本文還揭示可採用所述任何設備、組件或系統的方法。在一些實施例中,請參照圖15,方法從接收1501工件開始,該工件包括設置在其表面上的晶種層,其中該晶種層是導電的;將沉積頭定位1502接近工件表面,其中沉積頭任選地包括陽極像素陣列;通過流體分布頭(FDH)將電解質輸送1503至陽極像素,其中該FDH被配置以圍繞著該陣列;以及通過向陣列供應電流及/或電壓,或是在工件和陣列之間供應電位差來活化1504一或更多陽極像素,從而在第一位置處提供經沉積特徵部。Also disclosed herein are methods in which any of the described devices, components, or systems may be employed. In some embodiments, referring to FIG. 15 , the method begins by receiving 1501 a workpiece including a seed layer disposed on its surface, wherein the seed layer is electrically conductive; positioning 1502 a deposition head proximate to the surface of the workpiece, wherein The deposition head optionally includes an array of anode pixels; the electrolyte is delivered 1503 to the anode pixels by a fluid distribution head (FDH), wherein the FDH is configured to surround the array; and by supplying current and/or voltage to the array, or at A potential difference is supplied between the workpiece and the array to activate 1504 one or more anode pixels to provide deposited features at a first location.
該方法可以包括判斷1505第一經沉積特徵部是否滿足目標特徵部尺寸及/或目標形狀。若不符合目標特徵,則可將操作1502-1505重複任意n次,直到滿足此期望條件。若滿足目標特徵,則可將沉積頭再次定位到該工件上的另一位置,以擴展該第一經沉積特徵部(例如,將在第一位置之間連接的導線延伸至其他位置),或是提供第二經沉積特徵部。為續行沉積,可進行操作1503-1504,並且若未沉積目標特徵部,則可重複操作1502-1504。在沉積完成後,可通過蝕刻移除殘留或不需要的晶種/阻障層,從而隔離經沉積特徵部。The method can include determining 1505 whether the first deposited feature meets a target feature size and/or target shape. If the target feature is not met, operations 1502-1505 may be repeated any n times until the desired condition is met. If the target characteristics are met, the deposition head may be repositioned to another location on the workpiece to expand the first deposited feature (e.g., extend a wire connected between the first location to another location), or Yes providing a second deposited feature. For continued deposition, operations 1503-1504 may be performed, and if the target feature is not deposited, operations 1502-1504 may be repeated. After deposition is complete, residual or unwanted seed/barrier layer can be removed by etching, thereby isolating the deposited features.
圖16繪示使用兩步驟電鍍-去電鍍處理以將特徵部電鍍至工件上的處理1601。如圖所示,該處理從操作1603開始,其中電鍍系統接收具有形成在至少一表面上的導電晶種層的工件。如圖所示,此工件可為包含半導體的晶圓,或是在其上具有一或更多電子裝置或部分製造的電子裝置的其他基板。在接收工件之後,電鍍系統在沉積頭(如本文所述)與輔助陽極之間輸送電解質。請參照操作1605。輔助陽極可包括消耗性金屬,例如銅,或者其可包括對後續操作中所遇到的電化學環境具顯著惰性的金屬。FIG. 16 illustrates a
如果沉積頭尚未接近輔助電極,則在操作1607中將其放置在附近。在該位置中,沉積頭可與輔助電極電產生化學交互作用,但不與工件發生電化學交互作用,或者其可與輔助電極及工件二者發生電化學交互作用。可採用本文所述的間隙測量系統及/或對準系統來確保沉積頭相對於輔助電極正確地移動及定位。在此位置中,沉積頭並不靠近工件,以確保在次一操作1609期間在工件上不產生電壓梯度。If the deposition head is not already close to the auxiliary electrode, it is placed nearby in
在沉積頭定位在輔助電極的限定近處過後,電鍍系統將輔助電極及/或沉積頭的惰性電極電性活化。請參見操作 1609。這種活化允許金屬電鍍至沉積頭的惰性電極上。換言之,惰性電極作為輔助電極的陽極的陰極。如別處所述,沉積頭可包括凹槽或空腔,其中該凹槽或空腔將經電鍍金屬限制在與惰性電極相鄰的限定空間。在一些情況下,惰性電極、沉積頭上的介電材料中的相鄰凹槽,以及相關聯的電引線的組合界定出沉積頭的陽極像素。After the deposition head is positioned in the defined proximity of the auxiliary electrode, the electroplating system electrically activates the auxiliary electrode and/or the inert electrode of the deposition head. See
接下來,該系統將沉積頭移離輔助電極並靠近工件。請參見操作1611。如本文所述的間隙測量系統及/或對準系統可用於確保沉積頭相對於工件正確移動和定位。Next, the system moves the deposition head away from the auxiliary electrode and closer to the workpiece. See
在此位置中,該系統可以再次電活化惰性電極,但是此次的方式係使惰性電極作為陽極,而工件作為陰極。請參見操作1613。這會導致先前沉積在惰性電極上的金屬(當它們在輔助電極附近被活化時)電鍍至工件上。In this position, the system can again electroactivate the passive electrode, but this time in such a way that the passive electrode acts as the anode and the workpiece acts as the cathode. See
在將一些或全部消耗性金屬從惰性電極電鍍至工件上過後,停止電活化。在電鍍至基板上的期間或過後,電鍍系統判斷經電鍍特徵部(有時稱為經印刷特徵部)是否滿足尺寸及/或形狀的目標規格。請參見操作1615。此判定可藉由使用本文所述的間隙測量系統或處理而進行。After some or all of the consumable metal has been plated from the inert electrode onto the workpiece, the electrical activation is stopped. During or after plating onto a substrate, the plating system determines whether plated features (sometimes referred to as printed features) meet target specifications for size and/or shape. See
若該判斷顯示特徵部符合規格,則終止主處理。若該判斷顯示特徵部尚未生長至滿足規格,則執行額外的循環。換言之,處理控制返回至操作1607,其中沉積頭再次定位在輔助電極附近(遠離工件)。於此,重複進行操作1607-1615。If the judgment indicates that the characteristic part conforms to the specification, the main processing is terminated. If the determination indicates that the feature has not grown to meet specification, then an additional loop is performed. In other words, process control returns to
在執行一或更多這樣的循環之後的某點時,該系統判斷工件上所電鍍的特徵部滿足適當的尺寸及/或形狀規格。此時,可終止該處理。然而,在一些實施例中,一或更多附加操作係由系統(或相關聯的下游系統)所執行。At some point after performing one or more such cycles, the system determines that the plated features on the workpiece meet appropriate size and/or shape specifications. At this point, the process can be terminated. However, in some embodiments, one or more additional operations are performed by the system (or associated downstream systems).
在一些實施例中,沉積頭的大小僅足以(或僅具有足夠數量的陽極像素)將必須電鍍在工件上的特徵部子集合進行電鍍。在這樣的實施例中,該處理任選地包括附加操作,其係將操作1607-1615再次執行一或多次,但是在工件的不同區域處以在工件上沉積不同的特徵部子集合。請參見操作1617。取決於工件和沉積頭的相對尺寸,該處理可重複多次。例如,若處理需要在工件上電鍍 400000 個特徵部,且沉積頭僅包含 120000 個陽極像素,則由操作 1607-1615 所實施的該處理可執行四次,各次針對沉積頭相對於工件的不同位置。In some embodiments, the deposition head is only large enough (or has only a sufficient number of anodic pixels) to plate a subset of features that must be plated on the workpiece. In such embodiments, the process optionally includes additional operations in which operations 1607-1615 are performed one or more times again, but at different regions of the workpiece to deposit a different subset of features on the workpiece. See
在一些實施例中,在本文描述的先前操作完成之後,該系統將位於工件上沉積特徵部的區域之外的其中一些或全部晶種層進行蝕刻。請參見操作 1619。In some embodiments, after completion of the previous operations described herein, the system etches some or all of the seed layer on the workpiece outside of the region where the features were deposited. See
一般來說,間隙的測量可與電鍍處理完全分開,即可在無電鍍的情況下測量表面間隙及達成對準,接著將頭移動至像素填充步驟,接著可將該頭移動至開始在基板上進行電鍍的目標起始間隙。此後,可(或可不)進行另一次測量。該處理是否係足夠一致,且定位硬體係準確且有再現性的,這是該處理的最低要求。In general, the measurement of the gap can be completely separated from the plating process, that is, the surface gap can be measured and the alignment can be achieved without plating, then the head can be moved to the pixel filling step, and then the head can be moved to start on the substrate Target starting gap for plating. Thereafter, another measurement may (or may not) be performed. Whether the process is sufficiently consistent and the positioning hardware is accurate and reproducible is a minimum requirement for the process.
在一些實施例中,該系統測量間隙,基於對虛晶片或第一晶片的測量,或者若頭部小於晶片,則基於橫跨虛晶片/第一晶片上方的各種位置的測量,從而進行任何適當的對準,存儲該信息。此後,若該系統的再現性非常好(例如,其可保持大約 1 um 以內),則可確定整體機械位置並將其再次用於後續工件。因此,用於初始對準的工件可為專用的對準基板,或是先前所處理的生產工件。 結論 In some embodiments, the system measures the gap based on measurements of the dummy wafer or the first wafer, or if the head is smaller than the wafer, based on measurements across various locations over the dummy wafer/first wafer, making any suitable alignment, store this information. Thereafter, if the reproducibility of the system is very good (eg, it can stay within about 1 um), the overall mechanical position can be determined and reused for subsequent workpieces. Thus, the workpiece used for initial alignment may be a dedicated alignment substrate, or a previously processed production workpiece. in conclusion
本文所述的技術能夠以非常小的規模以高準確度和精密度(例如,< 0.5 μm)形成細線內連件、接墊及其他金屬特徵部。有利地,可在沒有關於圖1描述的習知處理流程中使用的許多習知處理、設備及材料的情況下實施該等技術。例如,本文的技術不需要使用光阻、微影工具、光阻烘烤設備、光阻固化設備、光罩、顯影化學品及工具、氧電漿除渣設備,或光阻清潔及剝離設備。因此,與細線內連件、接墊及其他金屬特徵部的形成相關的所有權及處理成本大幅降低。The techniques described herein enable the formation of fine line interconnects, pads, and other metal features at very small scales with high accuracy and precision (eg, <0.5 μm). Advantageously, these techniques can be practiced without many of the conventional processes, equipment, and materials used in the conventional process flow described with respect to FIG. 1 . For example, the techniques herein do not require the use of photoresist, lithography tools, photoresist baking equipment, photoresist curing equipment, photomasks, development chemicals and tools, oxygen plasma descum equipment, or photoresist cleaning and stripping equipment. As a result, ownership and handling costs associated with the formation of fine line interconnects, pads, and other metal features are substantially reduced.
雖然前述實施例已為了清楚理解的目的而描述些許細節,但將顯而易知的是,可在隨附申請專利範圍的範疇內進行某些變更及修改。應注意的是,存在著許多實行所呈現實施例之處理、系統及設備的替代方法。因此,所呈現實施例係被視為說明性而非限制性的,且實施例並不受限於本文所給定的細節。While the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be made within the purview of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems and apparatus of the presented embodiments. Accordingly, the presented embodiments are to be regarded as illustrative rather than restrictive, and the embodiments are not limited to the details given herein.
101~108:操作 201~203:操作 301:工件 302A:內腔室 302B:內陽極 303:遮罩 304:孔洞 305:孔洞開口 305a:半徑 305b:直徑 305c:間隙距離 305d:中心至中心距離 307:間隙 311:工件 317:間隙 318:基板 319:惰性陽極 319a:寬度 319b:長度 319c:間隙距離 319d:中心至中心距離 500:沉積頭組件(DHA) 501:沉積頭 502:FDH 503:輸入口埠口 504:輸出口埠口 506:第一間隙 507:第二間隙 508:開口間隔 509:工件表面 601:基板 602:接墊 603:介電質 604:晶種層 605:RDL 701:工件 702:面板基板 703:沉積頭組件(DHA) 704:沉積頭桿 705:沉積頭 706:局部流動分佈區域 801:第一埠口陣列 802:第二埠口陣列 803:第三埠口陣列 804:第四埠口陣列 900:間隙測量系統 901:沉積頭 902a,902b:間隙 903a,903b,903c:感測元件 904:工件 904a:表面 904b:突出部 906a:電流承載引線 906b:第二平行非電流承載引線 1000:DHA 1001:沉積頭 1001a:陽極像素的陣列 1002:FDH 1003:垂直位置致動器 1004:定位螺釘 1005:安裝組件 1006:齒輪 1007:工件 1008:目標間隙 1008a/b:間隙 1009:升降基部板 1010a/b/c:致動器元件 1108a:沉積頭間隙 1201:陽極 1202:開啟 1203:關閉 1204,1205:特徵部 1206:區域 1321:沉積頭 1323:基板 1325:輔助電極 1327:輔助電極 1331:基板 1333:惰性電極 1335:電引線 1337:層 1400:系統 1401:沉積頭 1401a:陽極像素陣列 1402:FDH 1403:感測元件 1404:致動器元件 1405:安裝組件 1407:工件 1407a:金屬化表面 1409:升降基底板 1410:控制器 1420:閥 1422:幫浦 1424:電解質源 1501-1507:操作 1601:處理 1603-1619:操作 101~108: Operation 201~203: Operation 301: Workpiece 302A: inner chamber 302B: inner anode 303: mask 304: hole 305: hole opening 305a: Radius 305b: diameter 305c: Gap distance 305d: center to center distance 307: Gap 311: Workpiece 317: Gap 318: Substrate 319: Inert anode 319a: width 319b: Length 319c: Gap distance 319d: center to center distance 500: Deposition Head Assembly (DHA) 501: deposition head 502:FDH 503: input port port port 504: output port port 506: First gap 507:Second gap 508: opening interval 509: workpiece surface 601: Substrate 602: Pad 603: dielectric 604: Seed layer 605: RDL 701: Workpiece 702: panel substrate 703: Deposition Head Assembly (DHA) 704: deposition head rod 705: deposition head 706:Local flow distribution area 801: The first port array 802: Second port array 803: The third port array 804: The fourth port array 900: Gap measurement system 901: deposition head 902a, 902b: clearance 903a, 903b, 903c: sensing elements 904: Workpiece 904a: surface 904b: protrusion 906a: Current carrying leads 906b: Second parallel non-current carrying lead 1000:DHA 1001: deposition head 1001a: Array of Anode Pixels 1002:FDH 1003: Vertical position actuator 1004: set screw 1005: Install components 1006: gear 1007: Workpiece 1008: target clearance 1008a/b: Clearance 1009: lift base plate 1010a/b/c: Actuator element 1108a: deposition head clearance 1201: anode 1202: open 1203: off 1204,1205: Characteristic part 1206: area 1321: deposition head 1323: Substrate 1325: auxiliary electrode 1327: Auxiliary electrode 1331: Substrate 1333: Inert electrode 1335: Electric lead wire 1337: layer 1400: system 1401: deposition head 1401a: Anode Pixel Array 1402:FDH 1403: sensing element 1404: Actuator element 1405: Install components 1407: Artifact 1407a: metallized surface 1409: lifting base plate 1410: controller 1420: valve 1422: pump 1424: Electrolyte source 1501-1507: Operation 1601: processing 1603-1619: Operation
圖1為一流程圖,描述使用基於光阻技術形成金屬特徵部的方法。FIG. 1 is a flowchart describing a method of forming metal features using photoresist-based techniques.
圖2係根據本文中的實施例的形成經沉積特徵部的方法。Figure 2 is a method of forming deposited features according to embodiments herein.
圖3A至3D顯示具有複數陽極的非限制性設備。所提供的是具有(A、C)虛電極及(B、D)惰性電極的設備。Figures 3A to 3D show non-limiting devices with multiple anodes. Provided is a device having (A, C) dummy electrodes and (B, D) inert electrodes.
圖4顯示以各種微電極對工件的間隙(從0.75 µm至3.5 µm)製造的非限制性1x1經沉積特徵部的模擬結果。Figure 4 shows simulation results for non-limiting 1x1 deposited features fabricated with various microelectrode-to-workpiece gaps (from 0.75 µm to 3.5 µm).
圖5A至5B顯示具有沉積頭501及流動分布頭(FDH) 502的組件的非限制性示意圖。所提供的是(A)一橫截面圖,顯示在沉積頭501與工件509之間的流動產生及同心流動限制;以及(B)一俯視圖,顯示沉積頭501、配置以圍繞該沉積頭的FDH 502,以及設置在該FDH內的埠口503。5A-5B show non-limiting schematic diagrams of an assembly having a
圖6顯示具有重分布層(RDL, 1505)的非限制性結構,其中該RDL可為根據本文中的實施例的經沉積特徵部。Figure 6 shows a non-limiting structure with a redistribution layer (RDL, 1505), where the RDL can be a deposited feature according to embodiments herein.
圖7A-7D顯示使用複數沉積頭的組件的非限制性實施例。所提供的是(A)使用複數獨立定位的沉積頭的沉積操作;(B) 在晶圓701上使用複數沉積頭的沉積操作,其中單一FDH圍繞著各沉積頭;(C)在具有複數沉積頭的面板上702的沉積操作;以及(D) 沉積頭705及具有埠口706的FDH 705的近景圖。7A-7D show a non-limiting example of an assembly using a plurality of deposition heads. Presented are (A) a deposition operation using a plurality of independently positioned deposition heads; (B) a deposition operation on
圖8顯示具有流體埠口的配置的FDH的非限制性實施例。Figure 8 shows a non-limiting example of a FDH with a configuration of fluid ports.
圖9A至9C顯示不同電流流動方案的感測元件的非限制性實施例。所提供的是(A)藉由感測在感測元件903a與導電層904之間的電流流動以判斷間隙距離902a的感測操作;(B) 藉由感測在感測元件903a與導電層904上所設置的突出部或其他特徵部之間的電流流動以判斷間隙距離902b的另一感測操作;以及(C) 藉由感測在感測元件903a/b與導電層904之間的電流流動以判斷間隙距離902b的又另一感測操作。9A to 9C show non-limiting examples of sensing elements for different current flow schemes. Provided are (A) a sensing operation for judging the
圖10A-10B顯示一組件的非限制性實施例,其具有對準系統的構件。所提供的是對準操作,用於(A)將該組件帶往工件1007上的第一位置;以及(B)使用安裝組件1005將該組件垂直定位。10A-10B illustrate a non-limiting embodiment of an assembly having components of an alignment system. Provided are alignment operations for (A) bringing the assembly to a first location on the
圖11A-11B顯示具有進一步構件的對準系統的組件的非限制性實施例。所提供的是(A)一對準操作,用於將沉積頭對準在對於工件1007的表面的間隙距離1008內,及/或用於使沉積頭的近側表面的平面平行於工件1007的表面的平面;以及(B)具有複數精細致動器元件1010a/b/c的沉積頭1001的俯視圖。11A-11B show non-limiting examples of components of an alignment system with further components. Provided is (A) an alignment operation for aligning the deposition head within the
圖12A-12B顯示具有(A)單一陽極及(B)複數陽極像素的沉積頭的非限制性實施例。所提供的是(A)配置以提供單一經沉積特徵部1204的陽極1201,以及(B) 配置成陽極像素的活化群集1202以提供單一經沉積特徵部1205的複數陽極像素。12A-12B show non-limiting embodiments of deposition heads with (A) single anode and (B) multiple anode pixels. Provided are (A) an
圖13A-13B顯示複數實施例,其中沉積頭與輔助電極進行交互作用以將金屬電鍍至沉積頭上,及沉積頭與工件進行交互作用以將金屬從沉積頭電鍍至工件的特徵部上。13A-13B show embodiments in which a deposition head interacts with an auxiliary electrode to plate metal onto the deposition head, and a deposition head interacts with a workpiece to plate metal from the deposition head onto features of the workpiece.
圖13C顯示陽極像素的示例,該陽極像素具有惰性電極,以及與電鍍至工件的特徵部上相關的金屬。Figure 13C shows an example of an anodic pixel with an inert electrode and metal associated with electroplating onto a feature of a workpiece.
圖14顯示系統1400的非限制性實施例,該系統1400包括組件,該組件具有沉積頭1401、FDH 1402、安裝組件1405及控制器1410。FIG. 14 shows a non-limiting embodiment of a
圖15為一流程圖,描述根據本文中的實施例的形成經沉積特徵部的方法。15 is a flowchart describing a method of forming deposited features according to embodiments herein.
圖16為一流程圖,描述根據本文中的二步驟實施例的形成經沉積特徵部的方法。Figure 16 is a flowchart describing a method of forming deposited features according to a two-step embodiment herein.
201~203:操作 201~203: Operation
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