TW202238716A - Selective etching with fluorine, oxygen and noble gas containing plasmas - Google Patents
Selective etching with fluorine, oxygen and noble gas containing plasmas Download PDFInfo
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- 239000001301 oxygen Substances 0.000 title claims abstract description 42
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 title claims abstract description 33
- 229910052731 fluorine Inorganic materials 0.000 title claims abstract description 31
- 239000011737 fluorine Substances 0.000 title claims abstract description 31
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
- H01L21/0212—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC the material being fluoro carbon compounds, e.g.(CFx) n, (CHxFy) n or polytetrafluoroethylene
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- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
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Abstract
Description
本發明大體上與半導體製造的系統和方法有關,並且,在特定實施例中,與用於利用含氟、氧及稀有氣體之電漿的選擇性電漿蝕刻的系統和方法有關。 [相關申請案之交互參照] The present invention relates generally to systems and methods for semiconductor fabrication and, in particular embodiments, to systems and methods for selective plasma etching using plasmas containing fluorine, oxygen, and noble gases. [Cross-reference to related applications]
本申請案主張2020年12月17日提出申請之美國臨時專利申請案第63/126,951號與2021年5月28日提出申請之美國臨時專利申請案第63/194,561號的權利,該等申請案係藉由參照併入本文。This application claims the rights of U.S. Provisional Patent Application No. 63/126,951, filed December 17, 2020, and U.S. Provisional Patent Application No. 63/194,561, filed May 28, 2021, which is incorporated herein by reference.
一般而言,半導體裝置的製造是藉由基於微影、鈍化層的生長、和蝕刻的處理來執行,以實現由介電性、導電性和半導電性元件層所組成的目標裝置的期望結構。在現代半導體產業中,蝕刻步驟依賴於利用電漿的反應性離子蝕刻,主要是因為蝕刻速度快且可定向去除。然而,隨著製造技術的發展,當邏輯元件的尺寸不斷減小到低於10 nm尺度,尺寸上(例如線寬、蝕刻深度和膜厚度)所需的精確度增加,並對習知的蝕刻方法提出挑戰。In general, the fabrication of semiconductor devices is performed by processes based on lithography, growth of passivation layers, and etching to achieve the desired structure of the target device consisting of layers of dielectric, conductive, and semiconductive elements . In the modern semiconductor industry, the etching step relies on reactive ion etching using plasma, mainly because of the fast etching speed and directional removal. However, with the development of manufacturing technology, when the size of logic elements continues to decrease below the scale of 10 nm, the accuracy required in dimensions (such as line width, etch depth, and film thickness) increases, and the conventional etch method challenges.
濕式蝕刻通常用於獲致高選擇性蝕刻。例如,熱磷酸用於以相對於二氧化矽和矽的高選擇性來等向性地去除矽氮化物。然而,在許多應用中必須使用非等向性蝕刻,而濕式蝕刻因此無法使用。Wet etching is commonly used to achieve highly selective etching. For example, hot phosphoric acid is used to isotropically remove silicon nitride with high selectivity to silicon dioxide and silicon. However, in many applications anisotropic etching must be used and wet etching therefore cannot be used.
在此背景下,在蝕刻技術的發展中,蝕刻處理期間的原子尺度蝕刻控制和材料選擇性已變得更加重要。原子層刻蝕(ALE)是已經研究和在開發中的新技術,且在原子尺度蝕刻方面具有優勢。ALE基於序列式的自限反應逐層去除材料的薄層。然而,為了滿足當前半導體產業對實現精確薄層架構的要求,ALE技術需要進一步發展,以實現原子精確度的預期尺寸控制和薄膜完整性。Against this background, in the development of etching technology, atomic-scale etching control and material selectivity during etching processing have become more important. Atomic layer etching (ALE) is a new technology that has been researched and is under development, and has advantages in atomic scale etching. ALE removes thin layers of material layer by layer based on sequential self-limiting reactions. However, in order to meet the current semiconductor industry requirements for realizing precise thin-layer architectures, ALE technology needs to be further developed to achieve the desired dimensional control and thin-film integrity with atomic precision.
根據本發明實施例,用於處理基板的方法包括:將基板裝載在電漿處理腔室中;執行包括複數循環的循環電漿蝕刻處理,其中複數循環的各循環包括:由包括氟矽烷和氧的第一氣體混合物來產生第一電漿;藉由將基板暴露至第一電漿來執行沉積步驟以形成包括矽和氟的鈍化層;由包括稀有氣體的第二氣體混合物來產生第二電漿;以及藉由將基板暴露至第二電漿來執行蝕刻步驟。According to an embodiment of the present invention, a method for processing a substrate includes: loading the substrate in a plasma processing chamber; performing a cyclic plasma etching process including a plurality of cycles, wherein each cycle of the plurality of cycles includes: A first plasma is generated from a first gas mixture; a deposition step is performed by exposing the substrate to the first plasma to form a passivation layer comprising silicon and fluorine; a second plasma is generated from a second gas mixture comprising a rare gas plasma; and performing an etching step by exposing the substrate to a second plasma.
根據本發明實施例,用於處理基板的方法包括:取得包括第一區域、第二區域、和第三區域的基板,第一區域包括第一元素的氮化物,第二區域包括第一元素的氧化物,並且第三區域包括第一元素的元素形式;以及藉由在電漿處理腔室中使用多步驟電漿處理來相對於第二和第三區域選擇性地蝕刻第一區域,多步驟電漿處理包括:在將基板保持在第一溫度的同時,將基板暴露至產生自包括矽烷、含氟氣體、和氧的第一氣體混合物的第一電漿,第一溫度低於或等於0℃;以及在將基板保持在第二溫度時,將基板暴露至產生自包括稀有氣體的第二氣體混合物的第二電漿。According to an embodiment of the present invention, the method for processing a substrate includes: obtaining a substrate including a first region, a second region, and a third region, the first region includes a nitride of the first element, and the second region includes a nitride of the first element. oxide, and the third region includes an elemental form of the first element; and selectively etching the first region relative to the second and third regions by using a multi-step plasma treatment in a plasma processing chamber, the multi-step The plasma treatment includes exposing the substrate to a first plasma generated from a first gas mixture comprising silane, a fluorine-containing gas, and oxygen while maintaining the substrate at a first temperature, the first temperature being less than or equal to 0 °C; and while maintaining the substrate at a second temperature, exposing the substrate to a second plasma generated from a second gas mixture including a noble gas.
根據本發明實施例,用於處理基板的方法包括:取得包括第一區域、第二區域、和第三區域的基板,第一區域包括第一元素的氮化物,第二區域包括第一元素的氧化物,並且第三區域包括第一元素的元素形式;以及藉由使用電漿處理來相對於第二和第三區域選擇性地蝕刻第一區域,電漿處理包括:在將基板保持在第一溫度的同時,將基板暴露至產生自包括矽、氟、氧、和稀有氣體的氣體混合物的電漿,第一溫度低於或等於0℃。According to an embodiment of the present invention, the method for processing a substrate includes: obtaining a substrate including a first region, a second region, and a third region, the first region includes a nitride of the first element, and the second region includes a nitride of the first element. oxide, and the third region includes an elemental form of the first element; and selectively etching the first region relative to the second and third regions by using a plasma treatment, the plasma treatment comprising: While exposing the substrate to a plasma generated from a gas mixture including silicon, fluorine, oxygen, and a rare gas, the first temperature is lower than or equal to 0° C. while simultaneously at a temperature.
電漿蝕刻技術在半導體製造中扮演關鍵角色,並且對蝕刻處理中精確的原子尺度控制的需求一直在增加。能夠逐層去除材料的原子層蝕刻(ALE)是很有前途的蝕刻技術。然而,為了取代習知的蝕刻技術,ALE可能需要進一步改進例如蝕刻速率、選擇性和非等向性的蝕刻中的品質因數。Plasma etching plays a key role in semiconductor manufacturing, and the need for precise atomic-scale control of the etching process has been increasing. Atomic layer etching (ALE), capable of removing material layer by layer, is a promising etching technique. However, to replace conventional etching techniques, ALE may require further improvements in quality factors in etching such as etch rate, selectivity, and anisotropy.
許多蝕刻應用涉及選擇性地蝕刻一材料而不去除另一材料。如此應用的例子是選擇性去除氮化矽(Si 3N 4)。矽氮化物廣泛用於半導體製造,主要用作介電質和遮罩材料。因此,在不損壞例如矽(Si)和二氧化矽(SiO 2)的其他組分的情況下去除矽氮化物具有顯著的產業關聯性。由於複數表面材料暴露於電漿蝕刻,所以習知的蝕刻處理使用例如CF 4/H 2、CF 4/O 2/N 2、SF 6/O 2/N 2、SF 6/CH 4/N 2、SF 6/H 2/Ar/He、SF 6/CH 4/N 2/O 2、和其他等等的多組分混合物。儘管進行如此的最佳化,但矽氮化物和矽之間的選擇性可能為約4-6,而矽氮化物和二氧化矽之間的選擇性可能僅為1.5-2。然而,這對於許多應用而言可能是不夠的,並且增加反應性可能損壞正在形成的裝置元件。範例應用包括自對準多重圖案化中的矽氮化物間隔物蝕刻、以及在高深寬比接點介電蝕刻處理之後從O/N/O/N堆疊(氧化物和氮化物的堆疊層)去除矽氮化物,其可有助於製造3D半導體裝置,包括例如3D垂直NAND (VNAND)記憶體結構的三維排列的記憶體單元。 Many etching applications involve selectively etching one material without removing another. An example of such an application is the selective removal of silicon nitride (Si 3 N 4 ). Silicon nitride is widely used in semiconductor manufacturing, mainly as a dielectric and mask material. Therefore, the removal of silicon nitride without damaging other components such as silicon (Si) and silicon dioxide (SiO 2 ) has significant industrial relevance. Since multiple surface materials are exposed to plasma etching, conventional etching processes use, for example, CF 4 /H 2 , CF 4 /O 2 /N 2 , SF 6 /O 2 /N 2 , SF 6 /CH 4 /N 2 , SF 6 /H 2 /Ar/He, SF 6 /CH 4 /N 2 /O 2 , and other multi-component mixtures. Despite such optimization, the selectivity between silicon nitride and silicon may be about 4-6, and the selectivity between silicon nitride and silicon dioxide may be only 1.5-2. However, this may not be sufficient for many applications, and increased reactivity may damage the device element being formed. Example applications include silicon nitride spacer etch in self-aligned multiple patterning, and removal from O/N/O/N stacks (stacked layers of oxide and nitride) after high aspect ratio contact dielectric etch processes Silicon nitride, which can facilitate the fabrication of 3D semiconductor devices, including three-dimensionally arranged memory cells such as 3D vertical NAND (VNAND) memory structures.
此揭示內容中說明的實施例提供相對其他材料選擇性去除某材料方面可為有利的準ALE方法或氣體脈衝式蝕刻。在諸多實施例中,方法包括一組兩個電漿處理步驟、或兩個電漿處理步驟的多個循環:沉積步驟和蝕刻步驟。沉積步驟用以沉積包含作用為在蝕刻步驟期間的鈍化層的矽氟氧化物的層。包含氟、氧、或稀有氣體的一或更多電漿可用於實施例方法中的這兩個步驟。此申請案的發明人已發現在用於沉積的第一電漿處理步驟期間沉積速率和組成物的溫度相依性,其可導致用於蝕刻的第二電漿處理步驟期間蝕刻速率的溫度相依性。這些溫度相依性是暴露於電漿的材料類型的函數。基於這些溫度相依的特性,執行將在下面的諸多實施例中更詳細地說明的某材料相對於另一材料的選擇性蝕刻。實施例方法可有利地實現選擇性蝕刻處理,尤其對於在氧化物和/或基板材料(例如,矽氧化物及/或矽)上的例如矽氮化物的氮化物材料。在諸多實施例中,基於沉積和蝕刻的溫度相依性,實施例方法的選擇性可藉由利用例如低於或等於0℃的低處理溫度來改善。此外,在某些實施例中,可合併沉積步驟和蝕刻步驟並且作為單一步驟執行。此外,含氫電漿亦可單獨或與蝕刻步驟一起使用,以進一步改善包括選擇性的整體蝕刻性能。Embodiments described in this disclosure provide quasi-ALE methods, or gas pulse etching, that may be advantageous in selectively removing certain materials over other materials. In many embodiments, the method includes a set, or multiple cycles, of two plasma treatment steps: a deposition step and an etching step. The deposition step is to deposit a layer comprising silicon oxyfluoride which acts as a passivation layer during the etching step. One or more plasmas containing fluorine, oxygen, or a noble gas may be used for these two steps in the example methods. The inventors of this application have discovered that the temperature dependence of the deposition rate and composition during the first plasma treatment step for deposition can lead to a temperature dependence of the etch rate during the second plasma treatment step for etching . These temperature dependencies are a function of the type of material exposed to the plasma. Based on these temperature dependent properties, a selective etch of one material relative to another is performed as will be explained in more detail in the following examples. Embodiment methods may advantageously enable selective etch processes, especially for nitride materials, such as silicon nitride, on oxide and/or substrate materials (eg, silicon oxide and/or silicon). In many embodiments, based on the temperature dependence of deposition and etch, the selectivity of the embodiment methods may be improved by utilizing low process temperatures, eg, lower than or equal to 0°C. Additionally, in some embodiments, the deposition and etching steps may be combined and performed as a single step. In addition, hydrogen-containing plasmas may also be used alone or in conjunction with an etching step to further improve overall etch performance including selectivity.
在下文中,圖1A首先根據諸多實施例說明用於處理基板的範例電漿系統。參照圖2A-2F說明包含使用第一電漿的沉積步驟和使用第二電漿的蝕刻步驟的電漿處理的實施例方法的示範性圖示。圖2G-2J中說明可利用實施例方法選擇性地蝕刻氮化物的兩個範例應用。可使用針對如圖3A顯示的沉積步驟的第一電漿的氟矽烷和氧執行循環電漿處理的第一實施例。如圖3B顯示的第二實施例中,氟矽烷可包含氫氟矽烷。如圖3C顯示,在替代實施例中,第一電漿可產生自包含矽烷、含氟氣體、和氧的氣體混合物。在進一步的實施例中,第一和第二電漿(即用於沉積和蝕刻的電漿)可在單一步驟中同時使用。結合電漿,實現如圖4A中顯示的連續電漿處理。此外,如圖4B中顯示,亦實現其中循環重複氫處理和使用組合電漿的電漿處理的循環實施例。圖4C中說明使用氫氟矽烷或矽烷的其他實施例。根據一實施例獲得的範例數據呈現在圖5A-5C、6A-6B、7、和8A-8B中。In the following, FIG. 1A first illustrates an example plasma system for processing substrates according to various embodiments. Exemplary diagrams of an example method of plasma processing comprising a deposition step using a first plasma and an etching step using a second plasma are illustrated with reference to FIGS. 2A-2F . Two example applications in which nitride can be selectively etched using an embodiment method are illustrated in FIGS. 2G-2J. A first embodiment of cyclic plasma treatment may be performed using fluorosilane and oxygen for the first plasma of the deposition step as shown in FIG. 3A. In the second embodiment shown in FIG. 3B , the fluorosilane may include hydrofluorosilane. As shown in Figure 3C, in an alternative embodiment, the first plasma may be generated from a gas mixture comprising silane, a fluorine-containing gas, and oxygen. In a further embodiment, the first and second plasmas (ie, the plasmas used for deposition and etching) can be used simultaneously in a single step. In conjunction with plasma, a continuous plasma treatment as shown in Figure 4A is achieved. Furthermore, as shown in FIG. 4B , a cyclic embodiment in which hydrogen treatment and plasma treatment using a combined plasma are cyclically repeated is also realized. Other embodiments using hydrofluorosilanes or silanes are illustrated in Figure 4C. Exemplary data obtained according to one embodiment is presented in Figures 5A-5C, 6A-6B, 7, and 8A-8B.
參照圖1A,範例電漿處理系統100包含連接到氣體輸送系統130和真空泵系統140的電漿處理腔室120。可通過氣體輸送系統130將氣體引入電漿處理腔室120中。Referring to FIG. 1A , an example
可將例如待處理的半導體晶圓的基板110裝設在電漿處理腔室120內的基板托座164上。在一或更多實施例中,基板110包含一或更多層矽(Si)、氧化矽(SiO
2)、或氮化矽(Si
3N
4)。在某些實施例中,基板110可包含半導體晶圓。基板110亦可包含任何(化學計量的或非化學計量的)包括Si、Ge、B、W、Al、Ti、Ga、Ta、Hf、或Zr的氧化物和氮化物的化合物。可將基板110圖案化以包括諸多特徵部。
A
基板托座164可為圓形靜電卡盤。可使用例如耦合到冷卻器166和基板托座164的溫度控制器150的控制器將基板110保持在期望的處理溫度。The
在圖1A的說明性範例中,基板托座164連接到第一RF電源180並且可為底部電極,而頂部電極162連接到第二RF電源160以為電漿處理腔室120內的電漿170供電。在諸多實施例中,頂部電極162可為位於頂部陶瓷窗之上、電漿處理腔室120外的導電線圈。In the illustrative example of FIG. 1A ,
上述電漿處理系統100的配置僅作為範例。在替代實施例中,諸多替代配置可用於電漿處理系統100。例如,電感耦合電漿(ICP)可與耦合到頂部介電質蓋上的平面線圈的RF源功率、或使用電漿處理腔室120中的盤形頂部電極產生的電容耦合電漿(CCP)一起使用,氣體入口和/或氣體出口可耦合到側壁等。亦可在某些實施例中使用脈衝式RF電源和脈衝式DC電源(而不是連續波RF電源)。在諸多實施例中,RF功率、腔室壓力、基板溫度、氣體流速和其他電漿處理參數可根據相應的處理配方來選擇。在某些實施例中,電漿處理系統100可為例如螺旋諧振器的諧振器。The configuration of the
儘管本文中沒有說明,但本發明的實施例亦可應用於遠程電漿系統以及批式系統。例如,基板托座可能夠支撐複數晶圓,該複數晶圓在它們通過不同的電漿區時圍繞中心軸旋轉。Although not illustrated herein, embodiments of the present invention are also applicable to remote plasma systems as well as batch systems. For example, a substrate holder may be capable of supporting multiple wafers that rotate about a central axis as they pass through different plasma zones.
現將使用圖2A-2J和3A-3C來說明電漿處理系統100內的基板110的處理。圖2A-2C根據實施例顯示在電漿處理的諸多步驟期間的基板的示意性橫剖面圖,並且圖2D-2F根據替代實施例顯示另一範例。圖3A-3C顯示用以執行圖2A-2H中說明的步驟的處理流程圖,並且在以下一起說明。圖2G-2J顯示用以在半導體裝置製造期間選擇性地去除氮化物材料的電漿處理的兩個範例應用。Processing of the
在圖2A中,將待處理的進入基板110裝載進圖1A中的電漿處理腔室120中(亦見圖3A-3C中的方框300)。在一實施例中,基板110包含待藉由實施例方法的電漿處理加以蝕刻的氮化物層212。同樣,在圖2D中,顯示進入基板110,但包含氧化物層214而非氮化物。In FIG. 2A, an
為了開始沉積步驟,由包含氟矽烷和氧的第一氣體混合物來產生第一電漿(例如圖3A中的方框304A)。在諸多實施例中,氟矽烷可包含四氟矽烷(SiF
4),使得第一氣體混合物包含四氟矽烷(SiF
4)和氧(O
2)。在其他實施例中,氟矽烷可以包含氫氟矽烷(例如圖3B中的方框304B)。氫氟矽烷可具有化學式Si
xH
yF
z,其中x≠0、y≠0、且z≠0。例如,氫氟矽烷可包含三氟矽烷(SiHF
3)、二氟矽烷(SiH
2F
2)、或氟矽烷(SiH
3F)。氟矽烷和氧皆用作圖2B和2E中包含矽氟氧化物的鈍化層213的前驅物。
To begin the deposition step, a first plasma is generated from a first gas mixture comprising fluorosilane and oxygen (eg, block 304A in FIG. 3A ). In various embodiments, the fluorosilane may include tetrafluorosilane (SiF 4 ), such that the first gas mixture includes tetrafluorosilane (SiF 4 ) and oxygen (O 2 ). In other embodiments, the fluorosilane may comprise hydrofluorosilane (eg, block 304B in FIG. 3B ). Hydrofluorosilanes may have the formula SixHyFz , where x ≠0, y ≠0, and z≠0. For example, hydrofluorosilane may include trifluorosilane (SiHF 3 ), difluorosilane (SiH 2 F 2 ), or fluorosilane (SiH 3 F). Both fluorosilane and oxygen are used as precursors for the
在替代實施例中,第一氣體混合物包含矽烷、含氟氣體、和氧(例如圖3C中的方框304C)。與先前的實施例相比,矽和氟與不同的前驅物分開提供。藉由為第一電漿分別提供矽和氟,可有利地調整鈍化層的化學組成物(例如矽對氟的比率)。矽烷可具有化學式Si xH y,其中x≠0且y≠0。在某些實施例中,矽烷可包含甲矽烷(SiH 4)。含氟氣體可包含四氟甲烷(CF 4)、二氟(F 2)、三氟化氮(NF 3)、六氟化硫(SF 6)、六氟乙烷(C 2F 6)、八氟環丁烷(C 4F 8)、全氟異丁烯(C 4F 8)、氟仿(CHF 3)、或氟化氫(HF)。 In an alternative embodiment, the first gas mixture includes silane, a fluorine-containing gas, and oxygen (eg, block 304C in FIG. 3C ). Silicon and fluorine are provided separately with different precursors compared to the previous embodiments. By separately providing silicon and fluorine to the first plasma, the chemical composition of the passivation layer (eg, the ratio of silicon to fluorine) can be advantageously adjusted. Silanes may have the formula SixHy , where x ≠0 and y≠0. In some embodiments, the silane may comprise monosilane (SiH 4 ). Fluorine-containing gases may include tetrafluoromethane (CF 4 ), difluorine (F 2 ), nitrogen trifluoride (NF 3 ), sulfur hexafluoride (SF 6 ), hexafluoroethane (C 2 F 6 ), octane Fluorocyclobutane (C 4 F 8 ), perfluoroisobutene (C 4 F 8 ), fluoroform (CHF 3 ), or hydrogen fluoride (HF).
使用如上所述的含氫的矽烷化合物(例如氫氟矽烷或甲矽烷)亦可有利地在循環電漿處理期間提供含氫電漿,如此可有利於改善蝕刻選擇性。因此,在某些實施例中,利用含氫電漿的選用性處理以改善下述的蝕刻選擇性可跳過。The use of a hydrogen-containing silane compound such as hydrofluorosilane or monosilane as described above may also advantageously provide a hydrogen-containing plasma during cyclic plasma processing, which may facilitate improved etch selectivity. Therefore, in some embodiments, selective treatment with a hydrogen-containing plasma to improve etch selectivity described below may be skipped.
此外,儘管上述某些實施例方法(例如圖3B和3C)並不將四氟矽烷(SiF 4)分配進處理腔室中,但SiF 4物種可有利地在處理期間藉由與處理腔室內的不同物種反應而原位產生。 In addition, although certain example methods described above (eg, FIGS. 3B and 3C ) do not dispense tetrafluorosilane (SiF 4 ) into the processing chamber, the SiF 4 species can advantageously be Different species react to produce in situ.
處理可在1 sccm和1000 sccm之間進入電漿處理腔室120的總氣體流量下操作,同時將電漿處理腔室壓力保持在1 毫托和1 atm之間。可使用氬(Ar)、氦(He)、氙(Xe)、氪(Kr)、或氖(Ne)中的任何一個、以任何比例將一或更多惰性氣體作為摻合物添加到第一氣體混合物中。The process may be operated at a total gas flow into the
在一或更多實施例中,可以在沉積-蝕刻處理的任何循環之前或期間利用含氫電漿執行單獨的附加處理。參照圖3A-3C,可以插入產生包含氫的電漿的步驟(方框302)和將基板暴露於含氫電漿的步驟(方框303)。在一或更多實施例中,使用包含以任何比例的氫(H 2)或氟化氫(HF)、或氨(NH 3)、和Ar、He、氮(N 2)、或Xe的氣體混合物執行附加的含氫電漿處理。具體而言,可使用任何比例的氫:氟化氫:氨。可選地,可使用包括任何比例下的氬、氦、氮、或氙的一或更多惰性氣體。利用含氫電漿的如此附加處理可有利地還原基板的表面,如此可以改善沉積步驟的選擇性。 In one or more embodiments, a separate additional treatment with a hydrogen-containing plasma may be performed before or during any cycle of the deposition-etch process. Referring to Figures 3A-3C, the steps of generating a plasma containing hydrogen (block 302) and exposing the substrate to the plasma containing hydrogen (block 303) may be inserted. In one or more embodiments, using a gas mixture comprising hydrogen (H 2 ) or hydrogen fluoride (HF), or ammonia (NH 3 ), and Ar, He, nitrogen (N 2 ), or Xe in any proportion is performed Additional hydrogen-containing plasma treatment. In particular, any ratio of hydrogen:hydrogen fluoride:ammonia can be used. Alternatively, one or more inert gases including argon, helium, nitrogen, or xenon in any proportion may be used. Such additional treatment with a hydrogen-containing plasma can advantageously reduce the surface of the substrate, which can improve the selectivity of the deposition step.
在某些實施例中,可將包含氫氣的附加選用性氣體添加到第一氣體混合物。換言之,方框302、303中說明的步驟可與方框304A、304B、或304C中說明的步驟一起執行。如此的實施例可有利地減少電漿處理的步驟數量,並且縮短處理時間。包含氫(H
2)或氟化氫(HF)、或氨(NH
3)、和Ar、He、氮(N
2)、或Xe的氣體混合物可在任何比例下用作附加氣體。具體而言,可使用任何比例的氫:氟化氫:氨。可選地,可使用包括任何比例下的氬、氦、氮或氙的一或更多惰性氣體。
In certain embodiments, an additional optional gas comprising hydrogen may be added to the first gas mixture. In other words, the steps illustrated in
在一實施例中,為了供電給第一電漿,可將1 W到10000 W之間的高頻(HF)功率施加到基板托座164,並且可將0 W到10000 W之間的低頻(LF)功率施加到基板托座164。或者,可將1 W到10000 W之間的高頻(HF)功率施加到頂部電極162,並且可將0 W到10000 W之間的低頻(LF)功率施加到基板托座164。附加的DC偏壓可施加到一或更多電極。In one embodiment, to power the first plasma, high frequency (HF) power between 1 W and 10,000 W may be applied to the
參照圖2B和2E,將基板110暴露到第一電漿(圖3A-3C中的方框305),從而導致在基板110上的鈍化層213的沉積。鈍化層213可包含矽氟氧化物,以SiO
xF
y表示。SiO
xF
y層的厚度、組成物、和反應性以及隨後的蝕刻曲線取決於電漿氣體組成物、基板材料、和處理參數的選擇。因此,可利用鈍化層213的這些特性來實現選擇性蝕刻處理。如圖2B和2E中顯示的,在一範例中,在相同的處理條件下,鈍化層213的形成可於氧化物比氮化物優先。結果,圖2E中的氧化物層214之上的鈍化層213明顯比圖2B中的氮化物層212之上的厚。在不同材料之上的鈍化層213的此厚度差異(即膜生長速率)可為溫度相依的,並且可在低溫下最大化,例如在-65℃左右。在某些實施例中,可將處理條件最佳化,使得在某材料(例如矽氮化物)之上的鈍化層213的形成可為可忽略的或不存在。因此,可調整針對此步驟的溫度以實現例如如以下在諸多實施例中更詳細說明的用於在矽和二氧化矽之上選擇性地蝕刻矽氮化物的期望選擇性。
Referring to FIGS. 2B and 2E , the
在一或更多實施例中,整體處理循環可在低於或等於0℃的溫度下執行以供實現選擇性電漿蝕刻。如圖3A-3C中顯示的,在如此的實施例中,在任何電漿處理之前,基板110可選用性地冷卻至處理溫度(方框310)。可使用流過基板托座164的冷卻液來冷卻基板110。在一或更多實施例中,沉積步驟(圖3A-3C中的方框305)在低於0℃的低溫下進行,例如,在-120至0℃之間。在其他實施例中,處理可在-80至-50℃之間的溫度下執行。In one or more embodiments, the overall process cycle may be performed at a temperature lower than or equal to 0° C. for selective plasma etching. As shown in Figures 3A-3C, in such an embodiment, prior to any plasma treatment, the
對於蝕刻步驟,第二電漿由包含稀有氣體的第二氣體混合物供電(圖3A-3C中的方框306)。在蝕刻步驟期間,藉由暴露於第二電漿來蝕刻基板110(圖3A-3C中的方框307),以便去除全部或部分的鈍化層213。在一情況下,可很快去除薄的鈍化層,並且下方的層可能會受蝕刻,而在另一情況下,厚的、具有抗性的鈍化層可能大部分保持未受蝕刻,從而保護下方的層。如上所述,鈍化層213的特性(例如厚度)取決於溫度和下方的材料,由於鈍化層213的不同特性,蝕刻步驟可能對一材料對另一材料是選擇性的。例如,對於在圖2B中的氮化物層212(例如矽氮化物),鈍化層213薄到被蝕刻掉並且在圖2C中的氮化物層212也被完全去除。另一方面,在圖2E和2F中,在氧化物層之上形成的鈍化層213很厚,並且可能實質上無蝕刻發生,或者可能僅一部份的鈍化層213被去除,從而保留下方的氧化物214層。For the etching step, the second plasma is powered by a second gas mixture comprising a noble gas (block 306 in FIGS. 3A-3C ). During the etching step, the
在一或更多實施例中,可在-200至100℃之間的溫度下執行蝕刻步驟(例如圖3A-3C中的方框307)。在一實施例中,蝕刻步驟可在低於0℃的溫度下執行。在進一步的實施例中,蝕刻步驟可在與沉積步驟大約相同的溫度下執行。在不同溫度下執行沉積步驟和蝕刻步驟可有利於利用各處理的溫度相依性。另一方面,在大約相同的溫度下執行兩個步驟可有利地最小化或消除用於穩定溫度所需的時間。In one or more embodiments, the etch step (eg, block 307 in FIGS. 3A-3C ) may be performed at a temperature between -200 and 100°C. In one embodiment, the etching step may be performed at a temperature below 0°C. In a further embodiment, the etching step may be performed at about the same temperature as the deposition step. Performing the deposition step and the etching step at different temperatures can be advantageous to take advantage of the temperature dependence of each process. On the other hand, performing both steps at about the same temperature can advantageously minimize or eliminate the time required to stabilize the temperature.
在一實施例中,為了供電給第二電漿,可將1 W到10000 W之間的高頻(HF)功率施加到基板托座164,並且可將0 W到10000 W之間的低頻(LF)功率施加到基板托座164。或者,可將1 W到10000 W之間的高頻(HF)功率施加到頂部電極162,並且可將0 W到10000 W之間的低頻(LF)功率施加到基板托座164。附加的DC偏壓可施加於一或更多電極。將電漿處理腔室保持在1毫托和1 atm之間的壓力下。In one embodiment, to power the second plasma, high frequency (HF) power between 1 W and 10,000 W may be applied to the
在一或更多實施例中,可執行這些步驟(圖2A中的方框304A-307、圖2B中的方框304B-307、和圖2D中的方框304C-307)的複數循環以實現期望的蝕刻。在圖3A-3C中此以虛線C1表示。各步驟的持續時間可從0.01 sec到10 h不等。此外,如圖3A-3C中的虛線C2標示的,在某些實施例中,在複數循環的任何循環,亦可在循環處理中插入並包括利用上述包含氫的電漿的選用性處理(方框302和303)。In one or more embodiments, multiple iterations of these steps (
儘管沒有明確記載,但上述各步驟(圖3A-3C中的方框300-307)可在開始下一步驟之前藉由吹掃隔開,以去除來自前一步驟的氣體。例如,可執行方框305和306之間的吹掃以從電漿處理腔室120去除第一氣體混合物。例如,可藉由用惰性氣體沖洗電漿處理腔室120來執行吹掃。Although not explicitly described, each of the steps described above (blocks 300-307 in FIGS. 3A-3C ) can be separated by a purge to remove gas from a previous step before starting the next step. For example, a purge between
圖2G和2H根據用於自對準多重圖案化中的間隔物蝕刻的一實施例,顯示非等向性電漿處理之前和之後的基板110的示意性橫剖面圖。2G and 2H show schematic cross-sectional views of the
參照圖2G和2H,上述電漿處理的選擇性蝕刻特性在諸多半導體裝置製造中可為有益的,例如在自對準多重圖案化中的矽氮化物間隔物蝕刻。在圖2G中,進入基板110可包含形成在圖案化氧化物層214之上的氮化物層212。在一實施例中,氮化物212包含矽氮化物且形成作為間隔物,並且氧化物214包含矽氧化物且形成作為心軸。間隔物蝕刻是透過非等向性蝕刻以去除間隔件材料的橫向部分、並且在心軸的側壁上留下間隔物件材料的垂直部分。隨著半導體裝置的特徵部尺寸不斷縮小,這是重要但具有挑戰性的任務。如圖2H顯示的,利用電漿處理的實施例方法,可實現在不損壞氧化物214或基板110的情況下去除氮化物212的橫向部分。Referring to Figures 2G and 2H, the selective etch nature of the plasma treatment described above can be beneficial in many semiconductor device fabrications, such as silicon nitride spacer etching in self-aligned multiple patterning. In FIG. 2G , the
圖2I和2J根據另一實施例顯示在利用等向性電漿處理來形成3D垂直NAND(VNAND)結構的處理期間處於中間階段的基板110 的示意性橫剖面圖。2I and 2J show schematic cross-sectional views of a
在圖2I中,顯示基板110和形成在基板110之上的層堆疊216。層堆疊216可包含氮化物212和氧化物214的交替層。在一實施例中,交替層可包含形成典型的3D VNAND結構的矽氮化物和矽氧化物。儘管層堆疊216顯示為包含特定數量的層,但它可包括少至二層的氮化物212和氧化物214以及高達一百層或更多。此外,如圖2I顯示的,硬遮罩層218可形成在層堆疊216之上。在圖2I中,通道孔形成在中間並用通道材料220填充、以形成被形成的VNAND記憶體裝置的通道。通道材料220可包括氧化物-氮化物-氧化物(ONO)記憶體堆疊和多晶矽材料,以形成多晶矽通道。此外,根據實施例,在電漿處理之前藉由蝕刻層堆疊216中的凹槽來形成兩個狹縫222。In FIG. 21 ,
圖2J顯示在選擇性去除層堆疊216內的氮化物212的電漿處理之後。電漿處理可等向性地蝕刻氮化物212而不損壞氧化物214或基板110,從而在層堆疊216中形成橫向空隙224。與使用例如磷酸的習知濕式蝕刻相比,實施例方法可有利地更具選擇性地蝕刻氮化物212,並且消除對基於溶液的處理的需要。隨後的處理步驟可遵循用於形成典型3D VNAND結構的習知技術,例如,用包含鋁、鈦、鎢等的金屬材料填充狹縫222和橫向空隙224。FIG. 2J shows after plasma treatment to selectively remove
圖4A根據實施例顯示使用包含氟矽烷、氧、和稀有氣體的電漿的連續電漿處理的處理流程圖40,並且圖4B根據替代實施例顯示使用包含氟矽烷、氧、和稀有氣體的電漿的循環電漿處理的處理流程圖42。4A shows a process flow diagram 40 for continuous plasma treatment using a plasma comprising fluorosilane, oxygen, and a noble gas, according to an embodiment, and FIG.
圖4A中顯示的實施例方法結合上述先前的實施例中的沉積和蝕刻步驟,並且可作為連續處理來執行。在其他實施例中,它亦可作為例如包括如圖4B顯示的含氫電漿處理步驟的循環處理的多步驟處理來執行。The example method shown in FIG. 4A combines the deposition and etching steps in the previous examples described above and can be performed as a continuous process. In other embodiments, it may also be performed as a multi-step process such as a cyclic process including a hydrogen-containing plasma treatment step as shown in FIG. 4B.
在某些實施例中,電漿蝕刻處理可為連續處理,該連續處理包含:將基板110裝載到電漿處理腔室中(方框400)、從包含氟矽烷、氧、和稀有氣體的氣體混合物產生電漿(方框408A)、以及藉由將基板暴露於電漿來執行蝕刻步驟(方框410)。如先前說明的,氟矽烷可包含四氟矽烷(SiF
4)。藉由將兩個電漿處理(例如圖3A-3C中顯示的沉積步驟和蝕刻步驟)組合成單個電漿處理(例如方框408A和410),實施例方法可有利地簡化處理配方且縮短處理時間。
In some embodiments, the plasma etch process may be a continuous process comprising: loading the
在一或更多實施例中,可利用含氫電漿執行單獨的附加處理。可插入產生包含氫的電漿(方框404)和將基板暴露於含氫電漿(方框406)的步驟。可在任何比例下使用包含氫(H 2)或氫氟酸(HF)、或氨氣(NH 3)、和Ar、He、氮(N 2)、或Xe的氣體混合物。具體而言,可使用任何比例的氫:氫氟酸:氨。可選地,可使用包括任何比例的氬、氦、氮、或氙的一或更多惰性氣體。 In one or more embodiments, a separate additional treatment may be performed using a hydrogen-containing plasma. The steps of generating a hydrogen-containing plasma (block 404) and exposing the substrate to the hydrogen-containing plasma (block 406) may be inserted. A gas mixture comprising hydrogen ( H2 ) or hydrofluoric acid (HF), or ammonia ( NH3 ), and Ar, He, nitrogen ( N2 ), or Xe may be used in any proportion. In particular, any ratio of hydrogen:hydrofluoric acid:ammonia can be used. Alternatively, one or more inert gases including argon, helium, nitrogen, or xenon in any proportion may be used.
參照圖4B,在某些實施例中,上述蝕刻步驟和利用含氫電漿的處理可循環重複。可重複循環以實現期望的蝕刻水平。循環電漿處理的循環可開始於暴露於包含氫的電漿(方框404和406)或暴露於包含氟矽烷的電漿(方框408A和410)。對於包含氫的電漿,可在任何比例下使用包含氫(H
2)或氟化氫(HF)、或氨(NH
3)、與Ar、He、氮(N
2)、或Xe的氣體混合物。具體而言,可使用任何比例下的氫:氟化氫:氨。可選地,可使用包括任何比例的氬、氦、氮或氙的一或更多惰性氣體。
Referring to FIG. 4B, in some embodiments, the above-described etching steps and treatment with a hydrogen-containing plasma may be repeated cyclically. The cycle can be repeated to achieve the desired etch level. Cycling A cycle of plasma treatment may begin with exposure to a hydrogen-containing plasma (
圖4C根據另一實施例顯示電漿處理的處理流程圖44,其中在電漿處理中使用的電漿包含氫氟矽烷、氧、和稀有氣體,或者其中電漿包含矽烷、含氟氣體、氧、和稀有氣體。4C shows a process flow diagram 44 for plasma treatment, wherein the plasma used in the plasma treatment comprises hydrofluorosilane, oxygen, and a noble gas, or wherein the plasma comprises silane, a fluorine-containing gas, oxygen, according to another embodiment. , and rare gases.
在圖4C中,可使用不同於圖4A或4B的實施例的氣體組合(方框408B),但具有與圖4A或4B相同的處理流程。圖4C中顯示的電漿處理可作為連續處理加以執行,該連續處理可與選用性的、利用含氫電漿的單獨處理(例如圖4A)或循環重複蝕刻步驟和利用含氫電漿之處理的循環處理(例如圖4B)相結合。氣體組合的不同之處可在於氫氟矽烷或矽烷與含氟氣體的組合可用作電漿的氟和矽來源。如以上於先前實施例中說明的,氫氟矽烷可具有化學式Si xH yF z,其中x≠0,y≠0,且z≠0。例如,氫氟矽烷可包含三氟矽烷(SiHF 3)、二氟矽烷(SiH 2F 2)、或氟矽烷(SiH 3F)。矽烷可具有化學式Si xH y,其中x≠0且y≠0。在某些實施例中,矽烷可包含甲矽烷(SiH 4)。含氟氣體可包含四氟甲烷(CF 4)、二氟(F 2)、三氟化氮(NF 3)、六氟化硫(SF 6)、六氟乙烷(C 2F 6)、八氟環丁烷(C 4F 8)、全氟異丁烯(C 4F 8)、氟仿(CHF 3)、或氟化氫(HF)。 In FIG. 4C, a different combination of gases may be used (block 408B) than in the embodiment of FIG. 4A or 4B, but with the same process flow as in FIG. 4A or 4B. The plasma treatment shown in FIG. 4C can be performed as a continuous process that can be combined with an optional separate treatment with a hydrogen-containing plasma (eg, FIG. 4A ) or a cyclical repeat of the etch step and treatment with a hydrogen-containing plasma. cyclic processing (eg, Figure 4B) combined. The gas combination can be varied in that hydrofluorosilane or a combination of silane and fluorine-containing gas can be used as the source of fluorine and silicon for the plasma. As explained above in previous embodiments, hydrofluorosilanes may have the formula SixHyFz , where x ≠0, y ≠0, and z≠0. For example, hydrofluorosilane may include trifluorosilane (SiHF 3 ), difluorosilane (SiH 2 F 2 ), or fluorosilane (SiH 3 F). Silanes may have the formula SixHy , where x ≠0 and y≠0. In some embodiments, the silane may comprise monosilane (SiH 4 ). Fluorine-containing gases may include tetrafluoromethane (CF 4 ), difluorine (F 2 ), nitrogen trifluoride (NF 3 ), sulfur hexafluoride (SF 6 ), hexafluoroethane (C 2 F 6 ), octane Fluorocyclobutane (C 4 F 8 ), perfluoroisobutene (C 4 F 8 ), fluoroform (CHF 3 ), or hydrogen fluoride (HF).
在一或更多實施例中,整體處理循環可選用性地在低於或等於0℃的溫度下執行以實現選擇性電漿蝕刻。在如此的實施例中,在任何電漿處理之前,將基板110冷卻至處理溫度(方框202)。在一或更多實施例中,循環電漿處理在-120至0℃之間的溫度下進行。在其他實施例中,循環電漿處理可在-80至-50℃之間的溫度下執行。In one or more embodiments, the overall process cycle is optionally performed at a temperature lower than or equal to 0° C. to achieve selective plasma etching. In such an embodiment, prior to any plasma treatment, the
在一或更多實施例中,可使用任何混合比下的SiF
4、O
2、和稀有氣體的氣體混合物來執行循環電漿處理。稀有氣體可為Ar、He、Xe、Kr、或Ne。這些氣體可以任意比例任意組合使用。處理可在1 sccm和1000 sccm之間的進入電漿處理腔室120的總氣體流量下操作,同時將電漿處理腔室120內部的壓力保持在1 毫托和1 atm之間。可使用任何比例下的Ar、He、Xe、Kr、或Ne將一或更多惰性氣體作為摻合物添加到流中。在一實施例中,為了供電給電漿,可將1 W到10000 W之間的高頻(HF)功率施加到基板托座164,並且可將0 W到10000 W之間的低頻(LF)功率施加到頂部電極162。或者,可將1 W到10000 W之間的高頻(HF)功率施加到頂部電極162,並且可將0 W到10000 W之間的低頻(LF)功率施加到基板托座164。附加的DC偏壓可施加到一或更多電極。任何步驟的處理持續時間可從0.01 sec到10 h不等。
In one or more embodiments, cyclic plasma treatment may be performed using a gas mixture of SiF4 , O2 , and a noble gas at any mixing ratio. The rare gas can be Ar, He, Xe, Kr, or Ne. These gases can be used in any combination in any proportion. The process may be operated at a total gas flow into the
在某些實施例中,可將包含氫的附加氣體添加到SiF 4、O 2、和稀有氣體的第一氣體混合物中。換言之,方框204、206中說明的步驟可與方框208中說明的步驟一起執行。可以任何比例使用包含氫(H 2)或氟化氫(HF)、或氨(NH 3)、和Ar、He、和氮(N 2)、或Xe的氣體混合物。具體而言,可使用任何比例的氫:氟化氫:氨。可選地,可使用包括任何比例的氬、氦、氮、或氙的一或更多惰性氣體。 In certain embodiments, an additional gas comprising hydrogen may be added to the first gas mixture of SiF 4 , O 2 , and noble gas. In other words, the steps illustrated in blocks 204 , 206 may be performed together with the steps illustrated in block 208 . A gas mixture comprising hydrogen ( H2 ) or hydrogen fluoride (HF), or ammonia ( NH3 ), and Ar, He, and nitrogen ( N2 ), or Xe may be used in any proportion. In particular, any ratio of hydrogen:hydrogen fluoride:ammonia can be used. Alternatively, one or more inert gases including argon, helium, nitrogen, or xenon in any proportion may be used.
儘管沒有明確記載,但上述步驟200-210中的每一個都可藉由吹掃以在開始下一步驟之前去除來自前一步驟的氣體。Although not explicitly described, each of the steps 200-210 described above may be purged to remove gas from the previous step before starting the next step.
圖5A-5C根據實施例顯示在電漿處理之後三個不同基板的厚度變化的範例實驗數據。基板包含(a)矽氮化物層、(b)非晶Si (a-Si)層、或(c)二氧化矽層。厚度變化是電漿處理前後之層厚度差異的量度。例如,可測量和比較電漿處理前後之矽氮化物層的厚度,以計算厚度變化。5A-5C show example experimental data for thickness variation of three different substrates after plasma treatment, according to an embodiment. The substrate includes (a) a silicon nitride layer, (b) an amorphous Si (a-Si) layer, or (c) a silicon dioxide layer. Thickness change is a measure of the difference in layer thickness before and after plasma treatment. For example, the thickness of the silicon nitride layer before and after plasma treatment can be measured and compared to calculate the thickness change.
圖5A顯示包含矽氮化物層的基板的厚度變化的實驗數據,圖5B顯示包含非晶矽層的基板的厚度變化的實驗數據,並且圖5C顯示包含二氧化矽層的基板的厚度變化的實驗數據。Figure 5A shows experimental data of thickness variation of a substrate comprising a silicon nitride layer, Figure 5B shows experimental data of thickness variation of a substrate comprising an amorphous silicon layer, and Figure 5C shows experimental data of thickness variation of a substrate comprising a silicon dioxide layer data.
對於各處理溫度,提供兩個數據點:(1) 使用SiF 4/O 2電漿的沉積步驟之後的厚度變化和(2) 使用Ar電漿的第一步驟和隨後的蝕刻步驟之後的厚度變化。在沉積步驟期間,SiO xF y的薄的鈍化膜形成在所有三個基板上,通常具有9-15 nm之間的厚度。然而,很明顯沉積膜的厚度取決於基板材料、處理溫度、和其他處理參數。 For each processing temperature, two data points are presented: (1) thickness change after deposition step using SiF4/ O2 plasma and ( 2 ) thickness change after first step and subsequent etching step using Ar plasma . During the deposition step, a thin passivation film of SiOxFy was formed on all three substrates, typically with a thickness between 9-15 nm. However, it is clear that the thickness of the deposited film depends on the substrate material, processing temperature, and other processing parameters.
值得注意的是,在包含矽氮化物層的基板(圖5A)和包含非晶矽層的基板(圖5B)上,在低於閾值的溫度下,SiO xF y的形成被最小化或不發生。例如,在-65℃下包含矽氮化物層的基板上觀察到僅1.33 nm的厚度、以及在-100℃下包含非晶矽層的基板上觀察到僅0.14 nm的厚度。發現如此膜厚度轉變的閾值溫度對於包含矽氮化物層的基板(約-65℃)較包含非晶矽層的基板(約-100℃)高。 Notably , the formation of SiOxFy is minimized or absent at subthreshold temperatures on substrates containing silicon nitride layers (Figure 5A) and on substrates containing amorphous silicon layers (Figure 5B). occur. For example, a thickness of only 1.33 nm was observed on a substrate comprising a silicon nitride layer at -65°C, and a thickness of only 0.14 nm was observed on a substrate comprising an amorphous silicon layer at -100°C. The threshold temperature for such a film thickness transition was found to be higher for substrates comprising silicon nitride layers (approximately -65°C) than for substrates comprising amorphous silicon layers (approximately -100°C).
當基板接下來在相同的處理溫度下暴露於Ar電漿時,在先前沉積步驟中形成的SiO xF y層可作用為鈍化層,並且如圖5A-5C顯示的在不論材料的情況下,基板厚度在高於閾值的溫度下實質上沒有變化。在某些情況下,厚度上甚至可能有略微增加(例如在圖5A中的-40℃)。然而,在低於閾值的溫度下,推測由於鈍化不足,所以處理進入用以去除材料的蝕刻狀態。在包含矽氮化物層的基板的情況下(圖5A),成功的蝕刻發生在-65℃以下。在包含非晶矽層的基板(圖5B)的情況下,由於閾值溫度低於如上述的矽氮化物,所以蝕刻僅在低於-100℃下開始發生,而在-65℃下沒有觀察到實質上的厚度變化。 When the substrate is subsequently exposed to Ar plasma at the same processing temperature, the SiOxFy layer formed in the previous deposition step can act as a passivation layer, and as shown in Figures 5A-5C, regardless of the material, Substrate thickness does not substantially change at temperatures above the threshold. In some cases there may even be a slight increase in thickness (eg -40°C in Figure 5A). However, at temperatures below the threshold, presumably due to insufficient passivation, the process enters an etch state to remove material. In the case of substrates comprising silicon nitride layers (FIG. 5A), successful etching occurred below -65°C. In the case of a substrate containing an amorphous silicon layer (Fig. 5B), since the threshold temperature is lower than that of silicon nitride as described above, the etch starts to occur only below -100°C and is not observed at -65°C Substantial thickness variation.
同樣地,如圖5C中顯示的,即使在Ar電漿處理之後,二氧化矽上在-65℃下也不會發生蝕刻。Likewise, as shown in Figure 5C, no etching occurs on SiO2 at -65°C even after Ar plasma treatment.
參照圖5A-5C,此範例強調ALE處理中溫度的影響,以實現材料的選擇性蝕刻,尤其是在純元素或氧化物之上的氮化物。可執行類似的實驗以最佳化和識別針對其他材料系統的溫度閾值。Referring to Figures 5A-5C, this example emphasizes the effect of temperature in ALE processing to achieve selective etching of materials, especially nitrides over pure elements or oxides. Similar experiments can be performed to optimize and identify temperature thresholds for other material systems.
接下來,將說明圖6A-6B以及圖7、8A-8B以示意性地理解觀察到的改善的基本機制。如此的理解可有助於將本發明的實施例應用到其他材料系統而無需過度實驗。然而,申請人揭示的處理不受本文討論的機制的任何限制。此討論未必是唯一的機制,並且進一步的研究可有助於理解進一步的基本機制或替代機制。Next, Figures 6A-6B and Figures 7, 8A-8B will be explained to schematically understand the underlying mechanism of the observed improvements. Such an understanding may facilitate the application of embodiments of the present invention to other material systems without undue experimentation. However, applicants' disclosed processes are not limited in any way by the mechanisms discussed herein. This discussion is not necessarily the only mechanism, and further research may help to understand further underlying mechanisms or alternative mechanisms.
圖6A是圖5A和5B中所提供數據的曲線圖,以進一步顯示當降低溫度但在Si 3N 4和a-Si的不同閾值溫度之後蝕刻狀態的出現。帶線的標記代表第一SiF 4/O 2電漿步驟(沉積)之後的數據,並且點代表隨後的Ar電漿步驟(蝕刻)之後的數據。當第一沉積步驟不導致厚度超過幾nm的SiO xF y形成時,在足夠低的溫度下發現蝕刻狀態。 Figure 6A is a graph of the data presented in Figures 5A and 5B to further show the emergence of etch states as the temperature is lowered but after different threshold temperatures for Si3N4 and a - Si . Markers with lines represent data after the first SiF 4 /O 2 plasma step (deposition), and dots represent data after the subsequent Ar plasma step (etch). The etch state is found at sufficiently low temperatures when the first deposition step does not lead to the formation of SiOxFy with a thickness exceeding a few nm.
示意性地,此轉變在圖6B中呈現為作為處理溫度的函數之沉積速率上的變化。對於雙方基板而言,沉積速率隨著處理溫度的降低而降低。對於包含矽氮化物層的基板(標記為Si 3N 4),如此的轉變發生在比包含非晶矽層的基板(標記為a-Si)更高的溫度下。此外,沉積速率隨溫度呈現曲折點,換言之,沉積速率隨著降低溫度而增加然後減小。此趨勢意味可能存在相互競爭的驅動力,如此為未來的最佳化開闢更多潛力。 Schematically, this transition is presented in Figure 6B as a change in deposition rate as a function of processing temperature. For both substrates, the deposition rate decreases as the processing temperature decreases. For a substrate comprising a silicon nitride layer (labeled Si 3 N 4 ), such a transformation occurs at a higher temperature than for a substrate comprising an amorphous silicon layer (labeled a-Si). Furthermore, the deposition rate exhibits an inflection point with temperature, in other words, the deposition rate increases and then decreases with decreasing temperature. This trend implies that there may be competing driving forces, thus opening up more potential for future optimization.
圖7是從密度泛函理論(DFT)模擬獲得的在Si和Si 3N 4表面上的矽自由基、氟矽烷自由基物種、和氧自由基的一系列計算吸附能(E ad)。例如,此能量表示其中矽自由基相對於包含矽層的基板是在無窮遠處的系統、與其中矽自由基位於包含矽層的基板的表面上的系統在能量上的差異。此分析可揭示隱含在Si和Si 3N 4上SiO xF y的沉積中觀察到的差異的可能機制。 Figure 7 is a series of calculated adsorption energies (E ad ) of silicon radicals, fluorosilane radical species, and oxygen radicals on Si and Si3N4 surfaces obtained from density functional theory (DFT) simulations. For example, this energy represents the difference in energy between a system in which the silicon radical is at infinity with respect to the substrate comprising the silicon layer, and a system in which the silicon radical is located on the surface of the substrate comprising the silicon layer. This analysis may reveal possible mechanisms underlying the observed differences in the deposition of SiOxFy on Si and Si3N4 .
參照圖7,首先,在整個系列中,Si和SiF自由基物種通常具有比氧自由基高的E ad。當降低處理溫度時,這將導致SiF x物種的物理吸附比氧自由基更大的增強,從而導致在較低溫度下SiF x物種較高的表面濃度。這可解釋圖6B中顯示的SiO xF y在10℃和-40℃之間的範圍沉積速率的初始增加。 Referring to Figure 7, first, throughout the series, Si and SiF radical species generally have a higher E ad than oxygen radicals. This would lead to a greater enhancement of the physisorption of SiFx species than oxygen radicals when the processing temperature was lowered, leading to higher surface concentrations of SiFx species at lower temperatures. This may explain the initial increase in the deposition rate of SiOxFy in the range between 10°C and -40°C shown in Figure 6B.
另一方面,隨著溫度進一步降低,雖然SiF x物種的表面濃度可更高,但如此高的濃度可能會抑制SiF x物種與表面原子形成懸鍵的變化,從而抑制沉積。因此,在第一步驟中平衡從沉積轉移到蝕刻,如此可解釋在Si 3N 4的閾值溫度為約-65℃、且a-Si的閾值溫度為約-100℃的情況下,SiO xF y層形成的損失。 On the other hand, with a further decrease in temperature, although the surface concentration of SiF species can be higher, such a high concentration may inhibit the change of SiF species forming dangling bonds with surface atoms, thereby inhibiting deposition. Therefore, the equilibrium shifts from deposition to etching in the first step, which explains the SiO x F The loss formed by the y layer.
其次,如圖7中顯示的,整個系列中Si 3N 4上的吸附能(E ad)高於a-Si。這可能是Si 3N 4較高閾值溫度背後的至少部分原因。 Second, as shown in Fig. 7, the adsorption energy (E ad ) on Si 3 N 4 is higher than that on a-Si in the whole series. This may be at least part of the reason behind the higher threshold temperature of Si3N4 .
此外,除了上述者之外,亦可考慮在沉積步驟中引起基板之間的SiO xF y層形成差異的其他可能機制。 Furthermore, other possible mechanisms that cause differences in the formation of SiOxFy layers between substrates during the deposition steps may also be considered in addition to the above.
圖8A和8B顯示使用密度泛函理論計算的不同錯合物的表面能。Figures 8A and 8B show the surface energies of different complexes calculated using density functional theory.
參照圖8A,-Si-N-Si-表面可吸附氧自由基以形成-Si-NO-Si-表面,同時將其能量降低到-3.33 eV。由於形成的-Si-NO-Si-表面的能階較低,所以此反應途徑非常有利。隨後,NO自由基可以1.62 eV的相對低脫附能從-Si-NO-Si-表面脫附以形成-Si-Si-表面。由於待脫附的NO自由基的低能量,所以低能量離子可成功地將NO自由基從-Si-NO-Si-表面脫除。換言之,包含矽氮化物層的基板可消耗氧自由基,如此可降低形成在矽氮化物層之上的SiO xF y中的氧濃度。氟化矽氮化物模型用於計算以模擬Si 3N 4的蝕刻前沿。 Referring to FIG. 8A , the -Si-N-Si- surface can adsorb oxygen radicals to form a -Si-NO-Si- surface while reducing its energy to -3.33 eV. This reaction pathway is very favorable due to the lower energy levels of the formed -Si-NO-Si-surface. Subsequently, NO radicals can desorb from the -Si-NO-Si- surface with a relatively low desorption energy of 1.62 eV to form the -Si-Si- surface. Due to the low energy of the NO radicals to be desorbed, the low energy ions can successfully remove the NO radicals from the -Si-NO-Si- surface. In other words, the substrate including the silicon nitride layer can consume oxygen radicals, which can reduce the oxygen concentration in the SiOxFy formed on the silicon nitride layer. A fluorinated silicon nitride model was used in the calculations to simulate the etch front of Si3N4.
此外,如果基板表面存在氫,該氫也可在與氧自由基的相互作用中發揮作用。作為矽氮化物層中的殘留雜質或此揭示內容中說明的可能的含氫電漿處理的結果,矽氮化物層中可存在可參與沉積機制的NH基團。In addition, if hydrogen is present on the surface of the substrate, this hydrogen can also play a role in the interaction with oxygen radicals. NH groups may be present in the silicon nitride layer which may participate in the deposition mechanism, as a result of residual impurities in the silicon nitride layer or possible hydrogen-containing plasma treatments described in this disclosure.
例如,圖8B呈現經由OH鍵形成的氧自由基的消耗,對過渡狀態的活化能和對OH的脫附能都相當低。*Si-NH-Si*表面可吸附氧自由基並將其能量降低到-0.337 eV,然後透過具有低勢壘的過渡狀態釋放O-H基團。因此,矽氮化物中的*N-H基團可藉由形成O-H鍵來清除氧。For example, Figure 8B presents the consumption of oxygen radicals via OH bond formation, the activation energy for the transition state and the desorption energy for OH are both quite low. The *Si-NH-Si* surface can adsorb oxygen radicals and reduce their energy to -0.337 eV, and then release O-H groups through transition states with low potential barriers. Therefore, the *N-H groups in silicon nitride can scavenge oxygen by forming O-H bonds.
本發明之範例實施例係彙整於此。其他實施例亦可從說明書整體與在此提出的請求項獲得理解。Exemplary embodiments of the invention are assembled here. Other embodiments can also be understood from the entirety of the description and the claims made here.
範例1。用於處理基板的方法,包含:將基板裝載在電漿處理腔室中;執行包括複數循環的循環電漿蝕刻處理,其中複數循環的各循環包括:由包括氟矽烷和氧的第一氣體混合物來產生第一電漿;藉由將基板暴露至第一電漿來執行沉積步驟以形成包括矽和氟的鈍化層;由包括稀有氣體的第二氣體混合物來產生第二電漿;以及藉由將基板暴露至第二電漿來執行蝕刻步驟。Example 1. A method for processing a substrate, comprising: loading a substrate in a plasma processing chamber; performing a cyclic plasma etch process comprising a plurality of cycles, wherein each cycle of the plurality of cycles comprises: a first gas mixture comprising fluorosilane and oxygen to generate a first plasma; performing a deposition step to form a passivation layer comprising silicon and fluorine by exposing the substrate to the first plasma; generating a second plasma from a second gas mixture comprising a rare gas; and by The etching step is performed by exposing the substrate to the second plasma.
範例2。範例1之方法,更包括在循環電漿蝕刻處理期間將基板保持在-120℃和0℃之間的溫度。Example 2. The method of Example 1, further comprising maintaining the substrate at a temperature between -120°C and 0°C during the cyclic plasma etch process.
範例3。範例1或2其中一者之方法,更包括:在執行循環電漿蝕刻處理之前將基板暴露至含氫電漿。Example 3. The method of either example 1 or 2 further includes: exposing the substrate to a hydrogen-containing plasma before performing the cyclic plasma etching process.
範例4。範例1至3其中一者之方法,其中複數循環的各循環更包括將基板暴露至含氫電漿。Example 4. The method of any one of examples 1 to 3, wherein each cycle of the plurality of cycles further comprises exposing the substrate to a hydrogen-containing plasma.
範例5。範例1至4其中一者之方法,其中第一氣體混合物更包括含氫氣體,使得將基板暴露至第一電漿亦將基板暴露至含氫電漿。Example 5. The method of any one of examples 1 to 4, wherein the first gas mixture further includes a hydrogen-containing gas such that exposing the substrate to the first plasma also exposes the substrate to the hydrogen-containing plasma.
範例6。範例1至5其中一者之方法,其中基板包含包括矽氮化物的第一暴露表面、包括二氧化矽的第二暴露表面、以及包括矽的第三暴露表面,其中,在循環電漿蝕刻處理期間,相對於第二和第三暴露表面,選擇性地蝕刻第一暴露表面。Example 6. The method of any one of Examples 1 to 5, wherein the substrate comprises a first exposed surface comprising silicon nitride, a second exposed surface comprising silicon dioxide, and a third exposed surface comprising silicon, wherein after the cyclic plasma etch process During this process, the first exposed surface is selectively etched relative to the second and third exposed surfaces.
範例7。範例1至6其中一者之方法,其中氟矽烷包括四氟化矽(SiF 4)。 Example 7. The method of any one of examples 1 to 6, wherein the fluorosilane comprises silicon tetrafluoride (SiF 4 ).
範例8。範例1至7其中一者之方法,其中氟矽烷包括氫氟矽烷。Example 8. The method of any one of examples 1 to 7, wherein the fluorosilane comprises hydrofluorosilane.
範例9。範例1至8其中一者之方法,其中氫氟矽烷包括三氟矽烷(SiHF 3)、二氟矽烷(SiH 2F 2)、或氟矽烷(SiH 3F)。 Example 9. The method of any one of examples 1 to 8, wherein the hydrofluorosilane comprises trifluorosilane (SiHF 3 ), difluorosilane (SiH 2 F 2 ), or fluorosilane (SiH 3 F).
範例10。用於處理基板的方法,包括:取得包括第一區域、第二區域、和第三區域的基板,第一區域包括第一元素的氮化物,第二區域包括第一元素的氧化物,並且第三區域包括第一元素的元素形式;以及藉由在電漿處理腔室中使用多步驟電漿處理來相對於第二和第三區域選擇性地蝕刻第一區域,多步驟電漿處理包括:在將基板保持在第一溫度的同時,將基板暴露至產生自包括矽烷、含氟氣體、和氧的第一氣體混合物的第一電漿,第一溫度低於或等於0℃;以及在將基板保持在第二溫度時,將基板暴露至產生自包括稀有氣體的第二氣體混合物的第二電漿。Example 10. A method for processing a substrate comprising: taking a substrate comprising a first region including a nitride of a first element, a second region including an oxide of the first element, and a third region The three regions include the elemental form of the first element; and the first region is selectively etched relative to the second and third regions by using a multi-step plasma treatment in a plasma processing chamber, the multi-step plasma treatment comprising: exposing the substrate to a first plasma generated from a first gas mixture comprising silane, a fluorine-containing gas, and oxygen while maintaining the substrate at a first temperature, the first temperature being less than or equal to 0°C; and While the substrate is maintained at a second temperature, the substrate is exposed to a second plasma generated from a second gas mixture including a noble gas.
範例11。範例10的方法,其中第一溫度低於第二溫度。Example 11. The method of Example 10, wherein the first temperature is lower than the second temperature.
範例12。範例10或11其中一者之方法,其中第一溫度在-120℃和0℃之間,並且其中第二溫度在-200℃和100℃之間。Example 12. The method of either Examples 10 or 11, wherein the first temperature is between -120°C and 0°C, and wherein the second temperature is between -200°C and 100°C.
範例13。範例10至12其中一者之方法,其中矽烷包括甲矽烷(SiH 4),並且含氟氣體包括四氟甲烷(CF 4)、二氟(F 2)、三氟化氮(NF 3)、六氟化硫(SF 6)、六氟乙烷(C 2F 6)、八氟環丁烷(C 4F 8)、全氟異丁烯(C 4F 8)、氟仿(CHF 3)、或氟化氫(HF)。 Example 13. The method of any one of Examples 10 to 12, wherein the silane comprises monosilane (SiH 4 ), and the fluorine-containing gas comprises tetrafluoromethane (CF 4 ), difluorine (F 2 ), nitrogen trifluoride (NF 3 ), hexafluoromethane Sulfur fluoride (SF 6 ), hexafluoroethane (C 2 F 6 ), octafluorocyclobutane (C 4 F 8 ), perfluoroisobutylene (C 4 F 8 ), fluoroform (CHF 3 ), or hydrogen fluoride (HF).
範例14。範例10至13其中一者之方法,其中第一元素包含Si、Ge、B、W、Al、Ti、Ga、Ta、Hf、或Zr。Example 14. The method of any one of examples 10 to 13, wherein the first element comprises Si, Ge, B, W, Al, Ti, Ga, Ta, Hf, or Zr.
範例15。範例10至14其中一者之方法,更包含:在選擇性地蝕刻第一區域之前,將基板暴露至含氫電漿。Example 15. The method of any one of Examples 10-14, further comprising exposing the substrate to a hydrogen-containing plasma before selectively etching the first region.
範例16。範例10至15之一的方法,其中第一氣體混合物更包括含氫氣體,使得將基板暴露至第一電漿亦將基板暴露至含氫電漿。Example 16. The method of any one of Examples 10-15, wherein the first gas mixture further includes a hydrogen-containing gas such that exposing the substrate to the first plasma also exposes the substrate to the hydrogen-containing plasma.
範例17。用於處理基板的方法,包括:取得包括第一區域、第二區域、和第三區域的基板,第一區域包括第一元素的氮化物,第二區域包括第一元素的氧化物,並且第三區域包括第一元素的元素形式;以及藉由使用電漿處理來相對於第二和第三區域選擇性地蝕刻第一區域,電漿處理包括:在將基板保持在第一溫度的同時,將基板暴露至產生自包括矽、氟、氧、和稀有氣體的氣體混合物的電漿,第一溫度低於或等於0℃。Example 17. A method for processing a substrate comprising: taking a substrate comprising a first region including a nitride of a first element, a second region including an oxide of the first element, and a third region The three regions include an elemental form of the first element; and selectively etching the first region relative to the second and third regions by using a plasma treatment comprising: while maintaining the substrate at a first temperature, The substrate is exposed to a plasma generated from a gas mixture including silicon, fluorine, oxygen, and a noble gas at a first temperature lower than or equal to 0°C.
範例18。範例17的方法,其中電漿處理是連續電漿處理,並且其中氣體混合物中的矽和氟是氟矽烷的一部分。Example 18. The method of Example 17, wherein the plasma treatment is continuous plasma treatment, and wherein the silicon and fluorine in the gas mixture are part of fluorosilane.
範例19。範例17其中一者的方法,其中電漿處理是包括電漿處理腔室中的複數循環的循環電漿處理,複數循環的各循環包括暴露至由氣體混合物產生的電漿、以及進一步將基板暴露至含氫電漿,並且其中氣體混合物中的矽和氟是氟矽烷的一部分。Example 19. The method of any one of Example 17, wherein the plasma treatment is cyclic plasma treatment comprising a plurality of cycles in the plasma processing chamber, each cycle of the plurality of cycles comprising exposure to a plasma generated by the gas mixture, and further exposing the substrate to To a hydrogen-containing plasma, and the silicon and fluorine in the gas mixture are part of the fluorosilane.
範例20。範例17其中一者的方法,其中氣體混合物中的矽是氫氟矽烷或矽烷的一部分。Example 20. The method of one of Example 17, wherein the silicon in the gas mixture is part of hydrofluorosilane or silane.
雖然本發明已參照說明性實施例而敘述,但此敘述內容並非意圖以限制性意義加以解讀。說明性實施例之諸多修改及組合、以及本發明之其他實施例對習於此技藝者在參照敘述內容時將是顯而易見的。因此預期使所附之請求項涵蓋任何如此的修改或實施例。While this invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Many modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to those skilled in the art upon reference to the description. The appended claims are therefore intended to cover any such modifications or embodiments.
100:電漿處理系統 110:基板 120:電漿處理腔室 130:氣體輸送系統 140:真空泵系統 150:溫度控制器 160:第二RF電源 162:頂部電極 164:基板托座 166:冷卻器 170:電漿 180:第一RF電源 212:氮化物層、氧化物 213:鈍化層 214:氮化物層、氮化物 216:層堆疊 218:硬遮罩層 220:通道材料 222:狹縫 224:空隙 300-307:方框 C1-C2:虛線 40-44:處理流程圖 400-410:方框 100: Plasma treatment system 110: Substrate 120: Plasma treatment chamber 130: Gas delivery system 140: Vacuum pump system 150: temperature controller 160: the second RF power supply 162: top electrode 164: Substrate bracket 166: Cooler 170: Plasma 180: The first RF power supply 212: Nitride layer, oxide 213: passivation layer 214: Nitride layer, nitride 216: Layer stacking 218: Hard mask layer 220: Channel material 222: Slit 224: Gap 300-307: box C1-C2: dotted line 40-44: Processing flow chart 400-410: box
為了對本發明和其優點更透澈的理解,現結合隨附圖式參照以下說明,其中:For a clearer understanding of the present invention and its advantages, reference is now made to the following description in conjunction with the accompanying drawings, in which:
圖1A根據本申請案的實施例顯示電漿處理工具;Figure 1A shows a plasma processing tool according to an embodiment of the present application;
圖2A-2C根據實施例顯示在電漿處理的諸多步驟期間基板的示意性橫剖面圖,其中圖2A顯示包含氮化物層的進入基板,圖2B顯示沉積步驟之後,且圖2C顯示其中氮化物層被去除的蝕刻步驟之後;2A-2C show schematic cross-sectional views of a substrate during various steps of plasma processing, wherein FIG. 2A shows an incoming substrate including a nitride layer, FIG. 2B shows after a deposition step, and FIG. 2C shows a nitride layer therein, according to embodiments. After the etching step where the layer is removed;
圖2D-2F根據替代實施例顯示在電漿處理的諸多步驟期間基板的示意性橫剖面圖,其中圖2D顯示包含氧化物層的進入基板,圖2E顯示沉積步驟之後,且圖2F顯示其中氧化物層被保留的蝕刻步驟之後;2D-2F show schematic cross-sectional views of a substrate during various steps of plasma processing, wherein FIG. 2D shows an incoming substrate comprising an oxide layer, FIG. 2E shows after a deposition step, and FIG. After the etching step in which the layer is retained;
圖2G和2H根據又一實施例顯示在非等向性電漿處理之前和之後的基板的示意性橫剖面圖,其中圖2G顯示包含形成在圖案化氧化物層之上的氮化物層的進入基板、而顯示自對準多重圖案化中的間隔物蝕刻的範例,且圖2H顯示在選擇性地去除氮化物之橫向部分的非等向性電漿處理之後;2G and 2H show schematic cross-sectional views of substrates before and after anisotropic plasma treatment according to yet another embodiment, wherein FIG. substrate, while showing examples of spacer etching in self-aligned multiple patterning, and FIG. 2H shows after anisotropic plasma treatment that selectively removes lateral portions of nitride;
圖2I和2J根據另一實施例顯示藉由等向性電漿處理形成3D垂直NAND (VNAND)結構的處理期間處於中間階段的基板的示意性橫剖面圖,其中圖2I顯示包含氧化物層和氮化物層的層堆疊的基板,且圖2J顯示在選擇性地去除氮化物的等向性電漿處理之後;2I and 2J show schematic cross-sectional views of a substrate at an intermediate stage during processing to form a 3D vertical NAND (VNAND) structure by isotropic plasma treatment, according to another embodiment, wherein FIG. 2I shows an oxide layer and A layer-stacked substrate of a nitride layer, and FIG. 2J is shown after an isotropic plasma treatment to selectively remove the nitride;
圖3A根據實施例顯示使用包含氟矽烷和氧的電漿在基板上進行循環電漿處理的處理流程圖;3A shows a process flow diagram for cyclic plasma treatment on a substrate using a plasma comprising fluorosilane and oxygen, according to an embodiment;
圖3B根據替代實施例顯示使用包含氫氟矽烷和氧的電漿在基板上進行循環電漿處理的處理流程圖;3B shows a process flow diagram for cyclic plasma treatment on a substrate using a plasma comprising hydrofluorosilane and oxygen, according to an alternative embodiment;
圖3C顯示使用包含矽烷、含氟氣體和氧的電漿在基板上進行循環電漿處理的處理流程圖;FIG. 3C shows a process flow diagram of a cyclic plasma treatment on a substrate using a plasma comprising silane, a fluorine-containing gas, and oxygen;
圖4A根據實施例顯示使用包含氟矽烷、氧和稀有氣體的電漿的連續電漿處理的處理流程圖;4A shows a process flow diagram of a continuous plasma treatment using a plasma comprising fluorosilane, oxygen, and a noble gas, according to an embodiment;
圖4B根據替代實施例顯示使用包含氟矽烷、氧和稀有氣體的電漿的循環電漿處理的處理流程圖;4B shows a process flow diagram for a cyclic plasma treatment using a plasma comprising fluorosilane, oxygen, and a noble gas, according to an alternative embodiment;
圖4C根據另一實施例顯示電漿處理的處理流程圖,其中在電漿處理中使用的電漿包含氫氟矽烷、氧和稀有氣體,或者其中電漿包括矽烷、含氟氣體、氧和惰性氣體;4C shows a process flow diagram for plasma treatment according to another embodiment, wherein the plasma used in the plasma treatment comprises hydrofluorosilane, oxygen and a noble gas, or wherein the plasma comprises silane, a fluorine-containing gas, oxygen and an inert gas. gas;
圖5A-5C根據實施例顯示在不同處理溫度下,在沉積步驟中使用四氟化矽和氧且在蝕刻步驟中使用氬的電漿蝕刻處理循環期間三個基板的範例厚度變化,其中圖5A顯示矽氮化物的厚度變化,圖5B顯示非晶矽的厚度變化,且圖5C顯示二氧化矽的厚度變化;5A-5C show exemplary thickness variations of three substrates during a plasma etch process cycle using silicon tetrafluoride and oxygen in the deposition step and argon in the etch step at different process temperatures, according to an embodiment, wherein FIG. 5A shows the thickness variation of silicon nitride, FIG. 5B shows the thickness variation of amorphous silicon, and FIG. 5C shows the thickness variation of silicon dioxide;
圖6A和6B根據實施例顯示兩個基板(矽氮化物和非晶矽)的厚度變化和處理溫度之間的關係,其中圖6A顯示在範例實施例中各步驟之後的厚度變化的數據圖,且圖6B顯示在第一沉積步驟期間作為處理溫度之函數的兩個基板上的沉積速率的示意性趨勢;6A and 6B show the relationship between the thickness variation and the processing temperature of two substrates (silicon nitride and amorphous silicon) according to the embodiment, wherein FIG. 6A shows the data graph of the thickness variation after each step in the exemplary embodiment, And Figure 6B shows a schematic trend of deposition rates on two substrates as a function of process temperature during the first deposition step;
圖7根據實施例顯示,從密度泛函理論(density-functional theory, DFT)計算獲得的矽和矽氮化物表面上的矽自由基、四氟矽烷自由基物種、和氧自由基的吸附能;以及7 shows, according to an embodiment, the adsorption energies of silicon radicals, tetrafluorosilane radical species, and oxygen radicals on silicon and silicon nitride surfaces calculated from density-functional theory (DFT); as well as
圖8A和8B根據實施例顯示在循環電漿蝕刻處理的第一沉積步驟期間可形成的矽氮化物上的混合氧的表面物種,其中圖8A顯示經由NO x形成和離子輔助脫附的由矽氮化物基板造成的範例氧消耗,且圖8B顯示經由利用可能存在於矽氮化物中的NH基團的OH鍵形成的氧消耗的另一範例。 8A and 8B show surface species of mixed oxygen on silicon nitride that may form during the first deposition step of a cyclic plasma etch process, wherein FIG. Example oxygen consumption by a nitride substrate, and Figure 8B shows another example of oxygen consumption via OH bond formation utilizing NH groups that may be present in silicon nitride.
40:處理流程圖 40: Processing flow chart
400-406:方框 400-406: box
408A:方框 408A: box
410:方框 410: box
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