TW202238608A - Semiconductor device with security function and security method thereof - Google Patents

Abstract

A semiconductor device with security function and security method thereof are provided. The semiconductor device includes an internal circuit; a programmable memory unit, coupled to the internal circuit for storing security code data; a judging circuit, coupled to programmable memory unit, for receiving the security code data, and output a security code if the security code data is judged to be able to used as the security code; and comparison circuit, comparing the security code and authentication data. If the security code and authentication data are the same, an enable signal is generated and provided to the internal circuit. Whether the security code data can be used as the security code is judged by a parity bit of the security code data.

Description

Semiconductor device with security function and security method thereof

The present invention relates to a security technology, and in particular to a semiconductor device with a security function and a security method thereof.

In recent years, the risk of unauthorized access has been increasing. Generally, semiconductor memory devices use embedded fuses or one-time programmable memory (OTP) to store redundant information, batch numbers, and the like. In addition, the semiconductor memory device pre-writes a security code on the above-mentioned components such as the fuse to provide user authentication and prevent unauthorized access.

However, even if a security code is provided in the semiconductor device to prevent unauthorized access, there is still a chance of being cracked or stolen. At this time, there is a need to change the security code so that the security code in the semiconductor device can be kept up to date.

Therefore, how to update the internal security code of the semiconductor device to keep it up-to-date and further prevent unauthorized access is a problem that needs to be considered in this field.

The present invention provides a semiconductor device with a security function, comprising: an internal circuit; a programmable memory unit coupled to the internal circuit for storing security code data and data required by the internal circuit; a judging circuit coupled to the programmable The memory unit is used to receive the security code data, and when the security code data is judged to be used as the security code, output the security code; and the comparison circuit receives the verification data from the outside and the security code from the judging circuit, and compares the verification data with the security code, and when the verification data is the same as the security code, an enable signal is output to the internal circuit. Wherein, judging whether the security code data can be used as the security code is based on the check bits in the security code data.

According to one embodiment, in the above-mentioned semiconductor device with a security function, the programmable memory unit includes an array area composed of a plurality of word lines (i, i=0~n-1, n is an integer), used to save the security code information.

According to an embodiment, in the above-mentioned semiconductor device with a security function, the judging circuit for judging whether the security code data can be used as a security code further includes: reading the security code stored in the i-th word line of the plurality of word lines data; when the check bit corresponding to the security code data stored in the i word line is the first value, read the security code data stored in the i+1 word line; When the check bit corresponding to the security code data stored in one word line is the second value, output the security code data stored in the i-th word line as the security code, and when the check bit is the first value , continue to read the security code data stored in the i+2th word line.

According to one embodiment, in the above-mentioned semiconductor device with security function, when the check bit corresponding to the security code data stored in the 0th word line is the second value, it is determined that the programmable memory unit has not stored the security code. code data, the programmable memory unit can receive programming commands from the internal circuit to program the programmable memory unit.

According to one embodiment, in the above semiconductor device having a security function, The first value of the parity bit can be 1, and the second value can be 0.

According to one embodiment, in the above semiconductor device having a security function, the internal circuit includes at least a memory circuit. According to an embodiment, in the above-mentioned semiconductor device with a security function, verification data can be input through address pins of the semiconductor device. According to an embodiment, in the above-mentioned semiconductor device with security function, the programmable memory unit includes at least one-time programmable memory or electronic fuse.

According to another embodiment of the present invention, a semiconductor device security method is provided. The semiconductor device has a programmable memory unit for storing security code data. The semiconductor device security method includes: receiving verification data from outside the semiconductor device; receiving security code data from a programmable memory unit, and providing a security code when the security code data is judged to be a security code; comparing the verification data with the security code , and when the verification data and the security code are the same, the semiconductor device can be accessed. Wherein, judging whether the security code data can be used as the security code is based on the check bits in the security code data.

According to one embodiment, in the above method for securing a semiconductor device, the programmable memory unit includes an array area composed of a plurality of word lines (i, i=0~n-1, n is an integer), for Storing the security code data, the security method of the semiconductor device further includes: reading the security code data stored in the ith word line of the plurality of word lines; The corresponding check bit is the first value, read the security code data stored in the i+1 word line; and when the check bit corresponding to the security code data stored in the i+1 word line When the element is the second value, output the security code data stored in the i-th word line as the security code; when the check bit is the first value, continue to read the security code data stored in the i+2 word line code data.

According to one embodiment, in the above-mentioned security method for a semiconductor device, when the check bit corresponding to the security code data stored in the 0th word line is the second value, it is determined that the programmable memory unit has not stored the security code data, and program the programmable memory unit.

According to an embodiment, in the above security method for a semiconductor device, the first value of the check bit may be 1, and the second value may be 0.

According to one embodiment, in the semiconductor device maintenance method described above, the semiconductor device may be constituted by a memory circuit. According to an embodiment, in the above method for securing a semiconductor device, the programmable memory unit may include a one-time programmable memory or an electronic fuse. According to an embodiment, the above semiconductor device security method further includes: inputting verification data through address pins of the semiconductor device.

Based on the above, according to the embodiment of the present invention, whether the security code data stored in the programmable memory unit is up to date can be known through the check bits of the current word line and the next word line. When there is a hacker or illegal access to the semiconductor device, the programmable memory unit can be reprogrammed to update the security code.

FIG. 1 is a schematic block diagram of a conventional semiconductor device with a security function according to an embodiment of the present invention. Here, only circuit components related to this embodiment are illustrated, and other circuits are appropriately omitted, and those skilled in the art can make appropriate changes or modifications to the circuit architecture without departing from the scope of the present invention.

As shown in FIG. 1 , a semiconductor device 100 with a security function includes at least an internal (core) circuit 102 , a programmable memory unit 104 , a judgment circuit 106 , a comparison circuit 108 , and the like. The internal circuit 102 may be, for example, an IP circuit such as a memory element.

The programmable memory unit 104 is coupled to the internal circuit 102. In one embodiment, the programmable memory unit 104 may be a programmable memory such as a one-time programmable (OTP) memory or an electronic fuse (eFUSE). element. The programmable memory unit 104 can generally store trimming or redundancy data, and provide it to the internal circuit 102 through the data line DATA, and based on the control signal CTRL from the internal circuit 102, the above trimming data, Redundant data and the like are provided to the internal circuit 102 for corresponding actions. According to this embodiment, a part of the programmable memory unit 104 (memory unit) is also used to store security code data (including security code and check bits).

The judging circuit 106 is coupled to the programmable memory unit 104, and receives the security code data from the programmable memory unit 104, and judges whether the security code data can be used as the security code. If it is judged that it can be used as a security code (ie, the latest security code), the judging circuit 106 outputs the security code to the comparison circuit 108 . Whether the security code data can be used as a security code is judged according to a parity bit in the security code data. The way of judging and determining the security code will be described in detail later. The time to read the security code is usually after the semiconductor device 100 is started, and then the data of the security code will be loaded.

The comparing circuit 108 is coupled to the internal circuit 102 and the judging circuit 106 for receiving the security code output by the judging circuit 106 and the verification information input from the outside of the semiconductor device 100 . The comparison circuit 108 compares the received verification information with the security code and generates a comparison result. Here, the externally input verification data can be input from, for example, address pins of the semiconductor device 100 or other idle spare pins.

When the comparison result is the same (for example, the high level potential "H" or "1" can be output), it means that the user is a legal or authorized user, and the comparison circuit 108 outputs the enable signal En to the internal circuit 102 . After the internal circuit 102 receives the enable signal En, the internal circuit 102 is activated, and the user can access the semiconductor device 100 (mainly the internal circuit 102 ).

In addition, when the comparison result is different (for example, a low level potential "L" or "0" can be output), it indicates that the user is an illegal or unauthorized user (such as a hacker, etc.), and the comparison circuit 108 Then the enable signal En will not be output to the internal circuit 102 . Since the internal circuit 102 will not receive the enable signal En, the illegal or unauthorized user cannot activate the internal circuit 102 , and intruders cannot access the semiconductor device 100 (mainly the internal circuit 102 ).

Then describe in detail how the security code of the embodiment of the present invention is programmed (changed) and which one is the security code. FIG. 2 is a schematic diagram illustrating programming of a security code according to an embodiment of the present invention. As shown in FIG. 2 , it shows a schematic structural diagram of the programmable memory unit in FIG. 1 .

As shown in FIG. 2 , a part of the programmable memory unit 104 (memory unit) is used to store security codes. 2 is only a schematic diagram for storing security code data, and the part for storing other data is omitted, and those skilled in the art can know how to design and configure it.

In FIG. 2 , the programmable memory unit 104 includes an array area composed of multiple (n) word lines WL0˜WL(n−1) (n is an integer) for storing security code data. The array area includes a data area for storing security codes and an area for storing check bits. As an example, a memory array composed of three word lines WL0 , WL1 , WL2 and four bit lines is used for illustration, but it is not intended to limit the implementation structure of the present invention. The number of word lines and bit lines (ie, the size of the array) can be appropriately changed according to actual needs. In this example, the array area includes the data area (the first four bits) and the parity bit area (the fifth bit). As the name indicates, the data stored in the first four memory cells of each word line is constitutes a security code, and the fifth bit is a check bit. Here, the parity bit is composed of 1 bit, but not limited thereto. According to this embodiment, after reading the data on a word line, it is judged whether the data can be used as a security code. At this time, the basis for judgment is based on the parity bit.

That is, as shown in FIG. 1 and FIG. 2, the internal circuit 102 can send a read control signal to the programmable memory unit 104, so as to start reading the stored security code data from the first word line WL0, when If the check bit corresponding to the security code data stored in the first word line WL0 is the first value (such as “1”), the security code data stored in the second word line WL1 will continue to be read. When the check bit corresponding to the security code data stored in the second word line WL1 is a second value (such as "0"), output the security code data stored in the first word line WL0 As a security code, and when the check bit is the first value, continue to read the security code data stored in the third word line WL2, and until the data stored in the (i+1) word line WLi When the corresponding check bit of the security code data is the second value, the security code data stored in the ith word line WL(i-1) is output as the security code (i=1~n-1, i is an integer).

In addition, after reading the security code data stored in the first word line WL0, if the corresponding parity bit is the second value (such as "0"), the judging circuit 106 in FIG. 1 can judge that the programmable The BL memory unit 104 has not yet stored the security code data. At this time, the programmable memory unit 104 may receive a programming command from the internal circuit 102 to program the programmable memory unit 104 , for example, program the first word line WL0 . Next, a specific example will be used for further description with reference to FIG. 2 .

At the beginning, as shown on the left side of FIG. 2 , all the bits in the data area and the parity bit area can be 0, that is, the initial value. In other words, the programmable memory unit 104 has not been written to store the security code. When the first word line WL0 is read, since the read value of the parity bit is 0, the judging circuit 106 can judge that there is no security code stored in the first word line WL0. In one embodiment, the internal circuit 102 can send a programming command to the programmable memory unit 104 for programming.

For example, the programmable memory unit 104 can be programmed for the first time at this time, for example, the first word line WL0 can be programmed, which is illustrated in the middle of FIG. 2 . At this time, for example, the data stored in the data area of the first word line WL0 is "1010", and its parity bit is "1". At this time, the data stored in the second word line WL1 will be read again. If the check bit read by the second word line WL1 is "0", it represents that the second word line WL1 does not store the security code data, and the security code data stored in the first word line WL0 is the latest. At this time, the judgment circuit 106 judges that the data “1010” stored in the data area of the first word line WL0 is a security code, and provides the security code “1010” to the comparison circuit 108 . Thus, the comparison circuit 108 receives and compares the verification data IN input from the outside and the security code “1010” from the judgment circuit 106 to judge whether the access is legal or authorized. If the verification data IN is also “1010”, the comparison circuit 108 will output the enable signal En to the internal circuit 102, thereby enabling the operation of the entire semiconductor device.

In addition, in case of a hacker or illegal access, the internal circuit 102 can program the programmable memory unit 104 by sending a programming command to the programmable memory unit 104. In this example (FIG. 2 Right), for example stylizing the second word line WL1.

As shown in Figure 2, after the programmable memory unit 104 is programmed for the second time, the security code data stored in the first word line WL0 is "10101", wherein the security code is "1010", and the check bit is "1"; the security code data stored in the second word line WL1 is "11101", wherein the security code is "1110" and the check bit is "1". The third word line WL2 has not been programmed yet, and the parity bit is "0".

In this case, after receiving the security code data “10101” stored in the first word line WL0, the judging circuit 106 continues to read the second word line WL1 since the check bit is “1”. Since the programmable memory unit 104 is programmed sequentially from the first word line WL0, when the judging circuit 106 receives the security code data “11101” stored in the second word line WL1, it starts from the check bit If it is "1", it can be judged that the security code "1010" stored in the first word line WL0 is not the last programmed security code data, and it is necessary to continue to read the security code data of the third word line WL2. At this time, when the judging circuit 106 receives the security code data "00000" stored in the third word line WL2, the security code stored in the second word line WL1 can be judged from the fact that the check bit is "0". "1110" is the latest security code that has been updated and can be used as a security code. At this time, the judging circuit 106 provides the security code “1110” to the comparing circuit 108 . Thus, the comparison circuit 108 receives and compares the verification information IN input from the outside and the security code “1110” from the judgment circuit 106 to judge whether the access is legal or authorized. If the verification data IN is also "1110", the comparison circuit 108 will output the enable signal En to the internal circuit 102, thereby enabling the operation of the entire semiconductor device.

Through the above method, the judging circuit 106 of the semiconductor device 100 can judge whether the word line has stored data or whether the data can be used as a security code by checking the bit in the received security code data. According to this embodiment, it can be known whether the security code data stored in the current word line in the programmable memory unit 104 is the latest through the check bits of the current word line and the next word line. According to this embodiment, when a hacker or illegal accesses the semiconductor device 100, the internal circuit 102 can program the programmable memory unit 104 to update the security code.

FIG. 3 is a schematic flowchart of a semiconductor device preservation method according to an embodiment of the present invention. As shown in FIG. 1 and FIG. 3 , in step S100 , for example, a user or others can access the power of the semiconductor device (eg, memory) 100 .

Next, in step S102 , the user can input verification data IN from outside the semiconductor device 100 through pins of the semiconductor device 100 , such as address pins or other spare pins.

At the same time, in step S104, the security code data is received from the programmable memory unit 104 shown in FIG. 1 . Next, in step S106, it is judged whether the security code data can be used as the security code by, for example, the judging circuit 106 in FIG. 1 . If the security code data can be used as a security code, then enter step S108, and provide (output) the security code to the comparison circuit 108 through the judging circuit 106 .

In step S106, if the judging circuit 106 judges that the security code data cannot be used as the security code, it indicates that the security code may have been updated. At this time, it returns to step S104, continues to fetch the next piece of data from the programmable memory unit 104, and executes step S106 to determine whether the piece of data can be used as a security code. As described in Figure 2 above, judging whether the security code data can be used as a security code is based on the check bits in the security code data. The method of using the check bit to determine whether it can be used as a security code has been described above, and will not be further explained here.

Next, in step S110, compare whether the security code and the verification information IN are the same, if they are the same (ie "Yes"), it means that the access to the semiconductor circuit 100 is legal or authorized. Next, in step S112 , the internal circuit 102 is activated, and the user can access the internal circuit 102 . On the contrary, if the comparison result in step S110 is negative, it means that the access to the semiconductor circuit 100 is illegal or unauthorized. At this time, the process proceeds to step S112, and the internal circuit 102 is stopped.

To sum up, in the embodiment of the present invention, through the check bits of the current word line and the next word line, it can be known whether the security code data stored in the current word line in the programmable memory unit is the latest . When there is a hacker or illegal access to the semiconductor device, the programmable memory unit can be reprogrammed to update the security code.

100: Semiconductor device 102: Internal circuit 104: Programmable memory unit 106: judgment circuit 108: Comparison circuit En: enable signal CTRL: control signal IN: verification data CLK: clock signal RESET: reset signal DATA: data S100~S114: each execution step

FIG. 1 is a schematic block diagram of a conventional semiconductor device with a security function according to an embodiment of the present invention. Fig. 2 is a schematic diagram of programming a security code and judging whether it is a security code according to an embodiment of the present invention. FIG. 3 is a schematic flowchart of a semiconductor device preservation method according to an embodiment of the present invention.

100: Semiconductor device

102: Internal circuit

104: Programmable memory unit

106: judgment circuit

108: Comparison circuit

En: enable signal

CTRL: control signal

IN: verification data

CLK: clock signal

RESET: reset signal

DATA: data

Claims (15)

A semiconductor device with a security function, comprising: internal circuit; a programmable memory unit, coupled to the internal circuit, for storing security code data and data required by the internal circuit; a judging circuit, coupled to the programmable memory unit, for receiving the security code data, and outputting the security code when the security code data is judged to be a security code; and The comparison circuit receives the verification data from the outside and the security code from the judging circuit, compares the verification data with the security code, and outputs enable when the verification data and the security code are the same signal to the internal circuitry, Wherein judging whether the security code data can be used as the security code is based on the check bits in the security code data. The semiconductor device with security function according to claim 1, wherein the programmable memory unit includes an array area composed of a plurality of word lines (n, n is an integer) for storing the security code material. The semiconductor device with security function as described in claim 2, wherein the judging circuit judging whether the security code data can be used as the security code also includes: reading the security code data stored in the first word line of the plurality of word lines; When the check bit corresponding to the security code data stored in the first word line is a first value, read the security code data stored in the second word line; and When the check bit corresponding to the security code data stored in the second word line is a second value, output the security code data stored in the first word line As the security code, when the check bit is the first value, continue to read the security code data stored in the third word line until it matches the (i+1)th word line When the check bit corresponding to the stored security code data is the second value, output the security code data stored in the i-th word line as the security code (i=1~n-1, i is an integer). The semiconductor device with a security function as described in claim 3, wherein when the check bit corresponding to the security code data stored in the first word line is the second value, it is judged that the The programmable memory unit has not stored the security code data, and the programmable memory unit can receive a programming command from the internal circuit to program the programmable memory unit. The semiconductor device with security function according to claim 3, wherein the first value of the parity bit is 1, and the second value is 0. The semiconductor device having a security function according to claim 1, wherein the internal circuit includes at least a memory circuit. The semiconductor device with security function as claimed in claim 1, wherein the verification data is input through an address pin of the semiconductor device. The semiconductor device with security function according to claim 1, wherein the programmable memory unit includes at least one-time programmable memory or electronic fuse. A security method for a semiconductor device, the semiconductor device has a programmable memory unit for storing security code data, the security method for the semiconductor device includes: receiving verification data from outside the semiconductor device; receiving the security code data from the programmable memory unit, and providing the security code when the security code data is judged to be a security code; comparing the verification data with the security code, and enabling the semiconductor device to be accessed when the verification data and the security code are the same, Wherein judging whether the security code data can be used as the security code is based on the check bits in the security code data. The method for securing a semiconductor device according to claim 9, wherein the programmable memory unit includes an array area composed of a plurality of word lines (n, n is an integer) for storing the security code data , the preservation method of the semiconductor device further includes: reading the security code data stored in the first word line of the plurality of word lines; When the check bit corresponding to the security code data stored in the first word line is a first value, read the security code data stored in the second word line; and When the check bit corresponding to the security code data stored in the second word line is a second value, output the security code data stored in the first word line As the security code, when the check bit is the first value, continue to read the security code data stored in the third word line until it matches the (i+1)th word line When the check bit corresponding to the stored security code data is the second value, output the security code data stored in the i-th word line as the security code (i=1~n-1, i is an integer). The semiconductor device security method according to claim 10, wherein when the check bit corresponding to the security code data stored in the first word line is the second value, it is judged that the The programmable memory unit has not stored the security code data, and the programmable memory unit is programmed. The semiconductor device security method according to claim 10, wherein the first value of the parity bit is 1, and the second value is 0. The method for securing a semiconductor device according to claim 9, wherein the semiconductor device is composed of a memory circuit. The method for securing a semiconductor device according to claim 9, wherein the programmable memory unit includes a one-time programmable memory or an electronic fuse. The semiconductor device preservation method as described in Claim 9, further comprising: The verification data is input through the address pins of the semiconductor device.

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