TW202226688A - Differential circuit board and semiconductor light-emitting device - Google Patents

Abstract

A differential circuit board includes a dielectric layer having a first and a second surface, a first conductor line with a first line-width, a second conductor line with a second line-width less than the first line-width, and a ground conductor. The dielectric layer has a first portion with a first thickness between the first and second surface and a second portion with a second thickness less than the first thickness between the first and second surfaces. The first conductor line is disposed on the first surface of the first portion. The second conductor line is disposed on the first surface of the second portion. The ground conductor is disposed on the second surface of the first portion and the second surface of the second portion, wherein the ground conductor overlaps with the first conductor line and the second conductor line. The first and second conductor lines are differential transmission lines.

Description

Differential circuit board and semiconductor light-emitting device

The present disclosure relates to differential circuit boards and semiconductor light emitting devices. CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority to Japanese Patent Applications JP2020-153685 filed on September 14, 2020 and JP2020-186989 filed on November 10, 2020, the contents of which are expressly incorporated herein by reference.

Background technique

Differential drive systems are known to ensure electrical signal quality in communication optical modules such as electro-absorption modulator integrated lasers (EMLs). A differential drive system has a pair of differential transmission lines of the same line width to balance a pair of signals in opposite phases. In some cases, the line width needs to be wide enough to fit the EML on one of a pair of differential transmission lines. In this case, it is difficult to downsize the differential drive system compared to the single-ended drive system.

According to some possible embodiments, the differential circuit board may include a dielectric layer having a first surface and a second surface, the dielectric layer having a first portion having a first thickness between the first surface and the second surface, The dielectric layer has a second portion between the first surface and the second surface having a second thickness less than the first thickness; a first conductor line having a first line width, the first conductor line being disposed on the first portion on the first surface; a second conductor line having a second line width smaller than the first line width, the second conductor line being disposed on the first surface of the second portion; and disposed on the second surface and the second portion of the first portion A ground conductor on the second surface of the portion, the ground conductor overlapping the first conductor line and the second conductor line. The first conductor line and the second conductor line may be differential transmission lines.

According to some possible embodiments, the semiconductor light emitting device may include: a differential circuit board; and an optical semiconductor device mounted on the differential circuit board.

Hereinafter, some embodiments will be described in detail and in detail with reference to the accompanying drawings. In all the drawings, members having the same reference numerals have exactly the same or the same features, and their repeated descriptions will be omitted. The size of the drawings does not always correspond to the magnification.

FIG. 1 is a plan view of an example differential circuit board. FIG. 2 is a II-II cross-sectional view of the example differential circuit board shown in FIG. 1 . The differential circuit board has a dielectric layer 10 . The dielectric layer 10 includes a dielectric such as aluminum nitride. The dielectric layer 10 is a single layer. Dielectric layer 10 has a first surface 12 and a second surface 14 . Dielectric layer 10 includes first portion 16 . The first portion 16 has a first thickness h1 between the first surface 12 and the second surface 14 . Dielectric layer 10 includes second portion 18 . The second portion 18 has a second thickness h2 between the first surface 12 and the second surface 14 that is less than the first thickness h1. The first portion 16 and the second portion 18 are flush on the first surface 12 . The second surface 14 has a step (height transition unit) 20 between the first part 16 and the second part 18 . That is, the difference in thickness between the first portion 16 and the second portion 18 occurs on the second surface 14 .

The example differential circuit board has a first conductor line 22 . The first conductor wire 22 has a first wire width W1. The first conductor wire 22 is disposed on the first surface 12 of the first portion 16 . The differential circuit board has second conductor lines 24 . The second conductor wire 24 has a second wire width W2 smaller than the first wire width W1. The second conductor wire 24 is disposed on the first surface 12 of the second portion 18 . The second conductor line 24 is located at the center of the second portion 18 in the alignment direction of the first conductor line 22 and the second conductor line 24 . The step 20 of the second surface 14 is just below the center of the space between the first conductor line 22 and the second conductor line 24 . That is, the distance d1 from the first conductor line 22 to the center is equal to the distance d2 from the second conductor line 24 to the center.

The first conductor wire 22 and the second conductor wire 24 include a material such as gold, and a laminate material may be used. The first conductor line 22 and the second conductor line 24 constitute a differential transmission line. The first line width W1, the second line width W2, the first thickness h1 and the second thickness h2 are designed to have a characteristic impedance of 100Ω of the differential transmission line.

The example differential circuit board has ground conductors 26 . The ground conductor 26 includes a material such as gold, and a laminate may be used. Ground conductors 26 are provided on the second surface 14 of the first portion 16 and the second surface 14 of the second portion 18 . The ground conductor 26 is continuous on the second surface 14 of the first portion 16 and the second surface 14 of the second portion 18 . Ground conductors 26 are also formed on the side surfaces of the first portion 16 adjacent to the second portion 18 . The ground conductor 26 is integrally formed, thus eliminating patterning and simplifying the manufacturing process associated with the exemplary differential circuit board.

The ground conductor 26 overlaps the first conductor line 22 and the second conductor line 24 . Therefore, the first conductor line 22 and the ground conductor line 26 constitute a microstrip line type high frequency line with GND. Further, the second conductor line 24 and the ground conductor line 26 also constitute a microstrip line type high frequency line with GND.

In this way, when the second line width W2 is smaller than the first line width W1, the exemplary differential circuit board can be downsized (eg, compared to a conventional differential circuit board). Although the second line width W2 is smaller than the first line width W1, the second thickness h2 is smaller than the first thickness h1, thereby balancing the signal pair to be differentially transmitted without causing deterioration of characteristic impedance.

3 is a schematic diagram of a simulation model of an example differential circuit board. The first conductor wire 22 , the second conductor wire 24 , the first portion 16 and the second portion 18 have the features described above in connection with FIGS. 1 and 2 . The specific size is shown in the picture. The differential impedance is set to 100Ω.

4 is a schematic diagram of a simulation model of an example differential circuit board. The width of the pair of conductor lines is the same as that shown in FIG. 3, and the thickness of the dielectric layer is also uniform. The specific size is shown in the picture. The differential impedance is set to 100Ω.

5 is a graph of frequency characteristics related to the example differential circuit board shown in FIG. 3 and the example differential circuit board shown in FIG. 4 obtained through simulation using a three-dimensional electric field analysis tool. As shown in FIG. 5 , for the example differential circuit board of FIG. 3 and the example differential circuit board of FIG. 4 , sufficient transmission characteristics are obtained in the range of 0 GHz to 60 GHz ( S21 ). In applications up to at least 50 GHz, the FIG. 3 embodiment of the exemplary differential circuit board can achieve as good characteristics as a conventional differential circuit board, with the exemplary differential circuit board being 20% smaller in size. These dimensions are just an example, and may be determined according to conditions such as desired differential impedance, desired frequency band, and dielectric constant of dielectric layer 10 .

6 is a cross-sectional view of an example differential circuit board. The exemplary differential circuit board differs from the exemplary differential circuit board described herein in connection with FIGS. 1-5 in that the dielectric layers are multiple layers (eg, layers 10A, 10B having different dielectric constants). What was described above in connection with Figures 1-5 applies here.

7 is a cross-sectional view of an example differential circuit board. The exemplary differential circuit board differs from the exemplary differential circuit board described herein in connection with FIGS. 1-6 in that the ground conductors are separate. The ground conductors include a first ground conductor 26A on the second surface 14 of the first portion 16 . The ground conductors include a second ground conductor 26B disposed on the second surface 14 of the second portion 18 and separated from the first ground conductor 26A. The ground conductor 26 is not formed on the side surface of the first portion 16 adjacent to the second portion 18 . What was described above in connection with Figures 1-6 applies here.

8 is a cross-sectional view of an example differential circuit board. The exemplary differential circuit board differs from the exemplary differential circuit board described herein in connection with FIGS. 1-7 in that the step 20B of the second surface 14 is not only located between the first conductor line 22 and the second conductor line 24 . below the center of the space. What has been described above in connection with Figures 1-7 applies here.

9 is a cross-sectional view of an example differential circuit board. The dielectric layer 10 has a third portion 28 that varies in thickness between the first portion 16 and the second portion 18 . The third portion 28 does not overlap the first conductor line 22 and the second conductor line 24 . The second conductor line 24 is located at the center of the second portion 18 in the alignment direction of the first conductor line 22 and the second conductor line 24 . The third portion 28 is integral with the first portion 16 by a first thickness h1 and is integral with the second portion 18 by a second thickness h2. The second surface 14 of the first part 16 and the second surface 14 of the second part 18 are connected with the inclined surface of the third part 28 . This shape also does not have a practically severe level difference in high frequency characteristics.

FIG. 10 is a plan view of an example differential circuit board. FIG. 11 is an XI-XI cross-sectional view of the example differential circuit board shown in FIG. 10 .

Dielectric layer 210 includes some first portions 216 . Dielectric layer 210 includes some second portions 218 . The first portions 216 and the second portions 218 are alternately arranged. A first conductor line 222 is disposed on the first surface 212 of each first portion 216 . A second conductor line 224 is disposed on the first surface 212 of each second portion 218 . The first conductor line 222 and the second conductor line 224 constitute a differential transmission line in each of the plurality of channels CH.

Each first portion 216 on the first surface 212 includes a routing area 230 in which the first conductor lines 222 are formed. Each first portion 216 on the first surface 212 includes a margin area 232 adjacent to the wiring area 230 with a margin width Wm in the opposite direction to the second conductor line 224 . The edge widths Wm of these first portions 216 are equal.

The ground conductor 226 is continuous on the second surface 214 of the first portion 216 and the second surface 214 of the second portion 218 . The second surface 214 has a step 220 between the first portion 216 and the second portion 218 . The step 220 of the second surface 214 is just below the center of the space between the first conductor line 222 and the second conductor line 224 . The second conductor line 224 is located at the center of the second portion 218 in the alignment direction of the first conductor line 222 and the second conductor line 224 . What was described above in connection with Figures 1-9 applies here.

In some embodiments, the second line width W2 in each channel CH is smaller than the first line width W1, thereby providing a small array type differential circuit board. Alternatively, the distance between adjacent channels CH may be increased without changing the size of the array type differential circuit board. This can reduce crosstalk. Alternatively, the distance between adjacent channels CH can be larger and the differential circuit board smaller.

12 is a cross-sectional view of an example differential circuit board. Each first portion 316 on the first surface 312 has a wiring area 330 in which the first conductor line 322 is formed. Each first portion 316 on the first surface 312 has no edge adjacent the routing area 330 in the direction opposite the second conductor line 324 . The step 320 of the second surface 314 is just below the center of the space between the first conductor line 322 and the second conductor line 324 . What was described above in connection with Figures 10-11 applies here.

13 is a plan view of an example semiconductor light emitting device. FIG. 14 is a cross-sectional view XIV-XIV of the example semiconductor light emitting device shown in FIG. 13 . The semiconductor light emitting device has the differential circuit board 400 . What has been described above in connection with FIGS. 1-9 applies to the differential circuit board 400 .

The optical semiconductor device 434 is mounted on the differential circuit board 400 . The optical semiconductor device 434 has a semiconductor laser 436 for light emission. The optical semiconductor device 434 has an electro-absorption modulator 438 for modulating light by the electro-absorption effect. The optical semiconductor device 434 is an electro-absorption modulator integrated laser in which a semiconductor laser 436 and an electro-absorption modulator 438 are integrated.

15 is a cross-sectional view of an exemplary optical semiconductor device 434 (eg, the cross-sectional views of the exemplary semiconductor light emitting device described above with reference to FIGS. 13-14). The semiconductor laser 436 and the electro-absorption modulator 438 are built into the semiconductor substrate 440 . The semiconductor substrate 440 is an n-type InP substrate. Semiconductor laser 436 has multiple quantum wells 446A on semiconductor substrate 440 interposed between lower SCH (separation confinement heterostructure) layer 442A and upper SCH layer 444A. There is a diffraction grating layer 448 on the upper SCH layer 444A, covered with a cladding layer 450A. The laser 436 may be in a distributed Bragg reflector (DBR) configuration or a distributed feedback (DFB) configuration.

Electroabsorption modulator 438 has multiple quantum wells 446B above semiconductor substrate 440 interposed between lower SCH layer 442B and upper SCH layer 444B. The upper SCH layer 444B is covered by the cladding layer 450B. The cladding layer 450A and the cladding layer 450B may be the same material or different materials. The electro-absorption modulator 438 and the semiconductor laser 436 may not be integrated on the same semiconductor substrate 440 , but may be formed on different semiconductor substrates 440 .

The optical semiconductor device 434 has a lower electrode 452 (eg, a cathode) common to the electroabsorption modulator 438 and the semiconductor laser 436 . The lower electrode 452 may be formed on the electro-absorption modulator 438 and the semiconductor laser 436, respectively. The semiconductor laser 436 has an upper electrode 454 (eg, an anode) for applying a DC voltage. A DC voltage is applied between the upper electrode 454 and the lower electrode 452 . Optical semiconductor device 434 has upper electrode 456 (eg, anode) of electroabsorption modulator 438 . An AC voltage is applied between the upper electrode 456 and the lower electrode 452 .

The optical semiconductor device 434 (the lower electrode 452 ) is opposed to the first conductor line 422 and has no protrusion. The first line width W1 of the first conductor line 422 (eg, as shown in FIG. 13 ) is set to a size sufficient to mount the optical semiconductor device 434 , and is constant in the extending direction. The upper electrode 456 of the electroabsorption modulator 438 is connected to the second conductor wire 424 by a wire 468 . Although not shown, the upper electrode 454 of the semiconductor laser 436 is electrically connected to a DC power source through a connection means such as a wire.

The differential circuit board 400 has pads 458 (eg, as shown in FIG. 14 ) disposed on the first surface 412 and adjacent the first conductor lines 422 in the opposite direction from the second conductor lines 424 . A pad 458 is provided on the first portion 416 . The differential circuit board 400 has a matching resistor 460 connected in series between the pad 458 and the first conductor line 422 . A matching resistor 460 is connected for impedance matching. The semiconductor light emitting device has a wire 470 configured to connect the upper electrode 456 of the electroabsorption modulator 438 and the pad 458 . Therefore, matching resistor 460 is connected in parallel to electro-absorption modulator 438 .

High-frequency signals for differential signal transmission are input to the first conductor line 422 and the second conductor line 424 . A high frequency signal is applied to the lower electrode 452 and the upper electrode 456 of the electro-absorption modulator 438, respectively, for driving it by a differential signal.

16 is a plan view of an example semiconductor light emitting device. The second conductor line 524 has a stub 562 extending in the opposite direction to the first conductor line 522 . Stub 562 includes the same material or the same laminate as second conductor wire 524 . The first conductor line 522 has a portion adjacent to the pad 558 and a portion adjacent to the second conductor line 524 extending from the stub 562 .

The second conductor line 524 has a stub 562 so as to be closer in electrical characteristics to the first conductor line 522 connected to the matching resistor 560 and the pad 558 . As a result, the high frequency lines of the first conductor line 522 and the second conductor line 524 become closer in high frequency characteristics, thereby improving the signal quality of the differential signal drive. What was described above in connection with Figures 13-15 applies here.

17 is a plan view of an example semiconductor light emitting device. 18 is a XVIII-XVIII cross-sectional view of the example light emitting device shown in FIG. 17 .

The example semiconductor light emitting device has a differential circuit board 600 . What was described above with respect to FIGS. 11 and 13 applies to the differential circuit board 600 . The semiconductor example light emitting device has an optical semiconductor device 634 . What was described above with respect to FIG. 13 applies to the optical semiconductor device 634 .

Each first portion 616 on the first surface 612 includes a routing area 630 in which a first conductor line 622 is formed. Each first portion 616 on the first surface 612 includes an edge region 632 adjacent to the routing region 630 with an edge width Wm in the opposite direction to the second conductor line 624 (eg, as described above with respect to FIG. 11 ). The edge widths Wm of these first portions 616 are equal. A pad 658 is provided on the first portion 616 .

In each channel CH, a high-frequency signal for differential signal transmission is input to the first conductor line 622 and the second conductor line 624 . High frequency signals are applied to the lower electrode (not shown) and upper electrode 656 of the electro-absorption modulator 638, respectively, for differential signal driving.

FIG. 19 is a plan view of an example semiconductor light emitting device. FIG. 20 is a XX-XX cross-sectional view of the example semiconductor light emitting device shown in FIG. 19 .

The differential circuit board 700 between adjacent channels CH has inter-channel conductors 764 (eg, vias, such as filled vias or via vias) disposed on the first surface 712 . The differential circuit board 700 has connecting conductors 766 that connect the ground conductors 726 and the inter-channel conductors 764 and penetrate the dielectric layer 710 . The connecting conductor 766 penetrates the first portion 716 and does not penetrate the second portion 718 . A pad 758 is provided on the first portion 716 .

Inter-channel conductors 764 connected to ground conductors 726 are disposed between adjacent channels CH, thereby reducing electrical crosstalk between adjacent channels CH.

21 is a cross-sectional view of an example semiconductor light emitting device. The differential circuit board 800 has inter-channel conductors 864 disposed on the first surface 812 between adjacent channels CH. Differential circuit board 800 penetrates dielectric layer 810 and has connecting conductors 866 that connect ground conductors 826 and inter-channel conductors 864 . The connecting conductor 866 penetrates the second portion 818 but not the first portion 816 . A pad 858 is provided on the second portion 818 .

The inter-channel conductors 864 are formed on the thin second portion 818, making the vias smaller. For example, small diameter through holes can be formed. Therefore, a smaller semiconductor light emitting device is provided.

The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit embodiments to the precise form disclosed. Modifications and variations may be made in light of the above disclosure or may be acquired from practice of implementation. Furthermore, any of the embodiments described herein may be combined unless the foregoing disclosure expressly provides a reason why one or more embodiments cannot be combined.

Even if specific combinations of features are cited in the claims and/or disclosed in the specification, these combinations are not intended to limit the disclosure of various embodiments. Indeed, many of these features may be combined in ways not specifically recited in the claims and/or disclosed in the specification. Although each dependent request item listed below may directly depend on only one request item, the disclosure of various embodiments includes each dependent request item as well as every other request item in the set of request items. As used herein, phrases referring to "at least one" of a list of items refer to any combination of those items, including individual components. For example, "at least one of a, b, or c" is intended to encompass a, b, c, a-b, a-c, b-c, and a-b-c, as well as any combination of multiples of the same item.

No element, act, or instruction used herein should be construed as critical or essential unless explicitly described as such. Also, as used herein, the articles "a" and "an" are intended to include one or more items, and can be used interchangeably with "one or more." Also, as used herein, the article "the" is intended to include the one or more items associated with the article "the", and can be used interchangeably with "the one or more." Also, as used herein, the term "collection" is intended to include one or more items (eg, related items, unrelated items, or a combination of related and unrelated items), and can be used interchangeably with "one or more." When only one item is intended to be used, the phrase "only one" or similar language is used. Furthermore, as used herein, the terms "has," "has," "includes," and the like are intended to be open-ended terms. Furthermore, the phrase "based on" is intended to mean "based at least in part on" unless expressly stated otherwise. Also, as used herein, the term "or" when used in tandem is intended to be inclusive and can be used interchangeably with "and/or" unless expressly stated otherwise (eg, if used in conjunction with "either" or "only one of" a" used in combination). Also, for ease of description, spatially relative terms, such as "below," "lower," "above," "over," etc., may be used herein to describe one element or feature as being different from another (other) shown in the figures. ) component or feature relationship. In addition to the orientation shown in the figures, spatially relative terms are intended to encompass different orientations of the device, device, and/or element in use or operation. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

10: Dielectric layer 10A: Layer 10B: Layer 12: First surface 14: Second Surface 16: Part One 18: Part Two 20: steps 20B: Steps 22: The first conductor line 24: Second conductor wire 26: Ground conductor 26A: First ground conductor 26B: Second ground conductor 28: Part Three 210: Dielectric Layer 212: First Surface 214: Second Surface 216: Part One 218: Part II 220: Steps 222: first conductor line 224: Second conductor line 226: Ground conductor 230: Routing area 232: Edge Region 312: First Surface 314: Second Surface 316: Part One 320: Steps 322: first conductor line 324: Second conductor line 330: Routing area 400: Differential circuit board 416: Part 1 422: first conductor line 424: Second conductor line 434: Optical Semiconductor Devices 436: Semiconductor Laser 438: Electro-absorption modulator 440: Semiconductor substrate 442A: Lower SCH (Separation Confinement Heterostructure) Layer 442B: Upper SCH layer 444A: Upper SCH layer 444B: Upper SCH layer 446A: Multiple Quantum Wells 446B: Multiple Quantum Wells 448: Diffraction grating layer 450A: Cladding 450B: Cladding 452: Lower electrode 454: Upper electrode 456: Upper electrode 458: Pad 460: Matching resistor 468: Wire 470: Wire 522: first conductor line 524: Second conductor line 558: Pad 560: Matching resistor 562: Stub 600: Differential circuit board 612: First Surface 616: Part 1 622: first conductor line 624: Second conductor line 630: Routing area 632: Edge Region 634: Optical Semiconductor Devices 638: Electro-absorption modulator 656: Upper electrode 658: Pad 700: Differential circuit board 710: Dielectric layer 712: First Surface 716: Part 1 718: Part Two 726: Ground conductor 758: Pad 764: Conductor between channels 766: Connecting conductors 800: Differential circuit board 810: Dielectric layer 816: Part 1 818: Part II 826: Ground conductor 858: Pad 864: Conductor between channels 866: Connecting conductors CH: channel d1: distance d2: distance h1: first thickness h2: second thickness W1: first line width W2: Second line width Wm: Margin width

[Fig. 1] is a plan view of an example differential circuit board described here.

[ FIG. 2 ] is a II-II sectional view of the example differential circuit board shown in FIG. 1 .

[FIG. 3] is a diagram of a simulation model of the example differential circuit board described here.

[FIG. 4] is a diagram of a simulation model of the example differential circuit board described here.

[Fig. 5] is a graph of frequency characteristics related to the example differential circuit board described here obtained by simulation using a three-dimensional electric field analysis tool.

[FIG. 6] is a cross-sectional view of an example differential circuit board described here.

[FIG. 7] is a cross-sectional view of an example differential circuit board described herein.

[FIG. 8] is a cross-sectional view of an example differential circuit described herein.

[ FIG. 9 ] is a cross-sectional view of an example differential circuit board described here.

[ FIG. 10 ] is a plan view of an example differential circuit board described here.

[ FIG. 11 ] is an XI-XI cross-sectional view of the example differential circuit board shown in FIG. 10 .

[ FIG. 12 ] is a cross-sectional view of an example differential circuit board described here.

[ FIG. 13 ] is a plan view of an example semiconductor light emitting device described herein.

[ FIG. 14 ] is an XIV-XIV cross-sectional view of the example semiconductor light emitting device shown in FIG. 13 .

[ FIG. 15 ] is a cross-sectional view of an example optical semiconductor device described herein.

[ FIG. 16 ] is a plan view of an example semiconductor light emitting device described herein.

[ FIG. 17 ] is a plan view of an example semiconductor light emitting device described herein.

[ Fig. 18 ] is an XVIII-XVIII cross-sectional view of the example light-emitting device shown in Fig. 17 .

[ FIG. 19 ] is a plan view of an example semiconductor light emitting device described herein.

[ FIG. 20 ] is a XX-XX cross-sectional view of the example semiconductor light emitting device shown in FIG. 19 .

[ FIG. 21 ] is a cross-sectional view of an example semiconductor light emitting device described herein.

10: Dielectric layer

12: First surface

14: Second Surface

16: Part One

18: Part Two

20: steps

22: The first conductor line

24: Second conductor line

26: Ground conductor

d1: distance

d2: distance

h1: first thickness

h2: second thickness

W1: first line width

W2: Second line width

Claims (20)

A differential circuit board, comprising: a dielectric layer having a first surface and a second surface, wherein the dielectric layer has a first portion having a first thickness between the first surface and the second surface, and having a first portion between the first surface and the second surface A second portion having a second thickness smaller than the first thickness between a surface and the second surface; a first conductor line having a first line width, wherein the first conductor line is disposed at all of the first portion on the first surface; a second conductor line having a second line width smaller than the first line width, wherein the second conductor line is disposed on the first surface of the second portion; and disposed on the second surface of the first part and the ground conductor on the second surface of the second part, wherein the ground conductor overlaps the first conductor line and the second conductor line, wherein the The first conductor line and the second conductor line are differential transmission lines. The differential circuit board of claim 1, wherein the ground conductor is continuous on the second surface of the first portion and the second surface of the second portion. The differential circuit board of claim 1, wherein: the ground conductor includes a first ground conductor disposed on the second surface of the first portion; and the ground conductor includes a first ground conductor disposed on the second surface a second ground conductor on a portion of the second surface, wherein the second conductor is separated from the first ground conductor. The differential circuit board of claim 1, wherein the dielectric layer has a third portion between the first portion and the second portion, the third portion having a varying thickness, wherein the The three parts do not overlap the first conductor line and the second conductor line. The differential circuit board of claim 1, wherein the second surface has a level difference between the first portion and the second portion, wherein the level difference is lower than the first conductor line and the center of the space between the second conductor lines. The differential circuit board according to claim 1, wherein the second conductor line is located at the center of the second portion in the arrangement direction of the first conductor line and the second conductor line. The differential circuit board according to claim 1, wherein: the dielectric layer includes a plurality of first parts; the dielectric layer includes a plurality of second parts; the first conductor lines are arranged on the plurality of first parts on the first surface of each of the parts; the second conductor wire is disposed on the first surface of each of the plurality of second parts; and the first conductor wire and the second conductor wire are multiple Differential transmission lines in each channel. The differential circuit board according to claim 7, wherein: each of the plurality of first portions includes, on the first surface, a wiring area in which the first conductor line is formed, and is included in a connection with the An edge region adjacent to the wiring region in the opposite direction of the second conductor line, wherein the edge region has an edge width, and wherein each of the plurality of first portions has a width equal to the edge width. The differential circuit board according to claim 7, wherein each of the plurality of first portions includes, on the first surface, a wiring area in which the first conductor line is formed, and is in contact with the first portion. The opposite directions of the two conductor lines do not include the edge region adjacent to the wiring region. The differential circuit board of claim 7, further comprising: an inter-channel conductor on the first surface and between adjacent ones of the plurality of channels; and a connecting conductor, the connecting conductor being configured To penetrate the dielectric layer and connect ground conductors and inter-channel conductors. The differential circuit board of claim 10, wherein the connecting conductor is configured to penetrate the first portion but not the second portion. The differential circuit board of claim 10, wherein the connecting conductor is configured to penetrate the second portion but not the first portion. A semiconductor light-emitting device, comprising: a differential circuit board; and an optical semiconductor device mounted on the differential circuit board, wherein: the differential circuit board comprises: a dielectric layer having a first surface and a second surface, wherein the dielectric layer has a first portion having a first thickness between the first surface and the second surface, and has a thickness between the first surface and the second surface that is smaller than the first thickness a second portion of a thickness of a second thickness; a first conductor line having a first line width, wherein the first conductor line is disposed on the first surface of the first portion; having a thickness smaller than the first line a second conductor line of a wide second line width, wherein the second conductor line is disposed on the first surface of the second portion; and disposed on the second surface and the second surface of the first portion a ground conductor on the second surface of the second portion, wherein the ground conductor overlaps the first conductor line and the second conductor line, wherein the first conductor line and the second conductor line are Differential transmission line. The semiconductor light-emitting device according to claim 13, wherein the optical semiconductor device is an electro-absorption modulator integrated laser, in which an electro-absorption modulator and a semiconductor laser are integrated; the electro-absorption modulator integrated laser includes electro-absorption A lower electrode shared by the modulator and the semiconductor laser, and includes an upper electrode of the electro-absorption modulator; the lower electrode is opposite to the first conductor line without protrusions; and the upper electrode is connected to the the second conductor wire. The semiconductor light emitting device of claim 14, further comprising: a pad on the first surface, the pad is adjacent to the first conductor line in a direction opposite to the second conductor line; connected in series a matching resistor between the pad and the first conductor wire; and a wire configured to connect the upper electrode and the pad. The semiconductor light emitting device of claim 15, wherein the pad is on the first portion. The semiconductor light emitting device of claim 15, wherein the pad is on the second portion. The semiconductor light emitting device of claim 15, wherein: the second conductor line has a stub extending in an opposite direction to the first conductor line, and the first conductor line has a stub adjacent to the pad and a portion adjacent to the portion of the second conductor wire where the stub extends. The semiconductor light emitting device of claim 14, wherein the second surface has a level difference between the first portion and the second portion, wherein the level difference is lower than the first conductor line and the second portion the center of the space between the second conductor lines. The semiconductor light emitting device according to claim 14, wherein the second conductor line is located at the center of the second portion in the arrangement direction of the first conductor line and the second conductor line.

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