TW202206866A - Package structure having photonic integrated circuit - Google Patents

Abstract

A package structure having a photonic integrated circuit (IC) is provided. The package structure includes a substrate, a chip and an optical module. The chip includes a light wave guide structure and a recess. The light wave guide structure is disposed adjacent to the recess. The recess faces the substrate. The chip connects to the substrate by flip chip. The optical module is disposed in the recess of the chip.

Description

Package structure with photonic integrated circuit

The present disclosure relates to a package structure with a photonic integrated circuit. Furthermore, the present disclosure relates to a package structure in which an optical module is embedded in a photonic integrated circuit.

FIG. 1 is a schematic diagram of a conventional packaging structure 1 . As shown in FIG. 1 , the package structure 1 includes a chip 10 , an optical module 20 , a carrier 30 and a circuit board 40 . The chip 10 and the optical module 20 are attached to the carrier 30 by, for example, resin, and the backplane 41 made of ceramic or silicon is attached to the back of the circuit board 40 by, for example, resin, and is at least partially removed from the circuit board 40 . The opening area of the circuit board 40 is exposed, and the carrier 30 is fixed on the backplane 41 exposed from the opening area of the circuit board 40 by, for example, resin bonding, and the circuits on the circuit board 40 are correspondingly arranged around the carrier 30 . The opening area of the circuit board 40 is used to reduce the protruding height of the chip 10 and the optical module 20 after being disposed on the circuit board 40 .

In the conventional package structure 1, since the thickness of the optical module 20 is generally higher than the thickness of the chip 10, in order to set the optical module 20, the chip 10 and the optical module 20 are simultaneously supported by the carrier 30, and the chip 10 The optical module 20 is bonded to the circuit on the circuit board 40 by wire bonding.

However, since the circuits on the chip 10 and the optical module 20 and the circuit board 40 are bonded by wire bonding, the RF performance of the package structure 1 is affected by the length of the bonding wires. That is, the arrangement positions of the circuits on the circuit board 40 , the chip 10 and the optical module 20 must be relatively accurate. If there are slight differences in the relative positions and designs, the lengths of the bonding wires may be different, thereby making the RF of the package structure 1 . Performance is affected. In other words, in the conventional package structure 1 , the fault tolerance rate when disposing the circuit on the circuit board 40 , the chip 10 and the optical module 20 is low. In addition, the chip 10 and the optical module 20 are pasted and fixed on the carrier 30, and the carrier 30 is pasted and fixed on the backplane 41 on the back of the circuit board 40. After the pasting and fixing, it is difficult to separate and combine again, which also makes the conventional structure difficult to rework ( rework) problem.

Furthermore, since the chip 10 and the optical module 20 are disposed on the carrier 30 adjacent to each other, problems such as crosstalk may also occur in the electrical signals of each other. In addition, in the conventional package structure 1, it is necessary to provide optical fibers for the optical path of the incident light and the optical path of the outgoing light, which increases the cost.

The above description of "prior art" is for background only, and does not acknowledge that the above description of "prior art" discloses the subject matter of the present disclosure, does not constitute the prior art of the present disclosure, and any description of the above "prior art" shall not be part of this case.

Embodiments of the present disclosure provide a package structure including a substrate, a chip, and an optical module. The chip has an optical waveguide structure and a concave portion. The optical waveguide structure is adjacent to the concave portion. The concave portion faces the substrate, and the flip chip is bonded to the substrate. The optical module is arranged in the concave part of the chip.

In some embodiments, the substrate has a recess for an optical module, and the optical module extends into the recess for an optical module.

In some embodiments, the optical module includes a light source and a lens, and the light generated by the light source passes through the lens and then enters the optical waveguide structure of the chip. In some embodiments, the wafer is a flip-chip photonic integrated circuit.

In some embodiments, the wafer is connected to an optical waveguide connection assembly.

In some embodiments, the substrate has a recess for the optical waveguide connection component, and the optical waveguide connection component extends into the recess for the optical waveguide connection component.

Embodiments of the present disclosure provide another package structure including a substrate, a first chip, a second chip, a third chip, and an optical module. The first flip chip is bonded to the substrate. The second wafer flip chip is bonded to the substrate and is spaced apart from the first wafer. The third wafer is disposed on the first wafer and the second wafer. The optical module is arranged on the third chip, and is located between the substrate and the third chip.

In some embodiments, the third wafer has a concave portion facing the substrate and located between the first wafer and the second wafer, and the optical module is located in the concave portion.

In some embodiments, the substrate has a recess for the optical module, and the optical module extends into the recess for the optical module. In some embodiments, the optical module includes a light source and a lens, and the light generated by the light source passes through the lens and then enters the first chip, the second chip or the third chip.

In some embodiments, the third wafer is connected to an optical waveguide connection assembly.

In some embodiments, the substrate has a recess for the optical waveguide connection component, and the optical waveguide connection component extends into the recess for the optical waveguide connection component.

In the present disclosure, the chip of the package structure is bonded to the substrate by flip-chip, and the optical module is disposed between the substrate and the chip. Therefore, since the chips of the package structure of the present disclosure are connected by flip-chip bonding, the problem of affecting the RF performance caused by the length of the bonding wires during wire bonding can be avoided. That is, in the package structure of the present disclosure, the relative position error tolerance of the chip, the optical module and the substrate is higher than that of the conventional package structure. Moreover, after the packaging structure of the present disclosure encapsulates the substrate, the chip and the optical module, it can be directly connected to other circuit boards without a carrier. In other words, the packaging structure of the present disclosure can be easily re-separated from other circuit boards. Combined, ie easier to rework than conventional structures.

In addition, in the package structure of the present disclosure, the optical modules are embedded in the chip, for example, so the problem of crosstalk can be avoided by separating the electrical signal paths from each other, and there is no need to separate the optical path of the incident light and the optical path of the outgoing light. The optical path is provided with optical fiber, which can reduce the cost.

The foregoing has outlined rather broadly the technical features and advantages of the present disclosure in order that the detailed description of the present disclosure that follows may be better understood. Additional technical features and advantages that form the subject of the scope of the present disclosure are described below. It should be understood by those skilled in the art to which the present disclosure pertains that the concepts and specific embodiments disclosed below can be readily utilized to modify or design other structures or processes to achieve the same purposes of the present disclosure. Those skilled in the art to which the present disclosure pertains should also understand that such equivalent constructions cannot depart from the spirit and scope of the present disclosure as defined by the appended claims.

Embodiments or examples of the disclosure shown in the drawings are described in specific languages. It should be understood that this is not intended to limit the scope of the present disclosure. Any variation or modification of the described embodiments and any further application of the principles described herein would normally occur to those of ordinary skill in the art to which this disclosure relates. Reference numerals may be repeated in various embodiments, but features in one embodiment are not necessarily used in another embodiment even if they have the same reference numerals.

It will be understood that although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers or sections, these elements, components, regions, layers or sections should not be limited by these term. These terms are only used to distinguish one element, component, region, layer or section from another region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the inventive concept of the present disclosure.

The terms used in this disclosure are for the purpose of describing particular example embodiments only, and are not intended to limit the inventive concept. As used herein, the singular forms "a" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should be understood that the word "comprising" as used in the specification refers exclusively to the presence of a stated feature, integer, step, operation, element or component, but does not exclude one or more other features, integers, steps, operations, elements, components or the existence of its group.

2 is a schematic perspective view of a package structure 2 according to the disclosure, FIG. 3A is a cross-sectional view of the package structure 2 along the line A-A in FIG. 2 , and FIG. 3B is a cross-sectional view of the package structure 2 along the line B-B in FIG. 2 .

As shown in FIG. 2 , FIG. 3A and FIG. 3B , in some embodiments, the package structure 2 includes a substrate 200 , a chip 210 and an optical module 220 . The substrate 200 is, for example, a circuit board, and its circuit structure is not limited, for example, it can be a multi-layer circuit structure or other suitable circuit structures. In some embodiments, a plurality of bumps or solder balls 201 may be disposed on the other side of the substrate 200 relative to the wafer 210 , so that the package structure 2 can be electrically connected to other components.

The wafer 210 has an optical waveguide structure 211 and a concave portion 212 . The optical waveguide structure 211 is adjacent to the concave portion 212 , and the concave portion 212 faces the substrate 200 . In other words, the concave portion 212 is located between the wafer 210 and the substrate 200 , and the optical waveguide structure 211 is located on one side of the concave portion 212 . Further, the shape of the concave portion 212 is not limited, and it can be a long groove-like shape extending over both sides of the wafer 210 (as shown in FIG. 3A , the wafer 210 is in the shape of a ), or a groove-like shape that does not extend over the wafer 210 . Both sides of the wafer 210 . In addition, it should be noted that the structure of the optical waveguide structure 211 is not limited. The chip 210 is bonded to the substrate 200 by flip chip. In some embodiments, a plurality of micro-bumps or solder balls 213 are disposed between the chip 210 and the substrate 200 to electrically connect the chip 210 and the substrate 200 . The wafer 210 may be, for example, a flip-chip photonic integrated circuit (PIC).

The optical module 220 is disposed in the concave portion 212 of the chip 210 . The optical module 220 is located between the chip 210 and the substrate 200 and is electrically connected to the chip 210 and the substrate 200 . In some embodiments, the optical module 220 can be electrically connected to the substrate 200 via the chip 210 , that is, the optical module 220 is disposed on the chip 210 and is electrically connected to the substrate 200 by flip-chip bonding to the substrate 200 via the chip 210 .

4A is a bottom view of a chip 210 and an optical module 220 according to the disclosure, and FIG. 4B is a side view of a chip 210 and an optical module 220 according to the disclosure. As shown in FIG. 4A , in some embodiments, the optical module 220 may have a light source 221 and a lens 222 , and the light source 221 and the lens 222 are disposed in the concave portion 212 . The light generated by the light source 221 can be incident on the optical waveguide structure 211 of the chip 210 through the lens 222 along the optical path L, and output to an external element (eg, the optical fiber 91 ) connected to the chip 210 . As shown in FIG. 4B , the light source 221 of the optical module 220 is, for example, flip-chip bonded to the substrate 200 via the chip 210 to be electrically connected to the substrate 200 (eg, via path E). The light source 221 may be, for example, a laser diode (Laser Diode) or a light emitting diode (Light Emitting Diode).

To sum up, the chip 210 of the package structure 2 of the present disclosure is bonded to the substrate 200 by flip chip, and the optical module 220 is disposed between the substrate 200 and the chip 210 . Therefore, since the chips 210 of the package structure 2 are connected by flip-chip bonding, the problem that the RF performance is affected by the length of the bonding wires during wire bonding can be avoided. That is, in the package structure 2, the relative position error tolerance of the chip 210, the optical module 220 and the substrate 200 is higher than that of the conventional package structure 1 (as shown in FIG. 1).

FIG. 3C is a schematic perspective view of a package structure 2 combined with the circuit board 400 according to the disclosure, and FIG. 3D is a cross-sectional view of the package structure 2 along the line A-A of FIG. 3C . As shown in FIG. 3C and FIG. 3D , the package structure 2 does not need to be fixed to the circuit board 400 by a carrier, which can also increase the degree of freedom of rework of the package structure 2 .

In addition, in the package structure 2 of the present disclosure, the optical module 220 is embedded in the concave portion 212, for example, so that the electrical signal path of the optical module 220 (eg, the left path E in FIG. 4B ) and the electrical signal of the chip 210 can be connected The signal paths (eg, the right path E in FIG. 4B ) are different to avoid crosstalk. Furthermore, the package structure 2 of the present disclosure does not need to separately arrange optical fibers for the optical path of the incident light and the optical path of the outgoing light, so that the cost is reduced.

FIG. 5A is a schematic diagram of another package structure 5 disclosed in the present disclosure, and FIG. 5B is a schematic diagram of a connection manner of the package structure 5 of FIG. 5A and the optical waveguide connecting element 9 . In some embodiments, the optical waveguide connection assembly 9 is connected to the wafer 510 by being suspended from the wafer 510 .

As shown in FIG. 5A and FIG. 5B , the package structure 5 includes a substrate 500 , a chip 510 and an optical module 520 . The structures of the chip 510 and the optical module 520 are similar to those of the chip 210 and the optical module 220 in FIGS. 2 , 3A, 3B, 4A, and 4B, and are not repeated here.

The difference between the package structure 5 and the package structure 2 shown in FIGS. 2 , 3A, 3B, 4A, and 4B is that the substrate 500 has a recess 502 for the optical waveguide connection element, and the recess 502 for the optical waveguide connection element is connected to the chip 510 in plan view. There is no overlap, and the concave portion 502 for the optical waveguide connection assembly is not covered by the wafer 510 . However, it is not limited, the concave portion 502 for the optical waveguide connection assembly may also be partially covered by the wafer 510 , that is, the concave portion 502 for the optical waveguide connection assembly is at least partially disposed outside the area of the substrate 500 overlapping the wafer 510 .

Therefore, in addition to the above-mentioned various functions of the package structure 5, when the size of the optical waveguide connection element 9 is large, the optical waveguide connection element 9 can be suspended by the recess 502 for the optical waveguide connection element of the substrate 500. When it is connected to the wafer 510 in the form of the optical waveguide connection element 9, the optical waveguide connection element 9 will not be affected by the substrate 500, but can extend into the recess 502 for the optical waveguide connection element of the substrate 500, so that the contact between the optical waveguide connection element 9 and the substrate 500 can be avoided. In order to make the optical fiber 91 of the optical waveguide connection assembly 9 more accurately butt-join the optical waveguide structure 511 of the wafer 510 . It should be noted that when the size of the optical waveguide connection assembly 9 is small (for example, it does not extend to the substrate 500 ), the recess 502 for the optical waveguide connection assembly may not be provided.

FIG. 6A is a schematic diagram of another substrate 600 of the present disclosure, and FIG. 6B is a schematic diagram of another packaging structure 6 of the present disclosure.

As shown in FIG. 6A and FIG. 6B , the package structure 6 includes a substrate 600 , a chip 610 and an optical module 640 . The structures of the chip 610 and the optical module 640 are similar to those of the chip 210 and the optical module 220 in FIGS. 2 , 3A, 3B, 4A, and 4B, and will not be repeated here.

The difference between the package structure 6 and the package structure 2 shown in FIGS. 2 , 3A and 3B is that the substrate 600 has a concave portion 602 for optical waveguide connection components and a concave portion 603 for optical modules, and the concave portion 602 for optical waveguide connection components is disposed on the substrate 600 Except for the area overlapping with the wafer 610, the concave portion 603 for the optical module is disposed on the substrate 600 in the area overlapping the concave portion 612 of the wafer 610. However, it is not limited. Outside the overlapping area of the wafers 610 , the concave portion 603 for the optical module may be at least partially disposed in the area of the substrate 600 overlapping the concave portion 612 of the wafer 610 . The optical module 640 is disposed on the wafer 610 and extends into the recess 603 for the optical module. It should be noted that the connection between the concave portion 602 for the optical waveguide connecting assembly and the concave portion 603 for the optical module is taken as an example for illustration, but it is not limited, the concave portion 602 for the optical waveguide connecting assembly and the concave portion 603 for the optical module can also be They are not communicated with each other. For example, a part of the substrate 600 is between the optical waveguide connection assembly recess 602 and the optical module recess 603 to isolate the optical waveguide connection assembly recess 602 and the optical module recess 603 . Furthermore, in some embodiments, the concave portion 602 for the optical waveguide connection assembly or the concave portion 603 for the optical module may be provided only on the substrate 600 .

Therefore, in addition to the above-mentioned various functions of the package structure 6, when the size of the optical waveguide connection element 9 is large, the optical waveguide connection element 9 (eg 5B) when connected to the wafer 610 in the form of suspension, the optical waveguide connection element 9 will not be affected by the substrate 600, but can extend into the recess 602 for the optical waveguide connection element of the substrate 600, thereby avoiding the optical waveguide connection The component 9 is in contact with the substrate 600 , so that the optical fiber 91 of the optical waveguide connection component 9 (as shown in FIG. 5B ) is more accurately connected with the optical waveguide structure 611 of the wafer 610 . The recessed portion 603 for the optical module of the substrate 600 can reduce the required depth of the recessed portion 612 of the chip 610 , for example, and can also increase the accommodating space between the substrate 600 and the chip 610 for accommodating the optical module 640 . In other words, the concave portion 612 of the chip 610 and the concave portion 603 for the optical module of the substrate 600 can be matched with each other to form a accommodating space for accommodating the optical module 640, so that the depth of the concave portion 612 or the concave portion 603 for the optical module can be adjusted according to requirements. Make adjustments (eg, make the recess 612 shallower, and correspondingly make the optical module recess 603 darker, etc.), while maintaining the required space for accommodating the optical module 640 .

FIG. 7 is a schematic diagram of another packaging structure 7 of the disclosure. In some embodiments, the package structure 7 includes a substrate 700 , a first die 710 , a second die 720 , a third die 730 , and an optical module 740 . The substrate 700 is, for example, a circuit board, and its circuit structure is not limited, for example, it can be a multi-layer circuit structure, or other suitable circuit structures. In some embodiments, a plurality of bumps or solder balls 701 may be disposed on the other side of the substrate 700 relative to the first wafer 710 , the second wafer 720 and the third wafer 730 , so that the substrate 700 can be connected with other components. Electrical connection.

The first wafer 710, the second wafer 720 and the third wafer 730 may be the same wafer or different wafers. The first chip 710 is flip-chip bonded to the substrate 700 , the second chip 720 is flip-chip bonded to the substrate 700 and is spaced apart from the first chip 710 , and the third chip 730 is disposed on the first chip 710 and the second chip 720 . In some embodiments, the third wafer 730 is flip-chip bonded to the first wafer 710 and the second wafer 720 . In some embodiments, the third die 730 is electrically connected to the first die 710 and/or the second die 720 .

In some embodiments, the first chip 710 and the second chip 720 may be dummy chips for forming the space 712 together with the third chip 730 . In some embodiments, the third die 730 is stacked on the first die 710 and the second die 720 and is not electrically connected to the first die 710 and/or the second die 720 . In other embodiments, the first wafer 710 , the second wafer 720 and the third wafer 730 may be wafers with different functions, and together form the space 712 . Any or all of the first wafer 710 , the second wafer 720 and the third wafer 730 may have the optical waveguide structure 711 . In this example, the first wafer 710 has the optical waveguide structure 711 as an example for illustration, but it is not limited. The optical waveguide structure 711 is adjacent to the space 712 , and the space 712 faces the substrate 700 . In other words, the space 712 is located between the substrate 700, the first wafer 710, the second wafer 720, and the third wafer 730 and the substrate 700, and the optical waveguide structure 711 is located at one side of the space 712 (for example, disposed on the first wafer 710). In addition, it should be noted that the structure of the optical waveguide structure 711 is not limited. In some embodiments, a plurality of micro-bumps or solder balls 713 are disposed between the first wafer 710 , the second wafer 720 and the substrate 700 to electrically connect the first wafer 710 , the second wafer 720 and the substrate 700 . The first wafer 710 , the second wafer 720 and the third wafer 730 may be, for example, flip-chip photonic integrated circuits.

The optical module 740 is disposed on the third chip 730 and is located between the substrate 700 and the third chip 730 . The optical module 740 is located in the space 712 formed by the first chip 710 , the second chip 720 and the third chip 730 , and is electrically connected to the third chip 730 and the substrate 700 . The optical module 740 may include a light source and a lens. The light generated by the light source passes through the lens and then enters the first chip 710 , the second chip 720 or the third chip 730 . The structure of the optical module 740 is similar to that of the optical module 220 in FIGS. 2 , 3A, 3B, 4A, and 4B, and details are not described herein again.

To sum up, in the package structure 7 of the present disclosure, the space 712 is formed by the first chip 710 , the second chip 720 and the third chip 730 , and the optical module 740 is disposed in the space 712 . Therefore, since the first chip 710 , the second chip 720 and the third chip 730 of the package structure 7 can be connected by flip-chip bonding, the problem that the RF performance is affected by the length of the bonding wires during wire bonding can be avoided. That is, in the package structure 7, the error tolerance rate of the relative positions of the first chip 710, the second chip 720, the third chip 730, the optical module 740 and the substrate 700 is higher than that of the conventional package structure 1 (as shown in FIG. 1 ). ). Moreover, the package structure 7 does not need to be fixed to the circuit board (not shown) by a carrier, which can also increase the degree of freedom of rework of the package structure 7 .

In addition, in the package structure 7 of the present disclosure, the optical module 740 is embedded in the space 712 formed by the first chip 710 , the second chip 720 and the third chip 730 . The paths are different from the electrical signal paths of the first chip 710 , the second chip 720 and the third chip 730 to avoid crosstalk. Furthermore, the package structure 2 of the present disclosure does not need to separately arrange optical fibers for the optical path of the incident light and the optical path of the outgoing light, so that the cost is reduced.

FIG. 8 is a schematic diagram of another packaging structure 8 of the disclosure. As shown in FIG. 8 , the package structure 8 includes a substrate 800 , a first chip 810 , a second chip 820 , a third chip 830 and an optical module 840 . The structures of the first chip 810 , the second chip 820 , the third chip 830 and the optical module 840 are similar to those of the first chip 710 , the second chip 220 , the third chip 730 and the optical module 740 in FIG. 7 , and here No longer.

The difference between the package structure 8 and the package structure 7 in FIG. 7 is that the substrate 800 has a recess 803 for optical modules, and the recess 803 for optical modules is disposed on the substrate 800 and the first chip 810 , the second chip 820 and the third chip 830 The formed space 812 overlaps the region. However, it is not limited, and the concave portion 803 for the optical module can also be disposed at least partially in the region of the substrate 800 overlapping the space 812 formed by the first wafer 810 , the second wafer 820 and the third wafer 830 .

Therefore, in addition to the above-mentioned various functions of the package structure 8, the package structure 8 can increase the substrate 800, the first chip 810, the second chip 820 by means of the area where the optical module recess 803 of the substrate 800 and the space 812 overlap. and the accommodating space for accommodating the optical module 840 between the third chip 830 . Furthermore, the thicknesses of the first wafer 810 and the second wafer 820 can be adjusted as required (for example, the first wafer 810 and the second wafer 820 can be made thinner and shallower, and the concave portion 803 for the optical module can be made thinner accordingly. depth, etc.), while maintaining the required space for accommodating the optical module 840.

FIG. 9 is a schematic diagram of another packaging structure 9 of the disclosure. As shown in FIG. 9 , the package structure 9 includes a substrate 900 , a first chip 910 , a second chip 920 , a third chip 930 and an optical module 940 . The structures of the first chip 910 , the second chip 920 and the optical module 940 are similar to those of the first chip 910 , the second chip 920 and the optical module 940 in FIG. 7 , and will not be repeated here.

The difference between the package structure 9 and the package structures 7 and 8 in FIGS. 7 and 8 is that the substrate 900 has a recess 903 for an optical module, and the third chip 930 also has a recess 931 . The concave portion 903 for the optical module is disposed in the area of the substrate 900 overlapping the concave portion 931 of the third wafer 930 , but it is not limited, and the concave portion 903 for the optical module can also be at least partially disposed on the substrate 900 and the concave portion of the third wafer 930 931 The overlapping area.

Therefore, in addition to the above-mentioned various functions of the package structures 7 and 8, the package structure 9 also has a recess 931 through the third chip 930. For example, the substrate 900, the first chip 910, the second chip 920 and the third chip 930 can be added. An accommodation space for accommodating the optical module 940 therebetween. Furthermore, the thicknesses of the first wafer 910 and the second wafer 920 can be adjusted as required (for example, the first wafer 910 and the second wafer 920 can be made thinner and shallower, and the concave portions 903 and 920 for the optical module can be made correspondingly). The concave portion 931 becomes deeper, etc.), while maintaining the required space for accommodating the optical module 940 .

In addition, it is worth mentioning that the substrate 600 in FIG. 6A has a recess 602 for optical waveguide connection components, and the substrates 700 , 800 and 900 in FIGS. (not shown), and the concave parts for optical waveguide connection components are respectively at least partially disposed on the substrates 700, 800, 900 and the first wafers 710, 810, 910, the second wafers 820, 820, 920 and the third wafers 730, 830, 930 outside the overlapping area, so that the optical waveguide connecting element 9 (as shown in FIG. 5B ) can extend into the concave portion for the optical waveguide connecting element.

FIGS. 10A to 10F are schematic diagrams illustrating a manufacturing process of the package structure 5 shown in FIGS. 5A and 5B according to the disclosure. As shown in FIG. 10A , a plurality of bonding pads 514 and a plurality of micro-bumps or solder balls 513 may be formed on the chip 510 first. As shown in FIG. 10B , concave portions 512 are then formed by etching on the wafer 510 . The etching method may be dry etching or wet etching, for example.

It is worth mentioning that, in the case of the package structures 7 and 8 shown in FIGS. 7 and 8 , there is no need to form recesses on the chips, and spaces similar to the recesses can be formed by bonding the chips to each other. If the package structure 9 is shown in FIG. 9 , the concave portion 931 can be formed on the third chip 930 first, and then the third chip 930 can be bonded to the first chip 910 and the second chip 920 .

As shown in FIG. 10C , the optical module 520 is disposed in the concave portion 512 . The optical module 520 may have, for example, a light source 521 and a lens 522 , and the location of the optical module 520 in the recess 512 is not limited. As shown in FIG. 10D , the wafer 510 is flip-chip bonded to the substrate 500 , and the substrate 500 may first be provided with a concave portion 502 for an optical waveguide connection assembly. It is worth mentioning that the substrate may be the substrate 200 as shown in FIG. 2 without recesses, or the substrate 600 as shown in FIG. 6A may have recesses 602 for optical waveguide connection components and recesses 603 for optical modules. The concave portion 602 for the optical waveguide connection component and the concave portion 603 for the optical module have been described in detail in FIG. 6A and FIG. 6B , and will not be repeated here.

As shown in FIG. 10E , a plurality of bonding pads 504 and a plurality of bumps or solder balls 501 are disposed on the other side of the substrate 500 relative to the chip, so that the package structure 5 (as shown in FIG. 5A or 10F ) can be electrically connected to other components connect. As shown in FIG. 10F , the optical waveguide connection assembly 9 is connected to the package structure 5 . In some embodiments, the optical waveguide connection component 9 may be disposed on the wafer 510 in a suspended manner, and extend into the recess 502 for the optical waveguide connection component of the substrate 500 .

It should be noted that the above process steps are not limitative, and may be in different sequences according to different needs, and the process steps may also be added or reduced according to different structural designs.

Although the present disclosure and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the disclosure as defined by the scope of the claims. For example, many of the processes described above may be implemented in different ways and replaced by other processes or combinations thereof.

Furthermore, the scope of this application is not limited to the specific embodiments of the processes, machines, manufacture, compositions of matter, means, methods and steps described in the specification. Those skilled in the art can understand from the disclosure of the present disclosure that existing or future processes, machines, manufactures, and materials that have the same functions or achieve substantially the same results as the corresponding embodiments described herein can be used in accordance with the present disclosure. A composition, means, method, or step. Accordingly, such processes, machines, manufactures, compositions of matter, means, methods, or steps are included within the scope of the claims of this application.

1, 2, 5, 6, 7, 8, 9: Package structure 10, 210, 510, 610: Wafers 20, 220, 520, 640, 740, 840, 940: Optical modules 30: Carrier 40, 400: circuit board 200, 500, 600, 700, 800, 900: Substrate 201, 501, 701: bumps or solder balls 211, 511, 711: Optical Waveguide Structure 212, 512, 612, 931: Recess 213, 713: Micro bumps or solder balls 221: light source 222: Lens 502, 602: Recess for optical waveguide connection assembly 504, 514: Solder pad 603, 803, 903: Recesses for optical modules 710, 810, 910: first wafer 712, 812, 912: Space 720, 820, 920: Second wafer 730, 830, 930: Third wafer 9: Optical waveguide connection components 91: Fiber E: path L: light path

A more complete understanding of the disclosure of the present application can be obtained by referring to the detailed description and the claims in conjunction with the drawings, where the same reference numerals refer to the same elements. FIG. 1 is a schematic diagram of a conventional packaging structure. FIG. 2 is a three-dimensional schematic diagram of a package structure according to the disclosure. 3A is a cross-sectional view of the package structure along the line A-A in FIG. 2 , and FIG. 3B is a cross-sectional view of the package structure along the line B-B in FIG. 2 . FIG. 3C is a three-dimensional schematic view of a package structure combined with a circuit board according to the disclosure, and FIG. 3D is a cross-sectional view of the package structure along the line A-A of FIG. 3C . 4A is a bottom view of a chip and an optical module according to the disclosure, and FIG. 4B is a side view of a chip and an optical module according to the disclosure. FIG. 5A is a schematic diagram of another packaging structure of the disclosure, and FIG. 5B is a schematic diagram of a connection manner of the packaging structure of FIG. 5A and the optical waveguide connecting element. FIG. 6A is a schematic diagram of another substrate of the disclosure, and FIG. 6B is a schematic diagram of another packaging structure of the disclosure. FIG. 7 is a schematic diagram of another packaging structure of the disclosure. FIG. 8 is a schematic diagram of another packaging structure of the disclosure. FIG. 9 is a schematic diagram of another packaging structure of the disclosure. 10A to 10F are schematic diagrams of a manufacturing process of the package structure shown in FIGS. 5A and 5B according to the disclosure.

2: Package structure

200: Substrate

210: Wafer

220: Optical Module

Claims (12)

A package structure including: a substrate; a chip, which has an optical waveguide structure and a concave portion, the optical waveguide structure is adjacent to the concave portion, the concave portion faces the substrate, and the chip flip-chip is bonded to the substrate; and an optical module, which is arranged in the concave portion of the chip. The package structure of claim 1, wherein the substrate has a recess for an optical module, and the optical module extends into the recess for an optical module. The package structure of claim 1, wherein the optical module comprises a light source and a lens, and the light generated by the light source passes through the lens and then enters the optical waveguide structure of the chip. The package structure of claim 1, wherein the chip is a flip-chip photonic integrated circuit. The package structure of claim 1, wherein the chip is connected to an optical waveguide connection component. The package structure of claim 5, wherein the substrate has a concave portion for an optical waveguide connecting element, and the optical waveguide connecting element extends into the concave portion for the optical waveguide connecting element. A package structure including: a substrate; a first chip flip-chip bonded to the substrate; a second chip, which is flip-chip bonded to the substrate and spaced apart from the first chip; a third chip disposed on the first chip and the second chip; and An optical module is disposed on the third chip and between the substrate and the third chip. The package structure of claim 7, wherein the third chip has a concave portion facing the substrate and located between the first chip and the second chip, and the optical module is located in the concave portion. The package structure according to claim 7 or 8, wherein the substrate has a recess for an optical module, and the optical module extends into the recess for an optical module. The package structure of claim 7, wherein the optical module comprises a light source and a lens, and the light generated by the light source passes through the lens and then enters the first chip, the second chip or the third chip. The package structure of claim 7, wherein the third chip is connected to an optical waveguide connecting element. The package structure of claim 11, wherein the substrate has a concave portion for an optical waveguide connection element, and the optical waveguide connection element extends into the concave portion for the optical waveguide connection element.

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