TW202115799A - Wire joining structure, bonding wire used in same, and semiconductor device - Google Patents
Wire joining structure, bonding wire used in same, and semiconductor device Download PDFInfo
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- TW202115799A TW202115799A TW109108417A TW109108417A TW202115799A TW 202115799 A TW202115799 A TW 202115799A TW 109108417 A TW109108417 A TW 109108417A TW 109108417 A TW109108417 A TW 109108417A TW 202115799 A TW202115799 A TW 202115799A
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Abstract
Description
本發明係關於線接合構造、使用於該線接合構造的接合線及半導體裝置。The present invention relates to a wire bonding structure, a bonding wire used in the wire bonding structure, and a semiconductor device.
半導體晶片的電極與引線框架或電路基板等電路基材之外部電極,例如係以接合線來連接。接合線中,例如,一般係藉由稱為球體接合的方式,將接合線的一端接合(第1接合)於半導體晶片的電極,而藉由稱為楔形接合的方式,將接合線的另一端接合於電路基材的外部電極(第2接合)。球體接合中,藉由放電等使接合線的一端熔融,並且因為表面張力等使其凝固為球狀而形成球體。經凝固的球體稱為焊球(Free Air Ball:FAB),藉由超音波併用熱壓接接合法等而連接於半導體晶片的電極,形成線接合構造。此處,將設於接合線的FAB接合於電極的構造在此處稱為線接合構造。再者,將連接有接合線的半導體晶片與接合線及電路基材的一部分一起進行樹脂密封,藉此構成半導體裝置。The electrode of the semiconductor wafer and the external electrode of the circuit base material such as a lead frame or a circuit board are connected by bonding wires, for example. In the bonding wire, for example, generally one end of the bonding wire is bonded to the electrode of the semiconductor chip by a method called ball bonding (first bonding), and the other end of the bonding wire is bonded by a method called wedge bonding. External electrode bonded to the circuit substrate (second bonding). In sphere bonding, one end of the bonding wire is melted by electric discharge or the like, and solidified into a sphere due to surface tension, etc., to form a sphere. The solidified ball is called a solder ball (Free Air Ball: FAB), and is connected to the electrode of the semiconductor wafer by ultrasonic and thermocompression bonding, etc., to form a wire bonding structure. Here, the structure in which the FAB provided on the bonding wire is bonded to the electrode is referred to herein as a wire bonding structure. Furthermore, the semiconductor wafer to which the bonding wire is connected is resin-sealed together with a part of the bonding wire and the circuit base material, thereby constituting a semiconductor device.
近年來對於半導體裝置要求低消耗電力化及訊號處理速度的高速化,亦要求這種半導體裝置所使用的接合線其電阻(比電阻)低(例如,純度99.99質量%的4NAu線以下)且即使在嚴苛環境亦可長時間保持比電阻低的狀態,亦即高可靠度。高可靠度係指即使在高溫潮濕的環境下亦不會腐蝕(硫化或氧化)而電阻長期不會上升。然而,以往一般使用的金線材料成本高,而且銅線或被覆銅線材料硬,而具有對於半導體晶片造成損傷這樣的課題。又,銀線成本低且柔軟,因此適合作為接合線,但純銀線具有若長期放置於大氣中則表面會硫化這樣的課題。作為硫化對策,係在產品化的銀合金接合線中,對於純銀添加鈀或金等的金屬元素,因此銀的含量為90質量%至97質量%。硫化對策雖稍有改善,但銀合金接合線,具有因添加元素含量的影響而導致比電阻變高這樣的難處,並未充分適合近年來對於半導體裝置的要求。雖有人提出降低貴金屬的含量而具有與金線同等之比電阻的銀合金線,但此情況卻具有耐腐蝕性的問題,亦具有必須選定構成半導體裝置之鑄模樹脂、亦即其中未摻雜對於高可靠度有所影響之元素的樹脂等的課題、以及因為在接合線與電極的界面生成的金屬間化合物而難以滿足高可靠度評價基準這樣的課題。In recent years, semiconductor devices are required to reduce power consumption and increase signal processing speed. Bonding wires used in such semiconductor devices are also required to have low resistance (specific resistance) (for example, 4NAu wires with a purity of 99.99% by mass or less) and even In harsh environments, it can maintain a low specific resistance for a long time, that is, high reliability. High reliability means that it will not corrode (sulfide or oxidize) even in a high temperature and humid environment and the resistance will not increase for a long time. However, the conventionally used gold wire material has a high cost, and the copper wire or the coated copper wire material is hard, which has a problem of causing damage to the semiconductor wafer. In addition, the silver wire is low in cost and flexible, so it is suitable as a bonding wire, but the pure silver wire has a problem that the surface will vulcanize if left in the atmosphere for a long time. As a vulcanization countermeasure, in the commercialized silver alloy bonding wire, metal elements such as palladium or gold are added to pure silver, so the content of silver is 90% to 97% by mass. Although the vulcanization countermeasures have been slightly improved, the silver alloy bonding wire has the difficulty of increasing the specific resistance due to the influence of the content of the added element, and it is not sufficiently suitable for recent requirements for semiconductor devices. Although some people have proposed a silver alloy wire with a specific resistance equivalent to that of a gold wire by reducing the content of noble metals, this has the problem of corrosion resistance. It is also necessary to select the mold resin that constitutes the semiconductor device, that is, the non-doping Issues such as resins, elements that affect high reliability, and problems such as difficulty in satisfying the high reliability evaluation criteria due to intermetallic compounds generated at the interface between the bonding wire and the electrode.
為了解決上述課題,有人提出在銀線的表面形成耐腐蝕性高的鈀等鉑族元素或金等的被覆層。鉑族元素或金等的被覆層,只要為非熔融的固體狀態則可抑制銀線表面的硫化。因此,在如楔形接合(第2接合)未熔融而進行接合的情況中發揮效果。然而,在與位於半導體晶片上的電極接合(第1接合)時則會產生問題。接合線如先前所說明,係藉由放電等使線的一端熔融,藉由表面張力等凝固成球狀而形成球體。經過凝固的球體稱為焊球(FAB),藉由超音波併用熱壓接接合法等將FAB連接於半導體晶片的電極,以形成線接合構造。若為未形成球體即接合的楔形接合,接合面積變小而接合強度變弱,因此一般係使用形成球狀而使接合面積變大以提高接合力的方法。FAB形成時,因為使被覆了鉑族元素或金的線整體熔融,儘管所被覆之鉑族元素或金因為熔點差異等的理由而具有時間差,但鉑族元素及金幾乎同時熔化而進入球體內部,因此球體表面的鉑族元素及金濃度相對變低。將FAB表面的具有耐腐蝕性之鉑族元素及金濃度變低而銀濃度相對變高的FAB接合於半導體晶片之鋁電極的情況,在FAB與電極的接合界面附近,相對變多的銀與構成電極的鋁容易形成銀與鋁的金屬間化合物。銀與鋁的金屬間化合物容易被鹵素元素或水分等腐蝕,成為導致比電阻上升而引起通電不良的原因。特別是,在汽車等的高溫潮濕的環境中使用的情況,形成於接合線與電極之接合界面的金屬間化合物變得更容易被腐蝕。此等的現象導致電阻(比電阻)上升,而成為通電不良的原因。因此要求形成一種接合構造,其中接合線與電極的界面即使在高溫潮濕的嚴苛環境下,比電阻長期不會上升。In order to solve the above-mentioned problems, it has been proposed to form a coating layer of platinum group elements such as palladium or gold with high corrosion resistance on the surface of the silver wire. As long as the coating layer of platinum group element or gold is in a non-melting solid state, sulfidation on the surface of the silver wire can be suppressed. Therefore, it is effective in the case where the wedge bonding (second bonding) is not melted and the bonding is performed. However, there is a problem when it is joined to an electrode located on a semiconductor wafer (first joining). As previously described, the bonding wire is formed by melting one end of the wire by electric discharge or the like, and solidifying into a spherical shape by surface tension or the like to form a sphere. The solidified spheres are called solder balls (FAB). The FAB is connected to the electrode of the semiconductor chip by ultrasonic and thermocompression bonding to form a wire bonding structure. In the case of a wedge-shaped joint in which no sphere is formed, that is, joint, the joint area becomes smaller and the joint strength becomes weak. Therefore, a method of forming a sphere to increase the joint area to increase the joint strength is generally used. When FAB is formed, the wire covered with platinum group element or gold is melted as a whole. Although the covered platinum group element or gold has a time difference due to the difference in melting point, etc., the platinum group element and gold melt almost simultaneously and enter the sphere. Therefore, the platinum group element and gold concentration on the surface of the sphere are relatively low. When the FAB, which has corrosion-resistant platinum group elements on the surface of the FAB and the gold concentration lower and the silver concentration relatively higher, is bonded to the aluminum electrode of the semiconductor wafer, there is a relatively large amount of silver and silver near the bonding interface between the FAB and the electrode. The aluminum constituting the electrode easily forms an intermetallic compound of silver and aluminum. The intermetallic compound of silver and aluminum is easily corroded by halogen elements, moisture, etc., which causes an increase in specific resistance and causes poor energization. In particular, when it is used in a high-temperature and humid environment such as an automobile, the intermetallic compound formed at the bonding interface between the bonding wire and the electrode becomes more likely to be corroded. These phenomena cause the resistance (specific resistance) to rise, and become the cause of poor energization. Therefore, it is required to form a bonding structure in which the specific resistance does not increase for a long time even in the severe environment of high temperature and humidity at the interface between the bonding wire and the electrode.
例如,日本特開平10-326803號公報(專利文獻1)揭示一種金銀合金線,其在11~18.5質量%的範圍內含有Ag,剩餘部分為金及不可避雜質所構成之金銀合金線,再者,以總計0.01~4質量%含有Cu、Pd、Pt的至少一者,以總計0.0005~0.05質量%含有Ca、In、稀土類元素的至少一者,或是在總計0.01~0.2質量%的範圍含有Mn、Cr的至少一者。專利文獻1係提供一種藉由含有特定量的銀來而以銀改善鋁電極的接合可靠度並且謀求低成本化的金銀合金線。然而,因為主成分依然為金,因此比銀線、銀合金線、被覆銀線等昂貴,並未解決材料成本高這樣的課題。又,不僅是成本的問題,亦具有比電阻上升這樣的疑慮。For example, Japanese Patent Laid-Open No. 10-326803 (Patent Document 1) discloses a gold-silver alloy wire which contains Ag in the range of 11 to 18.5% by mass, and the remainder is a gold-silver alloy wire composed of gold and unavoidable impurities. , Containing at least one of Cu, Pd, and Pt in a total of 0.01 to 4 mass%, containing at least one of Ca, In, and rare earth elements in a total of 0.0005 to 0.05 mass%, or in the range of 0.01 to 0.2 mass% in total Contains at least one of Mn and Cr.
又,關於以往的被覆銀接合線,例如國際公開2013/129253號(專利文獻2)揭示一種在Ag或Ag合金線的表面具有線被覆層的接合線,該線被覆層具有Pd、Au、Zn、Pt、Ni、Sn的1種以上或此等的合金或此等金屬的氧化物或氮化物。專利文獻2揭示將具有被覆層的Ag或Ag合金線用於功率半導體裝置內的連接,並且不使用球體接合而是使用楔形接合,藉此可抑制在Al電極與Ag線的接合界面形成金屬間化合物,而提高接合可靠度。然而,專利文獻2,如上所述,係以Ag線的楔形接合作為前提,因此並未形成必須將被覆線熔融凝固的FAB,而未考慮被覆層之構成元素進入作為芯材的Ag線中。因此,專利文獻2並未考慮將FAB接合於電極時接合界面的構成元素,而未考慮藉由接合界面的構成元素來提升可靠度。再者,另外亦未揭示用以抑制構成元素進入Ag線中的構成。In addition, with regard to conventional coated silver bonding wires, for example, International Publication No. 2013/129253 (Patent Document 2) discloses a bonding wire having a wire coating layer on the surface of Ag or Ag alloy wire, the wire coating layer having Pd, Au, Zn , Pt, Ni, Sn or more of these alloys or oxides or nitrides of these metals.
再者,日本特開2001-196411號公報(專利文獻3)揭示一種接合線,其具有Ag線與被覆Ag線的Au膜,Au膜包含Na、Se、Ca、Si、Ni、Be、K、C、Al、Ti、Rb、Cs、Mg、Sr、Ba、La、Y、Ce的至少一個元素。專利文獻3揭示,被覆了Au的Ag線中,FAB的形狀並未成為軸對稱,因此使Au膜含有上述元素,抑制電弧放電集中於一點,從表面整體產生電弧,使FAB的形狀穩定化。然而,專利文獻3亦未考慮在FAB形成時被覆層的Au摻入Ag線中,又,並未揭示用以抑制Au摻入Ag線的構成。因此,專利文獻3中不僅未暗示使用金被覆銀線時在Al電極與Ag線的接合界面形成金屬間化合物而導致接合可靠度降低,而且亦未揭示用以提高Al電極與Ag線之接合可靠度的構成。又,如上述之添加元素,具有因為其含量而對於線本身的特性及被覆層的形成性等造成不良影響的疑慮。因此要求一種不會對於線本身之特性及被覆層的形成性等造成不良影響,並且抑制Au進入Ag線而提高線接合構造之可靠度的技術。
[先前技術文獻]
[專利文獻]Furthermore, Japanese Patent Laid-Open No. 2001-196411 (Patent Document 3) discloses a bonding wire having an Ag wire and an Au film covering the Ag wire. The Au film contains Na, Se, Ca, Si, Ni, Be, K, At least one element of C, Al, Ti, Rb, Cs, Mg, Sr, Ba, La, Y, and Ce.
[專利文獻1] 日本特開平10-326803號公報 [專利文獻2] 國際公開2013/129253號 [專利文獻3] 日本特開2001-196411號公報[Patent Document 1] Japanese Patent Laid-Open No. 10-326803 [Patent Document 2] International Publication No. 2013/129253 [Patent Document 3] Japanese Patent Application Publication No. 2001-196411
[發明所欲解決之課題][The problem to be solved by the invention]
本發明所欲解決之課題,係提供一種即使將抑制了材料成本之接合線與鋁電極接合亦可抑制比電阻上升,而且在嚴苛環境下亦可長期保持接合線與鋁電極之接合可靠度的線接合構造與、使用於該線接合構造的接合線、以及半導體裝置。 [解決課題之手段]The problem to be solved by the present invention is to provide a method that can suppress the increase in specific resistance even if the bonding wire and the aluminum electrode are bonded with the material cost suppressed, and the bonding reliability of the bonding wire and the aluminum electrode can be maintained for a long time under severe environment The wire bonding structure and the bonding wire used in the wire bonding structure, and the semiconductor device. [Means to solve the problem]
本發明的線接合構造,具有包含鋁作為主成分的電極、接合線、設於該接合線之一端而與該電極接合的球體壓縮部。本發明之線接合構造中,該接合線,係具有以銀作為主成分的芯材與設於該芯材表面的以金作為主成分的被覆層,並且含有選自硫、碲、硒、砷及銻之中至少一個第15及16族元素的金被覆銀接合線,相對於線整體而言,金濃度為2.0質量%以上、7.0質量%以下,第15及16族元素濃度總計為4質量ppm以上、80質量ppm以下,在該電極與該球體壓縮部的接合界面附近,設有金濃度相對於金、銀與鋁的總量而言為5原子%以上的金濃化接合區域,藉此解決課題。The wire bonding structure of the present invention includes an electrode containing aluminum as a main component, a bonding wire, and a spherical compression portion provided at one end of the bonding wire and bonded to the electrode. In the wire bonding structure of the present invention, the bonding wire has a core material mainly composed of silver and a coating layer mainly composed of gold provided on the surface of the core material, and contains selected from sulfur, tellurium, selenium, and arsenic. A gold-coated silver bonding wire with at least one of the 15th and 16th group elements among antimony has a gold concentration of 2.0 mass% or more and 7.0 mass% or less with respect to the entire wire, and the total concentration of the 15th and 16th group elements is 4 mass ppm or more and 80 mass ppm or less, in the vicinity of the bonding interface between the electrode and the compressed part of the sphere, there is provided a gold-concentrated bonding area with a gold concentration of 5 at% or more relative to the total amount of gold, silver, and aluminum. This solves the problem.
本發明的金被覆銀接合線,係用於本發明之線連接構造的金被覆銀接合線,該金被覆接合線,具有包含銀作為主成分的芯材與設於該芯材表面且包含金作為主成分的被覆層,該金被覆銀接合線,含有選自硫、碲、硒、砷及銻之中的至少一個第15及16族元素,該金被覆銀接合線中,相對於線整體而言,金濃度為2.0質量%以上、7.0質量%以下,第15及16族元素的濃度為4質量ppm以上、80質量ppm以下,該金被覆銀接合線,在以鋁作為主成分的電極上進行球體接合而藉此形成球體壓縮部時,在該電極與該球體壓縮部的接合界面附近,形成金濃度相對於金、銀與鋁的總量而言為5原子%以上的金濃化接合區域。The gold-coated silver bonding wire of the present invention is a gold-coated silver bonding wire used in the wire connection structure of the present invention. The gold-coated bonding wire has a core material containing silver as a main component and a core material provided on the surface of the core material and containing gold As the main component of the coating layer, the gold-coated silver bonding wire contains at least one
本發明的半導體裝置,一種半導體裝置,具有:至少具有一個含鋁之電極的一個或多個半導體晶片;引線框架或基板;及接合線,具有包含銀作為主成分的芯材與設於該芯材表面且包含金作為主成之被覆層,將選自該半導體晶片之電極與該引線框架之間、該半導體晶片之電極與該基板之電極之間及該多個半導體晶片之電極之間的至少1者連接;其中該電極與該接合線的連接構造,具有以使該接合線的一端接合於該電極的方式所設置的球體壓縮部,而在該電極與該球體壓縮部的接合界面附近,設有金濃度相對於金、銀與鋁的總量而言為5原子%以上的金濃化接合區域。 [發明之效果]The semiconductor device of the present invention, a semiconductor device, has: one or more semiconductor wafers having at least one electrode containing aluminum; a lead frame or a substrate; and a bonding wire having a core material containing silver as a main component and provided on the core The surface of the material and contains gold as the main component of the coating layer will be selected from between the electrode of the semiconductor chip and the lead frame, between the electrode of the semiconductor chip and the electrode of the substrate, and between the electrodes of the plurality of semiconductor chips At least one connection; wherein the connection structure of the electrode and the bonding wire has a spherical compression portion provided in such a way that one end of the bonding wire is connected to the electrode, and is near the bonding interface of the electrode and the spherical compression portion , There is provided a gold-concentrated junction area with a gold concentration of 5 atomic% or more with respect to the total amount of gold, silver, and aluminum. [Effects of Invention]
根據本發明之線接合構造及使用於該線接合構造的接合線,除了抑制接合線的比電阻上升以外,亦可在電極與球體壓縮部的接合界面附近設置金濃度相對於金、銀與鋁的總量而言為5原子%以上的金濃化接合區域。藉由設置這樣的金濃化接合區域,可提高電極與球體壓縮部的接合可靠度。又,根據應用這種線接合構造的本發明之半導體裝置,可藉由金濃化接合區域來提升電極與球體壓縮部的接合可靠度甚至是半導體裝置本身的可靠度。According to the wire bonding structure of the present invention and the bonding wire used in the wire bonding structure, in addition to suppressing the increase in the specific resistance of the bonding wire, it is also possible to set the gold concentration in the vicinity of the bonding interface between the electrode and the ball compression portion relative to gold, silver, and aluminum. The total amount is 5 at% or more of the gold-concentrated junction area. By providing such a gold-concentrated bonding area, the reliability of bonding between the electrode and the ball compression portion can be improved. In addition, according to the semiconductor device of the present invention using this wire bonding structure, the bonding reliability between the electrode and the ball compression portion and even the reliability of the semiconductor device itself can be improved by enriching the bonding area with gold.
以下參照圖式說明本發明的實施型態之線接合構造、用於該線接合構造之接合線及半導體裝置。各實施型態中,對於實質上相同的構成部位賦予相同的符號,並且具有省略其部分說明的情況。圖式為示意,厚度與平面尺寸的關係、各部位的厚度之比例及縮尺、縱向尺寸與橫向尺寸的比例及縮尺等具有與現實不同的情況。 (線接合構造與使用於該線接合構造的接合線)Hereinafter, the wire bonding structure of the embodiment of the present invention, the bonding wire and the semiconductor device used in the wire bonding structure will be described with reference to the drawings. In each embodiment, the same reference numerals are given to substantially the same constituent parts, and some descriptions thereof may be omitted. The drawing is an illustration, and the relationship between thickness and plane size, the ratio and scale of the thickness of each part, the ratio and scale of the vertical size and the horizontal size, etc. are different from reality. (Wire bonding structure and bonding wire used in the wire bonding structure)
圖1係顯示實施型態的線接合構造的剖面圖。實施型態的線接合構造1,具有含鋁(Al)作為主成分的電極2與一端接合於電極2的接合線3。接合線3,係具有以銀(Ag)作為主成分的芯材(亦記載為銀芯材)4與設於芯材4表面且包含金(Au)作為主成分之被覆層5的金被覆銀接合線。FIG. 1 is a cross-sectional view showing the wire bonding structure of the embodiment. The
電極2包含鋁作為主成分。作為電極2的構成例,可舉出設於半導體晶片的電極,但不限於此。電極2可由純鋁構成,又亦可由在鋁中加入添加元素的鋁合金構成。然而,為了不損及作為鋁電極2的功能,電極2係以鋁作為主成分。一般而言,電極2係由Al‐0.5%銅(Cu)、Al-1.0%矽(Si)‐銅(Cu)所構成,但不限於此等。The
實施型態的線接合構造1,具有以使金被覆銀接合線3的一端接合於電極2的方式所設置的球體壓縮部6。球體壓縮部6,如後段詳述,係指在進行球體接合時,將線通過稱為焊管(capillary)的貫通工具而進行接合,壓附於電極以進行接合時,在焊管內部形狀被變形加工為球體而成形的部分。其係藉由下述方法形成:藉由放電等使接合線3的一端熔融,因為表面張力等凝固為球狀而形成FAB,再以超音波併用熱壓接接合法等將該FAB壓附於電極2以進行接合。電極2與球體壓縮部6的接合界面附近,設有金濃度相對於金、銀與鋁的總量而言為5原子%以上的金濃化接合區域7。The
藉由在接合界面附近設置金濃度相對於金、銀與鋁的總量而言為5原子%以上的金濃化接合區域7,提高接合界面附近的金濃度,可相對較低地抑制銀濃度。因此,可提升電極2與球體壓縮部6的接合可靠度。亦即,若使用銀純度98質量%以上的銀合金接合線(以下記載為高純度銀合金線)形成球體壓縮部6,接合界面附近的銀濃度變高,而容易形成易腐蝕的銀與鋁的金屬間化合物(銀與鋁的比例成為3比1的Ag3
Al等)。高純度銀合金線中,最多含有2質量%的金或鈀這種貴金屬等,因為生成如Ag3
Al這種耐蝕性低的銀與鋁之金屬間化合物,鑄模樹脂所包含的氯(Cl)等的鹵素及鑄模樹脂所吸收的水分導致金屬間化合物腐蝕,在電極2與球體壓縮部6之間容易產生通電不良。相對於此,藉由提高接合界面附近的金濃度,相對降低銀的純度來抑制Ag3
Al金屬間化合物,藉此容易生成銀與鋁的比例為2比1的Ag2
Al金屬間化合物。Ag2
Al金屬間化合物,耐蝕性優於Ag3
Al金屬間化合物,因此可提升電極2與球體壓縮部6的接合可靠度。此外,存在於金濃化接合區域7的金,對於嚴苛環境中的經時變化、例如銀的遷移及擴散等發揮屏蔽的效果,而可維持具有耐蝕性的Ag2
Al金屬間化合物。再者,據認為金可與鋁生成耐蝕性更優良的金與鋁之金屬間化合物(例如Au4
Al金屬間化合物),因此推測其對於進一步提升接合可靠度有所貢獻。如此,藉由在電極2與球體壓縮部6的接合界面附近形成金濃化接合區域7,尤其可提高在汽車等高溫潮濕的嚴苛環境下使用的半導體裝置的可靠度。By providing the gold-
在電極2與球體壓縮部6之接合界面附近所形成的金濃化接合區域7中,金濃度相對於金、銀與鋁的總量而言為5原子%以上。金濃化接合區域7中的金濃度,相對於金、銀與鋁的總量而言若小於5原子%,則無法充分得到由金來抑制腐蝕(硫化或氧化)的效果,而且銀濃度相對增加,因此容易形成Ag3
Al金屬間化合物,而導致電極2與球體壓縮部6的接合可靠度降低。相對於金濃化接合區域7中的金、銀與鋁的總量而言,金濃度更佳為5原子%以上,更期望為10原子%以上。其係由被覆層5之厚度相對於銀芯材4之直徑的比來決定。In the gold-
上述金濃化接合區域7,較佳係更包含選自鈀(Pd)、鉑(Pt)、鍺(Ge)、銦(In)、銅(Cu)、及鎳(Ni)的至少一個元素(以下稱為M元素)。金濃化接合區域7,藉由包含如上述之M元素,可更提升電極2與球體壓縮部6的接合可靠度。M元素,例如可預先含有於銀芯材4。M元素其含量相對於線整體而言,較佳係以0.2原子%以上、2.0原子%以下包含於其中。若小於0.2原子%,則無法充分得到由M元素進一步提升接合可靠度的效果,又若超過2.0原子%,則具有使銀芯材4的比電阻上升的疑慮。The above-mentioned gold-concentrated
以採用鋁電極作為接合對象的情況為例,詳細說明金濃化接合區域的分析方法。使用包含鋁與鋁以外之元素的電極的情況亦相同。使用金被覆銀接合線形成焊球,在鋁電極上進行球體接合。以使與線長邊方向之中心線平行的面露出的方式將接合於鋁電極的球體壓縮部切斷。從線側的既定處在與接合面約略垂直的方向(深度方向)上對於此切剖面進行線性分析。作為線性分析,理想係使用場發射掃描式電子顯微鏡/能量色散型X射線光譜析(FE-SEM/EDX)。另外,該分析之切剖面較佳係以包含線長邊方向之中心線或是盡量靠近中心線的方式形成。Taking the case of using an aluminum electrode as the bonding object as an example, the analysis method of the gold-concentrated bonding area will be described in detail. The same applies to the use of electrodes containing aluminum and elements other than aluminum. A gold-coated silver bonding wire is used to form solder balls, and ball bonding is performed on aluminum electrodes. The spherical compression part joined to the aluminum electrode was cut so that a surface parallel to the center line in the longitudinal direction of the wire was exposed. Perform a linear analysis of this section in a direction (depth direction) approximately perpendicular to the joint surface from a predetermined position on the line side. As a linear analysis, the ideal system uses a field emission scanning electron microscope/energy dispersive X-ray spectroscopy (FE-SEM/EDX). In addition, the tangent section of the analysis is preferably formed in a way that includes the center line in the longitudinal direction of the line or is as close to the center line as possible.
球體接合部的切剖面可以下述方式製作。作為引線框架,例如使用PBGA32PIN框架,將略正方形的半導體晶片接合於此框架中央部。藉由金被覆銀接合線將半導體晶片上的鋁電極與框架上的外部電極進行打線接合(wire bonding)以製作測量樣本。將金被覆銀接合線在位於此半導體晶片上的鋁電極進行球體接合(第1接合),並在引線框架上進行楔形接合(第2接合)。通常晶片上設置有多數電極而排成多列,例如在其中的一列(4個)電極上等間隔將接合線進行接合,而其他3列(3邊)亦相同地進行接合。共有16個鋁電極進行球體接合。若包含對於引線框架所進行的楔形接合,則成為共32組的打線接合。The cut section of the ball joint can be made in the following manner. As the lead frame, for example, a PBGA32PIN frame is used, and a substantially square semiconductor wafer is bonded to the center of the frame. The aluminum electrode on the semiconductor chip and the external electrode on the frame were wire bonded by gold-coated silver bonding wire to make a measurement sample. A gold-coated silver bonding wire is ball-bonded (first bonding) to an aluminum electrode located on this semiconductor wafer, and wedge bonding is conducted on the lead frame (second bonding). Usually, a large number of electrodes are arranged on the wafer and arranged in multiple rows. For example, one row (4) of the electrodes is bonded with bonding wires at equal intervals, and the other 3 rows (3 sides) are also bonded in the same way. There are a total of 16 aluminum electrodes for ball bonding. If the wedge bonding to the lead frame is included, there will be a total of 32 sets of wire bonding.
焊球的形成條件,例如,在金被覆銀接合線的線徑為10~30μm的情況,係以放電電流值30~90mA、焊球徑為線徑的1.5~2.3倍的方式設定電弧放電條件。接合裝置,例如,可使用K&S公司製的接合裝置(全自動接合機:IConn ProCu PLUS)等的市售品。使用該接合裝置的情況,作為裝置的設定,較佳係放電時間為50~1000μs,EFO-Gap為25~45mil(約635~1143μm)、尾端長度為6~12mil(約152~305μm)。使用該接合裝置以外的其他接合裝置的情況,只要是與上述相同的條件,例如使焊球徑成為與上述相同尺寸的條件即可。The formation conditions of the solder ball, for example, when the wire diameter of the gold-coated silver bonding wire is 10 to 30 μm, the arc discharge conditions are set with the discharge current value of 30 to 90 mA and the solder ball diameter of 1.5 to 2.3 times the wire diameter. . As the bonding device, for example, a commercially available product such as a bonding device manufactured by K&S (Fully Automatic Bonding Machine: IConn ProCu PLUS) can be used. In the case of using this bonding device, as the device setting, the discharge time is preferably 50~1000μs, the EFO-Gap is 25~45mil (about 635~1143μm), and the end length is 6~12mil (about 152~305μm). In the case of using a bonding device other than this bonding device, it is sufficient if the conditions are the same as the above, for example, the solder ball diameter is the same size as the above.
又,球體接合條件(第1接合的條件),例如針對線徑φ為20μm且形成球體徑為36μm之焊球者,可以使從球體壓縮部的頸縮部到接合界面側之高度約為10μm、與接合面約略平行之方向上的最大寬度為約45μm、而且使球體殼層強度成為15gf以上的方式,藉由接合裝置進行調整。又,第2接合的條件,例如為壓接力60gf,超音波輸出90mAmps,超音波輸出時間15ms。另外,使從第1接合部至第2接合部的線弧長度為2.0mm以進行接合。In addition, the ball bonding condition (the first bonding condition), for example, for a wire diameter φ of 20μm and a ball with a ball diameter of 36μm, the height from the constriction of the ball compression part to the bonding interface side can be about 10μm. , The maximum width in the direction approximately parallel to the joint surface is about 45μm, and the sphere shell strength is adjusted to 15gf or more by the joint device. In addition, the conditions for the second joining are, for example, a crimping force of 60 gf, an ultrasonic output of 90 mAmps, and an ultrasonic output time of 15 ms. In addition, the arc length from the first joining part to the second joining part was 2.0 mm for joining.
接著,藉由密封樹脂以鑄模機將包含上述形成的共16組接合部的半導體晶片進行鑄模。鑄模硬化後,從框架裁切經過鑄模的部分,再將位於鑄模部分中的球體接合部之一列(一邊)的附近切斷。切斷後的鑄模,在圓筒狀的模具中,放置在可研磨球體接合部之剖面的方向上,倒入包埋樹脂並添加硬化劑而使其硬化。之後,以盡量使球體接合部的中心附近露出的方式,藉由研磨器對於該包有半導體晶片的硬化圓筒狀樹脂進行粗研磨。大約研磨至球體接合部之中心剖面附近之後,藉由離子研磨裝置進行最終研磨加工以及以使包含球體中心部的面(通過線部之中心線並與中心線平行的面)稍微露出而成為分析面之位置的方式進行微調。若線部剖面的線寬成為線直徑的長度,則達到已成為切剖面包含球體中心部之面的標準。作為進行切剖面分析的面,藉由FE-SEM/EDX,從球體側往電極側對於其預期之處進行線性分析。線性分析的條件為例如加速電壓6keV,測量區域φ0.18μm,測量間隔0.02μm。Next, a semiconductor wafer including a total of 16 sets of bonding portions formed as described above is molded by a molding machine using a sealing resin. After the mold is hardened, the part that passes through the mold is cut from the frame, and then the vicinity of one row (one side) of the ball joints in the mold part is cut off. The cut mold is placed in a cylindrical mold in a direction that can grind the cross section of the ball joint, pour the embedding resin and add a hardener to harden it. After that, the hardened cylindrical resin covered with the semiconductor wafer is rough-polished by a grinder so as to expose the vicinity of the center of the spherical joint portion as much as possible. After polishing to the vicinity of the center section of the sphere joint, the final polishing process is performed by an ion polishing device and the surface containing the center of the sphere (the surface passing through the center line of the line and parallel to the center line) is slightly exposed for analysis. The position of the face is fine-tuned. If the line width of the line section becomes the length of the line diameter, it reaches the standard that the section includes the center of the sphere. As the surface for cross-sectional analysis, FE-SEM/EDX is used to perform linear analysis on the expected point from the sphere side to the electrode side. The conditions of linear analysis are, for example, an acceleration voltage of 6 keV, a measurement area of φ0.18 μm, and a measurement interval of 0.02 μm.
定量地測量是否具有金濃化接合區域7,係在上述測量試料的分析面(研磨剖面)中,從球體壓縮部6側隔著接合界面朝向電極2側,藉由場發射掃描電子顯微鏡(FE-SEM:Field Emission-Scanning Electron Microscope)附屬的能量色散型X光分析(EDX:Energy Dispersive X-ray Spectrometry)進行線性分析,藉此可確認金濃化接合區域7。線性分析的條件,係使用Hitachi High-Technologies製的FE-SEM SU8220與BRUKER公司製的XFlash(R)5060FQ,加速電壓6keV,測量長度2μm,測量間隔0.03μm,測量時間60秒。只要線性分析的濃度分布之中存在金濃度相對於銀、金及鋁的總量而言為5原子%以上之處,則可判斷形成有金濃化接合區域7。Quantitatively measure whether there is a gold-concentrated
金濃化接合區域,可作為在焊球與電極接觸而接合的接合面附近,亦即鋁、銀與金共存的區域中,相對於金、銀及鋁的總計而言金的比例成為5.0原子%以上、較佳係成為10.0原子%以上的既定範圍而進行評價。具體而言,在藉由FE-SEM/EDX對於上述球體接合部之剖面的既定處從球體接合部的任意面朝向鋁電極面與線長邊方向平行地進行線性分析時,可將鋁超過5.0原子%且在95.0原子%以下之範圍內的各測量點之中,相對於金、銀及鋁的總計而言金的比例在5.0原子%以上、較佳為10.0原子%以上的既定範圍作為金濃化接合區域,而以此進行評價。此處,在鋁濃度超過5.0原子%且在95.0原子%以下之範圍進行測量的理由,係因為分析中的雜訊等的影響,不存在鋁之處的分析值不會成為0原子%,以及僅有鋁之處的分析值不會成為100原子%。The gold-enriched bonding area can be regarded as the area near the bonding surface where the solder ball contacts the electrode, that is, the area where aluminum, silver, and gold coexist. The ratio of gold to the total of gold, silver, and aluminum is 5.0 atoms % Or more, preferably in a predetermined range of 10.0 atomic% or more, for evaluation. Specifically, when using FE-SEM/EDX to perform linear analysis on a predetermined position of the cross-section of the above-mentioned spherical joint from any surface of the spherical joint toward the aluminum electrode surface parallel to the longitudinal direction of the wire, the aluminum can exceed 5.0 At each measuring point within the range of 95.0 at% and below, the ratio of gold to the total of gold, silver, and aluminum is in a predetermined range of 5.0 at% or more, preferably 10.0 at% or more, as gold Concentrate the junction area and evaluate it accordingly. Here, the reason for the measurement in the range where the aluminum concentration exceeds 5.0 at% and below 95.0 at% is that the analysis value where there is no aluminum will not become 0 at% due to the influence of noise in the analysis, and The analysis value of the area where there is only aluminum does not become 100 atomic %.
圖2係顯示由EDX進行線性分析之結果的一例。圖2中,縱軸為各元素的濃度(原子%),橫軸為測量試料中的測量距離(μm)。圖2中,橫軸之測量距離約2.2μm之處到約2.6μm之處成為接合界面附近的區域,在此區域中,存在金濃度為5.0原子%以上的區域,亦即金接合濃化區域。此處,金的峰值濃度顯示為約15.0原子%。因此,具有圖2所示之濃度分布的線接合構造1,可判斷為在電極2與球體壓縮部6的接合界面附近存在金濃化接合區域7。又,圖2中接合界面附近具有金濃度低的區域(橫軸2.4μm附近),根據其附近的銀與鋁的濃度比推測生成了耐蝕性強的Ag2
Al金屬間化合物。Figure 2 shows an example of the results of linear analysis performed by EDX. In Figure 2, the vertical axis is the concentration (atomic %) of each element, and the horizontal axis is the measurement distance (μm) in the measurement sample. In FIG. 2, the measurement distance on the horizontal axis is about 2.2 μm to about 2.6 μm as a region near the bonding interface. In this region, there is a region with a gold concentration of 5.0 atomic% or more, that is, a gold bonding concentrated region. Here, the peak concentration of gold is shown to be about 15.0 atomic %. Therefore, in the
上述金濃化接合區域7的形成範圍,較佳係電極2與球體壓縮部6之接合界面的整個區域,但不限於此。亦即,金濃化接合區域7,為了提高電極2與球體壓縮部6的接合可靠度,如圖3所示,相對於球體壓縮部6的最大寬度Y,金濃化接合區域7只要分別至少形成於從球體壓縮部6的兩個外周部到1/8的位置(線X1及線X2所示)之間即可。此處,球體壓縮部6的最大寬度Y,係表示在線3的長邊方向上將圖3所示之電極2與球體壓縮部6的接合構造切斷而成的剖面圖中,與長邊方向正交的水平方向上球體壓縮部6的兩個最外端部(以線X表示)之間的寬度。從這樣的兩個最外端部(線X),將球體壓縮部6的最大寬度(線Y)8等分之後,只要至少在從其中兩個最外端部到1/8的位置(線X1及線X2)之間形成金濃化接合區域7即可。藉由在這樣的位置形成金濃化接合區域7,可抑制侵入接合界面的大氣及水分等導致電極2與球體壓縮部6的接合可靠度降低。這是因為,來自密封樹脂等的鹵素元素及水分,很可能從球體接合面附近的兩端、亦即球體與電極的接合部附近的微小間隙等侵入,而在兩端附近具有耐腐蝕性高的金濃化接合區域阻止鹵素等的侵入,這樣的意義發揮了非常重要的功能。The formation range of the aforementioned gold-
再者,發明人等詳細研究的結果,得知金濃化接合區域7的形成範圍,較佳係以相對於上述球體壓縮部6的最大寬度Y而言占有率總計為25%以上的方式形成。此處所指的金濃化接合區域7的占有率,係指在圖3所示的電極2與球體壓縮部6的接合構造的剖面圖中,分析金濃化接合區域7的形成區域時,相對於球體壓縮部6的最大寬度Y而言,金濃化接合區域7的形成區域在25%以上。如此,以相對於球體壓縮部6的最大寬度Y而言金濃化接合區域7的占有率至少為25%的方式形成,藉此可抑制因為侵入接合界面的大氣及水分等導致電極2與球體壓縮部6的接合可靠度降低。另外,相對於球體壓縮部6的最大寬度Y而言,金濃化接合區域7的占有率只要至少25%即可,但更佳為40%以上,再佳為50%以上。In addition, as a result of detailed studies by the inventors, it is found that the formation range of the gold-concentrated
針對金濃化接合區域的測量方法進行說明。例如,EPMA測量(面分析)中,通常係在對於測量對象照射電子束時,係以從該元素發出的X光強度來測量作為測量對象之元素的存在率,一般係將其強度以彩色反映於EPMA影像的色彩映射(color mapping)來表示。亦即,不存在測量對象之元素的點顯示為全黑,依照元素存在機率由高至低的順序,作為一例,係以「白、紅、黃、綠、藍、黑」等的色彩梯度顯示。這樣的EPMA影像的接合面附近,只要金強度最小的點、亦即EPMA影像上中並非全黑但在觀測到金的強度之處中最黑之處(接近黑色的藍色之處)中金濃度為5.0原子%以上,則可將其以外顯示的、以強度比上述之處更強的顏色所顯示的區域特定為金濃化接合區域。又,將線性分析與EPMA影像(面分析)的結果重合,並且進行可將「在線性分析中觀測到金濃度為5.0原子%或其以上的、強度與EPMA上之測量點相同或其以上之處」作為強度差(影像上的色彩)而辨識的設定,或是以目視判定。藉此,可算出金濃化接合區域的有無以及占有率。另外,算出金濃化接合區域之占有率的情況中,雖使用EPMA的色彩映射影像,但金濃化接合區域可能隨著影像放大而看起來成為「稀疏」的狀態,因此較佳係以至少可將球體壓縮部容納於1幅影像(框)左右的倍率來算出占有率。The measurement method of the gold-enriched junction area will be described. For example, in EPMA measurement (area analysis), when the measurement object is irradiated with an electron beam, the X-ray intensity emitted from the element is used to measure the existence rate of the element as the measurement object, and its intensity is generally reflected in color It is represented by the color mapping of the EPMA image. That is, the points where there is no element to be measured are displayed in all black, and the elements are displayed in the descending order of the probability of existence of the element. As an example, they are displayed in a color gradient of "white, red, yellow, green, blue, black", etc. . In the vicinity of the joint surface of such an EPMA image, as long as the point where the gold intensity is the smallest, that is, the EPMA image is not completely black, but the darkest spot (close to black blue spot) in the spot where the intensity of gold is observed When the concentration is 5.0 atomic% or more, the region displayed in a color stronger than the above-mentioned intensity other than the above can be specified as the gold-concentrated junction region. In addition, the results of the linear analysis and the EPMA image (area analysis) are superimposed, and the result of the linear analysis is that the gold concentration is 5.0 at% or more, and the intensity is the same as or more than the measurement point on the EPMA. "Place" is a setting that is recognized as the intensity difference (color on the image), or it is judged by visual inspection. In this way, the presence or absence of the gold-enriched bonding area and the occupancy rate can be calculated. In addition, in the case of calculating the occupancy rate of the gold-enriched junction area, although the EPMA color map image is used, the gold-enriched junction area may appear to become "sparse" as the image is enlarged. Therefore, it is better to use at least The occupancy rate can be calculated by accommodating the spherical compression part in a magnification of about 1 image (frame).
實施型態的線接合構造1中,以銀作為主成分的芯材(銀芯材)4,係主要構成接合線3者,其發揮接合線3的功能。這樣的芯材4較佳係由純銀所構成,但視情況亦可由對於銀加入添加元素的銀合金所構成。然而,為了避免損及作為銀接合線的功能,芯材4為包含銀作為主成分者。此處,包含銀作為主成分,係指芯材4至少包含50質量%以上的銀。以銀合金構成芯材4的情況,較佳係使用包含選自鈀(Pd)、鉑(Pt)、磷(P)、金(Au)、鎳(Ni)、銅(Cu)、鐵(Fe)、鈣(Ca)、銠(Rh)、鍺(Ge)、鎵(Ga)及銦(In)中至少一個以上之元素的銀合金,但不限於此等。In the
構成芯材4的銀合金中的添加元素,對於電極之接合性、接合可靠度及機械強度的提升等展現效果。然而,若添加元素的含量太多則芯材4的比電阻增加,而具有作為銀接合線的功能降低的疑慮。因此,金被覆銀接合線3,較佳係以在金線(純度99.99質量%(4N))的比電阻以下、例如2.3μΩ・cm以下之範圍內的方式設定添加元素的含量。在以純銀及銀合金的任一者構成芯材4的情況中,亦可包含不可避雜質,但較佳係使金被覆銀接合線3的比電阻成為2.3μΩ・cm以下的範圍的雜質量。藉由應用這樣的銀芯材4,可滿足接合線3所要求的比電阻值。含有大量比電阻低於金的銀的銀合金,經常被認為比電阻較低,但相較於純金(4N),銀合金大多因為合金化而比電阻變高。另外,線的比電阻較佳係以四端子法測量,例如可使用毫歐姆計(橫河Hewlett-Packard股份有限公司製型號4328A)等進行測量。The additive elements in the silver alloy constituting the
實施型態的金被覆銀接合線3中,被覆層5包含金作為主成分。此處,包含金作為主成分,係指被覆層5包含50質量%以上的金。被覆層5中的金含量越多越佳,被覆層5中至少包含50質量%以上的金即可,再者,金含量較佳為80%質量以上,更佳為99質量%以上。被覆層5的金含量,可從接合線3的表面藉由歐傑電子光譜(AES:Auger Electron Spectroscopy)等進行線最表面之定量分析來測量。另外,此處所指的金含量,係相對於檢測出來的金屬元素總量的值,並不包含以吸附等而存在於表面的碳或氧等。In the gold-coated
上述金被覆銀接合線3,較佳係具有13μm以上、30μm以下的線徑。線3的線徑若小於13μm,則在製造半導體裝置時使用接合線3進行打線接合時,具有強度及導電性等降低而導致打線接合的可靠度等降低的疑慮。線3的線徑若超過30μm,則無法增加接合條數以及與鄰接之接合線接觸(短路)的可能性變高。The gold-coated
具有上述線徑的金被覆銀接合線3中,因應線徑,被覆層5的厚度較佳為50nm以上、260nm以下。被覆層5的厚度,係表示以金作為主成分的區域從線3表面相對於垂直方向往芯材4之深度方向上的厚度。被覆層5的厚度若小於50nm,則具有無法藉由金作為主成分的被覆層5來充分提高金被覆銀接合線3與電極2之接合可靠度的疑慮。被覆層5的厚度若超過260nm,則具有被覆層5的形成性降低的疑慮。另外,被覆層5的厚度較佳係因應金被覆銀接合線3的線徑設定。In the gold-coated
被覆層5的厚度係以下述方式進行測量。亦即,金被覆銀接合線3中,藉由AES從其表面在深度方向上實施元素濃度分析,在將存在於表面附近的金含量之最大值設為100%時,將位於50%之處作為交界部分,求出從該交界部分至表面的區域以作為被覆層5的厚度。從金被覆銀接合線3的表面往深度方向的元素分布,可藉由AES分析來測量。例如,作為從線1的表面往銀芯材4分析被覆層5的各元素濃度的手段,藉由AES分析來可有效地測量濃度。此處,作為一例,係使用日本電子製的歐傑電子光譜裝置(商品名稱:JAMP-9500F),並以一次電子束的加速電壓設定為10kV、照射電流設定為50nA、電子束直徑設定為約4μmφ、使Ar離子濺射速度在SiO2
換算值下約為3.0nm/min的條件來實施。The thickness of the
實施型態的線接合構造1中,電極2與球體壓縮部6的接合界面附近的金濃化接合區域7的形成方法並未特別限定。作為金濃化接合區域7的形成方法,例如可在金被覆銀接合線3的一端形成FAB時,藉由在FAB的表面形成金濃化之區域(表面金濃化區域)來達成。將表面形成有金濃化區域的FAB接合於電極2而形成球體壓縮部6,藉此可在電極2與球體壓縮部6的接合界面附近形成金濃度相對於金、銀與鋁的總量而言為5原子%以上的金濃化接合區域7。詳細形成方法於後段中敘述。In the
作為金濃化接合區域7之形成方法的一例,針對控制接合線而形成的方法進行說明。亦即,敘述將表面形成有金濃化區域的FAB接合於電極2而形成球體壓縮部6的方法。在將金被覆銀接合線3接合於電極2時,首先如圖4所示,在金被覆銀接合線3的一端形成FAB8。作為FAB8的形成條件,例如金被覆銀接合線3的線徑在13μm以上、30μm以下的情況,因應線徑以放電電流值在30mA以上、120mA以下、FAB8的直徑成為線徑的1.5倍以上、2.0倍以下的方式設定電弧放電條件。接合裝置,例如可使用Kulicke&Soffa公司製的接合裝置(全自動接合機:IConn PLUS)等的市售品。使用該接合裝置的情況,作為裝置的設定,較佳係應用放電時間50μs以上、1000μs以下,EFO-Gap為20mil以上、40mil以下(約635μm以上、1143μm以下)、尾端長度為6mil以上、12mil以下(約152μm以上、305μm以下)。又,使用該接合裝置以外之接合裝置的情況,只要是與該接合裝置相同的條件,例如FAB8的直徑成為與該接合裝置相同之尺寸的條件即可。As an example of a method of forming the gold-
此時,在使被覆於銀接合線表面之金被覆層5熔融凝固以製作FAB時,表面的金進入球體內部,結果球體表面的金濃度下降,銀濃度相對上升,在接合於以鋁作為主成分之電極時,會產生容易腐蝕的Ag3
Al金屬間化合物,對於這樣的課題,發明人等反覆詳細研究是否能在形成球體時與固體線相同地使金留在球體表面並相對減少銀濃度,而在接合於鋁電極時生成抗腐蝕的Ag2
Al金屬間化合物,以及是否能使對於化學反應極穩定的「昂貴」的金停留於打線接合界面附近。特別思考在對於金被覆層添加何種元素才能在熔融時使金留在表面,因而反覆進行在金鍍覆時添加多種元素而製作FAB並分析其表面之金濃度這樣的實驗。結果終於發現若添加第15及16族元素則金會留在FAB表面。At this time, when the
通常,在以未添加特別元素的金形成的情況,在使金被覆銀接合線3的一端熔融、凝固而形成FAB8時,構成被覆層5的金進入銀芯材4中。因此,無法在FAB8的表面形成金濃化區域(表面金濃化區域)。換言之,金被覆層,在FAB8形成之前發揮效果,但在FAB8形成後並無法使表面金濃化區域存在。亦即,雖在楔形接合中發揮效果,但在球體接合中並無法充分發揮高可靠度的效果。即使將這樣的FAB8接合於電極2,亦無法再現性良好地於電極2與球體壓縮部6的接合界面附近形成金濃化接合區域7。此處,僅使金層的厚度變厚,與銀芯材的直徑相比的情況,金層厚度的比例小,因此無法抑制金進入銀芯材中。又,僅根據金層厚度來提高FAB形成後表面中的金濃度的情況,與其說是金被覆銀線,反而更接近金線的狀態,材料成本大幅上升。又,將金層的厚度換算為線整體中的金濃度,若超過7質量%,則FAB的球體形成性、亦即球體發生偏芯等的可能性變高。Generally, when it is formed of gold without adding a special element, when one end of the gold-coated
發明人等,如前述詳細研究的結果,清楚了解抑制FAB8形成時金進入銀芯材4中的解決手段。為了抑制金進入銀芯材4中,可藉由使構成被覆層5的金含有選自硫(S)、硒(Se)、碲(Te)、砷(As)、及銻(Sb)中的至少一個以上的第15及16族元素。進一步發現,就量而言,第15及16族元素的總量相對於線整體而言在4質量ppm以上80質量ppm以下較為合適。As a result of the aforementioned detailed studies, the inventors clearly understood the solution to prevent the ingress of gold into the
由第15及16族元素抑制金進入銀芯材4中的機制雖尚不明確,但據推測是在FAB8形成的過程中,被覆層5中的第15及16族元素影響熔融狀態之被覆層5的表面張力,而對於金濃化區域的形成有所貢獻。以往的金被覆銀接合線的情況,熔融銀的表面張力小於熔融金的表面張力,因為表面張力不同而產生的流動(馬蘭哥尼對流,Marangoni convection)係從表面張力小者朝向大者,亦即從熔融銀(熔融球體)朝向熔融金(熔融狀態的被覆金)發生,而熔融金則往球體內部移動。另一方面,第15及16族元素存在於被覆層5的情況,經熔融的被覆層5之表面張力變得比熔融銀小,而馬蘭哥尼對流的方向反轉成從熔融金往熔融銀的方向,因此熔融金不會進入FAB8的內部。因此,可推測FAB8的表面形成表面金濃化區域9。Although the mechanism of the 15th and 16th group elements inhibiting gold from entering the
針對上述被覆層5中的第15及16族元素之效果發揮的時機及表面金濃化區域形成的過程,依照FAB8的形成過程進行說明。在將金被覆銀接合線3於引線或凸塊上進行第2接合之後,送出既定長度的線,在已切斷的接合線3之前端與放電矩之間產生電弧放電,而使線前端熔融,藉此形成FAB8。接合線3在第2接合時被焊管壓扁而變形,因此接合線3與焊管接觸之區域並不存在被覆層5,而成為芯材4露出的狀態。熔融球體形成的初期階段,僅此芯材4露出的線前端熔融而成的球體中存在有不存在被覆層5之處,因此未形成金濃化區域。藉由電弧放電,隨著初期熔融球體的熔融進行,芯材4未露出的線部分開始熔融,而被覆層5中的第15及16族元素影響熔融時的表面張力,熔融金未進入FAB8的內部,而是存在於FAB8的表面區域。最後從小球體逐漸成長為大球體,而從接合線3連續供給金。熔融金與因為電弧放電的熱而熔融的芯材4合金化。The timing at which the effects of the 15th and 16th group elements in the
具有被覆層5的金被覆銀接合線3中,金相對於線3整體的量較佳係以2質量%以上、7質量%以下的範圍包含於其中。相對於線3整體的量而言金含量若小於2質量%,則具有無法提高在使用以銀芯材4為主體之金被覆銀接合線3上所形成之FAB8而形成的球體壓縮部6與電極2之間的接合可靠度的疑慮。相對於線3的整體量而言金含量若超過7質量%,則熔融時的球體形狀甚至是FAB8的形狀會因為偏芯等而不佳,損及球體壓縮部6的形狀及可靠度,而且金被覆銀接合線3的材料成本上升。金含量雖亦與線3的直徑及被覆層5的厚度相關,但相對於線3的整體量而言更佳為3.5質量%以上。In the gold-coated
使被覆層5之中存在第15及16族元素的情況,第15及16族元素,相對於上述金被覆銀接合線3的整體量而言,較佳係以4質量ppm以上、80質量ppm以下的範圍包含於其中。相對於線3的整體量而言第15及16族元素的含量若小於4質量ppm,則無法在形成FAB8時充分得到金的濃化效果、以及由其而來的表面金濃化區域的形成性。相對於線3的整體量而言第15及16族元素的含量若超過80質量ppm,則在被覆層5中容易產生裂縫或破裂等,導致伸線加工時斷線等的加工性、生產性降低,而難以得到預期線徑的金被覆銀接合線3。另外,第15及16族元素亦可混合兩種以上而使用,此情況中可以使第15及16族元素的總量成為上述含有範圍的方式進行調整。When the 15th and 16th group elements are present in the
使用具有包含上述第15及16族元素之被覆層5的被覆銀接合線1的情況,藉由被覆層5所含有的第15及16族元素,在FAB8的表面區域,例如可能亦與所形成之FAB8的直徑相關而從表面相對於深度方向10μm以下(或相對於FAB8的直徑在10%以下)的範圍內,形成表面金濃化區域9。此表面金濃化區域9,在FAB8與電極2接合後亦能夠維持,因此可在電極2與球體壓縮部6的接合界面附近形成金濃化接合區域7。亦即,可得到具有金濃化接合區域7的線接合構造1。另外,上述金濃化接合區域7的形成方法及形成過程為一例,並不限定於此。In the case of using a coated
例如,關於FAB與電極2的接合條件,亦可以如下述之條件形成金濃化接合區域7。具體而言,亦可藉由將金蒸鍍於鋁電極表面等而形成金濃化接合區域7。然而,對於電極被覆金,從材料成本、製造成本的面向而言,成本極高而並不建議。實施型態的線接合構造1,藉由在電極2與球體壓縮部6的接合界面附近設置金濃化接合區域7,可提高上述電極2與球體壓縮部6的接合可靠度,因此金濃化接合區域7的形成方法並未特別限定。For example, regarding the bonding conditions of the FAB and the
以下敘述在金被覆銀接合線3的整體量之中金含量以及第15及16族元素之含量的計算方法。首先計算金含量。將接合線3放入稀硝酸,將芯材4溶解後,收取溶解液。在此溶解液加入鹽酸,以超純水作為定容液。以稀王水溶解被覆層5,以超純水作為定容液。以感應偶合電漿原子發射光譜分析法(ICP-AES:Inductively Coupled Plasma Atomic Emission Spectroscopy)對於此等定容液中的金進行定量分析,藉此測量金含量。The calculation method of the gold content and the content of the
接著計算第15及16族元素的含量。被覆層5的硒及碲的含量,係將接合線3放入稀硝酸,將芯材4溶解後,萃取被覆層5。再者,在稀王水中將被覆層5加熱分解後,使用以超純水定容的溶液進行測量。使用感應偶合電漿原子發射光譜分析法(ICP-MS:Inductively Coupled Plasma Mass Spectrometry)測量此定容液中的硒、碲、砷及銻的定量分析。另一方面,芯材4的硒、碲、砷及銻的含量,係藉由ICP-MS或ICP-AES測量將接合線3放入稀硝酸而將芯材4溶解的液體。之後,從被覆層5及芯材4的金含量與硒、碲、砷及銻的含量算出接合線3整體中的金含量與硒、碲、砷及銻的含量。又,上述之外,亦有在ICP-AES安裝氫化物產生裝置,藉由生成硒、碲、砷及銻的氫化物來進行分析的方法。又,芯材4及被覆層5的硫(S)含量,係對於接合線3使用燃燒紅外線吸收法來進行測量。每1次測量所使用之接合線3的重量較佳為0.5g以上。試料難熔的情況,亦可因應需求使用助燃材。Then calculate the content of the 15th and 16th group elements. The content of selenium and tellurium in the
接著對於接合線的製造方法進行說明。使用銀作為芯材4的情況,係使既定純度的銀熔解,又使用銀合金的情況,係藉由使既定純度的銀與添加元素一起熔解,而得到銀芯材的材料或銀合金芯材的材料。熔解可使用電弧加熱爐、高頻加熱爐、電阻加熱爐、連續鑄造爐等的加熱爐。以防止來自大氣中的氧及氫混入為目的,加熱爐的銀熔湯的上方較佳係保持為真空或氬、氮等的非活性氣體環境。經熔解的芯材之材料,由加熱爐以成為既定線徑的方式鑄造凝固,或是在鑄造模中對於經熔融的芯材之材料進行鑄造而製作鑄錠,再將該鑄錠進行滾筒壓延後,伸線至既定線徑,而得到銀線材(包含純銀線材及銀合金線材)。Next, the manufacturing method of the bonding wire will be described. In the case of using silver as the
作為在銀線材表面形成金層的方法,可使用例如鍍覆法(濕式法)及蒸鍍法(乾式法)。鍍覆法可為電鍍法與無電鍍法的任一方法。衝擊電鍍或閃鍍等的電鍍,其鍍覆速度快,而且若用於金鍍覆則金層對於銀線材的密合性良好,因而較佳。為了在鍍覆法中使金層內含有硫族元素,例如在上述電鍍中,使用在金鍍覆液中包含具有選自硫、硒、碲、砷及銻中至少1者之鍍覆添加劑的鍍覆液。此時,藉由調整鍍覆添加劑的種類及量,可調整被覆層5中的第15及16族元素含量,而能夠進一步調整線3中的第15及16族元素含量。As a method of forming a gold layer on the surface of the silver wire, for example, a plating method (wet method) and a vapor deposition method (dry method) can be used. The plating method may be either an electroplating method or an electroless plating method. Electroplating such as impact plating or flash plating has a high plating speed, and if it is used for gold plating, the adhesion of the gold layer to the silver wire is good, which is preferable. In order to include chalcogen elements in the gold layer in the plating method, for example, in the above electroplating, a plating additive containing at least one selected from sulfur, selenium, tellurium, arsenic, and antimony in the gold plating solution is used Plating solution. At this time, by adjusting the type and amount of the plating additives, the content of the 15th and 16th group elements in the
作為蒸鍍法,可使用濺射法、離子植入法、真空蒸鍍法等的物理蒸鍍(PVD)、以及熱CVD、電漿CVD、有機金屬氣相成長法(MOCVD)等的化學蒸鍍(CVD)。根據此等的方法,形成後的金被覆層無須洗淨,而不具有洗淨時造成表面汙染等疑慮。作為藉由蒸鍍法使金層內含有第15及16族元素的方法,具有使用含有第15及16族元素的金靶材,藉由磁控濺射等而形成金層的方法。應用其以外之方法的情況,只要使用金材料中含有第15及16族元素的原料即可。As the vapor deposition method, physical vapor deposition (PVD) such as sputtering, ion implantation, and vacuum vapor deposition, and chemical vaporization such as thermal CVD, plasma CVD, and metal organic vapor growth (MOCVD) can be used. Plating (CVD). According to these methods, the formed gold coating layer does not need to be cleaned, and there is no doubt that the surface will be contaminated during cleaning. As a method of containing the 15th and 16th group elements in the gold layer by the vapor deposition method, there is a method of forming the gold layer by magnetron sputtering or the like using a gold target containing the 15th and 16th group elements. In the case of applying other methods, it is sufficient to use a raw material containing elements of
形成金層的時機並未特別限定。將被覆了金層的銀線材伸線至最終線徑,因應需求進行熱處理,藉此可製造在銀芯材4的表面設有被覆層5的金被覆銀接合線3。伸線加工可在銀線材的階段實施,亦可在對於銀線材實施伸線加工至一定程度的線徑,在形成金層後再伸線加工至最終線徑。伸線加工與熱處理亦可階段性進行。伸線加工的加工率,係因應所製造的金被覆銀接合線3的最終線徑及用途等來決定。伸線加工的加工率,一般係作為將銀線材加工至最終線徑的加工率,較佳為90%以上。此加工率可作為線剖面積的減少率而算出。伸線加工較佳係以使用多個鑽石模而階段性縮小線徑的方式來進行。此情況中,每一個鑽石模的縮面率(加工率)較佳為5%以上、15%以下。The timing of forming the gold layer is not particularly limited. The silver wire covered with the gold layer is drawn to the final wire diameter, and heat treatment is performed according to the demand, so that the gold-covered
在將被覆有金層的銀線材伸線至最終線徑後,較佳係實施最終熱處理。最終熱處理,係在最終線徑時,考量將殘留於線3內部的金屬組織之應變去除的去除應變熱處理及所需之線特性來執行。去除應變熱處理,較佳係考量所需之線特性來決定溫度及時間。此外,亦可在線製造的任何階段實施因應目的之熱處理。作為這樣的熱處理,具有去除線之伸線過程中的應變的熱處理、形成金層後用以提升接合強度的擴散熱處理等。藉由進行擴散熱處理,可提升芯材4與被覆層5的接合強度。熱處理中,使線通過加熱至既定溫度的加熱環境而進行熱處理的移動式熱處理,因為容易調節熱處理條件而較佳。移動式熱處理的情況,熱處理時間可藉由線的通過速度與線在加熱容器內的通過距離來算出。作為加熱容器,可使用電爐等。After the silver wire covered with the gold layer is drawn to the final wire diameter, it is preferable to perform a final heat treatment. The final heat treatment is performed in consideration of the strain removal heat treatment for removing the strain of the metal structure remaining in the
接著,在上述金被覆銀接合線3的一端形成FAB8。FAB8,係在線3之前端與放電矩之間產生電弧放電而使線3之前端熔融所形成。藉由超音波併用熱壓接接合法等,將形成於金被覆銀接合線3之一端的FAB8接合於電極2。一方面以超音波併用熱壓接時的壓力使與電極2接觸的FAB8變形,一方面藉由超音波及熱接合於電極2,藉此可形成接合於電極2的球體壓縮部6。
(半導體裝置)Next,
接著參照圖5至圖7說明應用了實施型態之線接合構造的半導體裝置。另外,圖5係顯示實施型態之半導體裝置進行樹脂密封前之階段的剖面圖,圖6係顯示實施型態之半導體裝置進行樹脂密封後之階段的剖面圖,圖7係放大顯示實施型態之半導體裝置中的半導體晶片之電極與接合線之接合部的剖面圖。Next, a semiconductor device to which the wire bonding structure of the implementation type is applied will be described with reference to FIGS. 5 to 7. In addition, FIG. 5 is a cross-sectional view showing the semiconductor device of the implementation type at a stage before resin sealing, FIG. 6 is a cross-sectional view showing the semiconductor device of the implementation type at a stage after resin sealing, and FIG. 7 is an enlarged view of the implementation type A cross-sectional view of the junction between the electrode of the semiconductor chip and the bonding wire in the semiconductor device.
實施型態的半導體裝置10(進行樹脂密封前的半導體裝置10X),如圖5及圖6所示,具有:電路基板12,具有外部電極11;多個半導體晶片14(14A、14B、14C),配置於電路基板12上,分別至少具有一個電極(晶片電極)13;及接合線15,將電路基板12的外部電極11與半導體晶片14的電極13、以及多個半導體晶片14的電極13之間連接。電路基板12,例如係使用在樹脂材料或陶瓷材料等的絕緣基材表面或內部設置配線網的印刷配線板或陶瓷電路基板等。The
另外,圖5及圖6係顯示在電路基板12上安裝多個半導體晶片14的半導體裝置10,但半導體裝置10的構成不限於此。例如,半導體晶片亦可安裝於引線框架上,此情況中,半導體晶片的電極,係透過接合線15連接於具有作為引線框架的外部電極之功能的外引線。對於半導體晶片的電路基板或引線框架的搭載數可為一個及多個任一者。接合線15係應用於電路基板12的外部電極11與半導體晶片14的電極13、引線框架與半導體晶片的電極、以及多個半導體晶片14的電極13之間的至少1者。5 and 6 show the
圖5及圖6所示的半導體裝置10的多個半導體晶片14之中,半導體晶片14A、14C透過晶粒接合材料16安裝於電路基板12的晶片安裝區域。半導體晶片14B,透過晶粒接合材料16安裝於半導體晶片14A上。半導體晶片14A的一個電極13,透過接合線15與電路基板12的外部電極11連接,另一個電極13透過接合線15與半導體晶片14B的電極13連接,再另一個電極13透過接合線15與半導體晶片14C的電極13連接。半導體晶片14B的另一個電極13,透過接合線15與電路基板12的外部電極11連接。半導體晶片14C的其他一個電極13,透過接合線15與電路基板12的外部電極11連接。Among the plurality of
半導體晶片14,具有矽(Si)半導體或化合物半導體等所構成之積體電路(IC)。晶片電極13,例如,係由至少在最表面具有鋁(Al)層、AlSiCu、AlCu等的鋁合金層的鋁電極所構成。鋁電極,例如係以與內部配線電連接的方式將Al或Al合金等的電極材料被覆於矽(Si)基板表面而形成。半導體晶片14,透過外部電極11及接合線15而與外部裝置之間進行資料通訊,或是從外部裝置供給電力。The
電路基板12的外部電極11,係透過接合線15與安裝於電路基板12的半導體晶片14之電極13電連接。實施型態的半導體裝置10中,接合線15的一端在晶片電極13上進行球體接合(第1接合),另一端則在外部電極11上進行楔形接合(第2接合)。以接合線15將多個半導體晶片14的電極13之間連接的情況亦相同,接合線15的一端係在半導體晶片14的晶片電極13上進行球體接合(第1接合),另一端則是在其他半導體晶片14的晶片電極13上進行楔形接合(第2接合)。另外,半導體晶片14的電極13,亦包含在位於半導體晶片14上之電極墊上預先接合凸塊的形態(圖中未顯示)。The
在將接合線15的一端進行球體接合而接合於晶片電極13時,藉由放電等使接合線15的一端熔融,並因為表面張力等凝固為球狀,藉此形成如圖4所示之FAB8。藉由超音波併用熱壓接接合法等,將這樣的FAB8接合於晶片電極13,藉此形成圖1所示之線接合構造1。亦即,如圖7所示,形成具有接合線15、晶片電極13、以及晶片電極13上所接合之球體壓縮部6的線接合構造1。之後,以將多個半導體晶片14及接合線15進行樹脂密封的方式,於電路基材12上形成密封樹脂層17,藉此製造半導體裝置10。作為半導體裝置10的具體例,可列舉邏輯IC、類比IC、離散半導體、半導體記憶體、光半導體等。When one end of the
半導體裝置10中的線接合構造1,應用上述實施型態的線接合構造1。亦即,在設置於接合線15之一端的球體壓縮部6與晶片電極13的接合界面附近,如圖1所示,設有金濃度相對於金、銀與鋁的總量而言為5原子%以上的金濃化接合區域7。藉由使這樣的金濃化接合區域7存在而提高接合界面附近的金濃度,抑制極脆且易腐蝕的Ag3
Al金屬間化合物的形成,而形成耐蝕性優良且穩定的Ag2
Al金屬間化合物,藉此可提升電極2與球體壓縮部6的接合可靠度,而可進一步提高半導體裝置1的可靠度。
實施例The
接著,針對本發明的實施例進行說明。本發明不限於以下的實施例。例1~26為實施例,例27~32為比較例。 (實施例1~26)Next, an embodiment of the present invention will be described. The present invention is not limited to the following embodiments. Examples 1 to 26 are examples, and examples 27 to 32 are comparative examples. (Examples 1~26)
作為芯材,準備以連續鑄造所製作的銀或銀合金的芯材,進行連續伸線至中間線徑0.05mm~1.0mm。再者,在中間線徑的銀線材上,使用適量添加了硫、硒、碲、砷及銻的各種添加劑的金電鍍浴,在一方面將銀線材連續送線一邊將其浸漬的狀態下,以電流密度0.20A/dm2 以上、2.0A/dm2 以下對於銀線材通入電流,形成金被覆層。之後,對於進行伸線加工至最終線徑φ20μm的線實施最終熱處理,製作實施例1至實施例26的金被覆銀接合線。 (比較例27~32)As the core material, a core material of silver or silver alloy produced by continuous casting is prepared, and the wire is continuously drawn to an intermediate wire diameter of 0.05 mm to 1.0 mm. Furthermore, on the silver wire of the middle diameter, a gold electroplating bath added with various additives such as sulfur, selenium, tellurium, arsenic and antimony is used, while the silver wire is continuously fed while being immersed, A current is applied to the silver wire at a current density of 0.20 A/dm 2 or more and 2.0 A/dm 2 or less to form a gold coating layer. After that, the wire drawn to a final wire diameter of φ20 μm was subjected to final heat treatment to produce gold-coated silver bonding wires of Examples 1 to 26. (Comparative Examples 27~32)
與實施例相同地製作金被覆銀接合線。關於接合線的組成,整理顯示於表1。 (含量測量)A gold-coated silver bonding wire was produced in the same manner as in the example. Regarding the composition of the bonding wire, it is summarized and shown in Table 1. (Content measurement)
金被覆銀接合線中的金含量(金源自被覆層,並未包含於銀芯材)、添加於銀芯材之元素的鈀、銦及第15及16族元素含量係根據上述方法(參照[0050]、[0051])進行測量。其結果顯示於表1。The gold content of the gold-coated silver bonding wire (gold comes from the coating layer and is not contained in the silver core material), the palladium, indium, and
(線表面破裂觀察)(Observation of wire surface rupture)
使用KEYENCE公司製的雷射顯微鏡(商品名稱:VK-X200),對於中間線徑及最終線徑的金被覆銀接合線的外觀,以高倍率確認金被膜有無破裂(龜裂)。採樣數共10個,只要發現有1條主要因為伸線加工時產生的拉伸應力導致金被膜中產生龜裂而銀芯材露出的情況則為不合格(X)、1條也沒發現的情況則為合格(○)。其結果顯示於表1。另外,針對表面具有破裂的樣本,不實施後續的球體形成性及HAST評價等,因此表中顯示為未實施(-)。 (FAB製作條件)Using a laser microscope manufactured by KEYENCE (trade name: VK-X200), the appearance of the gold-coated silver bonding wire of the middle wire diameter and the final wire diameter was checked for cracks (cracks) in the gold coating at high magnification. There are 10 samples in total. As long as one is found that the gold film is cracked and the silver core material is exposed due to the tensile stress generated during the wire drawing process, it is unacceptable (X), and no one is found. The situation is qualified (○). The results are shown in Table 1. In addition, for samples with cracks on the surface, subsequent sphere formation and HAST evaluations were not performed, and therefore, it was shown as non-implemented (-) in the table. (FAB production conditions)
藉由上述條件製作FAB,以上述接合條件接合於電極(參照[0024]、[0040])。 (球體形成性)The FAB was fabricated under the above conditions, and bonded to the electrodes under the above bonding conditions (see [0024], [0040]). (Spheroid formation)
球體形成性可以球體壓接後的正圓性進行評價。針對30條的第1接合,從上方觀察經過接合的球體,測量壓接球體的最大寬度以及與其正交之寬度,求出最大寬度及與其正交之寬度的比(最大寬度/正交之寬度)。就該比值而言,若上述30條的平均值在1.00以上且小於1.15則為良好(○)、若在1.15以上則有問題而為不良(X)
(金濃化接合區域等的測量)The formability of the sphere can be evaluated by the roundness after the sphere is crimped. For the first joint of
接著,針對以上述方法製作之樣本的接合界面附近,測量有無金濃化接合區域(金濃度分析值)、以及相對於球體壓縮部之全長為8分之1處與球體壓縮部的端部之間是否存在金濃化接合區域,並且在接合界面附近的占有率是否在25%以上。針對一個樣本,可形成四組電極與球體接合的接合構造。針對該四組進行上述三個評價。針對金濃化接合區域的金濃度,係不考慮鈀、銦及第15及16族元素等的添加元素而求得。亦即,不算入分母而求得。表1的金濃化接合區域的金的分析值,係採用四組接合構造之中金濃度最高之一組的值,從該組之接合界面附近的線性分析之測量點,依照金濃度由高至低的順序選出3點,記載該3點的平均值。從壓縮部的兩端至上述8分之1處之間是否具有金濃化接合區域的評價,四組球體皆具有的情況為合格(○),只要有1組沒有即為不合格(X)。相同地,關於金濃化接合區域的占有率,四組的接合構造皆在25%以上的情況為合格(○)、只要有1組小於25%的情況則記載為不合格(X)。
(關於各評價方法的詳細內容,參照[0027]至[0032])。
(HAST試驗用樣本的製作)Next, for the vicinity of the bonding interface of the sample prepared by the above method, the presence or absence of the gold-concentrated bonding area (analyzed gold concentration) and the one-eighth of the full length of the sphere compression part and the end of the sphere compression part were measured. Whether there is a gold-concentrated bonding area between them, and whether the occupancy rate near the bonding interface is above 25%. For one sample, a bonding structure in which four groups of electrodes are bonded to a ball can be formed. The above three evaluations were performed for the four groups. The gold concentration in the gold-concentrated junction area is determined without considering additional elements such as palladium, indium, and
針對各例中所得之金被覆銀接合線,以市售的接合裝置(K&S ICONN),在BGA(Ball Grid Array)基板上的厚度300μm之Si晶片上的厚度0.8μm的Al-0.5質量%Cu合金電極上,分別以與上述焊球、球體接合及第二接合相同的條件進行打線接合。亦即,焊球的形成係使用全自動接合機,以使球體徑成為線徑之1.5~2.3倍的範圍之既定尺寸的方式,使放電結球(EFO)電流為30~90mA的範圍,放電時間為50~1000μs的範圍,而分別將其調整為既定值,並以EFO-Gap為25~45mil(約635~1143μm)、尾端長度為6~12mil(約152~305μm)而進行。Regarding the gold-coated silver bonding wire obtained in each example, using a commercially available bonding device (K&S ICONN), a Si wafer with a thickness of 300μm on a BGA (Ball Grid Array) substrate is 0.8μm in thickness Al-0.5 mass% Cu The alloy electrodes were wire-bonded under the same conditions as the above-mentioned solder balls, ball bonding, and second bonding. That is, the solder ball is formed by using a fully automatic bonding machine to make the diameter of the sphere into a predetermined size in the range of 1.5 to 2.3 times the wire diameter, and the discharge ball (EFO) current is in the range of 30 to 90 mA, and the discharge time It is in the range of 50~1000μs, and adjusted to the predetermined value, and the EFO-Gap is 25~45mil (about 635~1143μm), and the end length is 6~12mil (about 152~305μm).
第1接合的條件,例如,針對線徑φ為20μm的實施例1,形成球體徑為36μm的焊球,並以球體壓縮部的高度為10μm、球體壓縮部中與接合面平行之方向上的最大寬度為45μm、球體殼層強度15gf以上的方式調整接合條件。此時,晶片上的Al-0.5質量%Cu合金電極,僅與相鄰的凸塊部電連接,相鄰的2條線彼此電性地形成一個電路,共形成320個電路。之後,使用市售的轉印模具機(第一精工製股份有限公司,GPGP-PRO-LAB80),對於此BGA基板上的Si晶片進行樹脂密封而得到試片。另外,密封之樹脂係使用市售的無鹵素樹脂(氯濃度15ppm以下,ph6以上、7以下)。又,針對實施例的試片,以使球體壓縮部的高度為7~13μm、球體壓縮部中與接合面平行之方向的最大寬度為所形成之焊球的1.2倍的方式進行球體接合。 <HAST(Highly Accelerated Temperature and Humidity Stress Test(高溫高濕環境暴露試驗))>The first bonding conditions, for example, for Example 1 with a wire diameter φ of 20 μm, a solder ball with a sphere diameter of 36 μm is formed, and the height of the sphere compression part is 10 μm, and the sphere compression part is in the direction parallel to the joint surface. Adjust the bonding conditions so that the maximum width is 45 μm and the sphere shell strength is 15 gf or more. At this time, the Al-0.5% by mass Cu alloy electrode on the wafer is only electrically connected to the adjacent bumps, and two adjacent lines electrically form a circuit with each other, forming a total of 320 circuits. After that, using a commercially available transfer mold machine (Daiichi Seiko Co., Ltd., GPGP-PRO-LAB80), the Si wafer on the BGA substrate was resin-sealed to obtain a test piece. In addition, the sealing resin is a commercially available halogen-free resin (chlorine concentration below 15 ppm, ph above 6 and below 7). In addition, for the test piece of the example, the ball joint was performed so that the height of the ball compression portion was 7 to 13 μm, and the maximum width of the ball compression portion in the direction parallel to the bonding surface was 1.2 times the formed solder ball. <HAST (Highly Accelerated Temperature and Humidity Stress Test (high temperature and high humidity environment exposure test))>
針對該試片,使用HAST裝置(平山製作所股份有限公司,PCR8D),以130℃、85.0%RH(相對濕度)、2.2大氣壓保持200小時。保持前後測量上述320電路的電阻值,比較保持後的電阻值與保持前之電阻值,所有的電路中,上升率皆為8%以下的情況為(S),只要有一個電路超過8%而其以外的電路在10%以下的情況為(A),只要有一個電路超過10%而其以外的電路在15%以下的情況為(B),只要有一個電路超過15%而其以外的電路在20%以下的情況為(C),只要有一個超過20%的電路的情況則為不良(×)。20%以下賦予S至C的排序,但皆為產品上沒有問題的等級,因此為合格。For this test piece, a HAST device (Hirayama Manufacturing Co., Ltd., PCR8D) was used, and it was kept at 130° C., 85.0% RH (relative humidity), and 2.2 atmospheres for 200 hours. Measure the resistance value of the above 320 circuit before and after the hold, compare the resistance value after the hold with the resistance value before the hold. In all circuits, the case where the rise rate is less than 8% is (S), as long as one circuit exceeds 8%, The case where the other circuits are less than 10% is (A), as long as one circuit exceeds 10% and the other circuits are less than 15%, it is (B), as long as one circuit exceeds 15% and the other circuits If it is less than 20%, it is (C), and if there is a circuit exceeding 20%, it is bad (×). 20% or less is assigned a ranking from S to C, but they are all grades with no problems on the product, so they are qualified.
[表1]
如表1所示,根據實施例1~26的金被覆銀接合線,可在包含鋁的電極與球體壓縮部的接合界面附近形成金濃度相對於鋁、銀與金的總計而言為5.0原子%以上的金濃化接合區域。藉由具有這樣的接合構造,可提供HAST評價良好、即使長時間暴露於高溫高濕等的嚴苛環境下連接部的比電阻亦不會上升而具有高可靠度的半導體裝置。作為由表1所示的傾向,金濃化接合區域較佳係位於接合界面的兩端附近,又,藉由接合界面中金濃化接合區域相對於球體壓縮部之寬度占25%以上,可知HAST評價為良好。再者,在線的芯材中添加鈀或銦的添加元素,亦為HAST評價成為良好的要件之一。關於金濃化接合區域的金濃度,亦具有金濃度越高,HAST評價越好的傾向。若要進行比較,則認為相較於在芯材中添加鈀等而言,金濃度高對於HAST評價的影響更為優良。As shown in Table 1, according to the gold-coated silver bonding wires of Examples 1 to 26, the gold concentration can be formed in the vicinity of the bonding interface between the electrode containing aluminum and the compressed portion of the sphere, and the gold concentration is 5.0 atoms relative to the total of aluminum, silver, and gold. More than% of the gold concentrates the junction area. By having such a bonding structure, it is possible to provide a highly reliable semiconductor device that has a good HAST evaluation and does not increase the specific resistance of the connection part even if exposed to severe environments such as high temperature and humidity for a long time. As the tendency shown in Table 1, the gold-concentrated bonding area is preferably located near both ends of the bonding interface, and the width of the gold-concentrated bonding area in the bonding interface with respect to the spherical compression portion accounts for more than 25%, it can be seen that HAST evaluated as good. Furthermore, the addition of palladium or indium to the in-line core material is also one of the requirements for good HAST evaluation. Regarding the gold concentration in the gold-concentrated junction area, there is also a tendency that the higher the gold concentration, the better the HAST evaluation. For comparison, it is considered that a high gold concentration has a better effect on HAST evaluation than adding palladium to the core material.
另一方面,如比較例所示,被覆於線上的金層(表1中經過濃度換算的值)若小於2.0質量%,則金濃化接合區域的金濃度小於5原子%,在HAST評價中為不合格,相反地若使被覆於線的金層變得太厚(此處經過濃度換算若超過7質量%),在FAB形成時發生偏芯等,可知球體形成性變差。第15族元素及第16族元素的添加量亦為重要。若小於4質量ppm,則金濃化接合區域的金濃度小於5原子%,HAST評價亦為不合格,若超過80質量ppm,則是導致線表面破裂而造成不良。當然,未添加第15族及第16族元素的情況,金濃化接合區域亦小於5原子%,HAST評價亦為不合格。On the other hand, as shown in the comparative example, if the gold layer covering the wire (the value converted from the concentration in Table 1) is less than 2.0% by mass, the gold concentration in the gold-concentrated junction area is less than 5 at%, which is evaluated by HAST It is unacceptable. On the contrary, if the gold layer covering the wire becomes too thick (here, if it exceeds 7% by mass after concentration conversion), eccentricity occurs during FAB formation, and it can be seen that the sphere formability deteriorates. The addition amount of
如以上所述,根據本發明之線接合構造及使用於該線接合構造的接合線,除了抑制接合線的比電阻上升以外,在電極與球體壓縮部的接合界面附近,設置金濃度相對於金、銀與鋁的總量而言為5原子%以上的金濃化接合區域,藉此可提高電極與球體壓縮部的接合可靠度。又,根據應用了這種線接合構造的本發明之半導體裝置,而可藉由金濃化接合區域來提升電極與球體壓縮部的接合可靠度,進一步可提升半導體裝置自身的可靠度。As described above, according to the wire bonding structure of the present invention and the bonding wire used in the wire bonding structure, in addition to suppressing the increase in the specific resistance of the bonding wire, a gold concentration relative to the gold concentration is set near the bonding interface between the electrode and the ball compression portion. , The total amount of silver and aluminum is 5 atomic% or more in the gold-concentrated bonding area, which can improve the reliability of bonding between the electrode and the compressed part of the ball. In addition, according to the semiconductor device of the present invention to which such a wire bonding structure is applied, the bonding reliability between the electrode and the ball compression portion can be improved by the gold-concentrated bonding area, and the reliability of the semiconductor device itself can be further improved.
1:線接合構造
2:電極
3:金被覆銀接合線
4:芯材(銀芯材)
5:被覆層
6:球體壓縮部
7:金濃化接合區域
8:FAB(球體)
9:表面金濃化區域
10:半導體裝置
10X:半導體裝置
11:外部電極
12:電路基板
13:晶片電極
14:半導體晶片
14A:半導體晶片
14B:半導體晶片
14C:半導體晶片
15:接合線
16:晶粒接合材料
17:密封樹脂層
18:密封樹脂層
X:球體壓縮部6的兩個最外端部
X1:從球體壓縮部6的兩個最外端部到1/8的位置
X2:從球體壓縮部6的兩個最外端部到1/8的位置
Y:球體壓縮部6的最大寬度1: Wire bonding structure
2: Electrode
3: Gold-coated silver bonding wire
4: core material (silver core material)
5: Coating layer
6: Ball compression part
7: Gold thickened junction area
8: FAB (sphere)
9: Surface gold concentration area
10:
圖1係顯示實施型態之線接合構造的剖面圖。 圖2係顯示從實施型態之線接合構造中的球體壓縮部朝向電極實施線分析的濃度分布之一例的圖。 圖3係顯示實施型態之線接合構造中的金濃化接合區域之形成位置的一例的剖面圖。 圖4係顯示實施型態之線接合構造中所使用的金被覆銀接合線的一端形成FAB之狀態的剖面圖。 圖5係顯示實施型態之半導體裝置進行樹脂密封前之狀態的剖面圖。 圖6係顯示實施型態之半導體裝置進行樹脂密封後之狀態的剖面圖。 圖7係放大顯示實施型態之半導體裝置中的半導體晶片的電極與接合線之接合構造的剖面圖。FIG. 1 is a cross-sectional view showing the wire bonding structure of the implementation type. FIG. 2 is a diagram showing an example of the concentration distribution of the wire analysis performed from the spherical compression portion toward the electrode in the wire bonding structure of the embodiment. 3 is a cross-sectional view showing an example of the formation position of the gold-concentrated bonding area in the wire bonding structure of the implementation type. 4 is a cross-sectional view showing a state in which one end of the gold-coated silver bonding wire used in the wire bonding structure of the embodiment is formed with a FAB. FIG. 5 is a cross-sectional view showing the state before the resin sealing of the semiconductor device of the embodiment type. FIG. 6 is a cross-sectional view showing the state of the semiconductor device of the embodiment after resin sealing. FIG. 7 is an enlarged cross-sectional view showing the bonding structure of the electrode of the semiconductor wafer and the bonding wire in the semiconductor device of the embodiment type.
1:線接合構造1: Wire bonding structure
2:電極2: Electrode
3:金被覆銀接合線3: Gold-coated silver bonding wire
4:芯材(銀芯材)4: core material (silver core material)
5:被覆層5: Coating layer
6:球體壓縮部6: Ball compression part
7:金濃化接合區域7: Gold thickened junction area
Claims (7)
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JP (1) | JP7269361B2 (en) |
KR (1) | KR20220047621A (en) |
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TWI792962B (en) * | 2021-06-25 | 2023-02-11 | 日商日鐵新材料股份有限公司 | Bonding wire for semiconductor devices |
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US11929343B2 (en) | 2021-06-25 | 2024-03-12 | Nippon Micrometal Corporation | Bonding wire for semiconductor devices |
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US20230319971A1 (en) * | 2022-03-30 | 2023-10-05 | Applied Materials, Inc. | Methods of manufacturing plasma generating cells for a plasma source |
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WO2021065036A1 (en) | 2021-04-08 |
TWI812853B (en) | 2023-08-21 |
KR20220047621A (en) | 2022-04-18 |
JP7269361B2 (en) | 2023-05-08 |
CN114502754A (en) | 2022-05-13 |
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JPWO2021065036A1 (en) | 2021-04-08 |
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