TW202032727A - Flip-chip package structure of power chip and packaging method thereof - Google Patents

Abstract

The present disclosure provides a flip-chip package structure of a power chip. The flip-chip package structure of the power chip includes a first frame, a second frame and the power chip. The first frame includes a first metal layer extending from an inner surface of a first body toward a surface of a first foot. The second frame and the first frame are assembled, and the second frame includes a second metal layer extending from an inner surface of a second body toward a surface of a second foot. The power chip is disposed between the first frame and the second frame and includes a first chip surface, a first conductive portion, a second surface and a second conductive portion. The first conductive portion is located at the first surface and is electrically connected to the first metal layer. The second conductive portion is located at the second surface and is electrically connected to the second metal layer. Therefore, the instability caused by indirectly connection is prevented.

Description

Power chip flip chip packaging structure and packaging method thereof

The present invention relates to a power chip packaging structure and a packaging method thereof, and in particular to a power chip flip-chip packaging structure and a packaging method using flip-chip packaging.

The conventional power chip packaging structure includes a plastic shell, a plurality of pins, and a power chip. The power chip is arranged inside the plastic shell and is electrically connected to the pins through wire bonding. The pins are then exposed on the plastic shell for use Connect with application circuit.

However, the stability of this packaging method is insufficient, and when the power chip is a high-power chip, it is easy to emit a large amount of heat during use, but the heat dissipation of the plastic shell is not good, which causes the life of the power chip to be shortened. Although heat dissipation fins are currently added to the plastic shell, the heat dissipation effect is still limited.

In view of this, how to effectively increase the stability of the power chip package structure has become the goal of the relevant industry.

The present invention provides a power chip flip chip packaging structure and a packaging method thereof. Through the configuration of the first lead frame and the second lead frame, electrical stability can be effectively increased, and the power chip flip chip packaging structure is more convenient for follow-up Circuit installation.

An embodiment according to an aspect of the present invention provides a power chip flip-chip package structure, which includes a first lead frame, a second lead frame and a power chip. The first lead frame includes a first body, at least one first pin, and at least one first metal layer. The at least one first pin is integrally connected to the first body. The at least one first metal layer is formed from the first body. An inner surface extends to at least one of the plurality of surfaces of the at least one first pin. The second lead frame is assembled with the first lead frame and includes a second body, at least one second pin, and at least one second metal layer. The at least one second pin is integrally connected to the second body, and the at least one The two metal layers extend from an inner surface of the second body to at least one of the plurality of surfaces of the at least one second pin. The power chip is located between the first lead frame and the second lead frame and includes a first chip surface, at least one first conductive part, a second chip surface, and at least one second conductive part. The first chip surface faces the first lead Frame, the at least one first conductive portion is located on the surface of the first chip and is electrically connected to the at least one first metal layer, and the number of the at least one first conductive portion corresponds to the number of the at least one first metal layer; second The surface of the chip faces the second lead frame, the at least one second conductive portion is located on the surface of the second chip and is electrically connected to the at least one second metal layer, and the number of the at least one second conductive portion corresponds to the at least one second metal The number of layers. Among them, at least one of the first lead frame and the second lead frame The power chip is contained in a groove. After the first lead frame and the second lead frame are assembled, at least one first pin and at least one second pin are arranged at intervals.

Thereby, the electrical properties of the first conductive portion of the power chip can be directly conducted to the first pin, and the electrical properties of the second conductive portion can be directly conducted to the second pin, thereby reducing the electrical conductivity caused by multiple indirect electrical conduction. Sexual instability.

According to the foregoing multiple embodiments of the power chip flip chip package structure, the number of the at least one first pin may be one, the number of the at least one second pin may be two, and the groove is located in the first body. Or the first pin can protrude from the first body along a z-axis direction, and the two second pins can protrude from the second body along a y-axis direction. After the second lead frame is assembled with the first lead frame, the first One pin is located between the two second pins and arranged in parallel. Or at least one surface of the first pin may have an inclined surface connected to the inner surface of the first body.

According to the aforementioned multiple embodiments of the power chip flip-chip package structure, it may further include a heat sink fin disposed on the first lead frame. Or the first lead frame may further include an outer metal layer, and the first body further includes an outer surface, wherein the outer metal layer is disposed on the outer surface, and the outer metal layer is provided for heat dissipation fins.

Another embodiment according to one aspect of the present invention provides a power chip flip chip packaging method, which is applied to the aforementioned power chip flip chip packaging structure. The power chip flip chip packaging method includes a power chip implantation step, an assembly step, and a Waterproof step. The power chip implantation step is to set at least one second conductive material on the at least one second metal layer of the second lead frame, and fix the power chip on the at least one second metal layer so that the at least one second conductive portion can pass through The aforementioned at least one second conductive material is electrically connected to the aforementioned at least one second metal layer. The assembly step is to install at least one first conductive material on the aforementioned power chip At least one first conductive part is assembled with a first lead frame so that the at least one first conductive part is electrically connected to the at least one first metal layer through the at least one first conductive material. The waterproofing step is to tightly seal a gap between the first lead frame and the second lead frame with an insulating and waterproof glue material.

According to the foregoing multiple embodiments of the power chip flip-chip packaging method, in the power chip implantation step, the at least one second conductive material may be a solder paste, a silver paste, a conductive glue or a gold ball, and heat The at least one second conductive material is fixed between the power chip and the at least one second metal layer. Alternatively, in the assembling step, the at least one first conductive material may be a solder paste, a silver paste, a conductive glue or a gold ball, and the heating causes the at least one first conductive material to be fixed to the power chip and the at least one Between the first metal layer.

100‧‧‧Power Chip Flip Chip Package Structure

200‧‧‧First lead frame

210‧‧‧First Body

211‧‧‧Inner surface

220‧‧‧First pin

2211‧‧‧Slanted face

230‧‧‧First metal layer

240‧‧‧Groove

300‧‧‧Second Lead Frame

310‧‧‧Second Body

311‧‧‧Inner surface

320_1, 320_2‧‧‧Second pin

330_1, 330_2‧‧‧Second metal layer

400‧‧‧Power chip

410‧‧‧First chip surface

411‧‧‧The first conductive part

420‧‧‧Second chip surface

421, 422‧‧‧Second conductive part

511‧‧‧First conductive material

512‧‧‧Second conductive material

700‧‧‧Power chip flip chip packaging method

710‧‧‧Power chip implantation steps

720‧‧‧Assembly steps

730‧‧‧Waterproof steps

100a‧‧‧Power chip flip chip package structure

200a‧‧‧First lead frame

300a‧‧‧Second Lead Frame

212a‧‧‧Outer surface

250a‧‧‧Outer metal layer

600a‧‧‧Radiating Fins

x, y, z‧‧‧axis direction

Figure 1 shows a three-dimensional schematic diagram of a power chip flip chip package structure according to an embodiment of the present invention; Figure 2 shows an exploded schematic diagram of the power chip flip chip package structure of Figure 1; Figure 3 shows Figure 1 A schematic cross-sectional view of the power-on-chip flip-chip package structure along cutting line 3-3; Fig. 4 shows a schematic cross-sectional view of the power-on-chip flip chip package structure of Fig. 1 along cutting line 4-4; Shows a schematic side view of a flip chip package structure of a power chip according to another embodiment of the present invention; and FIG. 6 shows a flow chart of a method for flip-chip packaging of a power chip according to another embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. For the sake of clarity, many practical details will be explained in the following description. However, the reader should understand that these practical details should not be used to limit the present invention. That is to say, in some embodiments of the present invention, these practical details are unnecessary. In addition, for the sake of simplification of the drawings, some conventionally used structures and elements will be drawn in a simple schematic manner in the drawings; and repeated elements may be represented by the same number or similar numbers.

In addition, when a component (or mechanism or module, etc.) is “connected”, “configured” or “coupled” to another component in this document, it can mean that the component is directly connected, directly disposed, or directly coupled to another component It can also mean that an element is indirectly connected, indirectly disposed, or indirectly coupled to another element, that is, there are other elements between the element and another element. When it is clearly stated that a certain element is "directly connected", "directly arranged" or "directly coupled" to another element, it means that no other element is between the element and another element. The terms first, second, third, etc. are only used to describe different elements or components, and there are no restrictions on the elements/components themselves. Therefore, the first element/component can also be referred to as the second element/component. And the combination of components/components/mechanisms/modules in this article is not a combination of general well-known, conventional or conventional in this field. It cannot be judged whether the combination relationship is based on whether the component/component/mechanism/module itself is conventional It can be easily completed by ordinary knowledgeable persons in the technical field.

Please refer to FIG. 1, FIG. 2, FIG. 3, and FIG. 4. In which, FIG. 1 shows a three-dimensional schematic diagram of a power chip flip chip package structure 100 according to an embodiment of the present invention, and FIG. 2 shows the first The exploded schematic diagram of the power chip flip-chip packaging structure 100 of Figures. Figure 3 shows a schematic cross-sectional view of the power chip flip-chip packaging structure 100 of Figure 1 along the cutting plane line 3-3. Figure 4 shows the schematic diagram of Figure 1 A schematic cross-sectional view of the power chip flip-chip package structure 100 along the cutting plane line 4-4. The power chip flip chip package structure 100 includes a first lead frame 200, a second lead frame 300 and a power chip 400.

The first lead frame 200 includes a first body 210, a first pin 220, and a first metal layer 230. The first pin 220 is integrally connected to the first body 210. The first metal layer 230 is formed from the first body 210. An inner surface 211 extends to at least one of the plurality of surfaces (not labeled) of the first pin 220. The second lead frame 300 is assembled with the first lead frame 200 and includes a second body 310, two second pins 320_1, 320_2, and two second metal layers 330_1, 330_2. The second pins 320_1, 320_2 are integrally connected to the first Two bodies 310, the second metal layers 330_1, 330_2 extend from an inner surface 311 of the second body 310 to at least one surface of the plurality of surfaces (not labeled) of the second pins 320_1, 320_2.

The power chip 400 is located between the first lead frame 200 and the second lead frame 300 and includes a first chip surface 410, a first conductive portion 411, a second chip surface 420, and two second conductive portions 421, 422. A chip surface 410 faces the first lead frame 200, the first conductive portion 411 is located on the first chip surface 410 and is electrically connected to the first metal layer 230; the second chip surface 420 faces the second lead frame 300; two second conductive portions 421 and 422 are in the The two chip surfaces 420 are electrically connected to the second metal layers 330_1 and 330_2 respectively. Wherein, at least one of the first lead frame 200 and the second lead frame 300 includes a groove 240 for accommodating the power chip 400 (in this embodiment, the first lead frame 200 includes a groove 240, which is located in the first body 210). After the first lead frame 200 and the second lead frame 300 are assembled, the first pin 220 and the two second pins 320_1 and 320_2 are arranged at intervals.

It should be particularly noted here that although the number of first pins 220 is one in FIGS. 1 to 4, the number of second pins 320_1 and 320_2 is two, and the number of first conductive portions 411 is one, The number of second conductive portions 421, 422 is two, but in other embodiments, the number of first pins, the number of second pins, the number of first conductive portions, and the number of second conductive portions are all at least one And the number of the first conductive parts corresponds to the number of the first metal layer, and the number of second conductive parts corresponds to the number of the second metal layer. The groove can also be placed in the second lead frame, which is not limited to the disclosure.

Thereby, the electrical properties of the first conductive portion 411 of the power chip 400 can be directly conducted to the first pin 220, and the electrical properties of the two second conductive portions 421 and 422 can be directly conducted to the two second pins 320_1, 320_2, and It can reduce electrical instability caused by multiple indirect electrical conduction. The details of the power chip flip chip package structure 100 will be described in more detail later.

The power chip 400 is exemplified as an insulated gate bipolar transistor (IGBT) chip, which has an emitter and a gate on one side, and a collector on the other side. That is, as shown in Figure 2, the first conductive portion 411 on the first wafer surface 410 of the power chip 400 represents the collector, and the two second conductive portions on the second wafer surface 420 The electrical parts 421 and 422 respectively represent the gate and the emitter. The power chip may also be a high-power Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET), including the above disclosure but not limited thereto.

The first lead frame 200 and the second lead frame 300 may be made of ceramic materials. The first metal layer 230 and the second metal layers 330_1, 330_2 may be formed on the inner surface 211 of the first body 210 by printing or electroplating, respectively. And the inner surface 311 of the second body 310 are not limited thereto.

The first pin 220 can protrude from the first body 210 along a z-axis direction, the two second pins 320_1, 320_2 can protrude from the second body 310 along a y-axis direction, the second lead frame 300 and the first lead After the frame 200 is assembled, the first pin 220 is located between the two second pins 320_1 and 320_2 and arranged in parallel. In detail, the y-axis direction, the x-axis direction, and the z-axis direction are perpendicular to each other. The first body 210 is integrally connected to the first pin 220 when being formed, and the second body 310 is integrally connected to the second pin 320_1, 320_2, and the second body 310 and the two second pins 320_1, 320_2 are arranged to form a notch (not labeled). When the second lead frame 300 is assembled with the first lead frame 200, the first pin 220 protrudes into the recess It can be arranged parallel to the two second pins 320_1 and 320_2 along the x-axis direction.

In other embodiments, it can also be arranged in parallel along the x-axis in the order of the first pin, the first second pin, and the second second pin, or when the number of first pins is two , When the number of second pins is one, the arrangement is that the second pin is placed between the two first pins, depending on the configuration of the number and position relationship of the first conductive part and the second conductive part on the power chip. Subject to the above disclosure.

Preferably, at least one surface of the first pin 220 may have an inclined surface portion 2211 connected to the inner surface 211 of the first body 210. Through the configuration of the inclined surface portion 2211, it is more advantageous to form the first portion by printing or electroplating. Metal layer 230. When the groove 240 is provided in the first body 210, the inner surface 211 of the first body 210 may include a groove bottom area (not shown) and a groove side area (not shown). The groove side area is connected to the groove bottom area to surround the groove bottom area. For the groove 240 of the accommodating space, the first metal layer 230 may extend from the bottom surface area of the groove to the inclined surface portion 2211, and more preferably, the groove side area adjacent to the first pin 220 may also be inclined, which is more beneficial Formation of the first metal layer 230.

In this embodiment, each second pin 320_1, 320_2 includes a surface on the same side as the inner surface 311 of the second body 310, a surface facing the recess, and a surface on the opposite side to the inner surface 311, and the second contact The above three surfaces of the feet 320_1 and 320_2 are respectively provided with second metal layers 330_1 and 330_2. That is, the second metal layers 330_1, 330_2 electrically extend from one side of the inner surface 311 to the side opposite to the inner surface 311, so that the second metal layers 330_1, 330_2 and the first metal layer 230 are on the same side. This is further helpful for subsequent applications. However, in other examples, the first metal layer and the second metal layer may be provided on each surface of the first pin and the second pin, and it is not limited thereto.

The first pin 220 and the first conductive portion 411 are directly electrically connected through the first metal layer 230, and the second pins 320_1, 320_2 and the second conductive portions 421, 422 are directly electrically connected through the second metal layers 330_1, 330_2, respectively Therefore, when the power chip flip chip package structure 100 is applied to other circuit boards, the first metal layer 230 on the first pin 220 and the second pin The second metal layers 330_1, 330_2 on 320_1, 320_2 are directly electrically connected to the circuit board through solder, which can effectively avoid electrical instability caused by indirect electrical connections.

Please refer to FIG. 5, where FIG. 5 is a schematic side view of a power chip flip-chip package structure 100a according to another embodiment of the present invention. The structure of the power chip flip-chip package structure 100a is similar to the power chip flip-chip package structure 100 in FIGS. 1 to 4, and includes a first lead frame 200a and a second lead frame 300a. The power chip flip-chip package structure 100a may further include a heat dissipation fin 600a disposed on the first lead frame 200a.

More specifically, the first lead frame 200a may further include an outer metal layer 250a, and the first body (not labeled) further includes an outer surface 212a, wherein the outer metal layer 250a is disposed on the outer surface 212a, and the outer metal layer 250a The heat dissipation fin 600a is provided. The heat dissipation fins 600a can increase the heat dissipation effect of the power chip 400, and the first body of the first lead frame 200a can reserve fixing screw holes or threaded screw holes during manufacture to facilitate the installation of the heat dissipation fins 600a.

Please refer to FIG. 6, and also refer to FIG. 1 to FIG. 4, wherein FIG. 6 is a flowchart of a power chip flip-chip packaging method 700 according to another embodiment of the present invention. The power chip flip chip packaging method 700 is applied to the power chip flip chip packaging structure 100. The power chip flip chip packaging method 700 includes a power chip implantation step 710, an assembly step 720, and a waterproof step 730.

The power chip implantation step 710 is to arrange two second conductive materials 512 on the second metal layers 330_1, 330_2 of the second lead frame 300, and fix the power chip 400 on the second metal layers 330_1, 330_2 to make the second conductive portion 421 , 422 through the two second conductive materials 512 respectively and the second metal layer 330_1 and 330_2 are electrically connected. It should be particularly noted here that although only one second conductive material 512 is shown on the second metal layer 330_1 in FIGS. 1 to 4, the reader can know that another second conductive material 512 is on the second metal layer 330_1. The layer 330_2 is invisible only because of the cross-sectional position, which does not limit the present invention.

In the assembly step 720, the first conductive material 511 is placed on the first conductive portion 411 of the power chip 400, and the first lead frame 200 is assembled so that the first conductive portion 411 is electrically connected to the first metal layer 230 through the first conductive material 511.

The waterproofing step 730 is to close a gap between the first lead frame 200 and the second lead frame 300 with an insulating and waterproof adhesive material (not shown).

Wherein, in the power chip implantation step 710, the second conductive material 512 can be a solder paste, a silver paste, a conductive glue or a gold ball, and heating causes the two second conductive materials 512 to be fixed to the power chip 400 and Between the second metal layers 330_1 and 330_2. Alternatively, in the assembling step 720, the first conductive material 511 can be a solder paste, a silver paste, a conductive glue or a gold ball, and heating causes the first conductive material 511 to be fixed to the power chip 400 and the first metal layer 230 between.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone who is familiar with this technique can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection of the present invention The scope shall be subject to those defined in the attached patent scope.

100‧‧‧Power Chip Flip Chip Package Structure

200‧‧‧First lead frame

210‧‧‧First Body

211‧‧‧Inner surface

220‧‧‧First pin

2211‧‧‧Slanted face

230‧‧‧First metal layer

240‧‧‧Groove

300‧‧‧Second Lead Frame

310‧‧‧Second Body

311‧‧‧Inner surface

320_1, 320_2‧‧‧Second pin

330_1, 330_2‧‧‧Second metal layer

400‧‧‧Power chip

410‧‧‧First chip surface

411‧‧‧The first conductive part

420‧‧‧Second chip surface

421, 422‧‧‧Second conductive part

Claims (9)

A power chip flip-chip package structure includes: a first lead frame, including: a first body; at least one first pin integrally connected to the first body; and at least one first metal layer from the first body An inner surface of the body extends to at least one of the plurality of surfaces of the at least one first pin; a second lead frame assembled with the first lead frame and includes: a second body; at least one second Pins integrally connected to the second body; and at least one second metal layer extending from an inner surface of the second body to at least one of the plurality of surfaces of the at least one second pin; and a power The chip is located between the first lead frame and the second lead frame and includes: a first chip surface facing the first lead frame; at least one first conductive part located on the first chip surface and connected to the at least one The first metal layer is electrically connected, and the number of the at least one first conductive portion corresponds to the number of the at least one first metal layer; a second chip surface faces the second lead frame; and At least one second conductive part located on the surface of the second chip and electrically connected to the at least one second metal layer, and the number of the at least one second conductive part corresponds to the number of the at least one second metal layer; wherein, the At least one of the first lead frame and the second lead frame includes a groove for accommodating the power chip. After the first lead frame and the second lead frame are assembled, the at least one first pin and the at least one The second pins are arranged at intervals. According to the power chip flip chip package structure described in claim 1, wherein the number of the at least one first pin is one, the number of the at least one second pin is two, and the groove is located at the first pin. One body. According to the power chip flip-chip package structure described in claim 2, wherein the first pin protrudes from the first body along a z-axis direction, and the second pin protrudes along a y-axis direction In the second body, after the second lead frame is assembled with the first lead frame, the first pins are located between the two second pins and arranged in parallel. According to the power chip flip-chip package structure described in claim 2, wherein the at least one surface of the first pin has an inclined surface portion connected to the inner surface of the first body. The power chip flip chip package structure described in the first item of the scope of patent application further includes: a heat dissipation fin disposed on the first lead frame. According to the power chip flip-chip package structure described in claim 5, the first lead frame further includes an outer metal layer, and the first body further includes an outer surface; wherein the outer metal layer is disposed on the outer surface. Surface, and the outer metal layer is provided for the heat dissipation fins. A power chip flip chip packaging method, which is applied to the power chip flip chip packaging structure as described in item 1 of the scope of patent application, the power chip flip chip packaging method includes: a power chip implantation step, and at least one second conductive material is provided On the at least one second metal layer of the second lead frame, the power chip is fixed on the at least one second metal layer so that the at least one second conductive portion can pass through the at least one second conductive material and the at least one The second metal layer is electrically connected; in an assembly step, at least one first conductive material is disposed on the at least one first conductive portion of the power chip, and the first lead frame is assembled so that the at least one first conductive portion penetrates the at least one A first conductive material is electrically connected to the at least one first metal layer; and In a waterproofing step, an insulating and waterproof adhesive material is used to close a gap between the first lead frame and the second lead frame. According to the power chip flip-chip packaging method described in claim 7, wherein, in the power chip implantation step, the at least one second conductive material is a solder paste, a silver paste, a conductive glue or a gold The ball is heated so that the at least one second conductive material is fixed between the power chip and the at least one second metal layer. For the power chip flip-chip packaging method described in item 7 of the scope of patent application, in reality, in the assembling step, the at least one first conductive material is a solder paste, a silver paste, a conductive glue or a gold ball. The at least one first conductive material is fixed between the power chip and the at least one first metal layer.

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