TW202017066A - Method for separating test sample from wafer substrate completely taking out the test die sample from the wafer substrate without damaging the substrate - Google Patents
Method for separating test sample from wafer substrate completely taking out the test die sample from the wafer substrate without damaging the substrate Download PDFInfo
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- TW202017066A TW202017066A TW107136633A TW107136633A TW202017066A TW 202017066 A TW202017066 A TW 202017066A TW 107136633 A TW107136633 A TW 107136633A TW 107136633 A TW107136633 A TW 107136633A TW 202017066 A TW202017066 A TW 202017066A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N1/00—Sampling; Preparing specimens for investigation
- G01N1/02—Devices for withdrawing samples
- G01N1/04—Devices for withdrawing samples in the solid state, e.g. by cutting
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2894—Aspects of quality control [QC]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
- H01L2221/68386—Separation by peeling
Abstract
Description
本發明係關於一種取出測試樣品的方法,特別是一種利用雷射轟擊方式將測試樣品自晶圓基材分離方法。The invention relates to a method for taking out a test sample, in particular to a method for separating a test sample from a wafer substrate by means of laser bombardment.
隨著科技的進步,積體電路(Integrated Circuit,IC)係一種利用電路小型化的方式,製造在半導體晶圓表面,晶圓(Wafer)係一種矽晶片,因為形狀通常為圓形,所以泛指為晶圓,其係為生產積體電路的載體基材,具有許多依照直徑區分的規格,例如6吋、8吋、12甚或是14吋以上,越大的晶圓可以生產越多的積體電路,以降低生產成本。With the advancement of technology, Integrated Circuit (IC) is a way to use circuit miniaturization to manufacture on the surface of semiconductor wafers. Wafer is a type of silicon chip. Because the shape is usually round, it is widely used. Refers to the wafer, which is the carrier substrate for the production of integrated circuits, with many specifications differentiated by diameter, such as 6 inches, 8 inches, 12 or even 14 inches or more, the larger the wafer can produce more product Body circuit to reduce production costs.
然而,生產晶圓的過程中,良率是一種非常重要的因素,一般而言,晶圓製作完成後,為了測試晶圓在經過許多道製程後,是否如當初設計的正確性,因此會從晶圓中取出一片樣品,作為取樣測試的測試樣品,以確定晶圓中其它成品的良率。However, in the process of producing wafers, yield is a very important factor. Generally speaking, after the wafer is completed, in order to test whether the wafer is correct as originally designed after many processes, it will be selected from Take a sample from the wafer as a test sample for sampling and testing to determine the yield of other finished products in the wafer.
通常,測試樣品製作而成的晶圓,會因為切割的技術取出測試樣品,必須要透過切穿晶圓的方式,也正因如此,會使晶圓因為被切穿而無法繼續後面製程程序,使得無法驗證出前後製程相互間的關聯性,同時失去了測試晶圓完成製作的可能性。Normally, the wafers produced by the test samples will be taken out through the cutting method because of the cutting technology. Because of this, the wafers will not be able to continue the subsequent process because they are cut through. This makes it impossible to verify the correlation between the pre- and post-processes, and at the same time loses the possibility of the test wafer being completed.
並且,在測試樣品與晶圓分離的過程中,會隨著分離方式的不同,無法預期測試樣品分離後的位置,甚至因為破壞性較強的分離作法,產生的碎片可能會與測試樣品產生混淆,使用者需要花費多餘的時間搜尋及確認測試樣品。如此一來,除了不能確保測試樣品的代表性外,更無法有效率地持續產出測試樣品提供研究。Moreover, in the process of separating the test sample from the wafer, the position of the test sample after the separation may not be expected due to the different separation methods, and even due to the more destructive separation method, the generated fragments may be confused with the test sample , Users need to spend extra time to search and confirm the test samples. In this way, in addition to not ensuring the representativeness of the test samples, it is impossible to efficiently continue to produce test samples for research.
有鑒於一般於晶圓基材中取出測試樣品的困擾,本發明提出一種將測試樣品自晶圓基材分離方法,以獲得製程研究的完整性,並且實現測試晶圓之再利用。In view of the general difficulty in taking test samples out of wafer substrates, the present invention proposes a method for separating test samples from wafer substrates to obtain the completeness of the process research and realize the reuse of test wafers.
本發明的主要目的係在提供一種將測試樣品自晶圓基材分離方法,利用雷射轟擊的方式,使得測試晶體與底部的晶圓基材自然分離、完整脫落,並且不會傷害到測試晶體周圍,並且也不會使晶圓基材產生破損或是碎裂的情況,並使剩下的晶圓可以繼續後續的製程。The main object of the present invention is to provide a method for separating a test sample from a wafer substrate, using laser bombardment, so that the test crystal and the bottom wafer substrate are naturally separated and completely detached without harming the test crystal Around, and will not cause damage or chipping of the wafer substrate, and allow the remaining wafers to continue the subsequent process.
本發明的另一目的係在提供一種將測試樣品自晶圓基材分離方法,利用取樣製具固定測試晶體,可以避免分離後的測試晶體,因為轟擊的關係,擊飛或彈飛到遠處。Another object of the present invention is to provide a method for separating a test sample from a wafer substrate, and a sampling tool is used to fix the test crystal, so that the separated test crystal can be avoided. .
為了達成上述的目的,本發明提供一種將測試樣品自晶圓基材分離方法,首先,提供一晶圓包含有一基材及其上具有複數晶體,在基材上的晶體中任選一晶體作為測試晶體,利用一取樣製具固定測試晶體,利用雷射轟擊測試晶體周圍,以使測試晶體自基材上分離,藉由取樣製具自基材取出測試晶體。In order to achieve the above object, the present invention provides a method for separating a test sample from a wafer substrate. First, a wafer is provided that includes a substrate and a plurality of crystals thereon, and one of the crystals on the substrate is selected as For the test crystal, use a sampling tool to fix the test crystal, use laser bombardment around the test crystal to separate the test crystal from the substrate, and remove the test crystal from the substrate by the sampling tool.
在本發明中,雷射係以炸裂方式,轟擊測試晶體周圍,以使測試晶體與基材連接處炸裂,雷射係為波長355奈米、頻率50千赫茲、功率12瓦特的雷射。In the present invention, the laser system bombards the periphery of the test crystal in a bursting manner to explode the connection between the test crystal and the substrate. The laser system is a laser with a wavelength of 355 nanometers, a frequency of 50 kilohertz, and a power of 12 watts.
在本發明中,取樣製具係可為真空、靜電或膠合之夾具或吸盤。In the present invention, the sampling tool may be a vacuum, electrostatic or glued jig or suction cup.
在本發明中,晶體周圍還設有切割道,雷射轟擊係轟擊在測試晶體的切割道上,切割道圍繞在晶體周圍的長或寬係為100~2000微米,晶體的長或寬係為5~500微米。In the present invention, there are also cutting channels around the crystal. The laser bombardment system bombards the cutting channel of the test crystal. The length or width of the cutting channel around the crystal is 100~2000 microns, and the length or width of the crystal is 5 ~500 microns.
在本發明中,取樣製具可以吸附、貼附或夾持的方式固定在測試晶體表面或側面。In the present invention, the sampling tool can be fixed on the surface or side of the test crystal by means of adsorption, attachment or clamping.
底下藉由具體實施例配合所附的圖式詳加說明,當更容易瞭解本發明之目的、技術內容、特點及其所達成之功效。The following detailed description will be made with specific embodiments and accompanying drawings to make it easier to understand the purpose, technical content, features, and effects of the present invention.
本發明在既有的晶圓製程中,使用雷射的特殊應用方法,在晶圓表面形成的切割道進行轟擊,以使任一晶體樣品皆可作為測試晶體,並且分離後的晶體也不會傷害到晶圓基材,使得晶圓可以進行後續的製程,以達成本發明兼具有效測試晶圓晶體並且又不傷害晶圓基材的優點。In the existing wafer manufacturing process, the present invention uses a special laser application method to bombard the scribe lines formed on the wafer surface so that any crystal sample can be used as a test crystal, and the separated crystal will not The wafer substrate is damaged, so that the wafer can be subjected to subsequent processes, so as to achieve the cost of the invention and have the advantages of effectively testing the wafer crystal without harming the wafer substrate.
首先,請參照本發明第一圖所示,本發明將測試樣品自晶圓基材分離方法主要係應用在一個已經過多道半導體製程後的晶圓10,目的為了測試晶圓10上具有的複數晶體104,是否在經過這些半導體製程後,保持有正確性或是優異的良率。First of all, please refer to the first figure of the present invention. The method of separating the test sample from the wafer substrate in the present invention is mainly applied to a
因此,為了能夠讓使用者可以進行測試,同時請參照本發明第二圖及第三a圖~第三e圖所示。首先,如步驟S10所示,並請同時參照第三a圖,提供一晶圓10包含有一基材102及其上具有複數晶體104,在本實施例中,晶體104的長或寬係為5~500微米(µm) ,晶體104係可為晶粒(Die)或晶片(Chip),本實施例係以晶粒為例說明。如步驟S12所示,並請同時參照第三b圖,在基材102上的複數晶體104中,任選一晶體104作為測試晶體106,第三b圖中的測試晶體106係為本發明的實施例說明,本發明不以此位置的測試晶體106為限制,使用者可以任意選擇要測試的晶體104作為測試晶體106。如步驟S14,並請同時參照第三c圖,利用一取樣製具14固定測試晶體106,在本發明中,取樣製具14係可為真空、靜電或膠合之夾具或吸盤,例如,本發明的取樣製具14可以吸附、貼附或夾持的方式,固定在測試晶體106的表面或側面,如本發明第四a圖或第四b圖所示,但本發明不以此些實施例為發明的限制。Therefore, in order to enable the user to perform the test, please refer to the second and third a to the third e of the present invention. First, as shown in step S10, and referring to FIG. 3a at the same time, a
承接上段,當利用取樣製具14固定測試晶體106後,如步驟S16所示,並請同時參照第三d圖,利用雷射L轟擊測試晶體106周圍,在本實施例中,晶圓10在設置複數晶體104時,會於晶體104的周圍設置有切割道108,方便後續製程進行晶體104之切割,被選定的測試晶體106周圍也會具有切割道108,因此,在本實施例中係藉由雷射L轟擊測試晶體106周圍的切割道108,本實施例的切割道108圍繞在晶體104周圍的長或寬係為100~2000微米(µm),本發明不限制晶體104與切割道108的形狀及樣式,例如可以如第五a圖、第五b圖或第六a圖、第六b圖或第七a圖、第七b圖所示,本實施例先以第五a圖及第五b圖為例說明,並且本實施例的雷射L係為波長355奈米(nm)、頻率50千赫茲(kHz)、功率12瓦特(w)的雷射,使得雷射L係以炸裂方式轟擊測試晶體106的周為切割道108,利用平行切割道面108之雷射L的能量作用,以使沿著測試晶體106與基材102的連接處被炸裂,此時測試晶體106會與基材102的連接處產生裂痕,持續使用雷射L轟擊切割道108,直到造成測試晶體106自基材102上分離為止,期間依不同材質持續轟擊時間約莫10秒鐘能使得測試晶體與基材分離。本發明不限制雷射L的規格,可以看使用者設計而定,並且可以逐漸調整及加大雷射L的功率,例如逐漸從0升至12瓦特,然而本發明上述所訂定的雷射L標準係可精準炸裂測試晶體106。如步驟S18所示,並請同時參照第三e圖,當測試晶體106與基材102分離後,則可以藉由取樣製具14自基材102取出測試晶體106。Following the upper stage, when the
本發明在上述所訂定的晶體及測試晶體,僅係為本發明的實施例說明,本發明也不限制晶體需為晶粒或晶片,可依使用者設計而定,除了可以是上述的晶粒外,也能用於經由製程後的晶片,使用者可以依照喜好或需求,自行決定要使用晶圓上的任一晶體,作為測試晶體之用皆可。主要原因,係因為本發明利用雷射轟擊的方式,使得晶體位置可以不作限制,使用者可以選擇中間區域或是邊緣區域的晶體,取出晶體後,也不會因為取出方式,而破壞了晶圓基材的結構本身,例如不會切割到其它晶體的位置,因此,無論晶體是晶粒或晶片,皆可用上述的雷射轟擊方式,自晶圓基材上分離。The crystals and test crystals specified above by the present invention are only illustrative of the embodiments of the present invention, and the present invention does not limit the crystals to be crystal grains or wafers, which can be determined according to the user's design, except for the above crystals. It can also be used for wafers after the manufacturing process. The user can decide which crystal to use as a test crystal according to his preferences or needs. The main reason is that the present invention uses laser bombardment, so that the position of the crystal can be unrestricted. The user can select the crystal in the middle area or the edge area. After the crystal is taken out, the wafer will not be damaged because of the removal method. The structure of the substrate itself, for example, will not be cut to the position of other crystals. Therefore, regardless of whether the crystal is a crystal grain or a wafer, it can be separated from the wafer substrate by the above-mentioned laser bombardment method.
本發明可以有效分離測試晶體與晶圓基材,以確保測試晶體的完整性,並且利用取樣製具固定晶體,並將其完整移出至使用者所設定的特定位置。藉此,可以精準測試晶圓經過多道製程後,是否為此些製程應完成的正確性,確認完正確性後,還可以將晶圓移至後續的製程中,此時,所移除的晶體僅只有一顆,不會像習知技術般,毀損了部分或是多數的晶圓晶體,以達成有效測試並降低生產成本的雙贏。The invention can effectively separate the test crystal and the wafer substrate to ensure the integrity of the test crystal, and use the sampling tool to fix the crystal and completely move it out to a specific position set by the user. In this way, it is possible to accurately test whether the correctness of these processes should be completed after the wafer passes through multiple processes. After confirming the correctness, the wafer can also be moved to the subsequent process. At this time, the removed There is only one crystal, and it will not destroy some or most of the wafer crystals as in the conventional technology, so as to achieve a win-win result of effective testing and lower production costs.
以上所述之實施例,僅係為說明本發明之技術思想及特點,目的在使熟習此項技藝之人士足以瞭解本發明之內容,並據以實施,當不能以之限定本發明之專利範圍,即大凡依本發明所揭示之精神所作之均等變化或修飾,仍應涵蓋在本發明之專利範圍。The above-mentioned embodiments are only to illustrate the technical ideas and characteristics of the present invention, and the purpose is to make those skilled in the art sufficiently understand the content of the present invention and implement it accordingly, but cannot limit the patent scope of the present invention , That is, any equivalent changes or modifications made in accordance with the spirit disclosed by the present invention should still be covered by the patent scope of the present invention.
10:晶圓102:基材104:晶體106:測試晶體108:切割道14:取樣製具L:雷射10: Wafer 102: Substrate 104: Crystal 106: Test crystal 108: Cutting lane 14: Sampling tool L: Laser
第一圖為本發明所應用之晶圓的示意圖。 第二圖為本發明的步驟流程圖。 第三a圖~第三e圖為執行本發明將測試樣品自晶圓基材分離方法之各步驟的示意圖。 第四a圖及第四b圖為本發明中使用取樣製具的實施例示意圖。 第五a圖、第六a圖及第七a圖為本發明中測試晶體與切割道的立體示意圖。 第五b圖、第六b圖及第七b圖為本發明中測試晶體與切割道的俯視示意圖。The first figure is a schematic diagram of a wafer used in the present invention. The second figure is a flowchart of the steps of the present invention. Figures 3a to 3e are schematic diagrams of each step of the method for separating a test sample from a wafer substrate of the present invention. Figures 4a and 4b are schematic diagrams of embodiments of the sampling tool used in the present invention. Fig. 5a, Fig. 6a and Fig. 7a are three-dimensional schematic diagrams of the test crystal and the cutting channel in the present invention. Figures 5b, 6b, and 7b are schematic top views of the test crystal and the scribe line in the present invention.
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TWI226139B (en) * | 2002-01-31 | 2005-01-01 | Osram Opto Semiconductors Gmbh | Method to manufacture a semiconductor-component |
US7135385B1 (en) * | 2004-04-23 | 2006-11-14 | National Semiconductor Corporation | Semiconductor devices having a back surface protective coating |
JP2008109015A (en) * | 2006-10-27 | 2008-05-08 | Disco Abrasive Syst Ltd | Method and apparatus for dividing semiconductor wafer |
US7858902B2 (en) * | 2007-02-13 | 2010-12-28 | Disco Corporation | Wafer dividing method and laser beam processing machine |
US20080220590A1 (en) * | 2007-03-06 | 2008-09-11 | Texas Instruments Incorporated | Thin wafer dicing using UV laser |
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US20090311849A1 (en) * | 2008-06-17 | 2009-12-17 | International Business Machines Corporation | Methods of separating integrated circuit chips fabricated on a wafer |
JP6018730B2 (en) * | 2011-03-14 | 2016-11-02 | リンテック株式会社 | Dicing sheet and semiconductor chip manufacturing method |
JP5930645B2 (en) * | 2011-09-30 | 2016-06-08 | 株式会社ディスコ | Wafer processing method |
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JP6671794B2 (en) * | 2016-05-11 | 2020-03-25 | 株式会社ディスコ | Wafer processing method |
US9905466B2 (en) * | 2016-06-28 | 2018-02-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer partitioning method and device formed |
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CN111244013A (en) | 2020-06-05 |
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