TW202013179A - Touch chip capable of saving the number of internal ports and configuration parameter transmission method thereof capable of saving circuit logic area and reducing the number of ports between analog circuit units and digital circuit units - Google Patents
Touch chip capable of saving the number of internal ports and configuration parameter transmission method thereof capable of saving circuit logic area and reducing the number of ports between analog circuit units and digital circuit units Download PDFInfo
- Publication number
- TW202013179A TW202013179A TW107132659A TW107132659A TW202013179A TW 202013179 A TW202013179 A TW 202013179A TW 107132659 A TW107132659 A TW 107132659A TW 107132659 A TW107132659 A TW 107132659A TW 202013179 A TW202013179 A TW 202013179A
- Authority
- TW
- Taiwan
- Prior art keywords
- shift
- xor value
- unit
- circuit unit
- xor
- Prior art date
Links
Images
Landscapes
- Position Input By Displaying (AREA)
Abstract
Description
本發明係關於一種觸控晶片架構,尤指一種可節省內部連接埠數量的觸控晶片架構。The invention relates to a touch chip architecture, in particular to a touch chip architecture which can save the number of internal ports.
現今科技日異月新,在電子設備上已廣泛應用了觸控屏以取代傳統螢幕,以供使用者進行各種觸控操作。一般而言,觸控屏的控制電路包含一數位電路單元和一類比電路單元,且在觸控掃描過程中,該數位電路單元須對該類比電路單元的電路參數進行配置以及校正。Today's technology is changing with each passing day, and touch screens have been widely used in electronic devices to replace traditional screens for users to perform various touch operations. Generally speaking, the control circuit of the touch screen includes a digital circuit unit and an analog circuit unit, and during the touch scanning process, the digital circuit unit must configure and correct the circuit parameters of the analog circuit unit.
另外,現有的控制電路的具體實現方式主要有兩種:第一種是在該數位電路單元中配置參數暫存器,然後將所述參數暫存器連接至該類比電路單元。然而這種方法會導致該數位電路單元和該類比電路單元之間占有大量的介面,導致晶片的集成困難及連接容易出錯;第二種則是利用自訂匯流排連接該數位電路單元和該類比電路單元,然而這種方式需要在該數位電路單元中定義匯流排行為,然後在該類比電路單元中對匯流排操作進行解碼,不僅會導致電路複雜度大大提高,且會增加晶片面積。In addition, there are two specific implementation methods of the existing control circuit: the first is to configure a parameter register in the digital circuit unit, and then connect the parameter register to the analog circuit unit. However, this method will cause a large number of interfaces between the digital circuit unit and the analog circuit unit, resulting in difficulty in chip integration and connection error-prone; the second is to use a custom bus to connect the digital circuit unit and the analog Circuit unit, however, this method requires defining the bus behavior in the digital circuit unit, and then decoding the bus operation in the analog circuit unit, which will not only lead to greatly increased circuit complexity, but also increase the chip area.
為解決上述問題,本領域亟需邏輯簡單,節約電路邏輯面積,且可有效減少類比電路單元與數位電路單元間連接埠數量的觸控晶片。In order to solve the above problems, there is an urgent need in the art for a touch chip that is simple in logic, saves the logic area of the circuit, and can effectively reduce the number of ports between the analog circuit unit and the digital circuit unit.
本發明之一目的在於揭露一種可節省內部連接埠數量的觸控晶片,其具有一數位電路單元及一類比電路單元,該數位電路單元係用以將一隨機存取記憶體所儲存之至少一配置參數傳送至該類比電路單元以決定一觸控屏之一觸控掃描程序,其特徵在於:An object of the present invention is to disclose a touch chip capable of saving the number of internal ports, which has a digital circuit unit and an analog circuit unit, the digital circuit unit is used to store at least one of a random access memory The configuration parameters are transmitted to the analog circuit unit to determine a touch scanning procedure of a touch screen, which is characterized by:
該數位電路單元具有一第一移位鏈模組、一移位控制單元、一第一異或值產生單元及一異或值比較單元,其中,該移位控制單元係用以產生一移位時鐘信號及一移位致能信號,該第一移位鏈模組係依該移位時鐘信號之控制對該隨機存取記憶體所儲存之所述至少一配置參數進行一第一移位操作,該第一異或值產生單元係用以對該第一移位鏈模組之一第一輸出資料進行一異或運算以產生一第一異或值,以及該異或值比較單元係用以依該第一異或值及一第二異或值產生一比較結果;該類比電路單元具有一第二移位鏈模組、一移位採樣單元、一第二異或值產生單元及一參數配置單元,其中,該移位採樣單元係用以依該移位時鐘信號及該移位致能信號的控制驅動該第二移位鏈模組並擷取該第二移位鏈模組的一第三輸出資料,該第二移位鏈模組係依該移位時鐘信號之控制接收該第一移位鏈模組的一第二輸出資料並對該第二輸出資料進行一第二移位操作,該第二異或值產生單元係用以對該第二移位鏈模組之該第三輸出資料進行一異或運算以產生所述的第二異或值,以及該參數配置單元係用以依該移位採樣單元所提供的參數配置資料決定所述觸控屏之所述觸控掃描程序。The digital circuit unit has a first shift chain module, a shift control unit, a first XOR value generating unit and an XOR value comparing unit, wherein the shift control unit is used to generate a shift A clock signal and a shift enable signal, the first shift chain module performs a first shift operation on the at least one configuration parameter stored in the random access memory according to the control of the shift clock signal The first XOR value generating unit is used to perform an XOR operation on a first output data of the first shift chain module to generate a first XOR value, and the XOR value comparing unit is used Generating a comparison result according to the first XOR value and a second XOR value; the analog circuit unit has a second shift chain module, a shift sampling unit, a second XOR value generating unit and a Parameter configuration unit, wherein the shift sampling unit is used to drive the second shift chain module and extract the second shift chain module according to the control of the shift clock signal and the shift enable signal A third output data, the second shift chain module receives a second output data of the first shift chain module under the control of the shift clock signal and performs a second shift on the second output data Bit operation, the second XOR value generating unit is used to perform an XOR operation on the third output data of the second shift chain module to generate the second XOR value, and the parameter configuration unit It is used to determine the touch scanning procedure of the touch screen according to the parameter configuration data provided by the shift sampling unit.
在一實施例中,該異或值比較單元比對該第一異或值與該第二異或值以產生該比較結果,若該第一異或值與該第二異或值相一致,則開始進行所述觸控掃描程序。In an embodiment, the XOR value comparison unit compares the first XOR value with the second XOR value to generate the comparison result, if the first XOR value is consistent with the second XOR value, Then the touch scanning process starts.
在一實施例中,該數位電路單元與一處理器相連接,當該異或值比較單元比對該第一異或值與該第二異或值時,若該比較結果為該第一異或值與該第二異或值不一致,則進行一重傳過程,並上傳一中斷結果予該處理器。In one embodiment, the digital circuit unit is connected to a processor. When the XOR value comparison unit compares the first XOR value with the second XOR value, if the comparison result is the first XOR If the OR value is not consistent with the second XOR value, a retransmission process is performed and an interrupt result is uploaded to the processor.
為達上述目的,本發明進一步提出一種可節省觸控晶片內部連接埠數量的配置參數傳輸方法,其係利用上述之觸控晶片實現,其包括:觸控掃描開始前,寫入所述至少一配置參數至該隨機存取記憶體;利用該移位控制單元產生該移位時鐘信號及該移位致能信號;利用該第一移位鏈模組依該移位時鐘信號之控制對該隨機存取記憶體所儲存之所述至少一配置參數進行該第一移位操作;當該第一移位操作完成後,利用該第一異或值產生單元則對該第一移位鏈模組之該第一輸出資料進行該異或運算以產生該第一異或值;利用該移位採樣單元依該移位時鐘信號及該移位致能信號的控制驅動該第二移位鏈模組並擷取該第二移位鏈模組的該第三輸出資料;利用該第二移位鏈模組依該移位時鐘信號之控制接收該第一移位鏈模組的該第二輸出資料並對該第二輸出資料進行該第二移位操作;當第二移位操作完成後,利用該第二異或值產生單元對該第二移位鏈模組之該第三輸出資料進行該異或運算以產生所述的第二異或值;利用該異或值比較單元依該第一異或值及該第二異或值產生該比較結果;以及當該比較結果為該第一異或值與該第二異或值相一致時,則開始進行所述觸控掃描程序。In order to achieve the above object, the present invention further provides a method for transmitting configuration parameters that can save the number of internal ports of the touch chip, which is realized by using the touch chip described above, and includes: writing the at least one before the start of touch scanning Configure parameters to the random access memory; use the shift control unit to generate the shift clock signal and the shift enable signal; use the first shift chain module to control the randomness according to the shift clock signal Accessing the at least one configuration parameter stored in the memory to perform the first shift operation; when the first shift operation is completed, using the first XOR value generating unit to the first shift chain module Performing the XOR operation on the first output data to generate the first XOR value; using the shift sampling unit to drive the second shift chain module according to the control of the shift clock signal and the shift enable signal And retrieve the third output data of the second shift chain module; use the second shift chain module to receive the second output data of the first shift chain module under the control of the shift clock signal And perform the second shift operation on the second output data; when the second shift operation is completed, use the second XOR value generation unit to perform the third output data on the second shift chain module XOR operation to generate the second XOR value; use the XOR value comparison unit to generate the comparison result according to the first XOR value and the second XOR value; and when the comparison result is the first XOR value When the OR value is consistent with the second XOR value, the touch scanning process starts.
在一實施例中,若該比較結果比較該第一異或值與該第二異或值不一致時,則進行一重傳過程,並上傳一中斷結果予一處理器。In an embodiment, if the comparison result compares that the first XOR value and the second XOR value are inconsistent, a retransmission process is performed and an interrupt result is uploaded to a processor.
在一實施例中,開始所述觸控掃描程序後,該參數配置單元依該移位採樣單元所提供的參數配置資料PAR判斷所述觸控掃描程序是否已完成對所述觸控屏的全屏掃描,若尚未完成,則再由該第一移位鏈模組依該移位時鐘信號之控制對該隨機存取記憶體所儲存之所述至少一該配置參數進行該第一移位操作,但若已完成全屏掃描時,則直接結束所述觸控掃描程序。In one embodiment, after starting the touch scanning procedure, the parameter configuration unit determines whether the touch scanning procedure has completed the full screen of the touch screen according to the parameter configuration data PAR provided by the shift sampling unit If the scan is not completed, the first shift chain module performs the first shift operation on the at least one of the configuration parameters stored in the random access memory according to the control of the shift clock signal, However, if the full-screen scanning has been completed, the touch scanning procedure is directly ended.
為使 貴審查委員能進一步瞭解本發明之結構、特徵及其目的,茲附以圖式及較佳具體實施例之詳細說明如後。In order to enable your reviewer to further understand the structure, features and purpose of the present invention, the drawings and detailed description of the preferred embodiments are attached as follows.
請參照圖1,其繪示本發明之數位電路單元與類比電路單元的連接系統之一實施例方塊圖。如圖所示,本發明之觸控晶片的數位電路單元10與類比電路單元20的連接系統係包括有:一數位電路單元10及一類比電路單元20,其數位電路單元10與類比電路單元20皆設於觸控晶片內且相互連接,且該數位電路單元10係用以將一隨機存取記憶體11所儲存的至少一配置參數111傳送至該類比電路單元以決定一觸控屏之一觸控掃描程序,其中,該數位電路單元10具有一第一移位鏈模組12、一移位控制單元13、一第一異或值產生單元14及一異或值比較單元15,該移位元控制單元13在透過一控制信號RD讀取該隨機存取記憶體11的資料信號DIN
以獲得內該配置參數111後,會產生一移位時鐘信號CLK及一移位致能信號EN。當該移位時鐘信號CLK與該移位致能信號EN被產生後,該第一移位鏈模組12會依該移位時鐘信號CLK的控制,對該隨機存取記憶體所儲存的至少一該配置參數111進行第一移位操作,其中,該配置參數111可依使用者的需求進行調整。另外,該第一移位鏈模組12對至少一配置參數111進行第一移位操作時,會產生一第一輸出資料Dout1
,且該第一異或值產生單元14會對該第一輸出資料Dout1
進行一異或運算以產生第一異或值XOR1。Please refer to FIG. 1, which illustrates a block diagram of an embodiment of a connection system of a digital circuit unit and an analog circuit unit of the present invention. As shown in the figure, the connection system of the
另外,該類比電路單元20具有一第二移位鏈模組21、一移位採樣單元22、一第二異或值產生單元23及一參數配置單元24,其中,該移位採樣單元22會依照該移位時鐘信號CLK及該移位致能信號EN的控制驅動該第二移位鏈模組21,並擷取該第二移位鏈的一第三輸出資料Dout3
。當該第二移位鏈模組21被該移位採樣單元22控制驅動時,該第二移位鏈模組會依該移位時鐘信號CLK的控制接收該第一移位鏈模組12的一第二輸出資料Dout2
,並對該第二輸出資料Dout2
進行一第二移位操作,而在該第二移位操作進行時,該第二移位鏈模組21會產生該第三輸出資料Dout3
,而該第二異或值產生單元23則會對該第三輸出資料Dout3
進行一異或運算以產生一第二異或值XOR2。In addition, the
如此,當該第一異或值XOR1與該第二異或值XOR2皆被產生出來後,數位電路單元10內的異或值比較單元15會比對該第一異或值XOR1與該第二異或值XOR2,以產生一比較結果CMP,其中,若該比較結果CMP為該第一異或值XOR1與該第二異或值XOR2相一致,則開始進行所述的觸控掃描程序,但若該比較結果CMP為該第一異或值XOR1與該第二異或值XOR2不一致,則進行一重傳過程,並上傳一中斷結果INT予一處理器。Thus, when both the first XOR value XOR1 and the second XOR value XOR2 are generated, the XOR
請一併參照圖2及圖3,其繪示本發明之數位電路單元與類比電路單元的連接方法的兩個實施例的流程圖。如圖2-3所示,在所述觸控掃描程序開始前,將類比電路單元20的配置參數寫入至隨機存取記憶體11(S01)內,再透過移位控制單元13讀取隨機存取記憶體11內的至少一該配置參數111以產生移位時鐘信號CLK及移位致能信號EN(S02);第一移位鏈模組12依移位時鐘信號CLK之控制對至少一該配置參數111進行第一移位操作(S03),當第一移位操作完成後,第一移位鏈模組12產生第一輸出資料Dout1
;第一異或值產生單元14對第一移位鏈模組12之第一輸出資料Dout1
進行異或運算以產生第一異或值XOR1(S04);移位採樣單元22依移位時鐘信號CLK及移位致能信號EN的控制驅動第二移位鏈模組21,第二移位鏈模組21依移位時鐘信號CLK之控制接收第一移位鏈模組12的第二輸出資料Dout2
並對第二輸出資料Dout2
進行第二移位操作(S05);當第二移位操作完成後,第二移位鏈模組21會產生第三輸出資料Dout3
,移位採樣單元22會擷取第二移位鏈模組21的第三輸出資料Dout3
,第二異或值產生單元23會對第二移位鏈模組21之第三輸出資料Dout3
進行異或運算以產生第二異或值XOR2(S06);以及異或值比較單元15依第一異或值XOR1及第二異或值XOR2產生比較結果CMP(S07)。Please refer to FIG. 2 and FIG. 3 together, which are flowcharts illustrating two embodiments of the connection method of the digital circuit unit and the analog circuit unit of the present invention. As shown in FIG. 2-3, before the start of the touch scanning process, the configuration parameters of the
如此,當比較結果CMP為第一異或值XOR1與第二異或值XOR2相一致時,則開始進行所述觸控掃描程序(S08),但若比較結果CMP為第一異或值XOR1與第二異或值XOR2不一致,則進行一重傳過程,並上傳一中斷結果予該處理器(S09)。As such, when the comparison result CMP is that the first XOR value XOR1 and the second XOR value are consistent, the touch scanning process (S08) is started, but if the comparison result CMP is the first XOR value XOR1 and If the second XOR value XOR2 is inconsistent, a retransmission process is performed, and an interrupt result is uploaded to the processor (S09).
而當所述觸控掃描程序開始後,該參數配置單元24會依該移位採樣單元22所提供的一參數配置資料PAR判斷所述觸控掃描程序是否已完成對所述觸控屏的全屏掃描,若尚未完成,則再由第一移位鏈模組12依該移位時鐘信號CLK之控制對該隨機存取記憶體11所儲存之所述至少一該配置參數111進行該第一移位操作,但若已完成全屏掃描時,則直接結束所述觸控掃描程序。After the touch scanning process starts, the
因此,藉由前述所揭露的設計,本發明乃具有以下的優點:Therefore, with the design disclosed above, the present invention has the following advantages:
1. 本發明可藉由在數位電路單元及類比電路單元均設置移位元控制單元以大量減少類比電路單元與數位電路單元的連接埠介面數量。1. In the present invention, a shift element control unit can be provided on both the digital circuit unit and the analog circuit unit to greatly reduce the number of interface ports between the analog circuit unit and the digital circuit unit.
2.本發明可減少電路邏輯面積。2. The invention can reduce the logic area of the circuit.
本案所揭示者,乃較佳實施例,舉凡局部之變更或修飾而源於本案之技術思想而為熟習該項技藝之人所易於推知者,俱不脫本案之專利權範疇。The case disclosed in this case is a preferred embodiment, and any part of the modification or modification that originates from the technical idea of this case and can be easily inferred by those skilled in the art, does not deviate from the patent scope of this case.
綜上所陳,本案無論就目的、手段與功效,在在顯示其迥異於習知技術,且其首先發明合於實用,亦在在符合發明之專利要件,懇請 貴審查委員明察,並祈早日賜予專利,俾嘉惠社會,實感德便。In summary, regardless of the purpose, means and effectiveness of this case, this case is showing that it is very different from the conventional technology, and its first invention is in practical use, and it is also in compliance with the patent requirements of the invention. Granted patents to benefit the society and feel virtuous.
10:數位電路單元11:隨機存取記憶體111:配置參數12:第一移位鏈模組13:移位控制單元14:第一異或值產生單元15:異或值比較單元20:類比電路單元21:第二移位鏈模組22:移位採樣單元23:第二異或值產生單元24:參數配置單元S01:觸控掃描開始前,將對類比電路單元的配置參數寫入至隨機存取記憶體內S02:透過該移位控制單元讀取該隨機存取記憶體內的至少一該配置參數以產生該移位時鐘信號及該移位致能信號S03:該第一移位鏈模組依該移位時鐘信號之控制對該隨機存取記憶體所儲存之至少一該配置參數進行該第一移位操作S04:利用該第一異或值產生單元對該第一移位鏈模組之該第一輸出資料進行該異或運算以產生該第一異或值S05:利用該第二移位鏈模組依該移位時鐘信號之控制接收該第一移位鏈模組的第二輸出資料並對該第二輸出資料進行該第二移位操作S06:利用該第二異或值產生單元對該第二移位鏈模組之該第三輸出資料進行該異或運算以產生所述的第二異或值S07:利用該異或值比較單元依該第一異或值及該第二異或值以產生該比較結果S08:該比較結果為該第一異或值與該第二異或值相一致時,則開始進行所述觸控掃描程序S09:該比較結果為該第一異或值與該第二異或值不一致,則進行一重傳過程, 並上傳一中斷結果予該處理器10: Digital circuit unit 11: Random access memory 111: Configuration parameters 12: First shift chain module 13: Shift control unit 14: First XOR value generation unit 15: XOR value comparison unit 20: Analog Circuit unit 21: Second shift chain module 22: Shift sampling unit 23: Second XOR value generating unit 24: Parameter configuration unit S01: Before the touch scan starts, write the configuration parameters of the analog circuit unit to Random access memory S02: reading at least one of the configuration parameters in the random access memory through the shift control unit to generate the shift clock signal and the shift enable signal S03: the first shift chain mode The group performs the first shift operation on at least one of the configuration parameters stored in the random access memory according to the control of the shift clock signal S04: using the first XOR value generating unit to modulate the first shift chain The first output data of the group is subjected to the XOR operation to generate the first XOR value S05: the second shift chain module is used to receive the first shift chain module according to the control of the shift clock signal. Two output data and perform the second shift operation on the second output data S06: use the second XOR value generation unit to perform the XOR operation on the third output data of the second shift chain module to generate The second XOR value S07: using the XOR value comparison unit to generate the comparison result according to the first XOR value and the second XOR value S08: The comparison result is the first XOR value and the When the second XOR value is consistent, the touch scan procedure S09 is started: the comparison result is that the first XOR value is not consistent with the second XOR value, then a retransmission process is performed, and an interrupt result is uploaded To the processor
圖1繪示本發明之數位電路單元與類比電路單元的連接系統之一實施例方塊圖。 圖2繪示本發明之數位電路單元與類比電路單元的連接方法之一實施例流程圖。 圖3繪示本發明之數位電路單元與類比電路單元的連接方法之另一實施例流程圖。FIG. 1 is a block diagram of an embodiment of a connection system of a digital circuit unit and an analog circuit unit of the present invention. FIG. 2 is a flowchart of an embodiment of a method for connecting a digital circuit unit and an analog circuit unit of the present invention. FIG. 3 is a flowchart of another embodiment of a method for connecting a digital circuit unit and an analog circuit unit of the present invention.
10:數位電路單元 10: digital circuit unit
11:隨機存取記憶體 11: Random access memory
111:配置參數 111: configuration parameters
12:第一移位鏈模組 12: The first shift chain module
13:移位控制單元 13: shift control unit
14:第一異或值產生單元 14: The first XOR value generating unit
15:異或值比較單元 15: XOR value comparison unit
20:類比電路單元 20: Analog circuit unit
21:第二移位鏈模組 21: Second shift chain module
22:移位採樣單元 22: Shift sampling unit
23:第二異或值產生單元 23: Second XOR value generating unit
24:參數配置單元 24: parameter configuration unit
Claims (7)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW107132659A TWI691901B (en) | 2018-09-17 | 2018-09-17 | Touch chip capable of saving internal ports and configuration parameter transmission method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW107132659A TWI691901B (en) | 2018-09-17 | 2018-09-17 | Touch chip capable of saving internal ports and configuration parameter transmission method |
Publications (2)
Publication Number | Publication Date |
---|---|
TW202013179A true TW202013179A (en) | 2020-04-01 |
TWI691901B TWI691901B (en) | 2020-04-21 |
Family
ID=71130559
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW107132659A TWI691901B (en) | 2018-09-17 | 2018-09-17 | Touch chip capable of saving internal ports and configuration parameter transmission method |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI691901B (en) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08509818A (en) * | 1993-04-05 | 1996-10-15 | シラス・ロジック・インク | Method and apparatus for crosstalk compensation in liquid crystal display device |
US6260165B1 (en) * | 1996-10-18 | 2001-07-10 | Texas Instruments Incorporated | Accelerating scan test by re-using response data as stimulus data |
US9455726B1 (en) * | 2015-06-19 | 2016-09-27 | Intel Corporation | XOR (exclusive or) based triangular mixing for digital phase control |
TWI563418B (en) * | 2015-10-16 | 2016-12-21 | Waltop Int Corp | Signal decoding and modulation processing system for capacitive stylus |
-
2018
- 2018-09-17 TW TW107132659A patent/TWI691901B/en active
Also Published As
Publication number | Publication date |
---|---|
TWI691901B (en) | 2020-04-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4896450B2 (en) | Storage device | |
CN108268414B (en) | SD card driver based on SPI mode and control method thereof | |
KR20120049735A (en) | Pseudo-open drain type output driver having de-emphasis function and semiconductor memory device, and control method thereof | |
US11914874B2 (en) | Memory devices with multiple sets of latencies and methods for operating the same | |
WO2023174086A1 (en) | Universal interface register system and rapid generation method | |
CN101727968A (en) | Semiconductor memory apparatus | |
TWI533135B (en) | Methods for accessing memory and controlling access of memory, memory device and memory controller | |
US6321354B1 (en) | Testable circuit with a low number of leads | |
CN100594552C (en) | Semiconductor memory, memory controller and control method for semiconductor memory | |
US6748482B1 (en) | Multiple non-contiguous block erase in flash memory | |
US9104401B2 (en) | Flash memory apparatus with serial interface and reset method thereof | |
TWI691901B (en) | Touch chip capable of saving internal ports and configuration parameter transmission method | |
TWI583187B (en) | Data processing method and apparatus | |
CN110633225B (en) | Apparatus and method for generating entity storage comparison table | |
WO2019062889A1 (en) | Sensor unit, fingerprint sensing chip and electronic device | |
JP4727241B2 (en) | Semiconductor memory device and data writing and reading method for the device | |
US11574661B1 (en) | Shared command shifter systems and methods | |
JP6290468B1 (en) | Semiconductor memory device and data set method | |
US6917994B2 (en) | Device and method for automatically generating an appropriate number of wait cycles while reading a nonvolatile memory | |
KR100552311B1 (en) | Hardware initialization with or without processor intervention | |
TWI828250B (en) | Data transmission circuit, data transmission method, and memory | |
CN112749021B (en) | Communication system and operation method | |
US20230305716A1 (en) | Data storage system and parameter margin evaluation method | |
JP2003203490A (en) | Semiconductor memory device, control device, and control method for semiconductor memory device | |
JP2024131386A (en) | Memory System |