TW202005076A - Systems and methods for combination high temperature and low temperature device formation - Google Patents

Abstract

Embodiments are related to systems and methods for forming devices that include both high temperature components and low temperature components.

Description

System and method for combining high-temperature and low-temperature components

Embodiments are related to a system and method for forming a device that includes both high temperature components and low temperature components.

The manufacture of electronic devices generally involves forming the electronic devices on a substrate. Although some other electronic devices require substantially higher temperatures, different electronic devices can be formed at relatively low temperatures. Thin film transistors (TFTs) can be manufactured at relatively low temperatures such as, for example, less than six hundred (600) degrees Celsius (C). These relatively low temperatures are completely within the thermal capacity of many cost-effective substrates. However, the manufacture of high-quality micro-emitting diodes (micro LEDs) may require processing temperatures much higher than nine hundred (900) degrees Celsius. These temperatures exceed the temperature capacity of many substrates and therefore limit the substrates that can be used. Attempts have been made to manufacture micro-LEDs at lower temperatures, but generally, high-quality micro-LEDs have not yet been obtained.

Therefore, for at least the aforementioned reasons, there is a need in this technology for advanced systems and methods for manufacturing electronic devices.

Embodiments are related to a system and method for forming a device that includes both high temperature components and low temperature components.

This summary provides only a general overview of some embodiments. "In one embodiment", "according to one embodiment", "in various embodiments", "in one or more embodiments", "in a specific embodiment" and similar terms generally mean following the term The specific feature, structure, or characteristic of is included in at least one embodiment, and may be included in more than one embodiment. The point is that these terms do not necessarily refer to the same embodiment. Many other examples will be more fully understood in the following embodiments, the appended patent application scope, and the accompanying drawings.

Embodiments are related to a system and method for forming a device that includes both high temperature components and low temperature components.

Various embodiments provide a method for making a system including a plurality of high-temperature electronic devices and at least one low-temperature electronic device. These methods include the steps of: providing a substrate; locating a plurality of high-temperature electronic devices at corresponding positions on the substrate; and after disposing a plurality of high-temperature electronic devices on the substrate, at least one low-temperature electronic device is provided on the substrate. In some cases, the methods additionally include forming or placing at least one low-temperature electronic device and/or low-temperature structure on the substrate before placing the plurality of high-temperature electronic devices at corresponding positions on the substrate.

In some examples of the foregoing embodiments, the methods further include forming an electrical trace on the substrate that electrically couples the at least one low temperature electronic device to the at least one high temperature electronic device. In various examples of the foregoing embodiments, the substrate is made of a transparent material. In some examples, the substrate is made of glass material, glass-ceramic material, ceramic material, metal material, or polymer material. In various examples of the foregoing embodiments, each of the plurality of high-temperature devices is a micro LED, an LED, a micro driver integrated circuit (IC), and/or an IC, and at least one low-temperature electronic device is an LED driver circuit, a semiconductor device, a non- Linear electrical or optical parts, sensors, parts that convert between electrical, optical, thermal or mechanical energy.

In some examples of the foregoing embodiments, the methods further include forming a plurality of openings in the first material layer that extend only partially into the substrate. In some of these examples, the step of arranging the plurality of high-temperature electronic devices at corresponding positions on the substrate includes arranging the plurality of high-temperature electronic devices in the corresponding openings of the plurality of openings. In some cases, disposing at least one cryogenic electronic device above the substrate includes disposing at least one cryogenic electronic device in one of the plurality of openings. The opening can have a linear or non-linear bottom and side walls.

In various examples of the foregoing embodiments, the substrate is a laminated substrate including a first material layer attached to at least the first surface of the core material such that the second surface of the first material layer and the first of the core material The surfaces are in contact and at least a portion of the first surface of the first material layer is exposed. In these examples, the methods may further include forming a plurality of openings extending through the core material in the first material layer. Furthermore, the step of arranging the plurality of high-temperature electronic devices at the corresponding positions on the substrate includes arranging the plurality of high-temperature electronic devices in the corresponding openings of the plurality of openings.

In some cases, disposing at least one cryogenic electronic device above the substrate includes disposing at least one cryogenic electronic device in one of the plurality of openings. In some cases, the step of disposing at least one low-temperature electronic device on the substrate includes directly forming at least one low-temperature electronic device in one of the plurality of openings using a thin film transistor process. In other cases, the step of disposing at least one low temperature electronic device on the substrate includes disposing at least one low temperature electronic device on the first material layer. In some cases, the step of disposing at least one low-temperature electronic device on the substrate includes forming at least one low-temperature electronic device directly on the first material layer using a thin film transistor process. Alternatively, there may be an intermediate layer between the low-temperature electronic device and the first material layer.

Other embodiments provide an electronic device system, including: a laminated substrate having a first material layer coated to a core material; a plurality of high-temperature electronic devices in contact with the core material and within an opening in the first material layer; at the core material At least one low-temperature electronic device on the same side as the first material layer; and an electrical track electrically coupling the at least one low-temperature electronic device to at least one high-temperature electronic device. In some cases, at least one of the first material layer or the second material layer is opaque. In various cases, the core material is transparent. In some cases, there is no second material layer.

In various examples of the foregoing embodiments, at least one low-temperature electronic device is formed directly on one selected from the group consisting of a first material layer and an opening of the core material in the first material layer using a thin film transistor process Within, the planarized surface above the first material layer. In some cases, the first layer is a planarization layer. In various examples of the foregoing embodiments, each of the plurality of high-temperature devices is a micro LED, LED, micro driver integrated circuit (IC), and/or IC, and at least one low-temperature electronic device is an LED driver circuit, a thin film transistor, Non-linear electrical or optical parts, sensors, and parts that convert between electrical, optical, thermal, or mechanical energy. In some such examples, the electronic device system is a bottom transmissive display, and wherein light emitted from each of the plurality of micro-shaped LEDs is transmitted through the core material.

In some examples of the foregoing embodiments, the laminated substrate further includes a second material layer attached to the second surface of the core material such that the second surface of the second material layer is in contact with the second surface of the core material and the second At least a portion of the first surface of the material layer is exposed. The core material is one of glass material, glass-ceramic material, ceramic material, metal material, or polymer material. The first material layer is made of one of glass material, glass-ceramic material, ceramic material, metal material, or polymer material. The second material layer is made of one of glass material, glass-ceramic material, ceramic material, metal material, or polymer material.

As used herein, the term "transparent substrate" is used in its broadest sense, and refers to any workpiece formed of a material that is transparent enough to allow light emitted by a laser or LED light source to pass through the substrate. As an example, the transparent substrate may be made of, but not limited to, a work piece having an optical absorption effect of less than about twenty percent (20%) per millimeter depth. As another example, the transparent substrate may be made of, but not limited to, a processed part having an optical absorption effect of less than about ten percent (10%) per millimeter depth for a specified pulsed radio wavelength. As another example, the transparent substrate may be made of, but not limited to, a processed part having an optical absorption effect of less than about one percent (1%) per millimeter of depth for a specified pulsed radio wavelength. The transparent substrate can be made of glass, glass ceramic, ceramic, polymer, or other materials depending on the specific application, and can be composed of a single layer of a single material, a composite material, or multiple layers of different or same materials. If the substrate is a multi-layer stack, the layers in the substrate can be layered with the rest of the substrate after the device is fabricated or as a step in the device fabrication. The substrate can be a rigid sheet or a flexible substrate compatible with the roll-to-roll process. As used herein, the term "substrate" not described by the word "transparent" can refer to the previously described transparent substrate, and can also include any degree of transparency or opacity relative to light from any source or wavelength material. Based on the disclosure provided herein, those skilled in the art will recognize that various substrates and/or transparent substrates related to different embodiments may be used.

As used herein, the term "transparent material" is used in its broadest sense and represents any material that has an optical absorption effect of less than about twenty percent (20%) per millimeter of depth. Furthermore, as used herein, the term "opaque material" is used in its broadest sense and represents any material that has an optical absorption greater than about twenty percent (20%) per millimeter of depth.

As used herein, the term "electronic device" is used in its broadest sense and refers to any device that includes active electronic device circuits (including, but not limited to transistors, semiconductor devices, or switches). In addition to depositing conductors and dielectric materials, electronic devices include other structures. Therefore, electronic devices can be included in, but not limited to, the following: thin film transistors; organic LEDs; LEDs; photovoltaic elements; non-linear electronic device parts; parts that convert electricity into light, sound, or mechanical action; sensors ; Parts or components that convert electro-optical or mechanical actions into electrical energy, or micro LEDs. Based on the disclosure provided herein, those skilled in the art will recognize that various (also or wholly or partially formed) electronic devices can be used in connection with different embodiments.

As used herein, the terms "low-temperature device" or "low-temperature electronic device" are used in their broadest sense and mean that they can be formed, placed, or deposited on a substrate while being manufactured within the thermal capacity of the substrate (also That is, the substrate retains any device or electronic device that is mechanically and/or chemically stable. As used herein, the terms "high-temperature device" or "high-temperature electronic device" are used in their broadest sense and refer to any device that can be formed, placed, or deposited on a substrate and manufactured beyond the thermal capacity of the substrate Or electronic devices.

As used herein, the term "through hole" is used in its broadest sense and represents any such as, but not limited to, perforated through holes, blind holes, or other materials that can extend onto the surface of a transparent substrate A large number of other features predetermined before making electronic devices. Such a predefined (process) before fabrication may include, but is not limited to, generating a pattern of potential vias corresponding to the formation of vias in subsequent processing.

These terms "basic", "substantially" and variations thereof are intended to note that the features described are equal to or approximately equal to the value or description. For example, a "substantially planar" surface is intended to mean a planar or nearly planar surface. Furthermore, as defined above, "substantially similar" is intended to indicate two equal or approximately equal values or conditions. In some embodiments, "substantially" may mean values within about 10% of each other, such as values within about 5% of each other, or values within about 2% of each other.

Unless expressly stated otherwise, it should not be intended that any method described herein be interpreted as requiring that its steps be performed in a particular order. For this reason, when the method request item does not actually specify the order in which the steps are followed, or when the request item or the specification specifically states that these steps are limited to a specific order, it does not mean to infer any A specific order.

Referring to FIG. 1, a flowchart 100 of a method for manufacturing an article including both high-temperature and low-temperature electronic devices according to some embodiments is illustrated. Referring next to the flow chart 100, a laminated substrate is provided (block 105). The laminated substrate includes a first layer attached to the first side of the core material and a second layer attached to the second side of the core material. In some embodiments, the laminated substrate is a laminated glass substrate, wherein the first layer is a first glass layer, the second layer is a second glass layer, and the core material is a glass core material. Alternatively, the laminated substrate can be a glass core layer and a first polymer layer. Similarly, the second layer can also be polymer material, glass, other materials, or be completely absent to leave a two-layer stack. Alternatively, the substrate can be a single layer of uniformly distributed material, a composite material, or a material with a tapered composition. Although a layer refers to a laminate, a variety of methods including lamination, solution-based coating, deposition, and melt formation can be used to form the layer.

The materials for the first layer, the second layer, and the core material are selected for various reasons. These reasons include, but are not limited to, the mechanical integrity of the monolithic laminate substrate at the intended processing and/or operating temperature, the integrity of the monolithic laminate substrate Optical absorption, alkali metal characteristics of the corresponding element, different etch rates between the first layer, the second layer and/or the core material, thermal expansion characteristics of the integrated laminated substrate, and/or deflection of the integrated laminated substrate. For example, in the case of producing bottom-transmissive displays (that is, displays as shown in FIGS. 7a to 7b where light passes through the substrate layer (etc.)), materials that exhibit low optical absorption can be selected to produce transparency Substrate. As another example, when a TFT is to be formed on a substrate, an alkali-free material may be selected for one or more of the first layer, the second layer, or the core material. In the case where the TFT (and micro LED) is not in contact with the core material but is limited to the first layer, the first layer may be an alkali metal-free material, and the core material is an alkali metal-containing material. As another example of manufacturing a bottom transmissive display, one or more of the first layer, the second layer, and/or the core material may be applied with different doping to further control the light emission of the display. In various embodiments, the material of the first layer is the same as the material used for the second layer. In other embodiments, the material of the first layer is different from the material used for the second layer. In other embodiments, the laminated substrate does not include the second layer. In certain cases, the coefficient of thermal expansion exhibited by the core material is greater than the material of the second layer if it is not greater than the material of the first layer.

The laminated substrate provides some strength advantages in that even after the laminated substrate is subjected to scratches or abrasion, the strength of the laminated substrate is substantially maintained. Even if FIG. 1 illustrates the use of a laminated substrate with two core materials sandwiched by a clad layer, other embodiments may use a substrate made of a single material. As an example, a single glass layer may be provided, with the surfaces along the top and bottom sides of the glass exposed. Further, other embodiments having only one layer laminated to the core material layer are also feasible. In still other embodiments, four or more materials can be laminated together to make a laminated substrate. As an example, these laminated layers can be permanently or temporarily combined with the core material. In the case of temporary bonding, the laminated layer can be separated from at least one other layer during or after device processing. For example, the first layer can be a polymer material and the core layer can be a glass material without a second layer. It should be noted that although the layers are discussed in a stacked manner, the first layer and other layers can be applied to the core material using a variety of methods including lamination, solution-based coating, deposition, and formation from a melt.

In some embodiments, laminated glass is used to form a laminated glass substrate. The laminated glass can contain no alkali metal so that it is compatible with the formation of TFTs on its surface. Furthermore, laminated glass exhibits greater retention strength than typical display glass materials. This increase in retention strength after abrasion provides benefits for the use of display splicing and provides benefits for the overall reliability of the final product. Although the foregoing examples discuss applications using specific substrate materials, other substrate materials are also feasible according to other embodiments. For example, it is also feasible to use one or all layers of high-purity fused silica substrates made of high-purity fused silica. This high-purity fused silica has a thermal expansion coefficient of about 0.5 ppm/C.

The example substrate can, for example, have a thickness of less than three millimeters (3 mm). In some cases, the substrate has a thickness of less than two millimeters (2 mm). In other cases, the substrate has a thickness of less than one millimeter (1 mm). In still other cases, the substrate has a thickness of less than 0.7 mm (0.7 mm). In still other cases, the substrate has a thickness of less than 0.5 millimeter (0.5 mm). In still other cases, the substrate has a thickness of less than 0.3 millimeters (0.3 mm). In still other cases, the substrate has a thickness of less than 0.2 millimeters (0.2 mm). In still other cases, the substrate has a thickness of less than 0.1 millimeter (0.1 mm). When the substrate is a laminated substrate, the thickness of the clad layer (ie, the first layer) and the ratio between the cores (ie, core materials) can be adjusted to produce a combination of attributes that meet the needs, including, but not limited to, strength, overall Optical absorption, and (when the core is used as an etch stop material) hole formation method. The substrate size may also have, for example, (A) a wafer (B with, for example, a diameter of three hundred millimeters (300mm), a diameter of three hundred and fifty millimeters (350mm), or a diameter of four hundred millimeters (400mm) (B ) A roll with a width of less than three thousand millimeters (3000mm) and a length of more than thirty meters (30m), or (C) a plate with a linear dimension greater than three hundred millimeters (300mm). The substrate may also have, for example, a linear dimension or diameter ranging from three hundred millimeters to four thousand millimeters (300 mm to 4000 mm). The foregoing is an example substrate configuration, and based on the disclosure provided herein, those skilled in the art will recognize other possible substrate configurations according to different embodiments. In some embodiments, the example substrate may also have a UV transmission rate that allows back exposure during the manufacturing process of the electronic device. In some embodiments, the example substrate may also be black glass to facilitate the design of the micro-shaped LED device as a top-emission form. In some embodiments, the example substrate may also be black glass to facilitate the design of the micro-shaped LED device as a top-emission form.

2a, an example of a laminated substrate 200 is illustrated as having a core material 205 having a first layer 206 attached to one side of the core material 205 and a third layer attached to the opposite side of the core material 205 Second floor 207. The laminated substrate 200 includes a first surface 210 extending along the first layer 206 and a second surface 215 extending along the second layer 207.

Returning to FIG. 1, the high temperature electronic device is placed on at least the surface of the first layer (block 110). These high-temperature electronic devices are formed separately from the laminated substrate, and the manufactured high-temperature electronic device is placed at a defined position on the substrate of the first layer. Alternatively, high-temperature electronic devices can be placed on the core layer. In this case, there is no first layer on the substrate. The high-temperature electronic device can also be disposed on other layers of the substrate. By manufacturing the high-temperature electronic device separately from the laminated substrate, the laminated substrate that cannot withstand the high-temperature processing of the high-temperature electronic device can be selected. Such high-temperature electronic devices may be, but not limited to, micro-shaped LEDs, LEDs, micro-driver ICs, and IC chips. Based on the disclosure provided herein, those skilled in the art will recognize various high-temperature electronic devices that can be used in connection with different embodiments. High-temperature electronic devices can be placed using any known process in this art, including, but not limited to, pick-and-place processing capable of placing individual electronic devices at desired locations, transfer by imprinting the substrate, or by incorporating The material layer of the high-temperature electronic device is applied to the surface of the laminated substrate. Based on the disclosure provided in this article, those skilled in the art will recognize various processes that can use high-temperature electronic devices on substrates. Referring to FIG. 2b, the laminated substrate 200 is illustrated as having several high-temperature electronic devices 239 on the surface 210 of the first layer 206.

Continuing to refer to the flow chart 100 of FIG. 1, the planarizing material is formed on the combination of the high-temperature electronic device and the first layer of the laminated substrate, and the exposed surface of the planarizing material is smoothed to leave it flat enough to allow The outer surface of the low-temperature electronic device is formed (block 115). In some cases, there is no first layer. In some cases, the planarizing material not only provides the material for planarization but also serves as an insulator for the passivation layer. On the premise of not disturbing the position of the high-temperature electronic device, a planarizing material is formed on the laminated substrate. In some cases, the planarizing material is transparent resin or silicon material. Examples of other planarizing materials include sol-gel, spin-on glass, and polyimide. Based on the disclosure provided herein, those skilled in the art will recognize other materials that can be used as planarizing materials according to other embodiments.

Referring to FIG. 2c, the laminated substrate 200 is illustrated as having a planarization layer 240 formed on the high-temperature electronic device 239 placed on the surface 210 of the first layer 206. The planarization layer 240 has been smoothed to the extent that the high-temperature electronic device 239 exposes the planarization layer. In other embodiments, the high temperature electronic device 239 is enclosed in the planarization layer 240 covering the device.

Returning to FIG. 1, the low-temperature electronic device is formed at least on the planarization layer (block 120). The step of forming a low-temperature electronic device may include, but is not limited to, forming a TFT on a planarization layer using a process known in this technology for forming a TFT on top of a substrate. As just one example, the high-temperature electronic device may include a micro-shaped LED, and one of the low-temperature electronic devices may be a circuit for driving the micro-shaped LED.

Since the low-temperature electronic device is formed at a temperature lower than the temperature for forming the high-temperature electronic device and lower than the temperature at which the laminated substrate becomes unstable, the low-temperature electronic device can be directly manufactured on the substrate. Based on the disclosure provided herein, those skilled in the art will recognize various low-temperature electronic devices that can be formed on the planarization layer according to different embodiments. These include structures that include semiconductors, nonlinear electronic devices, nonlinear optical devices, and materials that convert energy between electrical, optical, thermal, and mechanical forms. Also, based on the disclosure provided herein, those skilled in the art will recognize that low temperature electronic devices can be formed only on the planarization layer, only on top of the exposed high temperature electronic device, or partially on the planarization layer and at least An exposed high-temperature electronic device on each. In other situations, the low temperature electronic device can be formed on the side of the substrate relative to the high temperature electronic device. Alternatively, the high-temperature electronic device can be formed on either side or both sides of the substrate, and the low-temperature electronic device can be formed on either side or both sides of the substrate.

Referring to FIG. 2d, the laminated substrate 200 is illustrated as the low temperature electronic device 242 is formed on the planarization layer 240. Specifically, each of the low-temperature electronic devices 242 and the planarization layer and a portion of the corresponding high-temperature electronic devices 239 overlap. In other examples, the low temperature device does not directly overlap with the high temperature device.

Returning to FIG. 1, an electrically conductive track connecting the low-temperature electronic device and/or the high-temperature electronic device (block 125) is formed. Any known process in this art can be used to form an electrically conductive trajectory. As an example, the step of forming an electrically conductive track includes depositing a metal layer, a low temperature electronic device, and a high temperature electronic device on the exposed portion of the planarization layer. Then, the patterned and etched metal layer leaves only the metal that meets the requirements. Alternatively, the semi-additive process of further thickening the patterned metal by post-plating or post electrodeless electricity with less heat dissipation to form an electrically conductive track with appropriate electrical conductivity. Alternatively, additional processes such as printing can be used to form electrically conductive traces. Referring to FIG. 2e, the laminated substrate 200 is illustrated as having conductive traces 260 connecting various low-temperature electronic devices 242 and high-temperature electronic devices 239.

Referring to FIG. 3, a flowchart 300 illustrating another method for manufacturing an article including both high-temperature and low-temperature electronic devices according to some embodiments. Referring next to the flow chart 300, a laminated substrate is provided (block 305). The laminated substrate includes a first layer attached to the first side of the core material and a second layer attached to the second side of the core material. In some embodiments, the laminated substrate is a laminated glass substrate, wherein the first layer is a first glass layer, the second layer is a second glass layer, and the core material is a glass core material. There may also be alternative material systems.

The materials for the first layer, the second layer, and the core material are selected for various reasons. These reasons include, but are not limited to, the mechanical integrity of the monolithic laminate substrate at the intended processing and/or operating temperature, the monolithic laminate substrate Optical absorption, the alkali metal characteristics of the corresponding element, the different etch rates between the first layer, the second layer, and/or the core material, the thermal expansion characteristics of the integrated laminate substrate, and/or the deflection of the integrated laminate substrate. For example, in the case where a chisel hole is to be formed in the first layer of the laminated substrate to receive the deposited high-temperature electronic device, the material of the first layer may be selected to have an etching rate much higher than that of the selected etchant The etching rate of the core material under the same selected etchant. This allows the core material to be used as an etch stop layer to achieve precise drilling depth and/or very flat drilling bottom. As another example, in the case of producing a bottom-transmissive display (ie, a display in which light passes through a substrate as shown in FIGS. 7a to 7b), a material exhibiting low optical absorption can be selected to produce a transparent substrate. As another example, when a TFT is to be formed on a substrate, an alkali-free material may be selected for one or more of the first layer, the second layer, or the core material. In the case where the TFT is not in contact with the core material, but is limited to contacting the first layer, the first layer may be an alkali metal-free material and the core material is an alkali metal-containing material. As another example of manufacturing a bottom transmissive display, one or more of the first layer, the second layer, and/or the core material may be applied with different doping to further control the light emission of the display. In some cases, one or more of the first layer, the second layer, and/or the core is black. In various embodiments, the material of the first layer is the same as the material used for the second layer. In other embodiments, the material of the first layer is different from the material used for the second layer. In certain cases, the coefficient of thermal expansion exhibited by the core material is greater than the material of the second layer if it is not greater than the material of the first layer.

The laminated substrate provides some strength advantages in that even after the laminated substrate is subjected to scratches or abrasion, the strength of the laminated substrate is substantially maintained. Even if FIG. 3 shows the use of a laminated substrate with two core materials sandwiched by a clad layer, other embodiments may use a substrate made of a single material. As an example, a single glass layer may be provided, with the surfaces along the top and bottom sides of the glass exposed. Further, other embodiments having only one layer laminated to the core material layer are also feasible. In still other embodiments, four or more materials can be laminated together to make a laminated substrate.

In some embodiments, laminated glass is used to form a laminated glass substrate. The laminated glass can contain no alkali metal so that it is compatible with the formation of TFTs on its surface. Furthermore, laminated glass exhibits greater retention strength than typical display glass materials. This increase in retention strength provides benefits for cases where display stitching is used, and for the overall reliability of the final product. Although the foregoing examples discuss applications using specific substrate materials, other substrate materials are also feasible according to other embodiments. For example, it is also feasible to use one or all layers of high-purity fused silica substrates made of high-purity fused silica. This high-purity fused silica has a thermal expansion coefficient of about 0.5 ppm/C.

The example substrate can, for example, have a thickness of less than three millimeters (3 mm). In some cases, the substrate has a thickness of less than two millimeters (2 mm). In other cases, the substrate has a thickness of less than one millimeter (1 mm). In still other cases, the substrate has a thickness of less than 0.7 mm (0.7 mm). In still other cases, the substrate has a thickness of less than 0.5 millimeter (0.5 mm). In still other cases, the substrate has a thickness of less than 0.3 millimeters (0.3 mm). In still other cases, the substrate has a thickness of less than 0.2 millimeters (0.2 mm). In still other cases, the substrate has a thickness of less than 0.1 millimeter (0.1 mm). When the substrate is a laminated substrate, the thickness of the clad layer (ie, the first layer) and the ratio between the cores (ie, core materials) can be adjusted to produce a combination of attributes that meet the needs, including, but not limited to, strength, overall Optical absorption, and (when the core is used as an etch stop material) hole formation method. The substrate size may also have, for example, (A) a wafer (B with, for example, a diameter of three hundred millimeters (300mm), a diameter of three hundred and fifty millimeters (350mm), or a diameter of four hundred millimeters (400mm) (B ) A roll with a width of less than three thousand millimeters (3000mm) and a length of more than thirty meters (30m), or (C) a plate with a linear dimension greater than three hundred millimeters (300mm). The substrate may also have, for example, a linear dimension or diameter ranging from three hundred millimeters to four thousand millimeters (300 mm to 4000 mm). The foregoing is an example substrate configuration, and based on the disclosure provided herein, those skilled in the art will recognize other possible substrate configurations according to different embodiments. In some embodiments, the example substrate may also have a UV transmission rate that allows back exposure during the manufacturing process of the electronic device.

Referring to FIG. 4a, an example of a laminated substrate 400 is illustrated as having a core material 405 having a first layer 406 attached to one side of the core material 405 and a third layer attached to the opposite side of the core material 405. Second floor 407. The laminated substrate 400 includes a first surface 410 extending along the first layer 406 and a second surface 415 extending along the second layer 407.

Returning to FIG. 3, the mask shape defining the location of the hole is formed at least on the first layer of the laminated substrate (block 310). The step of forming a mask may include applying a light mask material to the exposed surface of the first layer, and then patterning and developing the light mask material to leave an opening in the first layer of the laminated substrate where the hole is to be formed . Any process known in the art related to the embodiments discussed in this case for forming this mask over the first layer can be used. Referring to FIG. 4b, an example of the laminated substrate 400 is illustrated as having a mask 435 formed on the first layer 406. As shown, the mask 435 includes an opening 433 that exposes the surface 410 of the first layer 406.

3, the first layer is etched through the opening in the mask to define a hole that extends into the surface of the laminated substrate. Once the hole is formed, the mask is removed (block 315). In some cases, etching is performed by exposing the first layer to hydrofluoric acid (HF). In a particular case, eight degrees Celsius, maintained at (8 ^o C) 1.45M of hydrofluoric acid (HF) was performed to an etching process. Based on the disclosure provided herein, it will be recognized that various etchant can be used in connection with different embodiments. For example, mineral acid such as 1.58M nitric acid (HNO ₃ ) can be used as a substitute for HF solution. Depending on the specific design, the size of the hole can be between five square microns (5 mm ² ) and four hundred square microns (400 mm ² ). In some embodiments, the size of the hole can be between ten square microns (10 mm ² ) and two hundred square microns (200 mm ² ).

The etching process can continue to allow the drilling to extend to the depth of the first layer, but not to the defined time period of the core material. This can be done, for example, when the core material is an alkali metal-containing material and a semiconductor electronic device is to be formed in the hole. In other cases, the core material may be less affected by etching than the first layer, and in these cases the etching process may continue for a time sufficient to expose the core material at the location of the hole. Since the core material is less affected by etching, it effectively acts as an etching stopper. Where the bottom of the hole corresponds to the upper surface of the core material, this solution obtains the advantages of flat bottom hole drilling. Furthermore, the etching process can be fine-tuned to produce substantially vertical bored sidewalls. On the other hand, in the case where the substrate is a single material layer, the etching process may continue to allow the boring to extend to a depth within the first layer, but not to a time period defined by one of the core materials.

Referring to FIG. 4c, an example of the laminated substrate 400 is illustrated as having a hole 437 etched into the first layer 406 and extending to the upper layer of the core material 405. In this example, the bottom of the hole 437 is the core material layer 405. In the case where the semiconductor electronic device is to be placed and/or formed in the hole 405, the materials of both the first layer 406 and the core material 405 are free of alkali metal materials. Alternatively, laser exposure and etching processes can be used to form the surface features. In this case, the laser exposure and etching steps can be sequentially connected to each other or to each other but have other additional manufacturing steps between them.

Returning to FIG. 3, the high temperature electronic device is placed in at least some of the previously formed holes (block 320). These high-temperature electronic devices are formed separately from the laminated substrate, and the manufactured high-temperature electronic devices are placed in at least a subset of the holes. By manufacturing the high-temperature electronic device separately from the laminated substrate, the laminated substrate that cannot withstand the high-temperature processing of the high-temperature electronic device can be selected. These high-temperature electronic devices may be, but not limited to, micro-shaped LEDs, LEDs, micro-driver ICs, and/or IC chips. Based on the disclosure provided herein, those skilled in the art will recognize various high-temperature electronic devices that can be used in connection with different embodiments. Any known process in this art can be used to place high-temperature electronic devices, including, but not limited to, the ability to place individual electronic devices in the pick-and-place processing required for drilling, transfer by imprinting the substrate, or supply by gravity Materials such as microfluidics use chisel holes to trap high-temperature electronic devices in desired locations. In some cases, an adhesive material may be deposited in the bottom of the hole to fix the high-temperature electronic device in place. Based on the disclosure provided in this article, those skilled in the art will recognize various processes that can be used to place high-temperature electronic devices in chisel holes. Referring to FIG. 4d, the laminated substrate 400 is illustrated as having several high-temperature electronic devices 439 placed in the previously formed chisel holes 437 in the first layer 406.

Referring next to the flowchart 300 of FIG. 3, the planarizing material is formed on the combination of the high-temperature electronic device and the first layer of the substrate, and the exposed surface of the planarizing material is smoothed to leave it flat enough to allow it to form The outer surface of the low temperature electronic device (block 315). In some cases, the planarizing material is not only a material provided for planarization but also serves as an insulator for the passivation layer. On the premise of not disturbing the position of the high-temperature electronic device, a planarizing material is formed on the laminated substrate. In some cases, the planarizing material is transparent resin or silicon material. Based on the disclosure provided herein, those skilled in the art will recognize other materials that can be used as planarizing materials according to other embodiments.

Referring to FIG. 4e, the laminated substrate 400 is illustrated as having a planarization layer 440 that forms a high-temperature electronic device 439 that is placed on the surface 410 of the first layer 406. The planarization layer 440 has been smoothed, but at least some depth of the planarization material is formed above the high-temperature electronic device 439 so that the high-temperature electronic device 439 is packaged within the planarization layer 440. In other embodiments, the planarization material has been smoothed to the extent that the high temperature electronic device 439 exposes the planarization layer.

In some cases, a metal redistribution layer encapsulated in the planarization material may be formed on the planarization layer to provide electrical connection between the high-temperature electronic device and/or the low-temperature electronic device for formation/placement in subsequent operations interconnection. The advantages of this process include the elimination of through-hole glass substrates made in glass substrates and subsequent copper (Cu) metallization processes in any interconnect vias, which can reduce manufacturing costs. In addition, it also reduces the concerns about copper (Cu) contamination faced by copper (Cu) filled glass vias (TGVs) in the device manufacturing process.

Returning to FIG. 3, the low temperature electronic device is formed at least on the planarization layer (block 330). The step of forming a low-temperature electronic device may include, but is not limited to, forming a TFT on a planarization layer using a process known in this technology for forming a TFT on top of a substrate. As just one example, the high-temperature electronic device may include a micro-shaped LED, and one of the low-temperature electronic devices may be a circuit for driving the micro-shaped LED.

Since the low-temperature electronic device is formed at a temperature lower than the temperature for forming the high-temperature electronic device and lower than the temperature at which the laminated substrate becomes unstable, the low-temperature electronic device can be directly manufactured on the substrate. Based on the disclosure provided herein, those skilled in the art will recognize various low-temperature electronic devices that can be formed on the planarization layer according to different embodiments. Also, based on the disclosure provided herein, those skilled in the art will recognize that low temperature electronic devices can be formed only on the planarization layer, only on top of the exposed high temperature electronic device, or partially on the planarization layer and at least An exposed high-temperature electronic device on each. In other situations, the low temperature electronic device can be formed on the side of the substrate relative to the high temperature electronic device. Alternatively, the high-temperature electronic device can be formed on either side or both sides of the substrate, and the low-temperature electronic device can be formed on either side or both sides of the substrate.

Referring to FIG. 4f, the laminated substrate 400 is illustrated as having a low-temperature electronic device 442 formed on the metal redistribution layer 480 and the planarization layer 440. Specifically, each low-temperature electronic device 442 overlaps a part of the high-temperature electronic device 439.

Returning to FIG. 3, the electrically conductive track connecting the low-temperature electronic device and/or the high-temperature electronic device is formed through a metal redistribution layer encapsulated in the planarizing material (block 325). Any known process in this art can be used to form an electrically conductive trajectory. As an example, the step of forming an electrically conductive track includes depositing a metal layer, a low temperature electronic device, and a high temperature electronic device on the exposed portion of the planarization layer. Next, the metal layer is patterned and etched to leave only the metal that meets the requirements. Alternatively, an additive process can be used in the case of printing electrically conductive traces.

Referring to FIG. 5, a flowchart 500 illustrating another method for manufacturing an article including both high-temperature and low-temperature electronic devices according to some embodiments. Referring next to the flowchart 500, a laminated substrate is provided (block 505). The laminated substrate includes a first layer attached to the first side of the core material and a second layer attached to the second side of the core material. In some embodiments, the laminated substrate is a laminated glass substrate, wherein the first layer is a first glass layer, the second layer is a second glass layer, and the core material is a glass core material. Alternatively, the layers can be selected from glass ceramics, ceramics, metals, and polymer materials.

The materials for the first layer, the second layer, and the core material are selected for various reasons. These reasons include, but are not limited to, the mechanical integrity of the monolithic laminate substrate at the intended processing and/or operating temperature, the integrity of the monolithic laminate substrate Optical absorption, alkali metal characteristics of the corresponding element, different etch rates between the first layer, the second layer and/or the core material, thermal expansion characteristics of the integrated laminated substrate, and/or deflection of the integrated laminated substrate. For example, in the case where a chisel hole is to be formed in the first layer of the laminated substrate to receive the deposited high-temperature electronic device, the material of the first layer may be selected to have an etching rate much higher than that of the selected etchant The etching rate of the core material under the same selected etchant. This allows the core material to be used as an etch stop layer to achieve precise drilling depth and/or very flat drilling bottom. As another example, in the case of producing a bottom-transmissive display (ie, a display in which light passes through a substrate as shown in FIGS. 7a to 7b), a material exhibiting low optical absorption can be selected to produce a transparent substrate. As another example, when a TFT is to be formed on a substrate, an alkali-free material may be selected for one or more of the first layer, the second layer, or the core material. In the case where the TFT is not in contact with the core material, but is limited to contacting the first layer, the first layer may be an alkali metal-free material and the core material is an alkali metal-containing material. As another example of manufacturing a bottom transmissive display, one or more of the first layer, the second layer, and/or the core material may be applied with different doping to further control the light emission of the display. In various embodiments, the material of the first layer is the same as the material used for the second layer. In other embodiments, the material of the first layer is different from the material used for the second layer. In certain cases, the core material exhibits a thermal expansion that is higher than that of the second layer unless it is higher than that of the first layer.

The laminated substrate provides some strength advantages in that even after the laminated substrate is subjected to scratches or abrasion, the strength of the laminated substrate is substantially maintained. Even if FIG. 5 illustrates the use of a laminated substrate having two core materials sandwiched by a clad layer, other embodiments may use a substrate made of a single material. As an example, a single glass layer may be provided, with the surfaces along the top and bottom sides of the glass exposed. Further, other embodiments having only one layer laminated to the core material layer are also feasible. In still other embodiments, four or more materials can be laminated together to make a laminated substrate.

In some embodiments, laminated glass is used to form a laminated glass substrate. The laminated glass can contain no alkali metal so that it is compatible with the formation of TFTs on its surface. Furthermore, laminated glass exhibits greater retention strength than typical display glass materials. This increase in retention strength provides benefits for cases where display stitching is used, and for the overall reliability of the final product. Although the foregoing examples discuss applications using specific substrate materials, other substrate materials are also feasible according to other embodiments. For example, it is also feasible to use one or all layers of high-purity fused silica substrates made of high-purity fused silica. This high-purity fused silica has a thermal expansion coefficient of about 0.5 ppm/C.

The example substrate can, for example, have a thickness of less than three millimeters (3 mm). In some cases, the substrate has a thickness of less than two millimeters (2 mm). In other cases, the substrate has a thickness of less than one millimeter (1 mm). In still other cases, the substrate has a thickness of less than 0.7 mm (0.7 mm). In still other cases, the substrate has a thickness of less than 0.5 millimeter (0.5 mm). In still other cases, the substrate has a thickness of less than 0.3 millimeters (0.3 mm). In still other cases, the substrate has a thickness of less than 0.2 millimeters (0.2 mm). In still other cases, the substrate has a thickness of less than 0.1 millimeter (0.1 mm). When the substrate is a laminated substrate, the thickness of the clad layer (ie, the first layer) and the ratio between the cores (ie, core materials) can be adjusted to produce a combination of attributes that meet the needs, including, but not limited to, strength, overall Optical absorption, and (when the core is used as an etch stop material) hole formation method. The substrate size may also have, for example, (A) a wafer (B with, for example, a diameter of three hundred millimeters (300mm), a diameter of three hundred and fifty millimeters (350mm), or a diameter of four hundred millimeters (400mm) (B ) A roll with a width of less than three thousand millimeters (3000mm) and a length of more than thirty meters (30m), or (C) a plate with a linear dimension greater than three hundred millimeters (300mm). The substrate may also have, for example, a linear dimension or diameter ranging from three hundred millimeters to four thousand millimeters (300 mm to 6000 mm). The foregoing is an example substrate configuration, and based on the disclosure provided herein, those skilled in the art will recognize other possible substrate configurations according to different embodiments. In some embodiments, the example substrate may also have a UV transmission rate that allows back exposure during the manufacturing process of the electronic device.

Referring to FIG. 6a, an example of a laminated substrate 600 is illustrated as having a core material 605 having a first layer 606 attached to one side of the core material 605 and a third layer attached to the opposite side of the core material 605 Second floor 607. The laminated substrate 600 includes a first surface 610 extending along the first layer 606 and a second surface 615 extending along the second layer 607.

Returning to FIG. 5, the laminated substrate is exposed to the laser light source at a plurality of locations corresponding to future vias passing through the laminated substrate (block 510). Exposure to light energy from a laser light source alters at least one feature of the defined path of the laminated substrate along the defined surface extending from the first surface of the laminated substrate to the second surface of the laminated substrate. In some embodiments, the laser light source is from a laser capable of quasi-non-diffraction drilling (eg, Gauss-Besso or Gauss-Besso ray drilling). In some cases, the characteristic of the laminated substrate that is altered by exposure to the laser light source is the density (due to the melting of the substrate along the defined path). In various cases, the laminated substrate exposed to change from a laser light source is characterized by a refractive index, which can be changed with or without density change. These defined paths may instead be referred to as "damage tracks" that extend through the transparent substrate. The so-called change is, for example, the density of the material along the defined path extending from the first surface of the transparent substrate to the second surface of the transparent substrate, so that the transparent substrate along the defined path is compared to other areas of the substrate Easier to be affected by etching. In some cases, an etch ratio of 9:1 (ie, the etching rate of the defined path is nine times greater than the area of the transparent substrate surrounding the defined path) is achieved. Since the laminated substrate is transparent enough to allow light energy from the laser light source to pass through, the change of the laminated substrate along the defined path from the first surface to the second surface of the laminated substrate is substantially uniformly distributed. In some cases, the aforementioned defined path is compatible with the thermal cycling and process conditions used to fabricate the electronic device disposed on the transparent substrate. Referring to FIG. 6b, an example of the laminated substrate 600 is illustrated as having a predefined path (or damage track) 630 extending through the laminated substrate.

Referring next to diagram 500 of FIG. 5, a mask shape defining the location of the hole is formed at least on the first layer of the laminated substrate (block 515). The step of forming a mask may include applying a light mask material to the surface of the first layer, and then patterning and developing the light mask material to leave an opening in the first layer of the laminated substrate where the hole is to be formed. Any process known in the art related to the embodiments discussed in this case for forming this mask over the first layer can be used. Referring to FIG. 6c, an example of the laminated substrate 600 is illustrated as having a mask 635 formed on the first layer 606. As shown, the mask 635 includes an opening 633 that exposes the surface 610 of the first layer 606. Alternatively, this etch mask may not be present.

Referring next to the flowchart 500 of FIG. 5, the first layer is etched through the opening in the mask to define a hole that extends into the surface of the laminated substrate. Once the hole is formed, the mask is removed (block 520). Alternatively, the first layer is directly etched without the presence of a mask, and the hole is defined by the location of the previous laser exposure. In some cases, etching is performed by exposing the first layer to hydrofluoric acid (HF). In a particular case, eight degrees Celsius, maintained at (8 ^o C) 1.45M of hydrofluoric acid (HF) was performed to an etching process. Based on the disclosure provided herein, it will be recognized that various etchant can be used in connection with different embodiments. For example, mineral acid such as 1.58M nitric acid (HNO ₃ ) can be used as a substitute for HF solution. Depending on the specific design, the size of the hole can be between five square microns (5 mm ² ) and four hundred square microns (400 mm ² ). In some embodiments, the size of the hole can be between ten square microns (10 mm ² ) and two hundred square microns (200 mm ² ).

The etching process can continue to allow the drilling to extend to the depth of the first layer, but not to the defined time period of the core material. This can be done, for example, when the core material is an alkali metal-containing material and a semiconductor electronic device is to be formed in the hole. In other cases, the core material may be less affected by etching than the first layer, and in these cases the etching process may continue for a time sufficient to expose the core material at the location of the hole. Since the core material is less affected by etching, it effectively acts as an etching stopper. Where the bottom of the hole corresponds to the upper surface of the core material, this solution obtains the advantages of flat bottom hole drilling. Furthermore, the etching process can be fine-tuned to produce substantially vertical bored sidewalls. On the other hand, in the case where the substrate is a single material layer, the etching process may continue to allow the boring to extend to a depth within the first layer, but not to a time period defined by one of the core materials.

Referring to FIG. 6d, one example of the laminated substrate 600 is shown as having a hole 637 etched into the first layer 606 and extending to the upper layer of the core material 605. In this example, the bottom of the hole 637 is the core material layer 605. In the case where the semiconductor electronic device is to be placed and/or formed in the hole 605, the materials of both the first layer 606 and the core material 605 are free of alkali metal materials.

Returning to Figure 5, the high temperature electronic device is placed in at least some of the previously formed chisel holes (block 525). These high-temperature electronic devices are formed separately from the laminated substrate, and the manufactured high-temperature electronic devices are placed in at least a subset of the holes. By manufacturing the high-temperature electronic device separately from the laminated substrate, the laminated substrate that cannot withstand the high-temperature processing of the high-temperature electronic device can be selected. These high-temperature electronic devices may be, but not limited to, micro-shaped LEDs. Based on the disclosure provided herein, those skilled in the art will recognize various high-temperature electronic devices that can be used in connection with different embodiments. Any known process in this art can be used to place high-temperature electronic devices, including, but not limited to, the ability to place individual electronic devices in the pick-and-place processing required for drilling, transfer by imprinting the substrate, or supply by gravity Materials such as microfluidics use chisel holes to trap high-temperature electronic devices in desired locations. In some cases, an adhesive material may be deposited in the bottom of the hole to fix the high-temperature electronic device in place. Based on the disclosure provided in this article, those skilled in the art will recognize various processes that can be used to place high-temperature electronic devices in chisel holes. Referring to FIG. 6e, the laminated substrate 600 is illustrated as having several high-temperature electronic devices 639 placed in the previously formed chisel holes 637a, 637b, 637d, and 637e. This makes the hole 637c not occupied.

Continuing to refer to the diagram 500 of the flowchart 5, the planarizing material is formed on the area containing the first glass layer of the high-temperature electronic device (block 530). In some cases, the planarizing material is an insulator that not only provides a material for planarization but also serves as a passivation layer. On the premise of not disturbing the position of the high-temperature electronic device, a planarizing material is formed on the laminated substrate. Furthermore, the flattened material leaves some unfilled holes and exposes the high-temperature electronic device. This process can be single-step deposition, or multi-step deposition and etching. In some cases, the planarizing material is transparent resin or silicon material. Based on the disclosure provided herein, those skilled in the art will recognize other materials that can be used as planarizing materials according to other embodiments.

Referring to FIG. 6f, the laminated substrate 600 is illustrated as having a planarization layer 640 that forms a high-temperature electronic device 639 placed on the surface 610 of the first layer 606. The planarization layer 640 does not cover the unoccupied hole 637c.

Returning to FIG. 5, the low temperature electronic device is formed (or placed) within the unoccupied borehole (block 535). The step of forming a low-temperature electronic device may include, but is not limited to, forming a TFT in an unoccupied borehole using a process known in the art for forming a TFT on top of a substrate. Alternatively, for example, a pick-and-place process may be used to place the low-temperature electronic device in the unoccupied drilling hole. As just one example, the high-temperature electronic device may include a micro-shaped LED, and one of the low-temperature electronic devices may be a circuit for driving the micro-shaped LED.

Since the low-temperature electronic device is formed at a temperature lower than the temperature for forming the high-temperature electronic device and lower than the temperature at which the laminated substrate becomes unstable, the low-temperature electronic device can be directly manufactured on the substrate. Based on the disclosure provided herein, those skilled in the art will recognize various low-temperature electronic devices that can be formed on the planarization layer according to different embodiments. Also, based on the disclosure provided herein, those skilled in the art will recognize that low temperature electronic devices can be formed only on the planarization layer, only on top of the exposed high temperature electronic device, or partially on the planarization layer and at least An exposed high-temperature electronic device on each.

The planarizing material is then placed on the low temperature electronic device (block 540). This may include placing the planarization material only on the area of the first layer that includes the low-temperature electronic device, or it may include all areas that cover the first layer. It should be noted that it is not necessary to form a planarizing material over the area of the low-temperature electronic device, and it can be used in cases where the design requires this method. Referring to FIG. 6g, the laminated substrate 600 is shown to form or place the low-temperature electronic device 642 within the hole 637c, and all the high-temperature electronic device 639 and the low-temperature device 642 are locked in position by the planarization layer 640.

With continued reference to the flowchart 500 of FIG. 5, the exposed surface of the planarizing material is smoothed to leave a substantially flat outer surface (block 545). In some cases, the planarizing material is not only a material provided for planarization but also serves as an insulator for the passivation layer. On the premise of not disturbing the position of the high-temperature electronic device, a planarizing material is formed on the laminated substrate. In some cases, the planarizing material is transparent resin or silicon material. Based on the disclosure provided herein, those skilled in the art will recognize other materials that can be used as planarizing materials according to other embodiments.

Referring to FIG. 6h, the laminated substrate 600 is illustrated as having a planarization layer 640 formed on the high-temperature electronic device 639 and the low-temperature electronic device 642 placed on the surface 610 of the first layer 606. The planarization layer 640 has been smoothed, but at least some depth of the planarization material is formed above the high-temperature electronic device 639 and the low-temperature electronic device 642 so that they are encapsulated within the planarization layer 640. In other embodiments, the planarizing material has been smoothed to such an extent that the high temperature electronic device 639 and the low temperature electronic device 642 expose the planarization layer.

Returning to FIG. 5, a metal redistribution layer formed with interconnection vias and enveloped in the planarization material may be formed on the planarization layer to provide electrical interconnection between high-temperature electronic devices and/or low-temperature electronic devices ( Block 550). The advantages of this process include the elimination of through-hole glass substrates made in glass substrates and subsequent copper (Cu) metallization processes in any interconnect vias, which can reduce manufacturing costs. In addition, it also reduces the concerns about copper (Cu) contamination faced by copper (Cu) filled glass vias (TGVs) in the device manufacturing process. Referring to FIG. 6i, the laminated substrate 600 is illustrated as having a planarization layer 640 and a metal redistribution layer 680 formed on the high-temperature electronic device 639 and the low-temperature electronic device 642.

Returning to FIG. 5, the protective coating is formed on the planarization layer and the second layer of the laminated substrate (block 655). This protective coating can be patterned to form an etch mask containing openings through which the positions of the predefined vias are exposed. The other areas are covered and thus not exposed to the etchant.

Referring to FIG. 6j, the laminated substrate 600 is illustrated as having a protective coating 648 formed on the planarization layer 640 and the second layer 607 of the laminated substrate 600. An opening 650 corresponding to the position of a predefined (ie, predefined path 630) through hole is formed in the protective coating 648, and the second layer 607 and the planarization layer 640 of the laminated substrate 600 are exposed to the etchant through these openings.

At a faster rate than other materials are removed, an etchant is used to etch the planarization layer and the laminate substrate that change from the first surface of the laminate substrate to the second surface of the laminate substrate along the corresponding path (block 560) . This etching process continues until the perforations extending through the laminated substrate are opened in the respective paths through the laminated substrate.

Although the embodiment of FIG. 5 is a discussion of via holes obtained by double-sided etching, and an hourglass-shaped opening extending from the first surface to the second surface is obtained, by changing the etching hole process, other via hole types are also feasible . For example, the blind hole may be formed by etching only one surface for a period of time insufficient to extend the opening from the first surface to the second surface. These blind holes can extend through most of the laminated substrate (eg, leaving an unetched portion less than five microns (5 µm) that extends across from the surface to which the etchant is applied). The advantage of this solution is that it retains a surface that is not touched or damaged by exposure to the etchant (ie, the surface opposite the surface to which the etchant is applied). In this way, the location of the through-hole via can be predefined by the blind-via structure, and then no polishing is required after the intact properties of the unetched surface. Referring to FIG. 6k, the laminated substrate 600 is illustrated as having a protective coating 648 formed on the planarization layer 640 and the second layer 607 of the laminated substrate 600. The through-hole 652 has been etched into the protective coating 648 through the opening 650. Alternatively, a delayed etching process can be used to create a holed structure in the laminated glass where high temperature devices or other components are placed.

Next, referring to the flowchart 500 of FIG. 5, the protective coating is removed from the planarization layer and the surface of the laminated substrate (block 565). Referring to FIG. 61, the figure shows the laminated substrate 600 after having an etching process extending from the first surface 610 to the second surface 615 and removing all and protective coatings.

Referring to FIG. 7a, illustrated is a bottom transmissive display 700 that can be made according to different embodiments discussed herein. The bottom transmissive display 700 includes a laminated substrate including a core material 705 sandwiched between a first layer 706 and a second layer 707. The materials of the core material 705 and the first layer 706 and the second layer 707 are all transparent. The micro-shaped LED 739 transmits light energy 750 into the first layer 706, through the laminated substrate, and away from the second layer 707.

Referring to FIG. 7b, the illustration may be another bottom transmissive display 701 made in accordance with various embodiments discussed herein. Similar to the bottom transmissive display 700, the bottom transmissive display 701 includes a laminated substrate that includes a core material 705 sandwiched between a first layer 706 and a second layer 707. With respect to the bottom transmissive display 700, only the materials of the core material 705 and the first layer 706 are transparent. The opening 760 is etched into the second layer 707 to allow the second layer 707 to be made of an opaque material. The micro-shaped LED 739 transmits light energy 750 into the first layer 706, through the laminated substrate, and out of the opening 760 into the second layer 707. Similarly, when the micro-shaped LED is placed in the opening formed in the first layer 706, light energy transmission from the micro-shaped LED does not need to pass through the first layer 706, which is made of an opaque material. Alternative configurations include only having the core layer itself transparent, or only having the core layer transparent and no first layer present.

Referring to FIG. 8, a flowchart 800 is illustrated as a flowchart of a method for manufacturing an article including both high-temperature and low-temperature electronic devices using a separable substrate according to some embodiments. Next, referring to the flowchart 800, a detachable substrate is provided (block 805). The detachable substrate includes a first substrate having a first surface, wherein the first surface of the first substrate is attached to the surface of the second substrate.

The materials of the first substrate and the second substrate are selected for various reasons, including, but not limited to, the mechanical integrity of the monolithic laminate substrate at the intended processing and/or operating temperature, the optical absorption of the monolithic laminate substrate, Alkali metal features of corresponding elements, different etching rates between the first substrate and the second substrate, thermal expansion characteristics of the overall laminated substrate; thermal expansion characteristics of the first substrate, and/or deflection of the overall laminated substrate. For example, in the case of producing a bottom transmissive display (that is, a display in which light passes through a substrate as shown in FIGS. 7a-7b), a material that exhibits low optical absorption can be selected for the first substrate to produce a transparent substrate . As another example, when a TFT is to be formed on a substrate, an alkali-free material may be selected for one or more of the first layer, the second layer, or the core material. In various embodiments, the material of the first layer is the same as the material used for the second layer. In other embodiments, the material of the first layer is different from the material used for the second layer.

In some embodiments, the first substrate is made of laminated glass to form a multilayer substrate on top of the second substrate. The laminated glass can contain no alkali metal so that it is compatible with the formation of TFTs on its surface. Furthermore, laminated glass exhibits greater retention strength than typical display glass materials. This increase in retention strength after abrasion provides benefits for the use of display splicing and provides benefits for the overall reliability of the final product. Although the foregoing examples discuss applications using specific substrate materials, other substrate materials are also feasible according to other embodiments. For example, it is also feasible to use one or all layers of high-purity fused silica substrates made of high-purity fused silica. This high-purity fused silica has a thermal expansion coefficient of about 0.5 ppm/C. Referring to FIG. 9a, an example of a separable substrate 900 is illustrated as having a first substrate 906 formed on a first layer 915 and a second layer 910. The first layer 915 is a side attached to the second substrate 905.

Returning to FIG. 8, the high temperature electronic device is placed on the surface of the first substrate (block 810). These high-temperature electronic devices are formed separately from the laminated substrate, and the manufactured high-temperature electronic device is placed at a defined position on the substrate of the first layer. Alternatively, high-temperature electronic devices can be placed on the core layer. In this case, the substrate does not have the first layer. The high-temperature electronic device can also be disposed on other layers of the substrate. By manufacturing the high-temperature electronic device separately from the laminated substrate, the laminated substrate that cannot withstand the high-temperature processing of the high-temperature electronic device can be selected. Such high-temperature electronic devices may be, but not limited to, micro-shaped LEDs, LEDs, micro-driver ICs, and IC chips. Based on the disclosure provided herein, those skilled in the art will recognize various high-temperature electronic devices that can be used in connection with different embodiments. High-temperature electronic devices can be placed using any known process in this art, including, but not limited to, pick-and-place processing capable of placing individual electronic devices at desired locations, transfer by imprinting the substrate, or by incorporating The material layer of the high-temperature electronic device is applied to the surface of the laminated substrate. Based on the disclosure provided in this article, those skilled in the art will recognize various processes that can use high-temperature electronic devices on substrates. Referring to FIG. 9b, the separable substrate 900 is illustrated as having several high-temperature electronic devices 939 placed on the surface 910 of the first layer 906.

Referring next to the flowchart 800 of FIG. 8, the planarizing material is formed on the combination of the high-temperature electronic device and the second layer of the first substrate, and the exposed surface of the planarizing material is smoothed to leave it flat enough to allow The outer surface of the low temperature electronic device is formed (block 815). In some cases, the planarizing material is an insulator that not only provides a material for planarization but also serves as a passivation layer. On the premise of not disturbing the position of the high-temperature electronic device, a planarizing material is formed on the laminated substrate. In some cases, the planarizing material is transparent resin or silicon material. Examples of other planarizing materials include sol-gel, spin-on glass, and polyimide. Based on the disclosure provided herein, those skilled in the art will recognize other materials that can be used as planarizing materials according to other embodiments.

Referring to FIG. 9c, the stacked substrate 900 is illustrated as having a planarization layer 940 that forms a high-temperature electronic device 939 that is placed on the surface 910 of the first layer 906. The planarization layer 940 has been smoothed to the extent that the high-temperature electronic device 939 exposes the planarization layer. In other embodiments, the high temperature electronic device 939 is enclosed in the planarization layer 940 covering the device.

Returning to FIG. 8, the low temperature electronic device is formed on at least the planarization layer (block 820). The step of forming a low-temperature electronic device may include, but is not limited to, forming a TFT on a planarization layer using a process known in this technology for forming a TFT on top of a substrate. As just one example, the high-temperature electronic device may include a micro-shaped LED, and one of the low-temperature electronic devices may be a circuit for driving the micro-shaped LED.

Since the low-temperature electronic device is formed at a temperature lower than the temperature for forming the high-temperature electronic device and lower than the temperature at which the separable substrate becomes unstable, the low-temperature electronic device can be directly manufactured on the substrate. Based on the disclosure provided herein, those skilled in the art will recognize various low-temperature electronic devices that can be formed on the planarization layer according to different embodiments. These include structures that include semiconductors, nonlinear electronic devices, nonlinear optical devices, and materials that convert energy between electrical, optical, thermal, and mechanical forms. Also, based on the disclosure provided herein, those skilled in the art will recognize that low temperature electronic devices can be formed only on the planarization layer, only on top of the exposed high temperature electronic device, or partially on the planarization layer and at least An exposed high-temperature electronic device on each. In other situations, the low temperature electronic device can be formed on the side of the substrate relative to the high temperature electronic device. Alternatively, the high-temperature electronic device can be formed on either side or both sides of the substrate, and the low-temperature electronic device can be formed on either side or both sides of the substrate.

Referring to FIG. 9d, the separable substrate 900 is illustrated as having a low-temperature electronic device 942 formed over the planarization layer 940. In particular, a portion of each low-temperature electronic device 942 and the planarization layer and the corresponding high-temperature electronic device 939 overlap. In other examples, the low-temperature electronic device 942 does not directly overlap with the high-temperature electronic device 939.

Returning to FIG. 8, an electrically conductive track connecting the low-temperature electronic device and/or the high-temperature electronic device (block 825) is formed. Any known process in this art can be used to form an electrically conductive trajectory. As an example, the step of forming an electrically conductive track includes depositing a metal layer, a low temperature electronic device, and a high temperature electronic device on the exposed portion of the planarization layer. Next, the metal layer is patterned and etched to leave only the metal that meets the requirements. Alternatively, additional processes such as printing can be used to form electrically conductive traces. Referring to FIG. 9e, the separable substrate 900 is illustrated as having conductive traces 960 connecting various low-temperature electronic devices 942 and high-temperature electronic devices 939.

Returning to FIG. 8, the first substrate includes: a high-temperature electronic device and a low-temperature electronic device, and the electrical trace is separated from the second substrate (block 830). Referring to FIG. 9f, the first substrate 906 has a planarization layer 940, a high-temperature electronic device 939, and a low-temperature electronic device 942, and shows an electrical trace 960 placed on the first surface 910 after being separated from the second substrate. In summary, the disclosure provides novel systems, devices, methods, and arrangements for making devices that include a mixture of high-temperature electronic devices and low-temperature electronic devices. Although the implementation of one or more embodiments has been given above, those skilled in the art will be able to understand various substitutions, modifications, and equivalents without departing from the spirit of the present invention. For example, the first substrate of the separable substrate can be replaced by the substrate discussed in relation to FIGS. 1, 3, and 5, and the process discussed in relation to FIGS. 1, 3, and 5 can be applied to the separable substrate. Therefore, the foregoing description should not be considered as limiting the scope of the present invention, which is defined by the scope of the patent application attached to this case.

100/300/500/800‧‧‧Flow chart 105/110/115/120/125/305/310 315/320/325/330/335/505/510/515/520/525/530/535/540/545/550/555/560/565/805/810/815/820/825/830/200/ 400/600/900‧‧‧ Laminated substrate 205/405/605/705‧‧‧Core material 206/406/406a/606/706/915 ‧‧‧ first floor 207/407/607/707/910 ‧‧‧ second floor 210/410/610‧‧‧First surface 215/415/615‧‧‧Second surface 239/439/639/939‧‧‧High temperature electronic device 240/440/640/940‧‧‧Planning layer 242/442/642/942‧‧‧Low temperature electronic device 260/960‧‧‧Conductivity trajectory 435/635/906‧‧‧Mask 437/637a/637b/637d/637e 480/680‧‧‧Metal redistribution layer 630‧‧‧Predefined path/damage track 648‧‧‧Protection coating 650/760‧‧‧ opening 652‧‧‧Perforated through hole 700/701‧‧‧ bottom transmissive display 739‧‧‧Micro LED 750‧‧‧ light energy

Further understanding of various embodiments of the present invention can be achieved by reference to the illustrations described in the rest of the specification. In the illustrations, multiple illustrations throughout the text using similar element numbers refer to similar elements. In some examples, sub-picture numbers containing lowercase English letters are associated with element symbols to represent one of multiple similar elements. When referring to component symbols without specifying the number of existing sub-pictures, it is intended to refer to all of these multiple similar components.

FIG. 1 is a flowchart illustrating a method for manufacturing an article including both high-temperature and low-temperature electronic devices according to some embodiments;

2a to 2e illustrate a subset of processing steps according to one or more embodiments, including the step of placing a high-temperature electronic device, followed by the steps of forming a low-temperature electronic device in a manner consistent with the method shown in FIG. 1;

3 is a flowchart illustrating another method for manufacturing an article including both high-temperature and low-temperature electronic devices according to some embodiments;

4a to 4f illustrate a subset of processing steps according to one or more embodiments, including the step of placing a high-temperature electronic device in a hole, followed by low-temperature electrons formed in a manner consistent with the method shown in FIG. 3 The steps of the device;

5 is a flow chart illustrating another method for manufacturing an article including both high-temperature and low-temperature electronic devices according to some embodiments;

6a to 6l illustrate a subset of the processing steps according to one or more embodiments, including the predefined steps of the through hole, the step of placing the high-temperature electronic device in the drilling hole, followed by The method of forming a low-temperature electronic device and completing the through hole in a consistent manner;

7a to 7b illustrate examples of two bottom transmissive displays made according to different embodiments discussed herein;

8 is a flowchart illustrating a method for manufacturing an article including both high-temperature and low-temperature electronic devices using a separable substrate according to some embodiments; and

9a to 9f illustrate a subset of processing steps according to one or more embodiments, including the step of placing a high-temperature electronic device, followed by the step of forming a low-temperature electronic device in a manner consistent with the method shown in FIG.

Domestic storage information (please note in order of storage institution, date, number) no

Overseas hosting information (please note in order of hosting country, institution, date, number) no

200‧‧‧Laminated substrate

205‧‧‧Core material

206‧‧‧First floor

207‧‧‧Second floor

210‧‧‧First surface

215‧‧‧Second surface

239a/239b/239c/239d/239e‧‧‧‧High temperature electronic device

240‧‧‧Planning layer

242a/242b‧‧‧Low temperature electronic device

260b/260c‧‧‧ Conductivity track

Claims (24)

A method for manufacturing a system including a plurality of high-temperature electronic devices and at least one low-temperature electronic device, the method includes the following steps: Provide a substrate; Each high-temperature electronic device is provided at a corresponding position on the substrate; and After the plurality of high-temperature electronic devices are disposed on the substrate, the at least one low-temperature electronic device is disposed on the substrate. The method of claim 1, wherein the substrate includes a first material layer attached to a core material, the method further includes the following steps: Forming a plurality of openings in the first material layer that only partially extend into the substrate; and The step of arranging each high-temperature electronic device at a corresponding position on the substrate includes the following steps: each of the high-temperature electronic devices is arranged in a corresponding opening of the plurality of openings. The method according to claim 2, wherein the step of arranging the at least one low-temperature electronic device on the substrate includes the step of arranging the at least one low-temperature electronic device in one of the plurality of openings. The method according to claim 3, further comprising the following steps: An electrical track electrically coupling the at least one low-temperature electronic device to at least one high-temperature electronic device is formed on the substrate. The method according to claim 1, wherein the substrate comprises a transparent material. The method of claim 1, wherein each of the high-temperature devices is a micro-shaped LED, and wherein the at least one low-temperature electronic device is an LED driver circuit. The method of claim 1, the substrate comprises at least one selected from the group consisting of a glass, a glass-ceramic, and a ceramic. The method of claim 1, wherein the substrate is a laminated substrate including a first material layer attached to at least a first surface of a core material such that a The second surface is in contact with the first surface of the core material and at least a portion of a first surface of the first material layer is exposed. The method further includes the following steps: Forming a plurality of openings extending through the core material in the first material layer; and The step of arranging each high-temperature electronic device at a corresponding position on the substrate includes the following steps: each of the high-temperature electronic devices is arranged in a corresponding opening of the plurality of openings. The method according to claim 8, wherein the step of disposing the at least one low-temperature electronic device on the substrate includes the step of disposing the at least one low-temperature electronic device in one of the plurality of openings. According to the method of claim 8, the step of disposing the at least one low-temperature electronic device on the substrate includes the following steps: disposing the at least one low-temperature electronic device on the first material layer. The method of claim 10, wherein the step of disposing the at least one low-temperature electronic device on the substrate includes the step of forming the at least one low-temperature electronic device directly on the first material layer using a thin film transistor process. The method according to claim 8, wherein the step of disposing the at least one low-temperature electronic device on the substrate includes the steps of: directly forming the at least one low-temperature electron in one of the plurality of openings using a thin-film transistor process Device. The method according to claim 8, wherein: The core material is selected from the group consisting of: a glass, a glass-ceramic, and a ceramic; and The first material layer is made of a material selected from the group consisting of: a glass, a glass-ceramic, and a ceramic. The method of claim 13, wherein the first material layer is opaque and the core material is transparent. The method of claim 8, wherein the laminated substrate further includes the second material layer attached to a second surface of the core material such that a second surface of the second material layer is in contact with the core material Of the second surface is in contact and at least a portion of the first surface of one of the second material layers is exposed, and wherein: The core material is selected from the group consisting of: a glass, a glass-ceramic, and a ceramic; and The first material layer is made of a material selected from the group consisting of: a glass, a glass-ceramic, and a ceramic; The second material layer is made of a material selected from the group consisting of: a transparent glass, a transparent glass-ceramic, and a transparent ceramic. The method of claim 8, wherein the laminated substrate further includes the second material layer attached to a second surface of the core material such that a second surface of the second material layer is in contact with the core material Of the second surface is in contact and at least a portion of the first surface of one of the second material layers is exposed, and wherein: The core material is selected from the group consisting of: a glass, a glass-ceramic, and a ceramic; and The first material layer is made of a material selected from the group consisting of: a glass, a glass-ceramic, and a ceramic; The second material layer is made of a material selected from the group consisting of: an opaque glass, an opaque glass-ceramic, and an opaque ceramic. The method of claim 1, wherein the substrate is a first substrate, wherein the first substrate is attached to a second substrate, and wherein the method further includes the following steps: The first substrate and the second substrate including the plurality of high-temperature electronic devices and the at least one low-temperature electronic device are separated. An electronic device product, the product includes: A laminated substrate with a first material layer coated to a core material; A plurality of high-temperature electronic devices in contact with the core material and within the opening in the first material layer; At least one low-temperature electronic device on the same side of the core material and the first material layer; and The at least one low temperature electronic device is electrically coupled to an electrical track of the at least one high temperature electronic device. The electronic device article of claim 18, wherein the laminated substrate further includes the second material layer attached to a second surface of the core material such that a second surface of the second material layer is in contact with the The second surface of the core material contacts and at least a portion of the first surface of one of the second material layers is exposed, and wherein: The core material is selected from the group consisting of: a glass, a glass-ceramic, and a ceramic; and The first material layer is made of a material selected from the group consisting of: a glass, a glass-ceramic, and a ceramic; The second material layer is made of a material selected from the group consisting of: an opaque glass, an opaque glass-ceramic, and an opaque ceramic. The electronic device article of claim 18, wherein at least one of the first material layer or the second material layer is opaque. The electronic device product according to claim 18, wherein the core material is transparent. The electronic device product according to claim 18, wherein the at least one low temperature electronic device is formed directly on a material selected from the group consisting of: the first material layer, the first material using a thin film transistor process An opening of the core material in the layer and a planarized surface above the first material layer. The electronic device product of claim 18, wherein each high-temperature electronic device is a micro-shaped LED, and wherein the at least one low-temperature electronic device is an LED driver circuit. The electronic device article of claim 22, wherein the electronic device article is a bottom transmissive display, and wherein light emitted from each of the plurality of micro-shaped LEDs is transmitted through the core material.

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