TW201939463A - Source electrode driving circuit with low power consumption and liquid crystal display having the same being provided with a first switch, a first latch, a second switch, a second latch, a third switch, a fourth switch, a third latch, and a driving unit - Google Patents

Abstract

This invention provides a source electrode driving circuit with low power consumption, comprising a first switch, a first latch, a second switch, a second latch, a third switch, a fourth switch, a third latch and a driving unit and is used for converting a 1-point flip pixel voltage data series into a 2-point flip pixel voltage data series, and the 2-point flip pixel voltage data series is used for driving a liquid crystal display by virtue of an effect of one of a plurality of gate driving signals so that the liquid crystal display has a 1-point flip display effect.

Description

Low power consumption source driving circuit and liquid crystal display with same

The present invention relates to a source driving circuit applied to a liquid crystal display, and more particularly to a low power source driving circuit applied to a liquid crystal display.

FIG. 1 is a diagram of a conventional liquid crystal display driving circuit. As shown in FIG. 1, a liquid crystal display (LCD) 20 is a plurality of gate driving signals VG1-VGn provided by a gate driving circuit and a plurality of source driving units 10 of a source driving circuit. The provided analog driving signals VS1-VSn generate a picture, wherein the analog driving signals VS1-VSn are generated according to a voltage data signal SPIX.

As shown in FIG. 1, each pixel 22 in a liquid crystal display (LCD) 20 is controlled by a thin film transistor (TFT) 21, and the gates of each row of thin film transistors 21 are A horizontal scanning line is coupled to one of the gate driving signals VG1-VGn, and the source of each column of thin-film transistors 21 passes a vertical scanning line to the analog driving signals VS1-VSn. A driving signal is coupled.

During operation, the gate driving circuit will sequentially turn on a row of thin film transistors 21, and the source driving circuit will provide analog driving signals VS1-VSn to send the data voltage to be displayed to the corresponding row of pixels 22, thereby A screen is displayed.

In addition, the electric field applied to the liquid crystal molecules is directional. Applying the opposite voltage to the liquid crystal molecules during different frame periods is called polarity reversal. Although the image signal is only related to the voltage applied to the liquid crystal molecules and has nothing to do with its sign, it still needs the operation of polarity inversion. The reasons are: First, because the alignment film of the liquid crystal display has a DC blocking effect, the liquid crystal must be driven by an AC signal; Second, if the liquid crystal molecules are driven with the same polarity all the time, the liquid crystal molecules will fail and a "DC residual" phenomenon will occur. As a result, afterimages appear during the display process.

Although each liquid crystal molecule needs to be driven by polarity inversion, as far as a pixel panel of an array is not necessarily driven by the same polarity. According to the polarity of adjacent pixels, the polarity inversion methods can be divided into frame inversion, column inversion, row inversion, and dot inversion. Please refer to FIGS. 2a-2c, which are schematic diagrams of 1-dot inversion, 2-dot inversion, and column inversion, respectively.

In the comparison of 1-point inversion, 2-point inversion, and column inversion, since the pixel voltage of the same column is sent at the same time by the same data line, for the same column of pixels, the more the number of inversions, the The larger the power consumption, the better the display effect. Therefore, the display effect and power consumption are a trade-off relationship at design time.

FIG. 3 is a circuit diagram of a conventional source driving circuit. As shown in FIG. 3, the conventional source driving circuit includes a first latch 31, a second latch 32, a digital-to-analog converter 33, an operational amplifier 34, and an output switch 35. A 1-point inverted pixel voltage data series transmitted by the pixel voltage data signal SPIX generates an analog driving signal SOUT that alternates positive and negative polarity. The digital-to-analog converter 33, the operational amplifier 34, and the output switch 35 constitute an Drive unit.

During operation, it is assumed that the 1-point flipped pixel voltage data series is A +, B-, C +, D-, E +, F-, G +, H-, ..., where "+" represents a positive voltage, " -"Represents a negative voltage, that is, A + represents a positive voltage with a voltage value of A, B- represents a negative voltage with a voltage value of B, and so on. Figures 4a-4c can be broken down into:

Step 1: At time 1, the pixel voltage data A + is latched by the first latch 31;

Step 2: At time 2, a thin film transistor in the first row G1 is turned on so that A + in the first latch 31 is latched by the second latch 32 and the driving unit generates an analog based on the pixel voltage data A + Driving signal SOUT to drive a liquid crystal capacitor, and B- is latched by the first latch 31;

Step 3: At time 3, a thin film transistor in the second row G2 is turned on so that B- in the first latch 31 is latched by the second latch 32 and the driving unit is based on the pixel voltage data B- Generating an analog driving signal SOUT to drive a liquid crystal capacitor, and C + is latched by the first latch 31;

Step 4: At time 4, a thin film transistor in the third row G3 is turned on so that C + in the first latch 31 is latched by the second latch 32 and the driving unit generates an analog based on the pixel voltage data C + Driving signal SOUT to drive a liquid crystal capacitor, and D- is latched by the first latch 31;

Step 5: At time 5, a thin film transistor in the fourth row G4 is turned on so that D- in the first latch 31 is latched by the second latch 32 and the driving unit is based on the pixel voltage data D- Generating an analog driving signal SOUT to drive a liquid crystal capacitor, and E + is latched by the first latch 31;

Step 6: At time 6, a thin film transistor in the fifth row G5 is turned on so that E + in the first latch 31 is latched by the second latch 32 and the driving unit generates an analog based on the pixel voltage data E +. Driving signal SOUT to drive a liquid crystal capacitor, and F- is latched by the first latch 31;

Step 7: At time 7, a thin film transistor of the sixth row G6 is turned on so that F- in the first latch 31 is latched by the second latch 32 and the driving unit is based on the pixel voltage data F- Generating an analog driving signal SOUT to drive a liquid crystal capacitor, and G + is latched by the first latch 31;

Step 8: At time 8, a thin film transistor of the seventh row G7 is turned on so that G + in the first latch 31 is latched by the second latch 32 and the driving unit generates an analog based on the pixel voltage data G + Driving signal SOUT to drive a liquid crystal capacitor, and H- is latched by the first latch 31;

Step 9: At time 9, a thin film transistor in the 8th row G8 is turned on so that H- in the first latch 31 is latched by the second latch 32 and the driving unit is based on the pixel voltage data H- An analog driving signal SOUT is generated to drive a liquid crystal capacitor, and I + is latched by the first latch 31; and so on.

According to the above operation flow, the analog driving signal SOUT can provide the power supply sequence with the polarity regularity (+), (-), (+), (-), (+), (-), (+), (-) ... To provide a 1-point flip display. However, as mentioned above, for the same column of pixels, the more the number of flips, the more power is consumed by the source driving circuit.

Therefore, there is an urgent need in the art for a novel low power source drive structure.

The main purpose of the present invention is to disclose a low-power source driving circuit applied to a liquid crystal display, which uses a 2-point inversion driving method to realize a 1-point inversion display effect, and uses a low-power driving method to achieve good performance. Display effect.

To achieve the foregoing object, a low-power source driving circuit is proposed, which has:

A first switch has a first control terminal and a first channel. The first control terminal is coupled to a first switching signal. The first channel has a first input terminal and a first output terminal. The first input terminal is used for coupling with a pixel voltage data signal, and the pixel voltage data signal is used for transmitting a 1-point flipped pixel voltage data series;

A first latch device having a first latch input end and a first latch output end, the first latch input end is coupled with the first output end;

A second switch has a second control terminal and a second channel. The second control terminal is coupled to a second switching signal. The second channel has a second input terminal and a second output terminal. The second input terminal is used for coupling with the pixel voltage data signal;

A second latch device having a second latch input end and a second latch output end, the second latch input end is coupled with the second output end;

A third switch has a third control terminal and a third channel. The third control terminal is coupled to a third switching signal. The third channel has a third input terminal and a third output terminal. The third input terminal is coupled to the first latch output terminal;

A fourth switch has a fourth control terminal and a fourth channel. The fourth control terminal is coupled to a fourth switching signal. The fourth channel has a fourth input terminal and a fourth output terminal. A fourth input terminal is coupled to the second latch output terminal;

A third latch having a third latch input and a third latch output, the third latch input is coupled to the third output and the fourth output; and

A driving unit has a fifth input terminal and a fifth output terminal. The fifth input terminal is coupled to the third latch output terminal, and the fifth output terminal is used to output according to the third latch. A digital data signal at the end generates an analog driving signal;

The first switching signal, the second switching signal, the third switching signal, and the fourth switching signal respectively control the first latch, the second latch, and the third according to a working sequence. The latch, so that the third latch output terminal outputs a 2-point inverted pixel voltage data string.

In one embodiment, the driving unit has:

A digital-to-analog converter having a digital input terminal and an analog output terminal, the digital input terminal is coupled to the third latch output terminal;

An operational amplifier having an operational input and an operational output, the operational input being coupled to the analog output; and

An output switch is coupled between the operation output terminal and the fifth output terminal to control the output of the analog driving signal.

In one embodiment, the 2-point inversion pixel voltage data series sequentially drives a liquid crystal display by one of a plurality of gate driving signals, so that the liquid crystal display has a 1-point inversion display effect.

In an embodiment, the action sequence is that the action times of the gate driving signals of the 4Kth and 4K-1 are reversed, and K is a positive integer.

In order to achieve the foregoing object, a liquid crystal display has been proposed, which has the aforementioned low-power source driving circuit.

In order to enable your reviewing committee to further understand the structure, characteristics, and purpose of the present invention, the drawings and detailed description of the preferred embodiments are attached as follows.

Please refer to FIG. 5, which illustrates a circuit diagram of an embodiment of a low power source driving circuit according to the present invention. As shown in FIG. 5, the low-power source driving circuit includes a first switch 101, a first latch 102, a second switch 103, a second latch 104, a third switch 105, and a The fourth switch 106, a third latch 107, and a driving unit 110.

The first switch 101 has a first control terminal and a first channel. The first control terminal is coupled to a first switching signal SW _1. The first channel has a first input terminal and a first output terminal. The first input terminal is used for coupling with a pixel voltage data signal _SPIX , and the pixel voltage data signal _SPIX is used for transmitting a 1-point inverted pixel voltage data series.

The first latch 102 has a first latch input and a first latch output. The first latch input is coupled to the first output of the first switch 101.

The second switch 103 has a second control terminal and a second channel. The second control terminal is coupled to a second switching signal SW _2. The second channel has a second input terminal and a second output terminal. The second input terminal is used for coupling with the pixel voltage data signal _SPIX .

The second latch 104 has a second latch input and a second latch output. The second latch input is coupled to the second output of the second switch 103.

The third switch 105 has a third control terminal and a third channel. The third control terminal is coupled to a third switching signal SW _3. The third channel has a third input terminal and a third output terminal. The third input terminal is coupled to the first latch output terminal.

The fourth switch 106 has a fourth control terminal and a fourth channel. The fourth control terminal is coupled to a fourth switching signal SW _4. The fourth channel has a fourth input terminal and a fourth output terminal. The fourth input terminal is coupled to the second latch output terminal.

The third latch 107 has a third latch input and a third latch output. The third latch input is connected to the third output of the third switch 105 and the fourth switch 106. The fourth output terminal is coupled.

The driving unit 110 has a fifth input terminal and a fifth output terminal. The fifth input terminal is coupled to the third latch output terminal, and the fifth output terminal is used to connect the third latch output terminal. A digital data signal generates an analog drive signal S _OUT .

In the embodiment of FIG. 5, the driving unit 110 includes a digital-to-analog converter 111, an operational amplifier 112, and an output switch 113.

The digital-to-analog converter 111 has a digital input terminal and an analog output terminal. The digital input terminal is coupled to the third latch output terminal, and the analog output terminal is coupled to the operational amplifier 112.

The operational amplifier 112 has an operational input and an operational output. The operational input is coupled to the analog output.

The output switch 113 is coupled between the operation output terminal and the fifth output terminal to control the output of the analog driving signal S _OUT .

During operation, the first switching signal SW ₁ , the second switching signal SW ₂ , the third switching signal SW ₃ and the fourth switching signal SW ₄ control the first latch 102 and the first latch 102 respectively according to a working sequence. The two latches 104 and the third latch 107 enable the third latch output terminal to output a 2-point inverted pixel voltage data series. In addition, the 2-point inversion pixel voltage data series drives a liquid crystal display in sequence by one of a plurality of gate driving signals, so that the liquid crystal display has a 1-point inversion display effect. In one embodiment, , The action sequence is to reverse the action time of the gate driving signals of the 4Kth and 4K-1, and K is a positive integer.

For example, suppose that the 1-point flipped pixel voltage data series is A +, B-, C +, D-, E +, F-, G +, H-, ..., where "+" represents a positive voltage, "-"Represents a negative voltage, that is, A + represents a positive voltage with a voltage value of A, B- represents a negative voltage with a voltage value of B, and so on, according to the first switching signal SW ₁ and the second switching signal SW ₂ The operation timing of the third switching signal SW ₃ and the fourth switching signal SW ₄ and the action sequence of the plurality of gate driving signals. For the operation of the low power source driving circuit in FIG. 5, please refer to FIG. 6a-6c, can be broken down into :

Step 1: At time 1, the first switching signal turns on the first switch SW ₁ 101 to the pixel data A + is the voltage of the first latch 102 latches;

Step 2: 2, 103 so that the pixel data voltage B- is a second latch 104 latches the second switching signal of the second switch SW ₂ is turned on at a time;

Step 3: At time 3, the gate driving signal V _G1 turns on a thin film transistor in the first row, and the third switching signal SW ₃ turns on the third switch 105 so that the pixel voltage data A + in the first latch 102 is changed by the third The latch 107 latches and causes the driving unit 110 to generate an analog driving signal S _OUT according to the pixel voltage data A + to drive a liquid crystal capacitor. At the same time, the first switching signal SW ₁ turns on the first switch 101 so that the pixel voltage data C + is The latch 102 is latched;

Step 4: At time 4, the gate driving signal V _G2 turns on a thin film transistor in the second row, and the fourth switching signal SW ₄ turns on the fourth switch 106 to enable the pixel voltage data B- in the second latch 104 to be turned on. The three latches 107 latch and cause the driving unit 110 to generate an analog driving signal S _OUT according to the pixel voltage data B- to drive a liquid crystal capacitor, and at the same time, the second switching signal SW ₂ turns on the second switch 103 to enable the pixel voltage data D- Latched by the second latch 104;

Step 5: At time 5, the gate driving signal V _G4 turns on a fourth row of thin film transistors, and the fourth switching signal SW ₄ turns on the fourth switch 106 to enable the pixel voltage data D- in the second latch 104 to be turned on. The three latches 107 latch and cause the driving unit 110 to generate an analog driving signal S _OUT to drive a liquid crystal capacitor according to the pixel voltage data D-, and at the same time, the second switching signal SW ₂ turns on the second switch 103 to enable the pixel voltage data E + to be The second latch 104 is latched;

Step 6: At time 6, the gate driving signal V _G3 turns on a third row of thin film transistors, and the third switching signal SW ₃ turns on the third switch 105 so that the pixel voltage data C + in the first latch 102 is third The latch 107 latches and causes the driving unit 110 to generate an analog driving signal S _OUT to drive a liquid crystal capacitor according to the pixel voltage data C +, and at the same time, the first switching signal SW ₁ turns on the first switch 101 to make the pixel voltage data F- A latch 102 is latched;

Step 7: At time 7, the gate driving signal V _G5 turns on a fifth row of thin film transistors, and the fourth switching signal SW ₄ turns on the fourth switch 106 so that the pixel voltage data E + in the second latch 104 is third. The latch 107 latches and causes the driving unit 110 to generate an analog driving signal S _OUT to drive a liquid crystal capacitor according to the pixel voltage data E +, and at the same time, the second switching signal SW ₂ turns on the second switch 103 so that the pixel voltage data G + is The latch 104 is latched;

Step 8: At time 8, the gate driving signal V _G6 turns on a thin film transistor in the sixth row, and the third switching signal SW ₃ turns on the third switch 105 to enable the pixel voltage data F- in the first latch 102 to be turned on. The three latches 107 latch and cause the driving unit 110 to generate an analog driving signal S _OUT according to the pixel voltage data F- to drive a liquid crystal capacitor, and at the same time, the first switching signal SW ₁ turns on the first switch 101 to enable the pixel voltage data H- Latched by the first latch 102;

Step 9: At time 9, the gate driving signal V _G8 turns on an 8th thin film transistor, and the third switching signal SW ₃ turns on the third switch 105 so that the pixel voltage data H- in the first latch 102 is The three latches 107 latch and cause the driving unit 110 to generate an analog driving signal S _OUT according to the pixel voltage data H- to drive a liquid crystal capacitor, and at the same time, the first switching signal SW ₁ turns on the first switch 101 so that the pixel voltage data I + is The first latch 102 is latched;

Step 10: At time 10, the gate driving signal V _G7 turns on a thin film transistor in the seventh row, and the fourth switching signal SW ₄ turns on the fourth switch 106 so that the pixel voltage data G + in the second latch 104 is third. The latch 107 latches and causes the driving unit 110 to generate an analog driving signal S _OUT to drive a liquid crystal capacitor according to the pixel voltage data G +, and at the same time, the second switching signal SW ₂ turns on the second switch 103 to make the pixel voltage data J- The two latches 104 latch; and so on.

According to the above method, the low-power source driving circuit of the present invention can use a 2-point inversion power supply mode to make the actual driving effect obtained by the pixel array equal to the driving effect obtained by 1-point inversion power supply. In the case of the low power consumption source driving circuit, the display effect is good.

What is disclosed in this case is a preferred embodiment. For example, those who have partial changes or modifications that are derived from the technical ideas of this case and are easily inferred by those skilled in the art, do not depart from the scope of patent rights in this case.

To sum up, regardless of the purpose, method and effect, this case is showing its technical characteristics that are quite different from the conventional ones, and its first invention is practical, and it is also in line with the patent requirements of the invention. Granting patents at an early date will benefit society and feel good.

10‧‧‧Source driver unit

20‧‧‧ LCD

21‧‧‧ thin film transistor

22‧‧‧ pixels

31‧‧‧First latch

32‧‧‧Second latch

33‧‧‧ Digital-to-Analog Converter

34‧‧‧ Operational Amplifier

35‧‧‧Output switch

101‧‧‧The first switch

102‧‧‧First latch

103‧‧‧Second switch

104‧‧‧Second latch

105‧‧‧Third switch

106‧‧‧Fourth switch

107‧‧‧The third latch

110‧‧‧Drive unit

111‧‧‧ Digital-to-Analog Converter

112‧‧‧ Operational Amplifier

113‧‧‧Output switch

FIG. 1 is a diagram of a conventional liquid crystal display driving circuit. Figures 2a-2c are schematic diagrams of 1-dot inversion, 2-dot inversion, and column inversion, respectively. FIG. 3 is a circuit diagram of a conventional source driving circuit. 4a-4c illustrate the operation flow of the conventional source driving circuit of FIG. FIG. 5 is a circuit diagram of an embodiment of a low power source driving circuit according to the present invention. 6a-6c illustrate the operation flow of the low power source driving circuit of FIG.

Claims (5)

A low power consumption source driving circuit includes: a first switch having a first control terminal and a first channel; the first control terminal is coupled with a first switching signal; the first channel has a A first input terminal and a first output terminal, the first input terminal is used for coupling with a pixel voltage data signal, and the pixel voltage data signal is used for transmitting a 1-point flip pixel voltage data string; The first latch has a first latch input and a first latch output. The first latch input is coupled to the first output. A second switch has a second control. Terminal and a second channel, the second control terminal is coupled to a second switching signal, the second channel has a second input terminal and a second output terminal, and the second input terminal is used to communicate with the pixel Voltage data signal coupling; a second latch having a second latch input and a second latch output, the second latch input is coupled to the second output; a third The switch has a third control terminal and a third channel. The third The control terminal is coupled to a third switching signal, the third channel has a third input terminal and a third output terminal, the third input terminal is coupled to the first latch output terminal; a fourth switch Has a fourth control terminal and a fourth channel, the fourth control terminal is coupled to a fourth switching signal, the fourth channel has a fourth input terminal and a fourth output terminal, the fourth input terminal Is coupled to the second latch output; a third latch having a third latch input and a third latch output, the third latch input is coupled to the third output And the fourth output terminal are coupled; and a driving unit having a fifth input terminal and a fifth output terminal, the fifth input terminal is coupled to the third latch output terminal, and the fifth output terminal It is used to generate an analog driving signal according to a digital data signal of the third latch output terminal; wherein the first switching signal, the second switching signal, the third switching signal and the fourth switching signal work in accordance with one. Timing to control the first latch, the second latch, and The third latch enables the third latch output terminal to output a 2-point inverted pixel voltage data string. The low-power source driving circuit according to item 1 of the patent application scope, wherein the driving unit has: a digital-to-analog converter having a digital input terminal and an analog output terminal, the digital input terminal is connected with the The third latch output is coupled; an operational amplifier having an operational input and an operational output, the operational input is coupled to the analog output; and an output switch is coupled to the operational output And the fifth output terminal to control the output of the analog driving signal. The low-power source driving circuit according to item 1 of the scope of the patent application, wherein the 2-point inverted pixel voltage data series drives a liquid crystal display in sequence by one of a plurality of gate driving signals so that The liquid crystal display has a 1-point flip display effect. The low-power source driving circuit according to item 3 of the scope of the patent application, wherein the action sequence is to reverse the action times of the gate driving signals of the 4Kth and 4K-1, and K is a positive integer. A liquid crystal display has a low power consumption source driving circuit as claimed in any one of claims 1-4.