TW201935795A - Over current protection system and over current protection method - Google Patents

Abstract

An over current protection system includes a driving module and a first current modulation circuit, wherein the over current protection system is suitable for a display panel, and the display panel comprises a gate-driver array and a display area. The driving module is arranged to provide a first driving signal to the gate-driver array. The first current modulation circuit couples between the driving module and the gate-driver array, wherein the first current modulation circuit locates on a current path of a first signal current of the first driving signal. During a pulse period of the first driving signal, if absolute value of magnitude of the first driving signal continuously being larger than a predetermined threshold value, the first current modulation circuit restricts the absolute value of the magnitude of the first driving signal to be smaller than the predetermined threshold value until the pulse period of the first driving signal ends.

Description

Overcurrent protection system and overcurrent protection method

This disclosure relates to an overcurrent protection system and an overcurrent protection method applicable to a display panel.

Traditional displays usually include an overcurrent protection device for protecting the gate driving module. The aforementioned overcurrent protection device will activate the overcurrent protection mechanism only when the total time of the overcurrent event of the gate driving module reaches a specific length of time. However, during the process of calculating the total time of the occurrence of the overcurrent event by the foregoing overcurrent protection device, the gate driving module continues to bear excessive current. Therefore, even if the conventional display is provided with an overcurrent protection device, the gate driving module in the conventional display is still easily damaged due to the excessive current for a long time.

In view of this, how to provide an over-current protection system and an over-current protection method that can reduce the amount of current experienced by the gate drive module in time when an over-current event occurs is really a problem to be solved in the industry.

The overcurrent protection system includes a display panel suitable for a display panel. The display panel includes a gate driving array and a display area. The overcurrent protection system includes a driving module and a first current adjustment circuit. The driving module is used to provide a first driving signal to the gate driving array. A first current adjusting circuit is coupled between the driving module and the gate driving array, wherein the first current adjusting circuit is located on a current path of a first signal current of the first driving signal. Wherein, during the pulse period of the first signal current, if the absolute value of the magnitude of the first signal current is greater than a preset threshold value and exceeds a preset time length, the first current adjustment circuit limits the magnitude of the first signal current The absolute value of is not greater than the preset threshold value until the end of the pulse period of the first signal current.

The overcurrent protection method is applicable to a display panel, which includes a gate driving array and a display area. The overcurrent protection method includes the following steps: providing a driving module, wherein the driving module is used to provide a first Driving signal to the gate driving array; providing a first current adjusting circuit, wherein the first current adjusting circuit is coupled between the driving module and the gate driving array, and is located at a first position of the first driving signal; A current path of a signal current; during the pulse period of the first signal current, if the absolute value of the magnitude of the first signal current is greater than a preset threshold value and exceeds a preset time length, the first current adjustment circuit is used to limit The absolute value of the magnitude of the first signal current is not greater than the preset threshold until the end of the pulse period of the first signal current.

The over-current protection system and the over-current protection method in the above embodiments can prevent the display panel from being damaged due to an excessively large current for a long time.

100‧‧‧ overcurrent protection system

101‧‧‧display panel

103‧‧‧Gate Drive Module

105‧‧‧display area

110‧‧‧Driver

120a ~ 120n‧‧‧Current adjustment circuit

130‧‧‧Logic Circuit

140‧‧‧Storage Module

201‧‧‧short-circuit path

203a ~ 203n‧‧‧Shift register

500‧‧‧Over current protection method

Ihck1‧‧‧First Signal Current

Ihck2‧‧‧second signal current

Vhck1‧‧‧ first clock signal

Vhck2‧‧‧Second Clock Signal

Vssg‧‧‧ fixed voltage

Vst‧‧‧Start pulse signal

Tp‧‧‧pulse period

T1, T2, T3 ‧‧‧ first period, second period, third period

s502 ~ s528‧‧‧Process

In order to make the above and other purposes, features, advantages, and embodiments of the disclosure document more comprehensible, the description of the drawings is as follows: FIG. 1 is a simplified function of the overcurrent protection system according to an embodiment of the disclosure document. Block diagram.

FIG. 2 is a simplified functional block diagram of a gate driving module according to an embodiment of the present disclosure.

FIG. 3 is a simplified timing change diagram of an operation embodiment of the overcurrent protection system according to FIG. 1.

FIG. 4 is a simplified timing change diagram of another operation embodiment of the overcurrent protection system according to FIG. 1.

5a and 5b together illustrate a flowchart of an overcurrent protection method according to an embodiment of the present disclosure.

Hereinafter, embodiments of the present invention will be described with reference to related drawings. In the drawings, the same reference numerals represent the same or similar elements or method flows.

FIG. 1 is a simplified functional block diagram of the overcurrent protection system 100 according to an embodiment of the present disclosure. The overcurrent protection system 100 includes a driving module 110, a plurality of current adjustment circuits 120a to 120n, a logic circuit 130, and a storage module 140. The storage module 140 is coupled to the logic circuit 130 and is used for storing the operation of the logic circuit 130. Required information. To make the drawing simple and easy to explain, other components and connections in the overcurrent protection system 100 The relationship is not shown in Figure 1.

The over-current protection system 100 is coupled to a display panel 101, where the display panel 101 includes a gate driving module 103 and a display area 105. The overcurrent protection system 100 can limit or cut off the current in the gate driving module 103 when an overcurrent event occurs in the gate driving module 103 to prevent the gate driving module 103 from being damaged due to the overcurrent.

In this embodiment, the overcurrent protection system 100 and the display panel 101 are respectively disposed on different substrates. However, in some embodiments, the overcurrent protection system 100 and the display panel 101 may be disposed on the same substrate.

FIG. 2 is a simplified functional block diagram of the gate driving module 103 according to an embodiment of the present disclosure. Referring to FIG. 1 and FIG. 2 at the same time, the driving module 110 is used to output a first clock signal Vhck1, a second clock signal Vhck2, a start pulse signal Vst, and a fixed voltage Vssg to the gate driving module 103 to control The gate driving module 103 updates the display screen of the display area 105. Among them, the first clock signal Vhck1 and the second clock signal Vhck2 are used to sequentially operate the plurality of shift registers 203a to 203n of the gate driving module 103. The start pulse signal Vst is used to trigger the gate driving array 103 at the beginning of each frame of the display area 105.

Please note that the lowercase English indexes a to n in the component numbers used in the description and drawings of this case are only for the convenience of referring to individual components, and are not intended to limit the number of the aforementioned components to a specific number. In the description and drawings of this case, if an element number or signal number is used without specifying the index of the component number or signal number, it means that the component number or signal number refers to the component group or signal group that is not specific. Any component of signal. For example, the object referred to by the component number 120a is the current adjustment circuit 120a, and the object referred to by the component number 120 is an arbitrary current adjustment circuit 120 that is not specific among the current adjustment circuits 120a to 120n.

The current adjustment circuit 120 a is located on a signal path of the first clock signal Vhck1 between the driving module 110 and the gate driving module 103. The current adjustment circuit 120b is located on a signal path between the driving module 110 and the gate driving module 103 of the second clock signal Vhck2. The current adjustment circuit 120c is located on a signal path between the driving module 110 and the gate driving module 103 at a fixed voltage Vssg. The current adjustment circuit 120n is located on a signal path between the start pulse signal Vst between the driving module 110 and the gate driving module 103, and the rest can be deduced by analogy.

That is, the current adjustment circuits 120 a to 120 n are respectively located on a plurality of signal paths between the driving module 110 and the gate driving module 103.

When the current adjustment circuits 120a ~ 120n detect that the magnitude of the signal current of the corresponding signal exceeds a preset threshold, the current adjustment circuits 120a ~ 120n limit the corresponding signal current below the preset threshold to prevent the gate The driving module 103 is subjected to excessive current for a long time. For example, when the magnitude of the first signal current Ihck1 of the first clock signal Vhck1 exceeds a preset threshold, the current adjustment circuit 120a limits the first signal current Ihck1. For another example, when the magnitude of the second signal current Ihck2 of the second clock signal Vhck2 exceeds a preset threshold, the current adjustment circuit 120b limits the second signal current Ihck2, and so on.

In practice, the current adjustment circuits 120a ~ 120n can be implemented by a comparator, a switch circuit, a R-C circuit, and a current-limiting resistor. For example, when the magnitude of the first signal current Ihck1 exceeds a preset threshold, the first signal current Ihck1 will charge the RC circuit to a specific voltage. When the comparator receives the aforementioned specific voltage, the comparator controls the switch circuit to switch the first signal current Ihck1 from the original current path to another current path including a current limiting resistor to limit the magnitude of the first signal current Ihck1.

The operation modes of the current adjustment circuits 120 a to 120 n will be further described below with reference to FIGS. 2 to 4. For simplicity of description, the current adjustment circuit 120a will be described as an example. Please refer to FIG. 2. During the manufacturing or operation of the gate driving module 103, a short circuit may occur between the signal paths of the first clock signal Vhck1 and the second clock signal Vhck2 (that is, a short circuit path 201 is generated). ).

If there is no short circuit between the signal paths of the first clock signal Vhck1 and the second clock signal Vhck2 (that is, there is no short-circuit path 201), the waveform of the first signal current Ihck1 will be as shown in FIG. 3. That is, during each pulse period Tp of the first signal current Ihck1, the absolute value of the magnitude of the first signal current Ihck1 will only exceed the preset threshold in the first period T1, and in the second period T2 and the third period T3 is below the threshold.

Since the absolute value of the magnitude of the first signal current Ihck1 is lower than the preset threshold during the second period T2, the current adjustment circuit 120a does not limit the first signal current Ihck1.

On the other hand, if a short circuit occurs between the signal paths of the first clock signal Vhck1 and the second clock signal Vhck2 (ie, there is a short-circuit path 201), the waveform of the first signal current Ihck1 will be as shown in FIG. 4. That is, during each pulse period Tp of the first signal current Ihck1, the first signal current The absolute value of the size of Ihck1 will exceed the preset threshold in both T1 in the first period and T2 in the second period.

In this case, in the second period T2, if the absolute value of the magnitude of the first signal current Ihck1 exceeds a preset threshold value for a duration exceeding a preset time length, the current adjustment circuit 120a will perform the third period T3 Limits the first signal current Ihck1.

In other words, the current adjustment circuit 120a limits the absolute value of the first signal current Ihck1 to be lower than a preset threshold value until the end of the pulse time Tp. In this way, when an over-current event occurs, the over-current protection system 100 can immediately reduce the magnitude of the current to which the gate driving module 103 is subjected, and reduce the risk of damage to the gate driving module 103.

In addition, whenever the current adjustment circuits 120a-120n limit the corresponding signal current, the current adjustment circuits 120a-120n will notify the logic circuit 130 that an overcurrent event has occurred. In a frame of the display area 105, if any one of the current adjustment circuits 120a to 120n notifies the logic circuit 130 of the number of overcurrent events, exceeding the preset number of times corresponding to the current adjustment circuit 120, The logic circuit 130 adjusts the statistical value stored in the storage device 140 to accumulate the total number of frames in which an overcurrent event occurs.

It is worth noting that the respective preset times of the current adjustment circuits 120a to 120n correspond to the types of signals received by the current adjustment circuits 120a to 120n, respectively. For example, a current adjustment circuit 120a for receiving a first clock signal Vhck1, a current adjustment circuit 120b for receiving a second clock signal Vhck2, a current adjustment circuit 120c for receiving a fixed voltage Vssg, and a start pulse signal Vst's corresponding current adjustment circuit 120n Set the number of times to 32, 32, 1 and 1 respectively.

Since the first clock signal Vhck1 has multiple cycles in each frame, and the start pulse signal Vst has only one cycle in each frame, the preset number of times corresponding to the current adjustment circuit 120a (for example, 32 times) ) Is greater than a preset number of times (for example, 1) corresponding to the current adjustment circuit 120n.

In other words, in a frame of the display area 105, if the total number of signals received by a certain current adjustment circuit 120 is greater, the preset number of times corresponding to the certain current adjustment circuit 120 is also greater.

If the logic circuit 130 finds that the statistical value exceeds a preset number of frames (for example, 32 frames), the logic circuit 130 determines that the number of frames in which the gate driving module 103 has an overcurrent event is too large. At this time, the logic circuit 130 controls the driving module 110 to stop outputting all signals transmitted to the gate driving module 103. In this way, accidents during the use of the display panel 101 can be avoided. For example, electrical fire.

In some embodiments, the statistical value represents the total number of consecutive frames in which an overcurrent event occurred. If the logic circuit 130 does not receive a notification from the current adjustment circuits 120a to 120n in a certain frame (that is, the current adjustment circuits 120a to 120n do not limit the corresponding signal current), the logic circuit 130 resets the statistical value to zero. To recalculate the total number of consecutive frames where an overcurrent event occurred.

5a and 5b together illustrate a simplified flowchart of an overcurrent protection method 500 according to an embodiment of the present disclosure. The overcurrent protection method 500 is applicable to the above-mentioned overcurrent protection system 100. For the sake of brevity, the current adjustment circuits 120a and 120b will be described as an example below.

In the flowcharts shown in FIG. 5a and FIG. 5b, the process located in the field to which a specific device belongs represents the process performed by the specific device. For example, the process marked in the "Drive Module 110" field represents the process performed by the drive module 110; the process marked in the "Current Adjustment Circuit 120a" field represents the process performed by the current adjustment circuit 120a Process.

In flow s502, the driving module 110 outputs the first clock signal Vhck1 and the second clock signal Vhck2 to the current adjustment circuits 120a and 120b, respectively. The current adjustment circuit 120a executes process s504 to receive the first clock signal Vhck1, and executes process s506 to determine whether the absolute value of the magnitude of the first signal current Ihck1 of the first clock signal Vhck1 continues to exceed the preset within a preset time length Threshold.

If the first signal current Ihck1 does not exceed the preset threshold for a preset period of time, the current adjustment circuit 120a repeatedly executes the process s504. On the other hand, if the first signal current Ihck1 continues to exceed the preset threshold within a preset time length, the current adjustment circuit 120a then executes process s508 to limit the first signal flow Ihck1 until the pulse period of the first signal flow Ihck1 ends. In addition, the current adjustment circuit 120a executes the process s510 to transmit an over-current event notification to the logic circuit 130.

The current adjustment circuit 120b executes the process s512 to receive the second clock signal Vhck2, and executes the process s514 to determine whether the absolute value of the second signal current Ihck2 of the second clock signal Vhck2 continues to exceed the preset within a preset time length Threshold.

If the second signal current Ihck2 is not within the preset time length When the preset threshold is continuously exceeded, the current adjustment circuit 120b repeatedly executes the process s512. On the other hand, if the second signal current Ihck2 continues to exceed the preset threshold within a preset time length, the current adjustment circuit 120b then executes process s516 to limit the second signal current Ihck2 until the pulse period of the second signal current Ihck2 ends. In addition, the current adjustment circuit 120b executes the flow s518 to transmit an over-current event notification to the logic circuit 130.

Referring to FIG. 5b, the logic circuit 130 executes a process s520 to receive an over-current event notification from the current adjustment circuit 120a or 120b. Next, the logic circuit 130 executes the process s522 to determine whether the number of notifications from the current adjustment circuit 120a exceeds a preset number (for example, 32 times) corresponding to the current adjustment circuit 120a, and whether the number of notifications from the current adjustment circuit 120b exceeds The preset number of times (for example, 32 times) corresponding to the current adjustment circuit 120b.

In one frame, if the number of notifications from the current adjustment circuit 120a exceeds the preset number corresponding to the current adjustment circuit 120a, or the number of notifications from the current adjustment circuit 120b exceeds the preset number corresponding to the current adjustment circuit 120b, the logic circuit 130 Then, the process s524 is performed to adjust the statistical value. In this way, the logic circuit 130 can accumulate the total number of frames in which an overcurrent event occurs.

On the other hand, if the number of notifications from the current adjustment circuit 120a does not exceed the preset number corresponding to the current adjustment circuit 120a, and the number of notifications from the current adjustment circuit 120b does not exceed the preset number corresponding to the current adjustment circuit 120b, the logic circuit 130 repeats Execute process s520.

Next, the logic circuit 130 executes a flow s526 to determine statistics. Whether the value exceeds the preset number of frames. If yes, the logic circuit 130 controls the driving module 110 to execute the process s528, so that the driving module 110 stops outputting all the signals transmitted to the gate driving module 103. If not, the logic circuit 130 executes the process s522 repeatedly.

Please note that the flowcharts of FIG. 5a and FIG. 5b are only illustrative examples, and are not intended to limit the embodiments of the present invention.

For example, processes s504 to s510 can be executed simultaneously with processes s512 to s518.

For another example, in some embodiments, before executing the process s520, the logic circuit 130 first determines whether the current adjustment circuits 120a and 120b have no restrictions on the first signal current Ihck1 and the second signal current Ihck2 in one frame. That is, it is determined whether the gate driving module 103 has no overcurrent event in one frame. If so, the logic circuit 130 resets the statistical value to zero.

It can be known from the above that the over-current protection system 100 and the over-current protection method 500 can prevent the display panel 101 from being damaged due to a large current (for example, a short-circuit current) for a long period of time or causing an accident (for example, a fire of a wire).

Certain terms are used in the description and the scope of patent applications to refer to specific elements. However, it should be understood by those with ordinary knowledge in the technical field that the same elements may be referred to by different names. The scope of the specification and patent application does not take the difference in names as a way to distinguish components, but rather uses the difference in functions of components as a basis for distinguishing. "Inclusion" mentioned in the description and the scope of patent application is an open-ended term. It should be interpreted as "including but not limited to." In addition, "coupled" includes any direct or indirect means of connection. Therefore, if the first element is described as being coupled to the second element, it means that the first element can be directly connected to the second element through electrical connection or signal connection methods such as wireless transmission or optical transmission, or through other elements or connections. Means are indirectly electrically or signally connected to the second element.

The above are only preferred embodiments of the present invention, and any equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention.

Claims (16)

An overcurrent protection system is suitable for a display panel. The display panel includes a gate driving array and a display area. The overcurrent protection system includes: a driving module for providing a first driving signal to the gate. A driving array; a first current adjusting circuit coupled between the driving module and the gate driving array, wherein the first current adjusting circuit is located on a current path of a first signal current of the first driving signal; Wherein, during a pulse period of the first signal current, if the absolute value of the magnitude of the first signal current continues to be greater than a preset threshold value and exceeds a preset time length, the first current adjustment circuit limits the first signal The absolute value of the magnitude of the current is not greater than the preset threshold until the end of the pulse period of the first signal current. The overcurrent protection system according to claim 1, further comprising: a logic circuit for determining, in each frame of the display area, whether the number of times the first current adjustment circuit limits the first signal current exceeds a preset Number of times; in each frame, if the number of times that the first current adjustment circuit limits the first signal current is greater than the preset number, the logic circuit adjusts a statistical value to count the total number of overcurrent conditions. The number of frames. For example, the overcurrent protection system of claim 2, wherein when the statistical value is greater than a preset frame number, the logic circuit controls the driving module to stop. Stop outputting the first driving signal. The overcurrent protection system of claim 3, wherein, in each frame, if the first current adjustment circuit does not limit the magnitude of the first signal current, the logic circuit resets the statistical value to zero. For example, the overcurrent protection system of claim 2, wherein the driving module provides a second driving signal to the gate driving array, and the overcurrent protection system further includes: a second current adjustment circuit coupled to the driving mode. Between the group and the gate driving array, wherein the second current adjusting circuit is located on a current path of a second signal current of the second driving signal; and during the pulse period of the second signal current, if the second The absolute value of the magnitude of the signal current is continuously greater than the preset threshold value and exceeds the preset time length, and the second current adjustment circuit limits the absolute value of the magnitude of the second signal current to be not greater than the preset threshold value until the second This pulse period of the signal current ends. The overcurrent protection system of claim 5, wherein, in each frame, if the number of times the first current adjustment circuit limits the first signal current is greater than the preset number, or the second current adjustment circuit limits The number of times of the second signal current is greater than the preset number of times, and the logic circuit adjusts the statistical value. The overcurrent protection system of claim 2, wherein the The preset number of times corresponds to the total number of cycles of the first driving signal in each frame. The overcurrent protection system of claim 7, wherein if the first driving signal is a clock signal for sequentially operating a plurality of shift registers in the gate driving array, the preset number of times is equal to 32 If the first driving signal is a start pulse signal for triggering the gate driving array at the beginning of each frame, the preset number of times is equal to 1. If the first driving signal is a fixed voltage, the preset The number of times is equal to 1. An overcurrent protection method is applicable to a display panel. The display panel includes a gate driving array and a display area. The overcurrent protection method includes: providing a driving module, wherein the driving module is used to provide a first Driving signal to the gate driving array; providing a first current adjusting circuit, wherein the first current adjusting circuit is coupled between the driving module and the gate driving array, and is located at a first position of the first driving signal; A current path of a signal current; during the pulse period of the first signal current, if the absolute value of the first signal current continues to be greater than a preset threshold value for more than a preset time length, the first current adjustment circuit is used The absolute value that limits the magnitude of the first signal current is not greater than the preset threshold until the end of the pulse period of the first signal current. The overcurrent protection method of item 9 further includes: A logic circuit is used in each frame of the display area to determine whether the number of times the first current adjustment circuit limits the first signal current exceeds a preset number of times; in each frame, if the first current The adjustment circuit limits the number of times the first signal current is greater than the preset number, and uses the logic circuit to adjust a statistical value to count the total number of frames where an overcurrent condition occurs. The overcurrent protection method according to claim 10 further includes: when the statistical value is greater than a preset frame number, using the logic circuit to control the driving module to stop outputting the first driving signal. The overcurrent protection method according to claim 11, wherein the process of adjusting the statistical value by using the logic circuit includes: in each frame, if the first current adjustment circuit does not limit the first signal current, use the logic The circuit resets this statistic to zero. For example, the overcurrent protection method of claim 10, wherein the driving module provides a second driving signal to the gate driving array, and the overcurrent protection method further includes: providing a second current adjustment circuit, wherein the second current An adjusting circuit is coupled between the driving module and the gate driving array, and the second current adjusting circuit is located on a current path of a second signal current of the second driving signal; a pulse of the second signal current During this period, if the absolute value of the magnitude of the second signal current is continuously greater than the preset threshold value and exceeds the preset time length Degree, using the second current adjustment circuit to limit the absolute value of the magnitude of the second signal current not to be greater than the preset threshold until the end of the pulse period of the second signal current. The overcurrent protection method according to claim 13, wherein the process of using the logic circuit to adjust the statistical value further includes: in each frame, if the first current adjustment circuit restricts the first signal current more than the number of times The preset number of times, or the number of times the second current adjustment circuit limits the second signal current is greater than the preset number of times, and the logic circuit adjusts the statistical value. The overcurrent protection method of claim 10, wherein the preset number of times corresponds to a total number of cycles of the first driving signal in each frame of the picture. The overcurrent protection method of claim 15, wherein if the first driving signal is a clock signal for sequentially operating a plurality of shift registers in the gate driving array, the preset number of times is equal to 32 If the first driving signal is a start pulse signal for triggering the gate driving array at the beginning of each frame, the preset number of times is equal to 1. If the first driving signal is a fixed voltage, the preset The number of times is equal to 1.