TW201935671A - Image sensors with light pipe-alike - Google Patents

Abstract

An image sensor with light pipe-alike includes a semiconductor substrate, a plurality of photoelectric conversion areas formed in the semiconductor substrate, a stacked dielectric layer, and a plurality of light shield wall structures formed in the stacked dielectric layer containing at least one dielectric layer covering the plurality of photoelectric conversion areas. Each dielectric layer has light shield wall structure corresponding to the numbers of the photoelectric conversion areas. Each photoelectric conversion area is enclosed by a light shield wall structure.

Description

Image sensor with light pipe-like structure

The invention relates to an image sensor, in particular to an image sensor with a light pipe structure, and a method for forming the same.

Image sensors are widely used in consumer electronics, such as smart phones, digital cameras, and notebook computers. A common image sensor is fabricated on a semiconductor substrate using complementary metal-oxide-semiconductor (CMOS) technology or charge-coupled device (CCD) technology. The image sensor may include an image-sensing pixel array, and each pixel includes a photodiode and other operating circuits, such as a transistor, formed on a substrate.

Compared with other technologies, CMOS image sensing elements are widely used in image sensing because of their advantages such as low operating voltage, low power consumption, high operating efficiency, random access, and compatibility with current mainstream semiconductor processes. Component manufacturing.

The principle of CMOS image sensing is to distinguish the incident light into several combinations of light with different wavelengths, such as the three primary colors of red, blue, and green, and then detect and convert them into different strengths by a photodiode on a semiconductor substrate Telegraph. For a circuit for an image sensor, referring to FIG. 1 (a), the photoelectric conversion region PD, the selection transistor SX, the reset transistor RX, and the access transistor AX may correspond to each pixel of the image sensor. The photoelectric conversion region PD may include a plurality of photoelectric conversion units vertically overlapping each other. Each photoelectric conversion unit includes a photodiode having an N-type impurity region and a P-type impurity region. Each transfer transistor TX includes a transfer gate that can extend inside the substrate. The drain of each transfer transistor TX may be a floating diffusion FD. The floating diffusion region FD may be a source of the reset transistor RX. float The diffusion region FD may be connected to a selection gate of the selection transistor SX. The selection transistor SX and the reset transistor may be connected in series. The selection transistor SX and the access transistor AX can be shared by adjacent pixels, and in this way, the integration of the image sensor can be improved. In the operation method, first, the charge remaining in the floating diffusion region is discharged by applying the power supply voltage VDD to the drain of the reset transistor RX and the drain of the selection transistor SX when the external light is cut off. Subsequently, when the reset transistor RX is turned off and external light illuminates the photoelectric conversion region PD, an electron-hole pair system is generated in the photoelectric conversion region PD. The generated hole moves to the P-type impurity region to be accumulated therein, and the generated electron moves to the N-type impurity region to be accumulated therein. When the transfer transistor TX is turned on, the charges of the accumulated electrons and holes are transferred to the floating diffusion region FD and accumulated therein. Since the gate bias of the selection transistor SX changes in proportion to the amount of accumulated charge, the potential of the source of the selection transistor SX changes accordingly. Here, when the access transistor AX is turned on, a signal represented by a charge is read.

Due to the current application of mainstream electronic products, more and more emphasis is placed on lightness, thinness, and shortness. Therefore, along with this demand trend, sensing elements also need to be miniaturized. However, with the miniaturization of photodiodes, cross-interference between pixels (cross Talk) also increased and accompanied by a decrease in photosensitivity. For this problem, the solution can be to use the light pipe to reduce the spanning interference mentioned above.

The structure of a conventional image sensing element with a light pipe is shown in FIG. 1 (b). A dielectric layer stack 10a is formed on the substrate 10 and covers the photodiode 12 on the substrate. The dielectric stack layer includes a dielectric layer The metal interconnects 14 and the conductive plug structure 16 in the electrical material, and the light pipe 18 are generally formed in the dielectric layer stack 10a to guide the propagation path of the incident light. A color filter array 22 is usually formed over the dielectric layer stack 10a to provide each pixel to sense a specific wavelength of light. A plurality of microlenses 24 are formed on the color filter array 22 described above. After the light enters the microlenses 24, the light enters the dielectric layer stack 10 a through the color filters 22. Traditionally, the light pipe is manufactured by forming a funnel-shaped cross-sectional structure on the photodiode region using anisotropy etch after the dielectric stack (including the metal wiring structure) is completed, and then deposited by deposition. A layer of anti-reflection layer 26, and then fill the etched opening with a high-refractive dielectric material 28 to form a light pipe, followed by chemical-mechanical planarization (CMP), and then form a subsequent color filter, micro- Lens structure.

However, as the light pipe structure shown in FIG. 1 (b) needs to form a very deep cross-sectional structure, the above-mentioned light pipe structure is fabricated on the dielectric layer stack by etching in the process, but it is actually not easy to control the above light pipe The required aspect ratio of the structure, and even with a light pipe structure as shown in Figure 1 (b), cross talk between pixels will still occur as the image sensing element is miniaturized, as shown in Figure 1 (b The light path shown by the dotted line in) shows that even if an image sensing element with a traditional light pipe is produced, cross-talk may still occur, so it will also be accompanied by a decrease in photosensitivity.

As for other prior arts, such as US Patent No. US 9305952B2, its disadvantages are high-aspect-ratio etch and difficult-to-control deep trench etch, which affect the metal interconnects. Another example is US Patent No. US 7193289 B2. In addition to the disadvantages mentioned above, it also has to face the production of side wall liner stacking layers, which are complex in shape but not mass-produced. Therefore, there is an urgent need for an optimized structure and process.

Based on the lack of the prior art, the object of the present invention is to provide an image sensor with a similar light pipe structure. The light pipe structure can guide incident light and increase the amount of incident light entering the photodiode.

Yet another object of the present invention is to propose a light pipe structure with continuity or discontinuity to suppress noise and improve performance.

The advantages of the present invention include optimizing the performance of the image sensor, simplifying the manufacturing process, and increasing mass production benefits.

In view of the above-mentioned object of the invention, the present invention provides an image sensor with a light pipe-like structure, which includes a semiconductor substrate, a plurality of photoelectric conversion regions, disposed in the semiconductor substrate, a dielectric stack, and a plurality of optical isolation walls. In the structured dielectric stack, each dielectric layer includes a light barrier structure corresponding to the number of photoelectric conversion regions, and each photoelectric conversion region is surrounded by one of the light barrier structures. The dielectric stack includes more than one dielectric layer, which is disposed on the surface of the substrate and covers a plurality of photoelectric conversion regions.

In one embodiment, the above-mentioned optical separation wall structure has a ring structure, wherein the ring structure forms a continuous ring or a discontinuous ring. One of the optical isolation wall structures included in each dielectric layer is aligned with one of the optical isolation wall structures of the other dielectric layers, and is located on and aligned with one of the plurality of photoelectric conversion regions, respectively. The interconnect structure of the image sensor is disposed on the semiconductor substrate and in the dielectric stack. The optical isolation wall structure of each dielectric layer can highly shield all or part of the interconnect structure. The image sensor is provided with a plurality of color filter layers which are respectively positioned above and aligned with the plurality of photoelectric conversion regions. A plurality of microlenses are located on and aligned with one of the plurality of color filter layers, respectively. The interconnect structure includes, but is not limited to, straight interconnects, lateral interconnects or / and contact perforations, conductive plugs.

PD‧‧‧photoelectric conversion area

SX‧‧‧Select transistor

RX‧‧‧Reset transistor

AX‧‧‧Access transistor

PD‧‧‧photoelectric conversion area

TX‧‧‧Transistor

FD‧‧‧Floating Diffusion Zone

VDD‧‧‧ supply voltage

10‧‧‧ substrate

10a‧‧‧ Dielectric layer stack

12‧‧‧ Photodiode

14‧‧‧Metal Interconnect

16‧‧‧Conductive plug structure

18‧‧‧light pipe

22‧‧‧ color filter array

24‧‧‧ Microlenses

26‧‧‧Anti-reflective layer

28‧‧‧High refractive dielectric material

30‧‧‧ light pipe

100‧‧‧ substrate

102‧‧‧photosensitive element

104‧‧‧Isolated structure

106‧‧‧Transistor gate (Tx)

108‧‧‧First interlayer dielectric layer

208‧‧‧Second interlayer dielectric layer

308‧‧‧Third interlayer dielectric layer

408‧‧‧ Fourth interlayer dielectric layer

110‧‧‧The first conductive perforation

112‧‧‧first light shield wall opening

110a‧‧‧First conductive plug

112a‧‧‧First light shield wall structure

114‧‧‧First Metal Interconnect

20‧‧‧ In-component connection

210‧‧‧Second conductive perforation

210a‧‧‧Second conductive plug

212a‧‧‧Second Light Wall Structure

214‧‧‧Second Metal Interconnect

310a‧‧‧The third conductive plug

312a‧‧‧Third Light Wall Structure

314‧‧‧Third Metal Interconnect

412a‧‧‧Fourth light barrier structure

501‧‧‧color filter

508‧‧‧Transparent insulating layer

603‧‧‧ condenser micro lens

1081‧‧‧ first dielectric coating

1083‧‧‧Second dielectric coating

1085‧‧‧Third dielectric coating

Gate electrode of 606‧‧‧transistor

612a‧‧‧complete circular area

6120a‧‧‧ segment

The detailed description of the present invention and the schematic diagrams of the embodiments described below should make the present invention more fully understood; however, it should be understood that this is only used as a reference for understanding the application of the present invention, rather than limiting the present invention to a specific implementation. Example.

FIG. 1 (a) shows a driving circuit diagram of an exemplary image sensor; FIG. 1 (b) shows a schematic structural diagram of a conventional image sensing element with a light pipe; and FIGS. 2 (a)-(g) show the present invention in a Schematic diagram of the process steps of forming an image sensor with a light-pipe-like structure in the embodiment; FIG. 3 shows a schematic diagram of the structure of a light sensor with a light-pipe-like structure formed in an embodiment of the present invention; FIG. 4 (a)- (g) Schematic diagram showing the process steps of forming an image sensor with a light pipe-like structure in another embodiment of the present invention; FIG. 5 shows a light sensor with a light pipe-like structure formed according to another embodiment of the present invention Device structure diagram; FIG. 6 is a schematic top view of a light barrier structure formed according to a preferred embodiment of the present invention.

The present invention will be described in detail herein with regard to specific embodiments of the invention and their perspectives. Such descriptions are intended to explain the structure or flow of steps of the present invention, and are intended to be illustrative and not to limit the scope of patent application of the present invention. Therefore, in addition to the specific embodiments and preferred embodiments in the description, the present invention can be widely implemented in other different embodiments. The following describes the implementation of the present invention through specific specific examples. Those skilled in the art can easily understand the efficacy and advantages of the present invention through the content disclosed in this specification. In addition, the present invention can also be applied and implemented by other specific embodiments. The details described in this specification can also be applied based on different needs, and various modifications or changes can be made without departing from the spirit of the present invention.

Based on the conventional image sensing element with a light pipe mentioned above, because of its difficulties and intractable defects in the manufacturing process, the present invention proposes a new structure of a light pipe image sensor.

Referring to FIGS. 2 (a)-(g), a schematic diagram of a structure and a manufacturing process of an image sensor with a light pipe-like structure in an embodiment of the present invention is shown.

According to this embodiment, as shown in FIG. 2 (a), a substrate 100 is first provided, wherein the substrate 100 may be a semiconductor substrate, such as a silicon substrate, an epitaxial silicon substrate, a silicon germanium substrate, a silicon carbide substrate, or an insulating layer over silicon. (silicon-on-insulator; SOI), but not limited to this. Then, a plurality of photosensitive elements 102 are formed near the surface of the substrate 100, for example, a photodiode including an N-type impurity region and a P-type impurity region, which functions as photoelectric conversion, and the substrate 100 can selectively define and form a plurality of It is needless to say that a complementary metal oxide field effect (CMOS) transistor (not shown), the N-type impurity region and the P-type impurity region can be formed by ion implantation. A plurality of isolation structures 104 surround the photosensitive element 102 and the transistor to avoid short-circuiting the elements in the substrate 100. The isolation structure 104 may be fabricated by using a shallow trench isolation structure or a regional oxidation isolation structure or other similar methods, but this is not the focus of the present invention and will not be described in detail.

Then, the interconnection process required for the device operation is performed, that is, the patterned gate layer 106 is sequentially formed by using a lithographic etching method, such as a transistor gate (Tx) 106 of a transistor, for controlling the photosensitive element. Charge transfer within 102. A first interlayer dielectric layer 108 is then deposited on the substrate 100 and covers the CMOS transistor, each photodiode 102, and the transfer gate 106 of the transfer transistor. The first interlayer dielectric layer described above 108 can be implemented by using various known deposition methods. In one embodiment, chemical vapor deposition can be used. The first interlayer dielectric layer 108 can be made of oxide, nitride, or oxynitride, and can be made of oxide. Silicon boron, phosphosilicate glass, fluorinated silicate glass, carbon-doped silicon oxide, or similar materials are not limited thereto, and the above is for the purpose of example only and is not intended to limit the present invention.

Subsequently, a required interconnection process is performed, and a patterned first conductive via 110 is sequentially formed by a lithographic etching method, and then the photoresist is removed. Photoresist is used to protect specific areas of the surface of the substrate 100 from being etched, and then removed from the surface of the first interlayer dielectric layer 108. The removal process ensures that the predetermined pattern remains intact without harming other areas of the substrate 100, and the feature shape Photoresist and residue removal in the vicinity. This can usually be achieved by wet or dry removal, but this is not the focus of the present invention and will not be described in detail.

Referring to FIG. 2 (b), another photolithographic etching process (using another photomask) is used to form a pattern around each photodiode. This is a first light shield wall opening 112, and then Remove the photoresist. Next, metal is deposited and planarized by chemical mechanical polishing planarization (CMP), and at the same time, a first conductive plug 110a and a light shield wall structure 112a and a first conductive plug 110a are formed as shown in FIG. 2 (c). Generally, it is composed of a metal or an alloy, and examples of the metal include tungsten, aluminum, titanium, tantalum, copper, or any combination thereof. Subsequently, planarization is performed by chemical mechanical polishing planarization (CMP). The top view of the first light barrier structure 112a formed will be discussed in detail in FIG. 6 and the description thereof.

Next, another lithographic etching process is used to form the first metal interconnect 114, and the cross-sectional structure is shown in FIG. 2 (d). Next, as shown in FIG. 2 (e), a second interlayer dielectric layer 208 is deposited on the above-mentioned optical isolation wall structure 112a and the first metal interconnection 114 to serve as an insulating layer for the subsequent metal-containing interconnection and optical isolation wall. The above-mentioned second interlayer dielectric layer 208 can be implemented by using various known deposition methods. In one embodiment, a chemical vapor deposition method can be used. The electrical layer 208 can be made of oxide, nitride, oxynitride, or the like. The above is merely an example, and is not intended to limit the present invention.

Then use a photomask to define the second conductive perforation 210 and the second light insulation wall perforation 212 at the same time, because the second light insulation wall perforation 212 must extend from top to bottom to at least half the height of the first metal interconnect 114 In order to achieve a better light isolation effect, it can also ensure that the second conductive via 210 after etching can contact the first metal interconnect 114. A metal is then deposited, such as tungsten, aluminum, titanium, tantalum, copper or any combination thereof. Subsequent planarization is performed by chemical mechanical polishing planarization (CMP) to form a structure as shown in FIG. 2 (f), which includes a second conductive plug 210a and a second light shield wall structure 212a. The third and fourth interlayer dielectric layers (308, 408), the third metal interconnects 314, the third conductive plugs 310a, and the third and fourth optical barrier structures (312a, 412a), which are additionally stacked, can be repeated by repeating the above. Formed by process steps. Those skilled in the art will know that the number of layers formed depends on requirements, and is not intended to limit the present invention.

Referring to FIG. 2 (g), the uppermost optical barrier structure 412a can be formed in the fourth interlayer dielectric layer 408 by using metal filling and chemical mechanical polishing, as shown in the steps described in FIG. 2 (b). The materials of the dielectric layer and the interlayer dielectric layer may include, for example, oxides, nitrides, and oxynitrides, as well as silicon boron oxide, phosphosilicate glass, fluorinated silicate glass, carbon-doped silicon oxide, or the like Materials, but not limited to this, the above is only for the purpose of illustration, not to limit the present invention.

Referring again to FIG. 2 (g), it shows a stacked structure including the interconnects 20 of the component and the light-like tube 30. The interconnects 20 of the component are interconnected by metal layers (114, 214, 314) of different stacked layers. ) And each layer of conductive plugs (110a, 210a, 310a), the light-like tube 30 is composed of light barrier structures (112a, 212a, 312a, 412a) of different stacked layers.

Next, a light-transmitting insulating layer 508 is deposited to cover the uppermost layer of the light-insulating wall structure 412a, the fourth dielectric stack 408, and the interconnect structure 20, and then different color filter layers are formed on the light-transmitting insulating layer 508 501. The color filter layer may include a colored photoresist pattern, and may be manufactured by a lithography process. The color filter layer 501 may include red, green, or blue filter materials, so that the photosensitive element can sense light of a specific color. Condensing microlenses are then formed on each color filter layer 603, covering the light-like tube 30 and the photosensitive element 102 located below it. A complete light sensor structure with a light-like tube is shown in Figure 3.

Referring to FIGS. 4 (a)-(g), there is shown a schematic diagram of a process for forming an image sensor with a light pipe-like structure in another embodiment of the present invention.

According to this embodiment, as shown in FIG. 4 (a), a substrate 100 is first provided, wherein the substrate 100 may be a semiconductor substrate, such as a silicon substrate, an epitaxial silicon substrate, a silicon germanium substrate, a silicon carbide substrate, or an insulating layer over silicon. (silicon-on-insulator; SOI), but not limited to this. Then, a plurality of photosensitive elements 102 are formed near the surface of the substrate. For example, on a photodiode including an N-type impurity region and a P-type impurity region, the N-type impurity region and the P-type impurity region can be formed by an ion implantation method. It functions as a photoelectric conversion and can selectively define and form a plurality of complementary metal-oxide-semiconductor (CMOS) transistors (not shown) and a plurality of isolation structures 104 surrounding the photosensitive element 102 and the transistor on the substrate 100 for Avoid shorting components in the substrate. The isolation structure 104 may be fabricated by using a shallow trench structure or a regional oxidation isolation structure or other similar methods, but this is not the focus of the present invention and will not be described in detail.

Next, the required interconnection process is performed, that is, the patterned gate layer 106 is sequentially formed by lithographic etching, such as a transistor gate (Tx) of a transistor, to control the charge of the photosensitive element 102 Transfer. A first interlayer dielectric layer 108 is then deposited on the substrate 100 and covers the CMOS transistor, each photodiode 102, and the transistor gate (Tx) 106 of the transfer transistor. The interlayer dielectric layer 108 can be implemented by various known deposition methods. In one embodiment, a chemical vapor deposition method can be used. The dielectric layer 108 can be made of oxide, nitride, or oxynitride. The use of silicon boron oxide, phosphosilicate glass, fluorinated silicate glass, carbon-doped silicon oxide or similar materials is not limited thereto, and the above is only for the purpose of example and is not intended to limit the present invention.

Then, another lithographic etching process (using another photomask) is used to form a light shield wall pattern around each photodiode 102, and then the photoresist is removed, a metal layer is deposited, and then chemical mechanical polishing is performed to flatten it. The planarization (CMP) is performed to planarize the light barrier structure 112a as shown in FIG. 4 (b). A top view of the formed light barrier structure 110a will be described with reference to FIG. 6. Then as shown in Figure 4 (c), A first dielectric cover layer 1081 is deposited to cover the optical isolation wall 112a and the first interlayer dielectric layer 108. The first dielectric cover layer 1081 may be implemented by various known deposition methods. In one embodiment, A chemical vapor deposition method can be used. The first dielectric cover layer 1081 can be made of oxide, nitride, or oxynitride. Then, as shown in FIG. 4 (d), the first conductive layer is patterned by a lithography etching process. The plug 110a, the first conductive plug 110a is generally composed of a metal or an alloy, and a metal such as tungsten, aluminum, titanium, tantalum, or copper or any combination thereof. Subsequently, it is planarized by chemical mechanical polishing to form an interlayer dielectric layer metal contact.

Next, as shown in FIG. 4 (e), a first metal interconnect 114 is formed by lithographic etching and pattern transfer, and then a second interlayer dielectric layer 208 is deposited to cover the first metal interconnect. On 114 and the first dielectric cover layer 1081, the above-mentioned second interlayer dielectric layer 208 can be formed by a chemical vapor deposition method, and then a lithographic etching process is used to form a second optical isolation wall structure on the formed optical isolation wall structure 112a. Pattern, and then remove the photoresist, deposit a metal layer, such as tungsten, aluminum, titanium, a group, or any combination of copper or more, and then planarize with chemical mechanical polishing planarization (CMP) to form a second optical barrier Structure 212a, and then depositing a second dielectric covering layer 1083 to cover the second light barrier structure 212a, the second interlayer dielectric layer 208 may be chemical vapor deposition method, and then patterned by a photolithography etching process. Two conductive perforations 210, removing photoresist, depositing metal, such as tungsten, aluminum, titanium, tantalum, or any combination of copper or more, and planarizing by chemical mechanical polishing, forming a second conductive plug 210a and connecting with the first Contacting metal interconnect 114, the structure in FIG. 4 (e) in FIG.

On the structure shown in FIG. 4 (e), repeat the steps shown in FIG. 4 (d) to form a second metal interconnect 214 by lithographic etching and pattern transfer, and then deposit a third interlayer dielectric layer (interlayer dielectric layer) 308 on the second metal interconnect 214 and the second dielectric cover layer 1083, and then use a lithographic etching process to form a third light barrier structure pattern on the formed second light barrier structure 212a, and then The photoresist is removed, a metal layer is deposited, and then chemical mechanical polishing planarization (CMP) is performed to planarize the third optical barrier structure 312a, and then a third dielectric cover layer 1085 is deposited to cover the third optical barrier structure. On 312a, the third interlayer dielectric layer 308 can be chemical vapor deposition, and then the third conductive via 310 is patterned by a photolithographic etching process to remove photoresist and deposit metals such as tungsten, aluminum, titanium, and tantalum. Or copper or any combination thereof, and then planarized by chemical mechanical polishing to form a third conductive plug 310a and contacting the second metal interconnection 214, a further layer including a light insulation wall (312a) and metal interconnections can be obtained. Line (214 ) And the dielectric stack of the conductive plug (310a) structure, the structure of which is shown in Figure 4 (f) Displayed.

Similarly, based on the structure shown in Fig. 4 (f), repeating the steps described in Fig. 4 (a)-(c) can obtain the fourth layer of interlayer dielectric shown in Fig. 4 (g) The structure of the layer 408, the third metal interconnect line 314, and the fourth optical isolation wall 412a. Referring again to FIG. 4 (g), it shows a dielectric stack structure including element interconnects 20 and light-like tubes 30, where the element interconnects 20 are metal interconnects of different stacked layers (114, 214, 314) and conductive plugs (110a, 210a, 310a), the light-like tube 30 is composed of light barrier structures (112a, 212a, 312a, 412a) of different stacked layers. The materials of the dielectric layer, the interlayer dielectric layer, and the dielectric cover layer may include, for example, silicon boron oxide, phosphosilicate glass, fluorinated silicate glass, carbon-doped silicon oxide, or the like, but not the same. Limited.

Next, as shown in FIG. 5, a light-transmitting insulating layer 508 is deposited to cover the above-mentioned dielectric laminated structure including the device interconnects 20 and the light-like tube 30, and then different color filters are formed on the light-transmitting insulating layer 508. The light layer 501 and the color filter layer 501 may include a colored photoresist pattern, and may be manufactured by a lithography process. The color filter layer may include a red, green, or blue filter material, so that the photosensitive element 102 can sense light of a specific color. Condensing microlenses 603 are then formed on each color filter layer to cover the light-like tube 30 and the photosensitive element 102 located below it.

The advantage of this structure is that each dielectric stack unit has a high-light barrier wall structure formed by an additional dielectric cover layer and an additional process. This structure will form a light pipe with a more complete coating structure. To minimize the chance of cross talk between image sensor pixels.

FIG. 6 shows a top view of a light barrier structure formed according to a preferred embodiment of the present invention. Please refer to FIG. 2-5 together. In the above diagrams and the description, the cross-sectional diagrams of how to form interconnects, conductive plugs, and light barrier structures in each stacked dielectric layer have been described. FIG. 6 shows a top view of a light barrier structure formed in each of the stacked dielectric layers, which forms a complete annular region 612a or a discontinuous ring formed by a plurality of divided segments 6120a in each of the stacked dielectric stacked layers. The region 612a surrounds the photoelectric conversion region PD, for example, on a photosensitive element region. The gate electrode 606 of the conversion transistor is located above the photoelectric conversion region PD and partially overlaps it for transferring charge. The region 612a or the discontinuous annular region 612a formed by the plurality of divided segments 6120a is formed above the photoelectric conversion region PD and the gate electrode 606 of the conversion transistor. As shown in FIGS. 2-5, the light-like tube 30 is stacked by a complete ring or discontinuous ring light barrier structure in several stacked dielectric layers. Based on the above-mentioned structural features, the light barrier structure can form a light pipe-like effect, which can effectively guide incident light into the photodiode body, and the light barrier structure can shield the interconnections and suppress the generation of interference.

The above description is a preferred embodiment of the present invention. Those skilled in the art should understand that it is used to explain the present invention and not to limit the scope of the patent rights claimed by the present invention. The scope of its patent protection shall depend on the scope of the attached patent application and its equivalent fields. Anyone skilled in this field can make changes or modifications without departing from the spirit or scope of this patent, which belong to the equivalent changes or designs made in the spirit disclosed by the present invention, and should be included in the scope of patent application described below. Inside.

Claims (10)

An image sensor with a light pipe structure includes: a semiconductor substrate; a plurality of photoelectric conversion regions disposed in the semiconductor substrate; a dielectric stack including more than one dielectric layer disposed on the semiconductor substrate And cover the plurality of photoelectric conversion regions; and a plurality of optical separation wall structures, in which the dielectric stack is disposed, and each layer of the dielectric stack includes at least one optical separation wall structure, and the plurality of photoelectric conversion regions are the Surrounded by a plurality of optical partition structures. The image sensor with a light pipe structure as described in claim 1, wherein the above-mentioned light partition wall structure includes a ring structure in a plan section. The image sensor having a light pipe structure as described in claim 2, wherein the above-mentioned ring structure forms a continuous ring. The image sensor having a light pipe structure as described in claim 2, wherein the above-mentioned ring structure forms a discontinuous ring. The image sensor with a light pipe structure as described in claim 1, wherein the optical separation wall structure in the dielectric stack of each layer can block all or a part of the interconnections. The image sensor with a light pipe structure as described in claim 1, further comprising: a plurality of color filter layers, respectively located on and aligned with one of the plurality of photoelectric conversion regions; and A plurality of microlenses are respectively positioned on and aligned with one of the plurality of color filter layers. An image sensor having a light pipe structure includes: a semiconductor substrate; a plurality of photoelectric conversion regions disposed in the semiconductor substrate; a first interlayer dielectric layer disposed on the semiconductor substrate and covering the plurality of Photoelectric conversion regions, wherein the first interlayer dielectric layer includes a first optical isolation wall structure; and a second interlayer dielectric layer disposed on the first interlayer dielectric layer, wherein the second interlayer dielectric layer Contains a second optical separation wall structure. The image sensor having a light pipe structure as described in claim 7, wherein the above-mentioned light partition wall structure includes a ring structure in a plan section. The image sensor having a light pipe structure as described in claim 7, wherein the above-mentioned ring structure forms a continuous ring. The image sensor having a light pipe structure as described in claim 7, wherein the above-mentioned ring structure forms a discontinuous ring.