TW201907573A - Mono-facial solar cell and method for manufacturing the same - Google Patents
Mono-facial solar cell and method for manufacturing the same Download PDFInfo
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
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Abstract
Description
本發明是有關於一種單面受光式太陽能電池,且特別是有關於一種單面受光式太陽能電池之製造方法。 The present invention relates to a single-sided light-receiving solar cell, and more particularly to a method of fabricating a single-sided light-receiving solar cell.
太陽能電池一種將光能轉換為電能的光電元件,其由於低污染、低成本加上可利用源源不絕之太陽能作為能量來源,而成為重要的替代能源之一。太陽能電池之基本構造是運用P型半導體與N型半導體接合而成,當陽光照射至具有此P-N接面的太陽能基板時,光能激發出矽原子中之電子而產生電子和電洞的對流,且這些電子及電洞受P-N接面處構成的內建電場影響而分別聚集在負極及正極兩端,使太陽能電池的兩端產生電壓。此時可使用電極連接太陽能電池的兩端於一外部電路,以形成迴路,進而產生電流,此過程即為太陽電池發電的原理。 Solar cell A photovoltaic element that converts light energy into electrical energy. It is one of the important alternative energy sources due to its low pollution, low cost and the use of endless solar energy as an energy source. The basic structure of a solar cell is formed by bonding a P-type semiconductor to an N-type semiconductor. When sunlight is applied to a solar substrate having the PN junction, light energy excites electrons in the germanium atom to generate convection of electrons and holes. Moreover, these electrons and holes are concentrated on the negative electrode and the positive electrode by the built-in electric field formed at the PN junction, so that voltage is generated at both ends of the solar cell. At this time, an electrode can be used to connect both ends of the solar cell to an external circuit to form a loop, thereby generating a current, which is the principle of solar cell power generation.
在太陽能電池的製程中,背面金屬化製程通常是以網版印刷電極,或以濺鍍/蒸鍍等物理氣相沉積(PVD)技術,形成背面金屬電極。傳統式網印金屬漿料的材料價格過高,而物理氣相沉積方式的真空設備成本也太高。因此,近期業者期望先以雷射在鈍化層上進行線狀式開槽,再以電鍍(Electro plating)技術形成金屬電極來取而代之。然而,電鍍技術無法直接於絕緣層表面上沉積金屬薄膜,還需要憑藉一層晶種層(seed layer)來外加偏壓提供電子,以形成金屬電極。 In the solar cell process, the backside metallization process is typically a screen printed electrode, or a physical vapor deposition (PVD) technique such as sputtering/evaporation to form a backside metal electrode. The material price of the conventional screen printing metal paste is too high, and the vacuum equipment of the physical vapor deposition method is also too expensive. Therefore, in the near future, it is desired to perform linear grooving on the passivation layer by laser, and then replace the metal electrode by electroplating. However, the electroplating technique cannot deposit a metal thin film directly on the surface of the insulating layer, and it is also necessary to provide a metal by applying a bias layer with a biasing layer to form a metal electrode.
因此,便有需要一種太陽能電池及其製造方法,其以無電鍍(Electroless plating)技術來形成金屬電極,以克服上述問題。 Accordingly, there is a need for a solar cell and method of fabricating the same that uses an electroless plating technique to form a metal electrode to overcome the above problems.
本發明之一目的是提供一種單面受光式太陽能電池,其之鈍化層包括複數個開口(包括該複數個第一線形開口及該複數個第二線形開口)具有網狀式實線形開槽、網狀式虛線形開槽、該些點形開口、或環形開口之設計。 An object of the present invention is to provide a single-sided light-receiving solar cell, wherein the passivation layer includes a plurality of openings (including the plurality of first linear openings and the plurality of second linear openings) having a mesh-shaped solid-line slot, The design of the mesh-shaped dotted groove, the dot-shaped openings, or the annular opening.
依據上述之目的,本發明提供一種單面受光式太陽能電池,包括:一光電轉換基板;一正面電極,位於該光電轉換基板之一受光面上;一背面電極,位於該光電轉換基板之一背面上,並大致覆蓋整個該背面;以及一鈍化層,位於該背面電極和該背面之間;其中:該鈍化層包括沿一第一方向延伸的複數個第一線形開口及沿一第二方向延伸的複數個第二線形開口,該些第一及第二線形開口是彼此交叉的,該複數個第一線形開口之間距小於1mm,該複數個第二線形開口之間距小於1mm;以及該背面電極包括以一無電鍍製程形成的一鎳層,該鎳層透過該複數個第一線形開口及該複數個第二線形開口而與該背面電性接觸。 According to the above objective, the present invention provides a single-sided light-receiving solar cell comprising: a photoelectric conversion substrate; a front electrode disposed on a light receiving surface of the photoelectric conversion substrate; and a back electrode disposed on a back surface of the photoelectric conversion substrate And substantially covering the entire back surface; and a passivation layer between the back electrode and the back surface; wherein: the passivation layer comprises a plurality of first linear openings extending in a first direction and extending along a second direction a plurality of second linear openings, the first and second linear openings intersecting each other, the plurality of first linear openings are less than 1 mm apart, the plurality of second linear openings are less than 1 mm apart; and the back electrode A nickel layer is formed by an electroless plating process, and the nickel layer is in electrical contact with the back surface through the plurality of first linear openings and the plurality of second linear openings.
本發明之鈍化層包括複數個開口(包括該複數個第一線形開口及該複數個第二線形開口)之網狀式實線形開槽、網狀式虛線形開槽、該些點形開口、或環形開口之設計皆可提升後續的無電鍍前處理製程之晶種粒子分佈,進而改善後續的無電鍍鎳層沉積於該鈍化層上之大面積的附著性。 The passivation layer of the present invention comprises a plurality of openings (including a plurality of first linear openings and the plurality of second linear openings), a mesh-shaped solid-line groove, a mesh-shaped dotted groove, and the dot-shaped openings. Or the annular opening is designed to enhance the distribution of seed particles in the subsequent electroless pre-treatment process, thereby improving the adhesion of the subsequent electroless nickel layer deposited on the passivation layer over a large area.
1‧‧‧太陽能電池 1‧‧‧Solar battery
10‧‧‧光電轉換基板 10‧‧‧Photoelectric conversion substrate
101‧‧‧受光面 101‧‧‧Stained surface
11‧‧‧基板 11‧‧‧Substrate
111‧‧‧正面 111‧‧‧ positive
112‧‧‧背面 112‧‧‧Back
12‧‧‧射極層 12‧‧ ‧ emitter layer
13‧‧‧背電場層 13‧‧‧ Back electric field layer
14‧‧‧抗反射層 14‧‧‧Anti-reflective layer
15‧‧‧鈍化層 15‧‧‧ Passivation layer
150‧‧‧開口 150‧‧‧ openings
151‧‧‧第一方向 151‧‧‧First direction
152‧‧‧第二方向 152‧‧‧second direction
153‧‧‧第一線形開口 153‧‧‧First linear opening
154‧‧‧第二線形開口 154‧‧‧Second linear opening
155‧‧‧虛線形 155‧‧‧dotted
156‧‧‧點形開口 156‧‧‧ Point opening
157‧‧‧線段形開口 157‧‧‧Line-shaped opening
158‧‧‧點形開口 158‧‧‧ Point opening
159‧‧‧環形開口 159‧‧‧Circular opening
16‧‧‧背面電極 16‧‧‧Back electrode
161‧‧‧晶種粒子 161‧‧‧ seed particles
162‧‧‧鎳層 162‧‧‧ Nickel layer
163‧‧‧導電層 163‧‧‧ Conductive layer
17‧‧‧正面電極 17‧‧‧Front electrode
171‧‧‧鎳層 171‧‧‧ Nickel layer
172‧‧‧銅層 172‧‧‧ copper layer
173‧‧‧錫層 173‧‧‧ tin layer
D‧‧‧間距 D‧‧‧ spacing
S100~S500‧‧‧步驟 S100~S500‧‧‧Steps
W‧‧‧線寬 W‧‧‧Line width
圖1為本發明之一實施例之單面受光式太陽能電池之製造方法的流程圖。 1 is a flow chart showing a method of manufacturing a single-sided light-receiving solar cell according to an embodiment of the present invention.
圖2為本發明之一實施例之單面受光式太陽能電池之製造方法的剖面示意圖,其顯示準備一光電轉換基板。 2 is a schematic cross-sectional view showing a method of fabricating a single-sided light-receiving solar cell according to an embodiment of the present invention, showing preparation of a photoelectric conversion substrate.
圖3為本發明之一實施例之單面受光式太陽能電池之製造方法的剖面示意圖,其顯示形成一鈍化層。 3 is a cross-sectional view showing a method of fabricating a single-sided light-receiving solar cell according to an embodiment of the present invention, showing a passivation layer.
圖4a~4e顯示本發明之多個實施例之鈍化層之平面示意圖。 4a-4e show schematic plan views of passivation layers of various embodiments of the present invention.
圖5為本發明之一實施例之單面受光式太陽能電池之製造方法的剖面示意圖,其顯示形成一鎳層。 Figure 5 is a cross-sectional view showing a method of fabricating a single-sided light-receiving solar cell according to an embodiment of the present invention, showing a nickel layer formed.
圖6為照片(A)~(F)顯示無電鍍液PH值及製程溫度對鎳層之晶粒尺寸及覆蓋度的影響。 Figure 6 is a photograph (A) ~ (F) showing the effect of the pH of the electroless plating solution and the process temperature on the grain size and coverage of the nickel layer.
圖7為照片(A)~(C)顯示:(A)傳統的線狀式雷射開槽圖形(Line pattern),(B)網狀式實線形雷射開槽圖形,以及(C)網狀式虛線形雷射開槽圖形之後續鎳層的附著力效果之比較。 Figure 7 shows photographs (A) to (C) showing: (A) a conventional linear laser line pattern, (B) a mesh type solid line slotted pattern, and (C) a net A comparison of the adhesion effects of the subsequent nickel layers of the dotted line-shaped laser slotted pattern.
圖8為本發明之一實施例之單面受光式太陽能電池之製造方法的剖面示意圖,其顯示形成一導電層。 Figure 8 is a cross-sectional view showing a method of fabricating a single-sided light-receiving solar cell according to an embodiment of the present invention, showing a conductive layer formed.
圖9為本發明之一實施例之單面受光式太陽能電池之製造方法的剖面示意圖,其顯示形成一正面電極。 Figure 9 is a cross-sectional view showing a method of fabricating a single-sided light-receiving solar cell according to an embodiment of the present invention, showing the formation of a front electrode.
為讓本發明之上述目的、特徵和特點能更明顯易懂,茲配合圖式將本發明相關實施例詳細說明如下。 The above described objects, features, and characteristics of the present invention will become more apparent from the aspects of the invention.
請參考圖1,其顯示本發明之一實施例之單面受光式太陽能電池之製造方法的流程圖。該單面受光式太陽能電池之製造方法包括下列步驟:在步驟S100中,準備一光電轉換基板10,如圖2所示。該光電轉換基板10是指可以光伏(photovoltaic)效應將光能轉換成電能的基板,例如具有PN接面(P/N junction)或PIN接面(PIN junction)的半導體矽基板。舉例,一塊矽晶體一側摻雜成P型半導體,另一側摻雜成N型半導體,中間二者相連的接觸面稱為PN接面。請再參考圖2,在本實施例中,該光電轉換基板10包括一基板11、一射極層12及一背電場層13。該基板11為第一導電型,並具有一正面111和一與該正面111相對的背面112。該射極層12為第二導電型,並位於該基板11內靠近該正面111處。該背電場層13為第一導電型,並位於該基板11內靠近該背面112處。另外,該光電轉換基板10可更包括一抗反射層14,其設置在 該正面111處。 Please refer to FIG. 1, which shows a flow chart of a method for manufacturing a single-sided light-receiving solar cell according to an embodiment of the present invention. The manufacturing method of the single-sided light-receiving solar cell includes the following steps: In step S100, a photoelectric conversion substrate 10 is prepared as shown in FIG. The photoelectric conversion substrate 10 refers to a substrate that can convert light energy into electrical energy by a photovoltaic effect, such as a semiconductor germanium substrate having a PN junction (P/N junction) or a PIN junction. For example, one side of a germanium crystal is doped into a P-type semiconductor, and the other side is doped into an N-type semiconductor, and the contact surface between the two is called a PN junction. Referring to FIG. 2 again, in the embodiment, the photoelectric conversion substrate 10 includes a substrate 11 , an emitter layer 12 and a back electric field layer 13 . The substrate 11 is of a first conductivity type and has a front surface 111 and a back surface 112 opposite to the front surface 111. The emitter layer 12 is of a second conductivity type and is located in the substrate 11 near the front surface 111. The back electric field layer 13 is of a first conductivity type and is located in the substrate 11 near the back surface 112. In addition, the photoelectric conversion substrate 10 may further include an anti-reflection layer 14 disposed at the front surface 111.
在步驟S200中,形成一鈍化層15位於該光電轉換基板10的背面112上,該鈍化層15具有複數個開口150,如圖3所示。實際作法例如先形成整面之鈍化層15,再以雷射開槽方式形成複數個開口150。該鈍化層15可為氮化矽材料所製,又例如可為氧化鋁/氧化矽/氮化矽之疊層材料所製。 In step S200, a passivation layer 15 is formed on the back surface 112 of the photoelectric conversion substrate 10, and the passivation layer 15 has a plurality of openings 150 as shown in FIG. In actual practice, for example, a passivation layer 15 of the entire surface is formed first, and a plurality of openings 150 are formed by laser grooving. The passivation layer 15 may be made of a tantalum nitride material, and may be, for example, a laminate of aluminum oxide/yttria/tantalum nitride.
圖4a~4e顯示本發明之鈍化層15之平面示意圖。請參考圖4a,在本實施例中,該複數個開口150包括沿一第一方向151延伸的複數個第一線形開口153及沿一第二方向152延伸的複數個第二線形開口154,該些第一及第二線形開口153、154是彼此交叉的。舉例,該些第一及第二線形開口153、154為實線形,並構成網狀式實線形開槽。請再參考圖3,該複數個開口150之間距D(例如該些第一線形153之間距及第二線形開口154之間距)可小於1mm(毫米)。該複數個開口150的線寬W(例如該些第一線形153之線寬及第二線形開口154之線寬)可介於10~35μm(微米)。 4a-4e show schematic plan views of the passivation layer 15 of the present invention. Referring to FIG. 4 a , in the embodiment, the plurality of openings 150 include a plurality of first linear openings 153 extending along a first direction 151 and a plurality of second linear openings 154 extending along a second direction 152 . The first and second linear openings 153, 154 are crossed to each other. For example, the first and second linear openings 153, 154 are in a solid line shape and constitute a mesh-shaped solid-line slot. Referring to FIG. 3 again, the distance D between the plurality of openings 150 (for example, the distance between the first line shapes 153 and the distance between the second line openings 154) may be less than 1 mm (mm). The line width W of the plurality of openings 150 (for example, the line width of the first line shapes 153 and the line width of the second line openings 154) may be between 10 and 35 μm (micrometers).
請參考圖4b,在另一實施例中,該複數個第一線形開口153為虛線形,且該複數個第二線形開口154為虛線形155。舉例,該些第一及第二線形開口153、154為虛線形155,並構成網狀式虛線形開槽。該虛線形155包括複數個點形開口156,而在其他實施例中,亦可採取部分複數個第一線形開口153為虛線形而部分部分複數個第一線形開口153實線形之設計,使該複數個第一線形開口153之至少其中之一為虛線形,同樣的,該複數個第二線形開口154亦可採只有部分為虛線形之設計,使該複數個第二線形開口154之至少其中之一為虛線形。請參考圖4c,在又一實施例中,該虛線形155更包括複數個線段形開口157。 Referring to FIG. 4b, in another embodiment, the plurality of first linear openings 153 are in a dotted line shape, and the plurality of second linear openings 154 are in a dotted shape 155. For example, the first and second linear openings 153, 154 are in the form of a broken line 155 and constitute a mesh-shaped dotted line slot. The dotted line 155 includes a plurality of dot-shaped openings 156. In other embodiments, a portion of the plurality of first linear openings 153 may be a dotted line and a portion of the plurality of first linear openings 153 may be formed in a solid line shape. At least one of the plurality of first linear openings 153 is in the shape of a dotted line. Similarly, the plurality of second linear openings 154 may also be designed in a partially dotted shape such that at least one of the plurality of second linear openings 154 is One of them is a dotted line. Referring to FIG. 4c, in still another embodiment, the dotted line 155 further includes a plurality of line-shaped openings 157.
請參考圖4d,在其他實施例中,該鈍化層15更包括複數個點形開口158,每個點形開口158位在相鄰的二個該第一線形開口153及相鄰的二個該第二線形開口154之間。 Referring to FIG. 4d, in other embodiments, the passivation layer 15 further includes a plurality of dot-shaped openings 158, each of which is located adjacent to the two adjacent first linear openings 153 and two adjacent ones. Between the second linear openings 154.
請參考圖4e,在其他實施例中,該鈍化層15更包括一環形開口159,包圍所有的該些第一及第二線形開口153、154。該環形開口159可為實線形或虛線形155。該虛線形155包括複數個點形開口156。該虛線形155更包括複數個線段形開口157。雖然圖4e中的第一及第二線形開口153、154是以圖4a的實線形之線形開口為例,但在其他實施例中,亦可用圖4b、圖4c、圖4d中的虛線形之線形開口設計取代圖4e的實線形之線形開口。圖4b~圖4d中的各線形開口之間距可小於1mm(毫米),線寬可介於10~35μm(微米)。 Referring to FIG. 4e, in other embodiments, the passivation layer 15 further includes an annular opening 159 surrounding all of the first and second linear openings 153, 154. The annular opening 159 can be a solid or dashed line 155. The dotted shape 155 includes a plurality of dot shaped openings 156. The dotted line 155 further includes a plurality of line-shaped openings 157. Although the first and second linear openings 153, 154 in FIG. 4e are exemplified by the linear linear opening of FIG. 4a, in other embodiments, the dotted lines in FIGS. 4b, 4c, and 4d may also be used. The linear opening design replaces the solid linear opening of Figure 4e. The distance between each of the linear openings in FIGS. 4b to 4d may be less than 1 mm (mm), and the line width may be between 10 and 35 μm (micrometers).
該網狀式實線形開槽、網狀式虛線形開槽、該些點形開口、或環形開口之設計皆可提升後續的無電鍍前處理製程之晶種粒子分佈,進而改善後續的無電鍍鎳層沉積於該鈍化層15上之大面積的附著性。 The mesh-shaped solid-line groove, the mesh-shaped dotted groove, the dot-shaped openings, or the annular opening are designed to improve the distribution of seed particles in the subsequent electroless pre-treatment process, thereby improving subsequent electroless plating. A large area of adhesion of the nickel layer deposited on the passivation layer 15.
請參考圖5,在步驟S300中,以一無電鍍製程形成一鎳層162,該鎳層162覆蓋該鈍化層15並透過該複數個開口150與該背面112直接接觸且電性接觸,其中:該無電鍍製程於50-70℃之溫度中進行,且該無電鍍製程之鍍液的PH值介於5~10,且鍍液主成分包括NiSO4(硫酸鎳)/NaH2PO2(次磷酸鈉)/Na2H4C4O4(丁二酸鈉)/H2O。舉例,無電鍍法亦可稱為自身催化鍍法(Autocatalytic Plating),先在工作物表面形成具有催化力的金屬面,或是利用工作物表面本身的催化作用,以化學還原方法,使金屬離子成金屬狀態析出。首先次磷酸根(還原劑)被氧化成亞磷酸根離子,釋出的電荷,可使鎳離子還原,金屬鎳沉積在具催化作用的活化表面上,而析出的鎳,又繼續催化反應的進行,所以析出反應連鎖進行,鍍層呈層狀結構,厚度可任意控制。 Referring to FIG. 5, in step S300, a nickel layer 162 is formed by an electroless plating process. The nickel layer 162 covers the passivation layer 15 and is in direct contact and electrical contact with the back surface 112 through the plurality of openings 150, wherein: The electroless plating process is carried out at a temperature of 50-70 ° C, and the pH of the electroless plating process is between 5 and 10, and the main component of the plating solution comprises NiSO 4 (nickel sulfate) / NaH 2 PO 2 (times) Sodium phosphate) / Na 2 H 4 C 4 O 4 (sodium succinate) / H 2 O. For example, electroless plating can also be called Autocatalytic Plating, which first forms a catalytic metal surface on the surface of a work object, or uses a catalytic action of the surface of the work object to chemically reduce the metal ion. It precipitates in a metal state. First, the hypophosphite (reducing agent) is oxidized to a phosphite ion, and the released charge can reduce the nickel ion, and the metallic nickel is deposited on the catalytically activated surface, and the precipitated nickel continues to catalyze the reaction. Therefore, the precipitation reaction is carried out in a chain, and the plating layer has a layered structure, and the thickness can be arbitrarily controlled.
在形成該鎳層162之步驟S300前,步驟S250:以一無電鍍前處理製程之敏化及活化步驟形成複數個晶種粒子161,其中該些晶種粒子161使用下列材料其中之一為晶種粒子:Sn/Pd(錫/鈀)、Sn/Ag(錫/銀)、Ni(鎳)、Co(鈷)或Fe(鐵)。 該鎳層162透過該些晶種粒子161而貼附該背面112。舉例,敏化及活化步驟使錫及鈀晶種粒子得以吸附於該背面,但錫/鈀晶種粒子具有較易吸附於矽表面而不易附著於氮化矽表面的特性。因此,該網狀式實線形開槽、網狀式虛線形開槽、該些點形開口、或環形開口之設計將提升前處理製程之敏化及活化步驟所吸附的錫/鈀晶種粒子,以及增加錫/鈀晶種粒子的密度和分佈,進而改善後續的該鎳層162沉積於該鈍化層15上之大面積的附著性。 Before the step S300 of forming the nickel layer 162, step S250: forming a plurality of seed particles 161 by an sensitization and activation step of an electroless plating pretreatment process, wherein the seed particles 161 are one of the following materials. Particles: Sn/Pd (tin/palladium), Sn/Ag (tin/silver), Ni (nickel), Co (cobalt) or Fe (iron). The nickel layer 162 is attached to the back surface 112 through the seed particles 161. For example, the sensitization and activation steps allow tin and palladium seed particles to be adsorbed on the back surface, but the tin/palladium seed particles have a property of being more easily adsorbed on the surface of the crucible and not easily adhering to the surface of the tantalum nitride. Therefore, the mesh-shaped solid-line groove, the mesh-shaped dotted groove, the dot-shaped openings, or the annular opening are designed to enhance the tin/palladium seed particles adsorbed by the sensitization and activation steps of the pretreatment process. And increasing the density and distribution of the tin/palladium seed particles, thereby improving the adhesion of the subsequent large area of the nickel layer 162 deposited on the passivation layer 15.
請參考圖6,照片(A)~(F)顯示無電鍍液PH值及製程溫度對鎳薄膜之晶粒尺寸及覆蓋度的影響。在不同無電鍍鎳製程條件下可觀察到,若成長出較大晶粒尺寸(Grain size)的無電鍍鎳薄膜,晶粒尺寸須大於80nm以上,才能促使鎳薄膜完整沉積於電池的背面整面而沒有空隙(Void)存在。 Referring to Figure 6, photographs (A) to (F) show the effect of the pH of the electroless plating solution and the process temperature on the grain size and coverage of the nickel film. Under different electroless nickel process conditions, it can be observed that if a larger grain size electroless nickel film is grown, the grain size must be greater than 80 nm to promote the complete deposition of the nickel film on the back side of the cell. There is no void (Void).
請參考圖7,照片(A)~(C)顯示:(A)傳統的線狀式雷射開槽圖形(Line pattern),(B)網狀式實線形雷射開槽圖形,以及(C)網狀式虛線形雷射開槽圖形之後續鎳層的附著力效果之比較。傳統的網線狀式圖形設計明顯存在有鎳薄膜剝離的問題,剝離面積的比率(Ratio of peeling area)接近10%,而網狀式實線形及網狀式虛線形之設計皆明顯改善無電鍍鎳薄膜的附著性,其剝離面積的比率為0% Referring to Figure 7, photographs (A) to (C) show: (A) a conventional linear laser line pattern, (B) a mesh solid line laser slot pattern, and (C) A comparison of the adhesion effects of the subsequent nickel layers of the mesh-shaped dotted laser-slotted pattern. The traditional wire-like graphic design obviously has the problem of peeling off the nickel film, the ratio of peeling area is close to 10%, and the design of the mesh-shaped solid line and the mesh-shaped dotted line obviously improves the electroless plating. The adhesion of the nickel film, the ratio of the peeling area is 0%
請參考圖8,在步驟S400中,將一導電層163形成於該鎳層162上,其中該鎳層162及該導電層163組合成一背面電極16。在本實施例中,該導電層162可為銅層。舉例,藉由將該鎳層162作為背面金屬晶種層,利用一電鍍製程將銅層直接電鍍在該鎳層162上。 Referring to FIG. 8 , in step S400 , a conductive layer 163 is formed on the nickel layer 162 , wherein the nickel layer 162 and the conductive layer 163 are combined to form a back electrode 16 . In this embodiment, the conductive layer 162 can be a copper layer. For example, by using the nickel layer 162 as a back metal seed layer, a copper layer is directly electroplated on the nickel layer 162 by an electroplating process.
在形成該鎳層162之步驟S300之後,或在形成該導電層163之步驟S400之後,可實施步驟S450:對該鎳層162進行退火,其退火溫度介於250-400℃,且時間介於3-10min(分)。該鎳層162經退火後,該鎳層162之一部份會與矽形 成鎳化矽層(圖未示)而和背面112電性接觸,即此時鎳層162和背面112的介面有部分區域之主成分已變為鎳化矽。此時,該鎳層162的厚度介於0.5~1μm(微米),且退火後的該鎳層162的晶粒尺寸介於100-300nm(奈米)。需說明的是,前述晶粒尺寸相關敘述則是單指鎳層162的非鎳化矽部分。 After the step S300 of forming the nickel layer 162, or after the step S400 of forming the conductive layer 163, step S450 may be performed: annealing the nickel layer 162, the annealing temperature is between 250 and 400 ° C, and the time is between 3-10min (minutes). After the nickel layer 162 is annealed, a portion of the nickel layer 162 forms a nickel ruthenium layer (not shown) with the tantalum and is in electrical contact with the back surface 112, that is, the interface between the nickel layer 162 and the back surface 112 is partially formed. The main component of the area has become nickel bismuth. At this time, the thickness of the nickel layer 162 is 0.5 to 1 μm (micrometer), and the grain size of the nickel layer 162 after annealing is between 100 and 300 nm (nano). It should be noted that the foregoing description of the grain size is a non-nickel-doped portion of the nickel layer 162.
請參考圖9,在步驟S500中,形成一正面電極17,其位於該光電轉換基板10之一受光面101上,並連接於該射極區12。舉例,在抗反射層14形成多個開口露出射極區12之局部,以多個電鍍製程順向偏壓電鍍的方式依序電鍍鎳層171/銅層172/錫層173並進行退火而成為該正面電極17,完成單面(mono-facial)受光式太陽能電池1。補充說明的是,在其他實施例中,該抗反射層14的開口亦可和該鈍化層的開口150同以雷射開槽方式形成,且該抗反射層14的開口亦可提早於步驟S300之前形成。另外,在其他實施例中,該背面電極16的退火製程亦可在電鍍該鎳層171/銅層172/錫層173形成之後再進行。圖9雖然顯示該些晶種粒子161經退火之後還可辨識,但退火溫度較高時,該些晶種粒子161之部分或全部可能會和該鎳層162重新晶格排列而消失或至少無法辨識。 Referring to FIG. 9, in step S500, a front electrode 17 is formed on one of the light receiving surfaces 101 of the photoelectric conversion substrate 10 and connected to the emitter region 12. For example, a plurality of openings are formed in the anti-reflection layer 14 to expose a portion of the emitter region 12, and the nickel layer 171/copper layer 172/tin layer 173 is sequentially electroplated by a plurality of electroplating processes in a forward bias plating manner to be annealed. The front electrode 17 completes a mono-facial light-receiving solar cell 1. In addition, in other embodiments, the opening of the anti-reflective layer 14 may be formed in the same manner as the opening 150 of the passivation layer, and the opening of the anti-reflective layer 14 may be earlier than step S300. Formed before. In addition, in other embodiments, the annealing process of the back electrode 16 may be performed after the nickel layer 171 / copper layer 172 / tin layer 173 is formed. Although FIG. 9 shows that the seed particles 161 can be identified after annealing, when the annealing temperature is high, part or all of the seed particles 161 may be re-arranged with the nickel layer 162 to disappear or at least fail. Identification.
在本實施例之步驟S500中,該正面電極17之鎳層171(電鍍製程)/銅層172(電鍍製程)/錫層173(電鍍製程)是在該背面電極16之導電層163(電鍍製程)之後所形成。但在其他實施例之步驟中,亦可先依序形成該背面電極16之鎳層162(無電鍍製程)及該正面電極17之鎳層171(電鍍製程)後,再同時形成該正面電極17之銅層172(電鍍製程)及該背面電極16之導電層163(銅電鍍製程)。最後,再形成該正面電極17之錫層173(電鍍製程)。 In step S500 of the embodiment, the nickel layer 171 (electroplating process) / copper layer 172 (electroplating process) / tin layer 173 (electroplating process) of the front electrode 17 is the conductive layer 163 of the back electrode 16 (electroplating process) ) formed afterwards. However, in the steps of other embodiments, the nickel layer 162 (electroless plating process) of the back electrode 16 and the nickel layer 171 (electroplating process) of the front electrode 17 may be sequentially formed, and then the front electrode 17 may be simultaneously formed. The copper layer 172 (electroplating process) and the conductive layer 163 of the back electrode 16 (copper plating process). Finally, the tin layer 173 of the front surface electrode 17 is formed (electroplating process).
請再參考圖9,其顯示本發明之一實施例之單面受光式太陽能電池1。一種單面受光式太陽能電池1包括:一光電轉換基板10、一正面電極17、一背面電極16及一鈍化層15。該光電轉換基板10可包括一基板11、一射極層12及一背電場層13。該基板11 為第一導電型,並具有一正面111和一與該正面111相對的背面112。該射極層11為第二導電型,並位於該基板11內靠近該正面111處。該背電場層13為第一導電型,並位於該基板11內靠近該背面112處。該光電轉換基板1可更包括一抗反射層14,其設置在該正面111處。該單面受光式太陽能電池1可為n型射極鈍化背部全擴散式(n-PERT)之太陽能電池。 Referring again to Figure 9, a single-sided light-receiving solar cell 1 of one embodiment of the present invention is shown. A single-sided light-receiving solar cell 1 includes a photoelectric conversion substrate 10, a front electrode 17, a back electrode 16, and a passivation layer 15. The photoelectric conversion substrate 10 can include a substrate 11, an emitter layer 12, and a back electric field layer 13. The substrate 11 is of a first conductivity type and has a front surface 111 and a back surface 112 opposite the front surface 111. The emitter layer 11 is of a second conductivity type and is located in the substrate 11 near the front surface 111. The back electric field layer 13 is of a first conductivity type and is located in the substrate 11 near the back surface 112. The photoelectric conversion substrate 1 may further include an anti-reflection layer 14 disposed at the front surface 111. The single-sided light-receiving solar cell 1 can be an n-type emitter passivated back fully diffused (n-PERT) solar cell.
該正面電極17位於該光電轉換基板10之一受光面101上,並連接於該射極區12。該背面電極16位於該光電轉換基板1之一背面112上,並大致覆蓋整個該背面112。上述「大致覆蓋整個」之意是指,包括:(1)覆蓋整個背面112,或(2)覆蓋背面112的大部分區域,但有小部分未被該背面電極16覆蓋之處,例如靠近該光電轉換基板10之邊緣處,或者因例如對位而留有的標記區。 The front surface electrode 17 is located on one of the light receiving surfaces 101 of the photoelectric conversion substrate 10 and is connected to the emitter region 12. The back surface electrode 16 is located on one of the back surfaces 112 of the photoelectric conversion substrate 1 and substantially covers the entire back surface 112. The above "substantially covers the whole" means that: (1) covers the entire back surface 112, or (2) covers most of the area of the back surface 112, but a small portion is not covered by the back surface electrode 16, for example, close to the A mark area left at the edge of the photoelectric conversion substrate 10 or due to, for example, alignment.
請再參考圖3及4a,該鈍化層15位於該背面電極16和該背面112之間。該鈍化層15包括複數個開口150,其包括沿一第一方向151延伸的複數個第一線形開口153及沿一第二方向152延伸的複數個第二線形開口154,該些第一及第二線形開口153、154是彼此交叉的,該複數個第一線形開口153之間距小於1mm(毫米),該複數個第二線形開口154之間距小於1mm(毫米)。 Referring again to FIGS. 3 and 4a, the passivation layer 15 is located between the back electrode 16 and the back surface 112. The passivation layer 15 includes a plurality of openings 150 including a plurality of first linear openings 153 extending along a first direction 151 and a plurality of second linear openings 154 extending along a second direction 152, the first and the first The two linear openings 153, 154 are intersected with each other, the plurality of first linear openings 153 having a distance of less than 1 mm (mm), and the plurality of second linear openings 154 having a distance of less than 1 mm (mm).
請再參考圖9,該背面電極16包括以一無電鍍製程形成的一鎳層162,該鎳層162透過該複數個開口150(包括該複數個第一線形開口及該複數個第二線形開口)而與該背面112電性接觸,該鎳層162的厚度介於0.5~1μm(微米),且該鎳層的晶粒尺寸介於100-300nm(奈米)。 Referring to FIG. 9 again, the back electrode 16 includes a nickel layer 162 formed by an electroless plating process. The nickel layer 162 passes through the plurality of openings 150 (including the plurality of first linear openings and the plurality of second linear openings). And electrically contacting the back surface 112, the nickel layer 162 has a thickness of 0.5 to 1 μm (micrometer), and the nickel layer has a grain size of 100 to 300 nm (nano).
本發明之鈍化層包括複數個開口(包括該複數個第一線形開口及該複數個第二線形開口)之網狀式實線形開槽、網狀式虛線形開槽、該些點形開口、或環形開口之設計皆可提升後續的無電鍍前處理製程之晶種粒子分佈,進而改善後續的無電鍍鎳層沉積於該鈍化層上之大面積的附著性。 The passivation layer of the present invention comprises a plurality of openings (including a plurality of first linear openings and the plurality of second linear openings), a mesh-shaped solid-line groove, a mesh-shaped dotted groove, and the dot-shaped openings. Or the annular opening is designed to enhance the distribution of seed particles in the subsequent electroless pre-treatment process, thereby improving the adhesion of the subsequent electroless nickel layer deposited on the passivation layer over a large area.
綜上所述,乃僅記載本發明為呈現解決問題所採用 的技術手段之較佳實施方式或實施例而已,並非用來限定本發明專利實施之範圍。即凡與本發明專利申請範圍文義相符,或依本發明專利範圍所做的均等變化與修飾,皆為本發明專利範圍所涵蓋。 In the above, it is merely described that the present invention is a preferred embodiment or embodiment of the technical means for solving the problem, and is not intended to limit the scope of the invention. That is, the equivalent changes and modifications made in accordance with the scope of the patent application of the present invention or the scope of the invention are covered by the scope of the invention.
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