TW201830479A - Method and apparatus for wafer bonding - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 36
- 235000012431 wafers Nutrition 0.000 claims abstract description 122
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 115
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 75
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 66
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 30
- 238000000137 annealing Methods 0.000 claims abstract description 19
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 36
- 239000000758 substrate Substances 0.000 claims description 22
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 13
- 238000010438 heat treatment Methods 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 6
- 238000003825 pressing Methods 0.000 claims description 6
- 239000000919 ceramic Substances 0.000 claims description 3
- 239000013078 crystal Substances 0.000 claims description 3
- 238000005498 polishing Methods 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 abstract description 14
- 229910021419 crystalline silicon Inorganic materials 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000003763 carbonization Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
- H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67115—Apparatus for thermal treatment mainly by radiation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67121—Apparatus for making assemblies not otherwise provided for, e.g. package constructions
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Abstract
Description
本發明係關於半導體製造領域，尤其係關於一種晶圓接合方法及裝置。 The present invention relates to the field of semiconductor manufacturing, and in particular, to a wafer bonding method and device.
氮化鎵(GaN)基半導體具有優良的材料性質，如：能隙大、熱穩定性及化學穩定性佳、電子飽和速度高等。此外，使用氮化鎵基半導體的電子裝置具有各種優點，如：擊穿電場高、最大電流密度高、在高溫下穩定的工作特性等。由於這樣的材料性質，氮化鎵基半導體不僅可以應用於光學裝置，而且可以應用於高頻及高功率的電子裝置以及高功率裝置。 Gallium nitride (GaN) -based semiconductors have excellent material properties, such as large energy gaps, good thermal and chemical stability, and high electron saturation speed. In addition, electronic devices using gallium nitride-based semiconductors have various advantages, such as high breakdown electric fields, high maximum current density, and stable operating characteristics at high temperatures. Due to such material properties, gallium nitride-based semiconductors can be applied not only to optical devices, but also to high-frequency and high-power electronic devices and high-power devices.
由於很難獲得品質良好的氮化鎵單晶基板，目前氮化鎵材料磊晶生產製程中，具有與氮化鎵晶格失配(mismatch)較低、熱失配較小、且價格經濟的藍寶石佔了主導地位。然而，由於藍寶石的導熱性能差，使得氮化鎵基裝置的散熱問題嚴重，尤其於較大電流密度注入時，高產熱量係使裝置溫度升高，從而嚴重影響裝置性能。雖然可以碳化矽(SiC)基板代替藍寶石基板以改善散熱特性，但是碳化矽基板相對昂貴，由此製造氮化鎵基半導體裝置的總成本增大。 Because it is difficult to obtain a good quality gallium nitride single crystal substrate, the current epitaxial production process of gallium nitride materials has a low mismatch with gallium nitride, a small thermal mismatch, and an economical price. Sapphire dominates. However, due to the poor thermal conductivity of sapphire, the heat dissipation problem of gallium nitride-based devices is serious. Especially when large current density is injected, the high heat generation causes the device temperature to rise, which seriously affects the device performance. Although a silicon carbide (SiC) substrate can be used instead of a sapphire substrate to improve heat dissipation characteristics, the silicon carbide substrate is relatively expensive, thereby increasing the total cost of manufacturing a gallium nitride-based semiconductor device.
為了改善這種情況，利用接合和研磨技術將氮化鎵基磊晶結構轉移到導熱性好的基板上，係實現可承受大電流密度注入的氮化鎵基半 導體裝置的關鍵。一般情況下，將形成有氮化鎵磊晶層的晶圓與由多晶碳化矽製備的晶圓進行接合，然後進行退火、拋光，即可得到採用多晶碳化矽做為基板的氮化鎵磊晶層。該方法可有效降低成本，並可利用碳化矽材料良好的導熱性。但是，由於接合時兩種晶圓的熱膨脹係數差距較大，導致接合後兩種晶圓之間存在較大應力，從而降低了接合成品率，導致氮化鎵基半導體裝置的成品率減低。 In order to improve this situation, the use of bonding and polishing technology to transfer the gallium nitride-based epitaxial structure to a substrate with good thermal conductivity is the key to achieving a gallium nitride-based semiconductor device that can withstand high current density injection. In general, a wafer formed with a gallium nitride epitaxial layer is bonded to a wafer made of polycrystalline silicon carbide, and then annealed and polished to obtain a gallium nitride using polycrystalline silicon carbide as a substrate. Epitaxial layer. This method can effectively reduce costs and can take advantage of the good thermal conductivity of silicon carbide materials. However, the large thermal expansion coefficient difference between the two wafers during bonding results in a greater stress between the two wafers after bonding, which reduces the bonding yield and reduces the yield of the gallium nitride-based semiconductor device.
本發明的目的在於提供一種晶圓接合方法及其接合裝置，提高接合成品率，提高氮化鎵基半導體裝置的可靠性。 An object of the present invention is to provide a wafer bonding method and a bonding device thereof, which can improve the bonding yield and improve the reliability of a gallium nitride-based semiconductor device.
本發明的技術方案是一種晶圓接合方法，包括以下步驟：提供氮化鎵晶圓與碳化矽晶圓；在所述氮化鎵晶圓與所述碳化矽晶圓上均形成無定型碳化矽；以及將所述氮化鎵晶圓與所述碳化矽晶圓形成有所述無定型碳化矽的一面進行接合，並且在接合過程中進行微波退火。 The technical solution of the present invention is a wafer bonding method, which includes the following steps: providing a gallium nitride wafer and a silicon carbide wafer; and forming an amorphous silicon carbide on the gallium nitride wafer and the silicon carbide wafer And bonding the gallium nitride wafer and the silicon carbide wafer to a side on which the amorphous silicon carbide is formed, and performing microwave annealing during the bonding process.
進一步的，在所述晶圓接合方法中，所述氮化鎵晶圓包括單晶矽基板，以及形成在所述單晶矽基板上的氮化鎵層。 Further, in the wafer bonding method, the gallium nitride wafer includes a single crystal silicon substrate and a gallium nitride layer formed on the single crystal silicon substrate.
進一步的，在所述晶圓接合方法中，所述碳化矽晶圓包括碳化矽層，所述碳化矽層為多晶碳化矽。 Further, in the wafer bonding method, the silicon carbide wafer includes a silicon carbide layer, and the silicon carbide layer is polycrystalline silicon carbide.
進一步的，在所述晶圓接合方法中，在所述碳化矽晶圓上形成有重摻雜的無定型碳化矽。 Further, in the wafer bonding method, heavily doped amorphous silicon carbide is formed on the silicon carbide wafer.
進一步的，所述晶圓接合方法還包括：於接合之後，對所述單晶矽基板進行研磨，至所述氮化鎵層。 Further, the wafer bonding method further comprises: after bonding, polishing the single crystal silicon substrate to the gallium nitride layer.
本發明還提供一種晶圓接合裝置，包括：承載台、加壓台以及微波提供裝置；所述承載台用於承載晶圓；所述加壓台位於承載台的上方，能夠相對於所述承載臺上下移動，用於提供壓力，完成晶圓的接合；所述微波提供裝置用於提供微波；所述加壓臺上設置有多個通孔，所述微波提供裝置通過所述通孔向所述晶圓提供微波。 The present invention also provides a wafer bonding device, comprising: a supporting table, a pressurizing table, and a microwave providing device; the supporting table is used to carry a wafer; the pressing table is located above the supporting table and can be opposite to the supporting table. The table is moved up and down to provide pressure to complete the bonding of the wafers; the microwave supply device is used to provide microwaves; a plurality of through holes are provided on the pressurized table, and the microwave supply device is provided to all places through the through holes. The wafer provides microwaves.
進一步的，在所述晶圓接合裝置中，所述通孔在所述加壓臺上均勻設置。 Further, in the wafer bonding apparatus, the through holes are uniformly provided on the pressing table.
進一步的，在所述晶圓接合裝置中，還包括輔助加熱裝置，設置於所述承載台的下方。 Further, the wafer bonding apparatus further includes an auxiliary heating device, which is disposed below the carrier table.
進一步的，在所述晶圓接合裝置中，所述輔助加熱裝置包括多個相互平行的燈管，均勻設置於所述承載台的下方。 Further, in the wafer bonding device, the auxiliary heating device includes a plurality of mutually parallel lamp tubes, which are evenly disposed below the bearing table.
進一步的，在所述晶圓接合裝置中，所述承載台與加壓台的材質均為陶瓷。 Further, in the wafer bonding apparatus, the material of the carrier stage and the pressurizing stage are both ceramics.
與習知技術相比，本發明提供的晶圓接合方法及裝置，係在氮化鎵晶圓與碳化矽晶圓兩者上均形成無定型碳化矽，接著將所述兩種晶圓具有無定型碳化矽的一面進行接合，在接合過程中進行微波退火，兩種晶圓上的無定型碳化矽藉由微波退火後轉換為結晶碳化矽，從而使氮化鎵晶圓與碳化矽晶圓完成接合，提高了接合的效率，從而提高了氮化鎵基半導體裝置的可靠性。 Compared with the conventional technology, the wafer bonding method and device provided by the present invention form amorphous silicon carbide on both a gallium nitride wafer and a silicon carbide wafer. One side of the shaped silicon carbide is bonded, and microwave annealing is performed during the bonding process. The amorphous silicon carbide on the two wafers is converted into crystalline silicon carbide by microwave annealing, so that the gallium nitride wafer and the silicon carbide wafer are completed. The bonding improves the bonding efficiency, thereby improving the reliability of the gallium nitride-based semiconductor device.
S01、S02、S03‧‧‧步驟 S01, S02, S03‧‧‧ steps
10‧‧‧氮化鎵晶圓 10‧‧‧GaN wafer
11‧‧‧單晶矽基板 11‧‧‧ Monocrystalline silicon substrate
12‧‧‧氮化鎵層 12‧‧‧GaN layer
13、21‧‧‧無定型碳化矽 13, 21‧‧‧Amorphous silicon carbide
20‧‧‧碳化矽晶圓 20‧‧‧ Silicon Carbide Wafer
100‧‧‧承載台 100‧‧‧bearing platform
200‧‧‧加壓台 200‧‧‧Pressure table
201‧‧‧通孔 201‧‧‧through hole
300‧‧‧微波提供裝置 300‧‧‧Microwave supply device
400‧‧‧輔助加熱裝置 400‧‧‧ auxiliary heating device
第1圖係表示，依據本發明之一實施例，晶圓接合方法的流程圖。 FIG. 1 is a flowchart of a wafer bonding method according to an embodiment of the present invention.
第2至6圖係表示，依據本發明之一實施例，晶圓接合方法的各步驟的結構示意圖。 Figures 2 to 6 are schematic structural diagrams of each step of a wafer bonding method according to an embodiment of the present invention.
第7圖係表示，依據本發明之一實施例，晶圓接合裝置的結構示意圖。 FIG. 7 is a schematic structural diagram of a wafer bonding apparatus according to an embodiment of the present invention.
以下結合圖式和具體實施例對本發明進一步詳細說明。根據本案說明書及申請專利範圍，本發明的優點及特徵將更清楚。需說明的是，圖式均採用非常簡化的形式，且均使用非精準的比例，僅用以方便、明晰地輔助說明本發明實施例的目的。 The present invention is further described in detail below with reference to the drawings and specific embodiments. The advantages and features of the present invention will be clearer according to the description of this case and the scope of patent application. It should be noted that the drawings are all in a very simplified form, and all use inaccurate proportions, which are only used to facilitate and clearly explain the purpose of the embodiments of the present invention.
本發明的核心思想是：在氮化鎵晶圓與碳化矽晶圓上均形成無定型碳化矽，將所述氮化鎵晶圓與碳化矽晶圓形成有所述無定型碳化矽的一面進行接合，在接合過程中進行微波退火，氮化鎵晶圓與碳化矽晶圓上的無定型碳化矽通過微波退火轉換為結晶碳化矽，從而使氮化鎵晶圓與碳化矽晶圓完成接合，提高了接合的效率，從而提高了氮化鎵基半導體裝置的可靠性。 The core idea of the present invention is: forming amorphous silicon carbide on both the gallium nitride wafer and the silicon carbide wafer, and forming the gallium nitride wafer and the silicon carbide wafer on the side where the amorphous silicon carbide is formed Bonding. Microwave annealing is performed during the bonding process. The amorphous silicon carbide on the gallium nitride wafer and the silicon carbide wafer is converted into crystalline silicon carbide by microwave annealing, so that the gallium nitride wafer and the silicon carbide wafer are joined. The bonding efficiency is improved, thereby improving the reliability of the gallium nitride-based semiconductor device.
第1圖為本發明一實施例所提供的晶圓接合方法的流程示意圖，如第1圖所示，包括以下步驟：步驟S01：提供氮化鎵晶圓與碳化矽晶圓；步驟S02：在所述氮化鎵晶圓與碳化矽晶圓上均形成無定型碳化矽；步驟S03：將所述氮化鎵晶圓與碳化矽晶圓形成有所述無定型碳化矽的一面進行接合，並且在接合過程中進行微波退火。 FIG. 1 is a schematic flowchart of a wafer bonding method according to an embodiment of the present invention. As shown in FIG. 1, the method includes the following steps: Step S01: providing a gallium nitride wafer and a silicon carbide wafer; and step S02: Amorphous silicon carbide is formed on both the gallium nitride wafer and the silicon carbide wafer; step S03: bonding the gallium nitride wafer and the silicon carbide wafer to a side on which the amorphous silicon carbide is formed, and Microwave annealing is performed during the bonding process.
第2至6圖為本發明一實施例提供的晶圓接合方法的各步驟結構示意圖，可同時參考第1圖詳細說明如下。 2 to 6 are schematic structural diagrams of each step of a wafer bonding method provided by an embodiment of the present invention, which can be described in detail below with reference to FIG. 1 at the same time.
在步驟S01中，提供氮化鎵晶圓10與碳化矽晶圓20，如第2圖所示。 In step S01, a gallium nitride wafer 10 and a silicon carbide wafer 20 are provided, as shown in FIG. 2.
本實施例中，所述氮化鎵晶圓10包括單晶矽基板11，以及形成在所述單晶矽基板11上的氮化鎵層12；所述碳化矽晶圓20包括碳化矽層，所述碳化矽層為多晶碳化矽。 In this embodiment, the gallium nitride wafer 10 includes a single crystal silicon substrate 11 and a gallium nitride layer 12 formed on the single crystal silicon substrate 11; the silicon carbide wafer 20 includes a silicon carbide layer, The silicon carbide layer is polycrystalline silicon carbide.
在步驟S02中，在所述氮化鎵晶圓10與碳化矽晶圓20上均形成無定型碳化矽，如第3圖所示。 In step S02, amorphous silicon carbide is formed on the gallium nitride wafer 10 and the silicon carbide wafer 20, as shown in FIG.
在所述氮化鎵晶圓10上形成無定型碳化矽13，在所述碳化矽晶圓20上形成無定型碳化矽21。較佳的，可以在所述碳化矽晶圓20上形成重摻雜的無定型碳化矽21，也可以在所述氮化鎵晶圓10上形成重摻雜的無定型碳化矽13。可依實際需求決定是否形成重摻雜的無定型碳化矽。 An amorphous silicon carbide 13 is formed on the gallium nitride wafer 10, and an amorphous silicon carbide 21 is formed on the silicon carbide wafer 20. Preferably, a heavily doped amorphous silicon carbide 21 may be formed on the silicon carbide wafer 20, and a heavily doped amorphous silicon carbide 13 may also be formed on the gallium nitride wafer 10. It can be decided according to actual needs whether to form heavily doped amorphous silicon carbide.
在步驟S03中，將所述氮化鎵晶圓10與碳化矽晶圓20形成有所述無定型碳化矽的一面進行接合，並且在接合過程中進行微波退火，如第5圖所示。 In step S03, the gallium nitride wafer 10 and the silicon carbide wafer 20 are bonded to a side on which the amorphous silicon carbide is formed, and microwave annealing is performed during the bonding process, as shown in FIG. 5.
首先將所述氮化鎵晶圓10上形成有無定型碳化矽13的一面，與所述碳化矽晶圓20上形成無定型碳化矽21的一面進行對位，如第4圖所示，然後進行加壓，並同時進行微波退火，完成所述氮化鎵晶圓10與碳化矽晶圓20的接合，形成如第5圖所示的結構。 First, the side where the amorphous silicon carbide 13 is formed on the gallium nitride wafer 10 is aligned with the side where the amorphous silicon carbide 21 is formed on the silicon carbide wafer 20, as shown in FIG. 4, and then Pressurization and simultaneous microwave annealing complete the bonding of the gallium nitride wafer 10 and the silicon carbide wafer 20 to form a structure as shown in FIG. 5.
所述氮化鎵晶圓10與碳化矽晶圓20上的無定型碳化矽通過微波退火轉換為結晶碳化矽，兩個晶圓上的所述無定型碳化矽通過結晶相 互結合，從而使得所述氮化鎵晶圓10與碳化矽晶圓20相結合，據此避免了現有技術中兩個晶圓接合時由於熱膨脹係數差距較大而導致的問題，提高了接合的效率，從而提高了氮化鎵基半導體裝置的可靠性。 The amorphous silicon carbide on the gallium nitride wafer 10 and the silicon carbide wafer 20 is converted into crystalline silicon carbide by microwave annealing, and the amorphous silicon carbide on the two wafers are combined with each other through crystallization, so that the The combination of gallium nitride wafer 10 and silicon carbide wafer 20 avoids the problems caused by the large difference in thermal expansion coefficients when the two wafers are bonded in the prior art, improves the bonding efficiency, and improves the nitride Reliability of gallium-based semiconductor devices.
後續可進一步對所述單晶矽基板11進行研磨，研磨至暴露出所述氮化鎵層12，形成如第6圖所示的結構，最終形成以碳化矽20做為基板的氮化鎵磊晶層12。 Subsequently, the single-crystal silicon substrate 11 may be further polished, until the gallium nitride layer 12 is exposed to form a structure as shown in FIG. 6, and finally a gallium nitride substrate using silicon carbide 20 as a substrate is formed.晶 层 12。 Crystal layer 12.
本發明提供的晶圓接合方法，在氮化鎵晶圓與碳化矽晶圓上均形成無定型碳化矽，將所述氮化鎵晶圓與碳化矽晶圓形成有所述無定型碳化矽的一面進行接合，在接合過程中進行微波退火，氮化鎵晶圓與碳化矽晶圓上的無定型碳化矽通過微波退火轉換為結晶碳化矽，從而使氮化鎵晶圓與碳化矽晶圓完成接合，提高了接合的效率，從而提高了氮化鎵基半導體裝置的可靠性。 In the wafer bonding method provided by the present invention, amorphous silicon carbide is formed on both a gallium nitride wafer and a silicon carbide wafer, and the gallium nitride wafer and the silicon carbide wafer are formed with the amorphous silicon carbide wafer. One side is bonded, and microwave annealing is performed during the bonding process. The amorphous silicon carbide on the gallium nitride wafer and the silicon carbide wafer is converted into crystalline silicon carbide by microwave annealing, so that the gallium nitride wafer and the silicon carbide wafer are completed. The bonding improves the bonding efficiency, thereby improving the reliability of the gallium nitride-based semiconductor device.
於另一面向中，本發明還提供一種晶圓接合裝置。如第7圖所示，係依據一實施例所提供的晶圓接合裝置的結構示意圖，包括：承載台100、加壓台200以及微波提供裝置300；所述承載台100用於承載晶圓；所述加壓台200位於承載台100的上方，能夠相對於所述承載台100上下移動，用於提供壓力，完成晶圓的接合；所述微波提供裝置300用於提供微波；所述加壓台200上設置有多個通孔201，所述微波提供裝置300通過所述通孔201向所述晶圓提供微波。 In another aspect, the present invention also provides a wafer bonding apparatus. As shown in FIG. 7, it is a schematic structural diagram of a wafer bonding apparatus according to an embodiment, including: a carrier stage 100, a pressurizing stage 200, and a microwave providing apparatus 300; the carrier stage 100 is used to carry a wafer; The pressurizing stage 200 is located above the carrier stage 100 and can move up and down relative to the carrier stage 100 to provide pressure to complete the bonding of wafers; the microwave supply device 300 is used to provide microwaves; A plurality of through holes 201 are provided on the stage 200, and the microwave supply device 300 provides microwaves to the wafer through the through holes 201.
所述加壓台200能夠相對於所述承載台100上下移動，即，遠離所述承載台100、或者靠近所述承載台100，向位於承載台100上的晶圓施加壓力，完成晶圓的接合。所述加壓台200還可視需要設置吸盤，用 於吸附上晶圓，並且可以相對於所述承載台100水準移動。所述加壓台200吸附上晶圓之後，移動到位於所述承載臺上的下晶圓的上方，進行對位，然後將上晶圓放置於下晶圓上，再向所述上晶圓施加壓力，完成上晶圓與下晶圓的接合，在此過程中，進行微波退火。所述上晶圓與下晶圓是依其相對位置所定義。 The pressurizing stage 200 can move up and down relative to the carrier stage 100, that is, away from the carrier stage 100, or close to the carrier stage 100, and apply pressure to the wafer on the carrier stage 100 to complete the wafer Join. The pressing table 200 may further be provided with a suction cup for suctioning a wafer, and may be moved horizontally relative to the carrier table 100 as needed. After the pressurizing stage 200 adsorbs the upper wafer, it moves to the top of the lower wafer on the carrier stage, performs alignment, then places the upper wafer on the lower wafer, and then faces the upper wafer. Pressure is applied to complete the bonding of the upper and lower wafers. In the process, microwave annealing is performed. The upper wafer and the lower wafer are defined according to their relative positions.
較佳的，所述通孔201在所述加壓台200上均勻分佈，在接合晶圓的過程中，所述微波提供裝置300通過所述通孔201向所述晶圓均勻地提供微波。所述晶圓接合裝置還包括輔助加熱裝置400，設置於所述承載台100的下方。本實施例中，所述輔助加熱裝置400包括多個相互平行的燈管，均勻設置於所述承載台100的下方，用於提供熱量。所述承載台100與加壓台200的材質均為陶瓷，亦可為具本領域通常知識者所知的其他材料。 Preferably, the through holes 201 are uniformly distributed on the pressing table 200. During the process of bonding wafers, the microwave supply device 300 uniformly supplies microwaves to the wafer through the through holes 201. The wafer bonding apparatus further includes an auxiliary heating device 400, which is disposed below the carrier table 100. In this embodiment, the auxiliary heating device 400 includes a plurality of mutually parallel lamp tubes, which are evenly disposed below the loading platform 100 and are used to provide heat. The material of the loading platform 100 and the pressure platform 200 is ceramic, and other materials known to those skilled in the art can also be used.
於本發明的一實施例中，以所述晶圓接合裝置進行晶圓接合的方法，具體包括以下步驟。 In an embodiment of the present invention, a method for performing wafer bonding by using the wafer bonding apparatus specifically includes the following steps.
首先，提供氮化鎵晶圓10與碳化矽晶圓20。所述氮化鎵晶圓10包括單晶矽基板11，以及形成在所述單晶矽基板11上的氮化鎵層12，所述碳化矽晶圓20包括碳化矽層，所述碳化矽層為多晶碳化矽。 First, a gallium nitride wafer 10 and a silicon carbide wafer 20 are provided. The gallium nitride wafer 10 includes a single crystal silicon substrate 11 and a gallium nitride layer 12 formed on the single crystal silicon substrate 11. The silicon carbide wafer 20 includes a silicon carbide layer and the silicon carbide layer. It is polycrystalline silicon carbide.
然後，在所述氮化鎵晶圓10上形成無定型碳化矽13，在所述碳化矽晶圓20上形成無定型碳化矽21。較佳的，可以在所述碳化矽晶圓20上形成重摻雜的無定型碳化矽。 Then, an amorphous silicon carbide 13 is formed on the gallium nitride wafer 10, and an amorphous silicon carbide 21 is formed on the silicon carbide wafer 20. Preferably, a heavily doped amorphous silicon carbide can be formed on the silicon carbide wafer 20.
然後，將所述氮化鎵晶圓10放置於承載台100上，將所述碳化矽晶圓20倒置，對位之後放置於所述氮化鎵晶圓10的上方。放置所 述碳化矽晶圓20的步驟可以由加壓台200完成，也可以由其他的設備如機械臂完成，其中放置之前需要進行對位元，使得所述碳化矽晶圓20與所述氮化鎵晶圓10相對齊。可以在所述碳化矽晶圓20與所述氮化鎵晶圓10上設置對位元標記，用於對位元。 Then, the gallium nitride wafer 10 is placed on the stage 100, the silicon carbide wafer 20 is inverted, and after being aligned, it is placed on the gallium nitride wafer 10. The step of placing the silicon carbide wafer 20 may be completed by the pressurizing stage 200 or by other equipment such as a robotic arm, wherein alignment is required before placing, so that the silicon carbide wafer 20 and the nitrogen The gallium nitride wafer 10 is relatively aligned. An alignment mark may be provided on the silicon carbide wafer 20 and the gallium nitride wafer 10 for alignment.
再然後，所述加壓台200向所述碳化矽晶圓20施加壓力，同時微波提供裝置300提供微波，進行微波退火，無定型碳化矽13與無定型碳化矽21通過微波退火轉換為結晶碳化矽，使得所述氮化鎵晶圓10與碳化矽晶圓20相結合。在此過程中，由於微波提供裝置300從加壓台200的上部提供微波，為了避免加熱不均，位於承載台100下方的輔助加熱設備也提供熱量，由此提供接合的效率。 Then, the pressure table 200 applies pressure to the silicon carbide wafer 20, and at the same time, the microwave supply device 300 provides microwaves and performs microwave annealing, and the amorphous silicon carbide 13 and the amorphous silicon carbide 21 are converted into crystalline carbonization by microwave annealing. Silicon, so that the gallium nitride wafer 10 and the silicon carbide wafer 20 are combined. In this process, since the microwave supplying device 300 supplies microwaves from the upper part of the pressurizing stage 200, in order to avoid uneven heating, the auxiliary heating equipment located below the carrying stage 100 also provides heat, thereby providing the efficiency of joining.
最後，對單晶矽基板11進行研磨至暴露出所述氮化鎵層12，形成以碳化矽20做為基板的氮化鎵磊晶層12。 Finally, the single crystal silicon substrate 11 is polished until the gallium nitride layer 12 is exposed to form a gallium nitride epitaxial layer 12 using silicon carbide 20 as a substrate.
綜上所述，本發明提供的晶圓接合方法及其接合裝置，在氮化鎵晶圓與碳化矽晶圓上均形成無定型碳化矽，將所述氮化鎵晶圓與碳化矽晶圓形成有所述無定型碳化矽的一面進行接合，在接合過程中進行微波退火，氮化鎵晶圓與碳化矽晶圓上的無定型碳化矽通過微波退火轉換為結晶碳化矽，從而使氮化鎵晶圓與碳化矽晶圓完成接合，提高了接合的效率，從而提高了氮化鎵基半導體裝置的可靠性。 In summary, the wafer bonding method and bonding device provided by the present invention form amorphous silicon carbide on both the gallium nitride wafer and the silicon carbide wafer, and combine the gallium nitride wafer and the silicon carbide wafer. The side where the amorphous silicon carbide is formed is bonded, and microwave annealing is performed during the bonding process. The amorphous silicon carbide on the gallium nitride wafer and the silicon carbide wafer is converted into crystalline silicon carbide by microwave annealing, so that the nitride is nitrided. The bonding of the gallium wafer and the silicon carbide wafer is completed, which improves the bonding efficiency, thereby improving the reliability of the gallium nitride-based semiconductor device.
上述特定實施例之內容係為了詳細說明本發明，然而，該等實施例係僅用於說明，並非意欲限制本發明。熟習本領域之技藝者可理解，在不悖離後附申請專利範圍所界定之範疇下針對本發明所進行之各種變化或修改係落入本發明之一部分。 The content of the specific embodiments described above is used to describe the present invention in detail. However, these embodiments are only used for illustration and are not intended to limit the present invention. Those skilled in the art can understand that various changes or modifications made to the present invention without departing from the scope defined by the scope of the attached patent application fall into a part of the present invention.
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