CN108183065A - A kind of method and compound substrate for eliminating silicon wafer warpage - Google Patents
A kind of method and compound substrate for eliminating silicon wafer warpage Download PDFInfo
- Publication number
- CN108183065A CN108183065A CN201711473791.XA CN201711473791A CN108183065A CN 108183065 A CN108183065 A CN 108183065A CN 201711473791 A CN201711473791 A CN 201711473791A CN 108183065 A CN108183065 A CN 108183065A
- Authority
- CN
- China
- Prior art keywords
- wafer
- stress
- compensation film
- silicon
- compound substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 37
- 239000000758 substrate Substances 0.000 title claims abstract description 36
- 238000000034 method Methods 0.000 title claims abstract description 35
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 30
- 239000010703 silicon Substances 0.000 title claims abstract description 30
- 150000001875 compounds Chemical class 0.000 title claims abstract description 26
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 37
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 30
- 230000008021 deposition Effects 0.000 claims abstract description 26
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 20
- 239000000463 material Substances 0.000 claims description 15
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 12
- 230000006835 compression Effects 0.000 claims description 12
- 238000007906 compression Methods 0.000 claims description 12
- 239000011521 glass Substances 0.000 claims description 12
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 11
- 239000002184 metal Substances 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 claims description 11
- 239000000377 silicon dioxide Substances 0.000 claims description 10
- -1 silicon carbide compound Chemical class 0.000 claims description 7
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims description 4
- 230000003647 oxidation Effects 0.000 claims 2
- 238000007254 oxidation reaction Methods 0.000 claims 2
- 238000000151 deposition Methods 0.000 description 21
- 238000010586 diagram Methods 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 238000002834 transmittance Methods 0.000 description 3
- 229910002601 GaN Inorganic materials 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 208000027418 Wounds and injury Diseases 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000012634 fragment Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 208000014674 injury Diseases 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000002463 transducing effect Effects 0.000 description 1
- 230000007306 turnover Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02016—Backside treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
- H01L29/1608—Silicon carbide
Abstract
The invention discloses a kind of methods and compound substrate for eliminating silicon wafer warpage, and this method comprises the following steps：S1：Choose the wafer (1) of a warpage；S2：There is the stress compensation film (2) of stress in one layer of inside of backside deposition of the wafer (1), so that the internal stress of the internal stress and the wafer (1) of the stress compensation film (2) is cancelled out each other, smooth compound substrate is obtained；The wafer (1) is silicon carbide-based sic wafer or silicon based gallium nitride wafer.The compound substrate includes a wafer (1) and a stress compensation film (2), the stress compensation film (2) is covered in the back side of the wafer (1), and the internal stress of the stress compensation film (2) and the internal stress of the wafer (1) are cancelled out each other；The wafer (1) is silicon carbide-based sic wafer or silicon based gallium nitride wafer.The present invention deposits one layer of inside in the wafer rear of warpage has the stress compensation film of stress so that the internal stress of stress compensation film and the internal stress of wafer are cancelled out each other, so as to eliminate warping phenomenon.
Description
Technical field
The invention belongs to semiconductor technical field of micro and nano fabrication, more particularly, to a kind of method for eliminating silicon wafer warpage and adopt
The compound substrate prepared with this method.
Background technology
Silicon carbide (SiC) and gallium nitride (GaN) are two kinds of semiconductor material with wide forbidden band, they have high critical breakdown electric field
The advantages that intensity, high saturated electrons mobility, high heat conductance, is particularly suitable for applications in microwave and high-power electric transmission and transducing
Field can carry high voltage, high current, and can exist with steady operation with the microwave device and power electronic devices of its preparation
The harsh application environment such as high radiation, high temperature.
In the crystal ingot growth of silicon carbide substrate, the internal stress that carborundum crystals are formed is bigger than normal.Silicon carbide crystal ingot is cut
When being cut into wafer thin slice, internal stress easily causes warping phenomenon, and growth is outer to be delayed, and warpage still maintains.
On a silicon substrate during epitaxial growth of gallium nitride, also easily because internal stress causes warping phenomenon.
Silicon carbide-based sic wafer and the warpage of silicon based gallium nitride wafer will all be processed to subsequent device brings difficulty,
This shows：
First, warpage causes to be can not be successfully in photoetching process to whole wafer Focus Exposure.
Second is that warpage causes a large amount of semiconductor equipments comprising exposure machine to be difficult to realize the automatic transporting to wafer.This table
It is now：Wafer can not effectively be handled upside down supporting spring vacuum suction, easily slide and turn over from carrying supporting spring；And wafer can not lead to
The mode for crossing vacuum suction is located in apparatus cavity.
In the prior art, it is to increase its thickness for overcoming the method for silicon carbide-based sic wafer generation warping phenomenon.
In the case of sic wafer internal stress is identical, the thickness of sic wafer is bigger, and warpage is with regard to smaller.
The shortcomings that above method of the prior art is：
First, increasing the device cost based on carbofrax material, the thickness of silicon carbide substrate is bigger, single-wafer consumption
Material is more, and cost is higher；
Second is that leading to that technique very complicated, efficiency be low, yield loss.The thickness of silicon carbide-based sic wafer is bigger, device
The conducting resistance of part is bigger.The thinning back side from silicon carbide-based sic wafer by the method for grinding is needed before scribing,
The positive device of silicon carbide-based sic wafer has been completed at this time, needs to carry out covering protection to it, then will be silicon carbide-based
Sic wafer front is bonded together with grinding device surface strength, to protect the positive device of silicon carbide-based sic wafer
It is injury-free during the grinding back surface of high-speed and high-intensity.Later silicon carbide-based silicon carbide whisker is removed from grinding device surface
Circle, then remove covering protection.Entirely " cover-cohering-grind-going to cohere-go covering " technique very complicated, and causes efficiency low
Lower and yield loss.
In the prior art, it is to try to change the life of its extension for overcoming the method for silicon based gallium nitride wafer generation warping phenomenon
Long technological parameter.Since the setting of the technological parameter of epitaxial growth mainly needs to consider other factors, such as defect, growth speed
Rate etc., therefore warpage often can not be effectively controlled, this causes silicon based gallium nitride silicon wafer warpage to be in wide range, increases device work
Skill difficulty.
Invention content
The invention solves first technical problem be to provide it is a kind of eliminate silicon wafer warpage method.
The invention solves second technical problem be to provide a kind of compound substrate prepared using the above method.
To solve above-mentioned first technical problem, invention adopts the following technical scheme that：
The present invention provides a kind of method for eliminating silicon wafer warpage, includes the following steps：
S1：Choose the wafer of a warpage；
S2：There is the stress compensation film of stress in one layer of inside of backside deposition of the wafer so that the stress compensation
The internal stress of film and the internal stress of the wafer are cancelled out each other, and obtain smooth compound substrate；
The wafer is silicon carbide-based sic wafer or silicon based gallium nitride wafer.
Preferably, when the wafer is silicon carbide-based silicon carbide whisker bowlder, the method further includes following steps：S3：
One layer of stressless auxiliary film in inside of backside deposition of the stress compensation film.
Preferably, regulate and control it by adjusting the air pressure of the deposition stress compensation film, temperature, component ratio, deposition rate
The type and size of internal stress.
Preferably, the material of the stress compensation film is silica, silicon nitride or metal.
Preferably, the internal stress of the stress compensation film is compression, unstressed or tensile stress.
To solve above-mentioned second technical problem, the present invention provides a kind of compound substrate, is mended including a wafer and a stress
Film is repaid, the stress compensation film is covered in the back side of the wafer, and the internal stress of the stress compensation film and the wafer
Internal stress cancel out each other；The wafer is silicon carbide-based sic wafer or silicon based gallium nitride wafer.
Preferably, when the wafer is silicon carbide-based silicon carbide whisker bowlder, the compound substrate further includes an inside nothing should
The auxiliary film of power, and the auxiliary film is covered in the back side of the stress compensation film.
Preferably, the material of the stress compensation film is silica, silicon nitride or metal.
Preferably, the internal stress of the stress compensation film is compression, unstressed or tensile stress.
Preferably, the material of the auxiliary film is silica, silicon nitride, metal, TEOS or semiconductor glass；Described half
The glass that conductor is SOG with glass or prepared by CVD.Any range recorded in the present invention includes appointing between end value and end value
The arbitrary subrange what any number between numerical value and end value or end value is formed.
Unless otherwise specified, each raw material in the present invention can be obtained by commercially available purchase, equipment used in the present invention
The conventional equipment in fields can be used or the prior art with reference to fields carries out.
Compared with prior art, the present invention has the advantages that：
(1) method of the invention deposits one layer of inside in the wafer rear of warpage has the stress compensation film of stress so that
The internal stress of stress compensation film and the internal stress of wafer are cancelled out each other, and so as to eliminate warping phenomenon, are obtained smooth compound
Substrate so that high-precision photoetching process is possibly realized.
(2) method of the invention can reduce the light transmittance of sic wafer by deposition stress compensation film and auxiliary film,
So that sic wafer is easier to identify and position.Due to material (such as silica, silicon nitride, the gold of stress compensation film
Belong to etc.) and material (such as silica, silicon nitride, metal, TEOS or the semiconductor glass etc.) of auxiliary film light transmittance of itself
It is relatively low, therefore stress compensation film and auxiliary film can reduce the light transmittance of sic wafer.In this way, the light-proofness of sic wafer
It can enhance, it is easier to be identified and located.
(3) method of the invention can eliminate warping phenomenon, obtain smooth compound substrate, smooth compound substrate can
Effectively it is handled upside down supporting spring vacuum suction, it is not easy to be turned over from carrying to slide on supporting spring, so that semiconductor equipment is to wafer
Automatic transporting be more prone to.
(4) method of the invention can increase the thickness of sic wafer by deposition stress compensation film and auxiliary film, from
And sic wafer is caused to be easier to be handled upside down in semiconductor equipment, while reduce the probability of fragment or sliver.
Description of the drawings
The specific embodiment of the present invention is described in further detail below in conjunction with the accompanying drawings
Fig. 1 is the schematic diagram of the wafer of the warpage of the embodiment of the present invention 1；
Fig. 2 is the schematic diagram of the backside deposition stress compensation film in wafer of the embodiment of the present invention 1；
Fig. 3 is the schematic diagram of the wafer of the warpage of the embodiment of the present invention 2；
Fig. 4 is the schematic diagram of the backside deposition auxiliary film in stress compensation film of the embodiment of the present invention 3.
Specific embodiment
In order to illustrate more clearly of the present invention, with reference to preferred embodiment, the present invention is described further.Ability
Field technique personnel should be appreciated that following specifically described content is illustrative and be not restrictive, this should not be limited with this
The protection domain of invention.
Embodiment 1
This implementation provides a kind of method for eliminating silicon wafer warpage, and this method comprises the following steps：
S1：Choose the wafer 1 of a warpage；
S2：There is the stress compensation film 2 of stress in one layer of inside of backside deposition of above-mentioned wafer 1 so that stress compensation film 2
The internal stress of internal stress and wafer 1 cancel out each other, obtain smooth compound substrate.
Above-mentioned wafer 1 is silicon carbide-based sic wafer or silicon based gallium nitride wafer.
The material of stress compensation film 2 is preferably silica, silicon nitride or metal.
The internal stress of above-mentioned stress compensation film 2 is compression, unstressed or tensile stress.Those skilled in the art pass through tune
The technological parameter of whole deposition stress compensation film 2 can regulate and control what is deposited such as air pressure, temperature, component ratio, deposition rate
The type (compression, unstressed or tensile stress) and size of the internal stress of stress compensation film 2.
In the present embodiment, in above-mentioned steps S1, such as the intermediate front of wafer 1, i.e. wafer 1 being bent upwards is chosen
It is convex, as shown in Figure 1；In above-mentioned steps S2, such as one layer of inside of backside deposition of the wafer 1 in warpage has compression
Stress compensation film 2 so that the internal stress of stress compensation film 2 and the internal stress of wafer 1 are cancelled out each other, so as to eliminate wafer 1
Warpage, obtain smooth compound substrate, as shown in Figure 2.
In the present embodiment, compound substrate includes wafer 1 and stress compensation film 2.
Embodiment 2
This implementation provides a kind of method for eliminating silicon wafer warpage, and this method comprises the following steps：
S1：Choose the wafer 1 of a warpage；
S2：There is the stress compensation film 2 of stress in one layer of inside of backside deposition of above-mentioned wafer 1 so that stress compensation film 2
The internal stress of internal stress and wafer 1 cancel out each other, obtain smooth compound substrate.
Above-mentioned wafer 1 is silicon carbide-based sic wafer or silicon based gallium nitride wafer.
The material of stress compensation film 2 is preferably silica, silicon nitride or metal.
The internal stress of above-mentioned stress compensation film 2 is compression, unstressed or tensile stress.Those skilled in the art pass through tune
The technological parameter of whole deposition stress compensation film 2 can regulate and control what is deposited such as air pressure, temperature, component ratio, deposition rate
The type (compression, tensile stress or unstressed) and size of the internal stress of stress compensation film 2.
In the present embodiment, in above-mentioned steps S1, such as intermediate reclinate wafer 1, the i.e. front of wafer 1 are chosen
It is recessed, as shown in Figure 3；In above-mentioned steps S2, such as one layer of inside of backside deposition of the wafer 1 in warpage has tensile stress
Stress compensation film 2 so that the internal stress of stress compensation film 2 and the internal stress of wafer 1 are cancelled out each other, so as to eliminate wafer 1
Warpage, obtain smooth compound substrate, as shown in Figure 2.
In the present embodiment, compound substrate includes wafer 1 and stress compensation film 2.
Embodiment 3
This implementation provides a kind of method for eliminating silicon wafer warpage, and this method comprises the following steps：
S1：Choose the wafer 1 of a warpage；
S2：There is the stress compensation film 2 of stress in one layer of inside of backside deposition of above-mentioned wafer 1 so that stress compensation film 2
The internal stress of internal stress and wafer 1 cancel out each other, obtain smooth compound substrate；
S3：In the stressless auxiliary film 3 in one layer of inside of backside deposition of above-mentioned stress compensation film 2.
Above-mentioned wafer 1 is silicon carbide-based sic wafer.
The material of stress compensation film 2 is preferably silica, silicon nitride or metal.
The internal stress of above-mentioned stress compensation film 2 is compression, unstressed or tensile stress.Those skilled in the art pass through tune
The technological parameter of whole stress compensation film 2 can regulate and control deposited stress such as air pressure, temperature, component ratio, deposition rate
The type (compression, zero stress or tensile stress) and size of the internal stress of compensation film 2.
In the present embodiment, in above-mentioned steps S1, such as intermediate reclinate sic wafer 1 is chosen, that is, be carbonized
The front of Silicon Wafer 1 is convex or recessed；In above-mentioned steps S2, such as one layer of the backside deposition of the sic wafer 1 in warpage
Inside has the stress compensation film 2 of compression or tensile stress so that the internal stress of stress compensation film 2 and sic wafer 1
Internal stress is cancelled out each other, and so as to eliminate the warpage of sic wafer 1, obtains smooth silicon carbide compound substrate；In above-mentioned step
In rapid S3, in the internal nothing of one layer of backside deposition of the i.e. stress compensation film 2 of the silicon carbide compound substrate back that above-mentioned steps S2 is obtained
The auxiliary film 3 of stress obtains final smooth silicon carbide compound substrate, as shown in Figure 4.
In the present embodiment, silicon carbide compound substrate further includes auxiliary film 3, that is, the silicon carbide compound substrate packet finally obtained
Include sic wafer 1, stress compensation film 2 and auxiliary film 3.
Above-mentioned auxiliary film 3 is used for shading, is additionally operable to increase the thickness of silicon carbide compound substrate to the thickness value of needs.
The material of auxiliary film 3 is preferably silica, silicon nitride, metal, silester (TEOS) or semiconductor glass.It should
Semiconductor is SOG (spin on glass coating- spin on glass) or CVD (Chemical Vapor with glass
Deposition- chemical vapor depositions) prepare glass.
Obviously, the above embodiment of the present invention be only to clearly illustrate example of the present invention, and not be pair
The restriction of embodiments of the present invention.For those of ordinary skill in the art, may be used also on the basis of the above description
To make other variations or changes in different ways.Here all embodiments can not be exhaustive.It is every to belong to this hair
The obvious changes or variations that bright technical solution is extended out are still in the row of protection scope of the present invention.
Claims (10)
- A kind of 1. method for eliminating silicon wafer warpage, which is characterized in that include the following steps：S1：Choose the wafer (1) of a warpage；S2：There is the stress compensation film (2) of stress in one layer of inside of backside deposition of the wafer (1) so that the stress is mended The internal stress for repaying the internal stress and the wafer (1) of film (2) is cancelled out each other, and obtains smooth compound substrate；The wafer (1) is silicon carbide-based sic wafer or silicon based gallium nitride wafer.
- 2. the method according to claim 1 for eliminating silicon wafer warpage, which is characterized in that when the wafer (1) is silicon carbide During base silicon carbide wafer, the method further includes following steps：S3：In one layer of stressless auxiliary film in inside (3) of backside deposition of the stress compensation film (2).
- 3. the method according to claim 1 or 2 for eliminating silicon wafer warpage, which is characterized in that answered by adjusting deposition is described The air pressure of force compensating film (2), temperature, component ratio, deposition rate regulate and control the type and size of its internal stress.
- 4. the method according to claim 1 or 2 for eliminating silicon wafer warpage, which is characterized in that the stress compensation film (2) Material is silica, silicon nitride or metal.
- 5. the method according to claim 1 or 2 for eliminating silicon wafer warpage, which is characterized in that the stress compensation film (2) Internal stress is compression, unstressed or tensile stress.
- 6. a kind of compound substrate, which is characterized in that including a wafer (1) and a stress compensation film (2), the stress compensation film (2) back side of the wafer (1) is covered in, and the inside of the internal stress of the stress compensation film (2) and the wafer (1) should Power is cancelled out each other；The wafer (1) is silicon carbide-based sic wafer or silicon based gallium nitride wafer.
- 7. compound substrate according to claim 6, which is characterized in that when the wafer (1) is silicon carbide-based silicon carbide whisker Bowlder, the compound substrate further includes a stressless auxiliary film (3) in inside, and the auxiliary film (3) is covered in the stress The back side of compensation film (2).
- 8. the compound substrate described according to claim 6 or 7, which is characterized in that the material of the stress compensation film (2) is oxidation Silicon, silicon nitride or metal.
- 9. the compound substrate described according to claim 6 or 7, which is characterized in that the internal stress of the stress compensation film (2) is Compression, unstressed or tensile stress.
- 10. silicon carbide compound substrate according to claim 7, which is characterized in that the material of the auxiliary film (3) is oxidation Silicon, silicon nitride, metal, TEOS or semiconductor glass；The glass that the semiconductor is SOG with glass or prepared by CVD.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711473791.XA CN108183065A (en) | 2017-12-29 | 2017-12-29 | A kind of method and compound substrate for eliminating silicon wafer warpage |
| PCT/CN2018/115872 WO2019128524A1 (en) | 2017-12-29 | 2018-11-16 | Method for eliminating wafer warpage and composite substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711473791.XA CN108183065A (en) | 2017-12-29 | 2017-12-29 | A kind of method and compound substrate for eliminating silicon wafer warpage |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108183065A true CN108183065A (en) | 2018-06-19 |
Family
ID=62549176
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711473791.XA Pending CN108183065A (en) | 2017-12-29 | 2017-12-29 | A kind of method and compound substrate for eliminating silicon wafer warpage |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN108183065A (en) |
| WO (1) | WO2019128524A1 (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019128524A1 (en) * | 2017-12-29 | 2019-07-04 | 重庆伟特森电子科技有限公司 | Method for eliminating wafer warpage and composite substrate |
| CN110828298A (en) * | 2019-11-14 | 2020-02-21 | 济南晶正电子科技有限公司 | Single crystal thin film composite substrate and method for manufacturing same |
| CN111115567A (en) * | 2019-12-25 | 2020-05-08 | 北京航天控制仪器研究所 | Stress compensation method for MEMS wafer level packaging |
| CN111584580A (en) * | 2020-05-15 | 2020-08-25 | 武汉华星光电半导体显示技术有限公司 | Preparation method of flexible display panel and flexible display panel |
| WO2020227988A1 (en) * | 2019-05-15 | 2020-11-19 | 华为技术有限公司 | Chip packaging apparatus and manufacturing method therefor |
| CN112908839A (en) * | 2019-12-03 | 2021-06-04 | 上海积塔半导体有限公司 | Method for reducing silicon carbide wafer bow |
| WO2022011641A1 (en) * | 2020-07-16 | 2022-01-20 | 华为技术有限公司 | Method for manufacturing gan device, and gan device |
| CN116504609A (en) * | 2023-06-28 | 2023-07-28 | 北京无线电测量研究所 | Method for eliminating stress of warpage wafer |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102169286A (en) * | 2010-01-29 | 2011-08-31 | Hoya株式会社 | A substrate for a mask blank, a mask blank and method of manufacturing a transfer mask |
| CN102549716A (en) * | 2009-12-11 | 2012-07-04 | 国家半导体公司 | Backside stress compensation for gallium nitride or other nitride-based semiconductor devices |
| CN102598308A (en) * | 2009-09-18 | 2012-07-18 | 信越化学工业株式会社 | Solar cell, method for manufacturing solar cell, and solar cell module |
| CN103035520A (en) * | 2012-08-13 | 2013-04-10 | 上海华虹Nec电子有限公司 | Manufacture method for insulated gate bipolar transistor (IGBT) device |
| CN103871867A (en) * | 2014-03-19 | 2014-06-18 | 武汉新芯集成电路制造有限公司 | Method for forming low-stress silicon nitride thin film |
| CN105448762A (en) * | 2014-08-28 | 2016-03-30 | 中国科学院微电子研究所 | Method for adjusting warping degree of substrate |
| US20170162522A1 (en) * | 2015-07-01 | 2017-06-08 | Ii-Vi Optoelectronic Devices, Inc. | Stress relief in semiconductor wafers |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20170148747A1 (en) * | 2015-07-01 | 2017-05-25 | Ii-Vi Optoelectronic Devices, Inc. | Stress relief in semiconductor wafers |
| CN105405945A (en) * | 2015-10-28 | 2016-03-16 | 聚灿光电科技股份有限公司 | Composite substrate and method of manufacturing GaN-based LED by using substrate |
| CN205452236U (en) * | 2016-03-28 | 2016-08-10 | 厦门市三安集成电路有限公司 | Wafer structure of planarization |
| CN108183065A (en) * | 2017-12-29 | 2018-06-19 | 北京品捷电子科技有限公司 | A kind of method and compound substrate for eliminating silicon wafer warpage |
-
2017
- 2017-12-29 CN CN201711473791.XA patent/CN108183065A/en active Pending
-
2018
- 2018-11-16 WO PCT/CN2018/115872 patent/WO2019128524A1/en active Application Filing
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102598308A (en) * | 2009-09-18 | 2012-07-18 | 信越化学工业株式会社 | Solar cell, method for manufacturing solar cell, and solar cell module |
| CN102549716A (en) * | 2009-12-11 | 2012-07-04 | 国家半导体公司 | Backside stress compensation for gallium nitride or other nitride-based semiconductor devices |
| CN102169286A (en) * | 2010-01-29 | 2011-08-31 | Hoya株式会社 | A substrate for a mask blank, a mask blank and method of manufacturing a transfer mask |
| CN103035520A (en) * | 2012-08-13 | 2013-04-10 | 上海华虹Nec电子有限公司 | Manufacture method for insulated gate bipolar transistor (IGBT) device |
| CN103871867A (en) * | 2014-03-19 | 2014-06-18 | 武汉新芯集成电路制造有限公司 | Method for forming low-stress silicon nitride thin film |
| CN105448762A (en) * | 2014-08-28 | 2016-03-30 | 中国科学院微电子研究所 | Method for adjusting warping degree of substrate |
| US20170162522A1 (en) * | 2015-07-01 | 2017-06-08 | Ii-Vi Optoelectronic Devices, Inc. | Stress relief in semiconductor wafers |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019128524A1 (en) * | 2017-12-29 | 2019-07-04 | 重庆伟特森电子科技有限公司 | Method for eliminating wafer warpage and composite substrate |
| WO2020227988A1 (en) * | 2019-05-15 | 2020-11-19 | 华为技术有限公司 | Chip packaging apparatus and manufacturing method therefor |
| CN110828298A (en) * | 2019-11-14 | 2020-02-21 | 济南晶正电子科技有限公司 | Single crystal thin film composite substrate and method for manufacturing same |
| CN112908839A (en) * | 2019-12-03 | 2021-06-04 | 上海积塔半导体有限公司 | Method for reducing silicon carbide wafer bow |
| CN112908839B (en) * | 2019-12-03 | 2021-10-01 | 上海积塔半导体有限公司 | Method for reducing silicon carbide wafer bow |
| CN111115567A (en) * | 2019-12-25 | 2020-05-08 | 北京航天控制仪器研究所 | Stress compensation method for MEMS wafer level packaging |
| CN111584580A (en) * | 2020-05-15 | 2020-08-25 | 武汉华星光电半导体显示技术有限公司 | Preparation method of flexible display panel and flexible display panel |
| WO2022011641A1 (en) * | 2020-07-16 | 2022-01-20 | 华为技术有限公司 | Method for manufacturing gan device, and gan device |
| CN116504609A (en) * | 2023-06-28 | 2023-07-28 | 北京无线电测量研究所 | Method for eliminating stress of warpage wafer |
| CN116504609B (en) * | 2023-06-28 | 2023-09-15 | 北京无线电测量研究所 | Method for eliminating stress of warpage wafer |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2019128524A1 (en) | 2019-07-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108183065A (en) | A kind of method and compound substrate for eliminating silicon wafer warpage | |
| JP6425835B2 (en) | Method of manufacturing a diamond-semiconductor composite substrate | |
| KR102180947B1 (en) | Selective deposition of diamond in thermal vias | |
| WO2016143252A1 (en) | Bonded semiconductor wafer and method for manufacturing bonded semiconductor wafer | |
| US20240022229A1 (en) | Composite substrate | |
| KR102047864B1 (en) | Pseudo substrate with improved efficiency of usage of single crystal material | |
| US8723185B2 (en) | Reducing wafer distortion through a high CTE layer | |
| WO2021024654A1 (en) | Substrate for electronic device and production method therefor | |
| CN110383420A (en) | The RF device being integrated on engineering substrate | |
| CN111540684A (en) | Microelectronic device of diamond-based heterogeneous integrated gallium nitride thin film and transistor and preparation method thereof | |
| CN112768584B (en) | Light-emitting diode chip and application thereof | |
| US20130119406A1 (en) | Silicon carbide substrate, semiconductor device, and methods for manufacturing them | |
| TWI738665B (en) | Manufacturing method of SiC composite substrate | |
| CN107958839B (en) | Wafer bonding method and bonding device thereof | |
| CN109346433B (en) | Method for bonding semiconductor substrate and bonded semiconductor substrate | |
| JP2009260117A (en) | Silicon carbide substrate, semiconductor device, wiring substrate, and silicon carbide manufacturing method | |
| CN104538508B (en) | The angularity control method of GaN epitaxy silicon substrate material | |
| JP6796407B2 (en) | Manufacturing method of SiC epitaxial wafer | |
| JP7334869B2 (en) | Nitride semiconductor substrate and manufacturing method thereof | |
| CN115863400B (en) | High-heat-conductivity GaN-based HEMT device and preparation method thereof | |
| CN113013061B (en) | Method for processing compound semiconductor by using organic film | |
| CN105002563B (en) | The method of silicon carbide epitaxial layers region doping | |
| CN106876248A (en) | 8 inches of thin-film epitaxy pieces, uniformity control method and applications | |
| US20210028083A1 (en) | Selectively-pliable chemical vapor deposition (cvd) diamond or other heat spreader | |
| JP2007266347A (en) | Method of manufacturing semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20180619 |