TW201828126A - Semiconductor equipment throughput simulation method and semiconductor equipment throughput simulation system - Google Patents

Abstract

The present disclosure provides a semiconductor equipment throughput simulation method, including: respectively obtaining process information of a plurality of semiconductor equipment; respectively obtaining specification information of a plurality of semiconductor transfer device; building a production line selecting from the semiconductor equipment and the semiconductor transfer devices; and performing a simulation of the production line on a processor by using the process and specification information of the selected semiconductor equipment and semiconductor transfer devices.

Description

Semiconductor machine capacity production simulation method and semiconductor machine capacity simulation system

The disclosure relates to the field of semiconductors, and more particularly to a semiconductor machine capacity simulation method and a semiconductor machine capacity simulation system.

The global market currently forces manufacturers of a large number of products to provide high quality products at low prices. Therefore, it is important to increase yield and process efficiency to minimize production costs. This is especially the case in the field of semiconductor manufacturing because it combines cutting edge technology with mass production technology. Therefore, the goal of semiconductor manufacturers is to reduce the consumption of raw materials and consumables while increasing the use of process tools. The latter aspect is particularly important because of the need for modern semiconductor tooling equipment that is relatively costly and represents a major part of the total production cost.

In view of this, the object of the present invention is to provide a method and a related system for simulating the capacity of a semiconductor machine on a production line, which can reduce the calculation time and optimize the production line schedule to achieve the purpose of optimizing the production capacity.

Some embodiments of the present disclosure provide a semiconductor device capacity simulation method, including: separately obtaining process information of a plurality of semiconductor devices; respectively obtaining specification information of a plurality of semiconductor material transfer devices; and the semiconductor devices and the semiconductor device Selecting a part of each of the semiconductor material transfer devices to establish a production line model; and using the selected semiconductor machine and the process information and specification information corresponding to the semiconductor material transfer devices to be performed on one processor Simulation of the production line model.

Some embodiments of the present disclosure provide a method for simulating a capacity of a semiconductor machine, comprising: respectively obtaining a process recipe operation time of a plurality of semiconductor machines of a production line; respectively obtaining specification information of a plurality of semiconductor material transfer devices of the production line; And performing simulation of the production line on a processor according to process schedule and specification information of the process recipes corresponding to the semiconductor devices and the semiconductor material transfer devices.

Some embodiments of the present disclosure provide a semiconductor machine capacity simulation system, including: a database including a plurality of semiconductor machine models and a plurality of semiconductor material transfer device models, wherein the semiconductor machine models include process information, The semiconductor material transfer device model includes specification information; an editing interface for allowing a user to select a part of the semiconductor machine model and the semiconductor material transfer device models in the database as needed; Establishing a production line model: and a computing unit for calling the semiconductor machine models and the semiconductor material transfer device models in the database according to the production line model in the editing interface to perform the production line Model simulation.

The semiconductor machine capacity simulation method and related semiconductor machine capacity simulation system proposed by the disclosure can quickly simulate a complete production line according to a user-defined combination of a semiconductor machine and a semiconductor material transfer device.

[00013] The present disclosure provides several different implementations or embodiments that can be used to implement different features of the present invention. For simplicity of explanation, the present disclosure also describes examples of specific components and arrangements. Please note that these specific examples are provided for demonstration purposes only and are not intended to be limiting. For example, in the following description of how the first feature is on or above the second feature, certain embodiments may be included, where the first feature is in direct contact with the second feature, and the description may include other differences Embodiments wherein there are other features in between the first feature and the second feature such that the first feature is not in direct contact with the second feature. In addition, various examples in the disclosure may use repeated reference numerals and/or text annotations to make the document more simplistic and clear, and such repeated reference numerals and annotations do not represent an association between different embodiments and configurations. [00014] In addition, the disclosure uses spatially related narrative vocabulary such as "under", "low", "lower", "above", "above", "down", "top" For the purposes of the description, the <RTI ID=0.0> </ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; In addition to the angular orientations shown in the figures, these spatial relative terms are also used to describe the possible angles and directions of the device in use and during operation. The angular orientation of the device may vary (rotating 90 degrees or other orientations), and the spatially related descriptions used in this disclosure may be interpreted in the same manner. [00015] Although the present disclosure proposes a wide range of numerical values and approximate number of meals, the numerical values set forth in the specific examples are as accurate as possible. However, any numerical nature contains some of the necessary errors caused by the standard deviations obtained in individual test measurements. Similarly, as used herein, the term "about" generally refers to within 10%, 5%, 1%, or 0.5% of a given value or range. Alternatively, the term "about" refers to an acceptable standard error of the average when considered by one of ordinary skill in the art. Except in the operating/working examples, or unless otherwise stated, such as the amount of material, time period, temperature, operating conditions, proportions of quantities, and all numerical ranges, quantities, values, and The percentage should be understood as being modified by the word "about" in all cases. Accordingly, the numerical parameters set forth in the disclosure and the appended claims are intended to be a At a minimum, each numerical parameter should be interpreted at least in terms of the number of significant digits reported and the well-known carry technique. In this context, a range can be expressed as from one end to another or between two ends. Unless otherwise stated, all ranges disclosed herein are inclusive of the endpoints. [00016] The manufacturing process of integrated circuits is usually done in an automated or semi-automated plant, and is done through a number of process steps. The number and type of process steps that must be passed depend on the function and specifications of the integrated circuit to be fabricated. The general flow of the integrated circuit may include a plurality of photolithography steps for imaging a circuit pattern of a particular device layer in a photoresist layer, and then patterning the photoresist layer to form a photoresist mask. Resist mask for further processing when constructing the device layer under consideration in processes such as etching or ion implantation processes. Thus, a plurality of process steps are performed in a layer-by-layer manner in accordance with the specified lithographic masks for each layer. For example, a complex CPU requires hundreds of process steps and each process step must be performed within a specified process margin to meet the specifications of the device under consideration. [00017] The specific process parameter settings for a particular semiconductor machine can generally be referred to as a recipe, or simply as a recipe. Therefore, a large number of different process recipes may be required to apply the different process recipes to the semiconductor machines when manufacturing different types of integrated circuits. Since it is often necessary to quickly change the process recipe to cope with the changing process, the order of the semiconductor machines and the process recipe must be changed frequently. In addition, the combination of semiconductor material transfer devices between semiconductor machines, such as robotic arms and semiconductor machines, may also need to be changed at any time to increase throughput. [00018] Since the analog systems provided by the suppliers of semiconductor machines and semiconductor material transfer devices usually do not provide too much flexibility for the user, the user cannot adjust the semiconductor machine and the semiconductor material transfer device according to actual needs. The various parameters, and the compatibility problems between the various suppliers, have the disadvantage that they are not easy to integrate with each other. Therefore, the present disclosure proposes a semiconductor machine capacity simulation method and a related semiconductor machine capacity simulation system, which can quickly simulate a complete production line according to a user-defined combination of a semiconductor machine and a semiconductor material transfer device. [00019] FIG. 1 is a schematic diagram of an embodiment of a semiconductor machine capacity simulation system 100 of the present disclosure. The semiconductor machine capacity simulation system 100 includes a database 102, an editing interface 104, and a computing unit 106. The database 102 includes a plurality of semiconductor machine models and a plurality of semiconductor material transfer device models for selection by a user. In this embodiment, the user can select a part of the semiconductor machine and the semiconductor material transfer devices through the editing interface 104 according to the needs of a production line to form a production line model corresponding to the production line. The computing unit 106, according to the production line model in the editing interface 104, calls the semiconductor devices in the database 102 and the information of the semiconductor material transfer devices to perform simulation of the production line model. [00020] For details of the database 102, the editing interface 104, and the computing unit 106, please refer to FIG. 2 and FIG. 2 is a schematic diagram of an embodiment of a database 102 and an editing interface 104 of the semiconductor machine capacity simulation system 100 of the present disclosure. The database 102 of the semiconductor machine capacity simulation system 100 of FIG. 1 includes a semiconductor material transfer device database 1022, a semiconductor machine database 1024, and a scheduling module database 1026 in FIG. The semiconductor material transfer device library 1022 contains specifications for any device used to transfer, load, and control semiconductor materials such as wafers. In one embodiment, the semiconductor material transfer device database 1022 contains specification information of the robot arm, such as the gripping time, the moving speed, and the like. For example, the semiconductor material transfer device database 1022 can include any type of robot arm, such as a single robot arm or a double-transformation robot arm, a 3-axis or 4-axis robot arm, and the like; The robotic arm contained in the carrier device database 1022 can be a robotic arm suitable for use in any environment, such as an atmospheric robotic arm or a vacuum robotic arm. In another embodiment, in addition to the specification information of the robot arm, the semiconductor material transfer device database 102 includes specification information of the wafer locator for providing high-precision positioning function, such as time required for positioning. . In another embodiment, the semiconductor material transfer device database 102 further includes specification information of the crane system, such as the transport speed of the crane system. [00021] In one embodiment, semiconductor machine library 1024 includes any device for processing semiconductor materials such as wafers. For example, in one embodiment, the semiconductor machine library 1024 includes processes for coating equipment, developing equipment, etching equipment, cleaning equipment, heat treatment equipment, measuring equipment, exposure equipment, storage equipment, and the like for wafers. Information, such as parameter settings for a specific process (including process recipes) and corresponding processing times. The semiconductor material transfer device and the semiconductor machine required for the production line can be found from the semiconductor material transfer device database 1022 and the semiconductor machine database 1024 through the editing interface 104 according to the needs of a production line. Then, the parameters are set and placed in the screen of the editing interface 104, such as the graphical interface shown in FIG. 2, to form a production line model. However, the present invention is not limited thereto, and in other embodiments, other The interface representation, such as the textual interface. In this embodiment, the base map of the editing interface 104 in FIG. 2 may have a plurality of grid lines in the X direction and the Y direction, and the grid lines in the X direction and the Y direction constitute a plurality of squares, wherein the The grid lines in the X direction are equidistant from each other, the distance is dY, and dY is multiplied by a specific ratio, which is the actual distance; the grid lines in the Y direction are also equidistant from each other, and the distance is dX, and dX is multiplied by the specific ratio. Actual distance. The user can edit the line model in the interface 104 based on the actual position and relative distance of each semiconductor machine in the production line. The time required for the wafer to be transported between different semiconductor machines is calculated correctly in the semiconductor machine capacity simulation system 100. [00023] After the user constructs and sets up the hardware including the semiconductor material transfer device database 1022 and the semiconductor machine database 1024, it is also necessary to set information about the schedule. In a semiconductor fab production line, wafer fabrication can be roughly divided into two phases: run time and queue time. The operation time refers to the time when the product is executed on the machine; in the semiconductor fab, it is the time when a wafer leaves the machine after entering the machine to the step of completing the execution. When the first batch of products is being implemented on a machine, the second batch of products to be implemented must wait before the first batch of products is completed, and the second batch of products can enter the machine to implement the step. This second batch of products waits for the last batch of products to complete the step, which is the standby time. Between each batch of products, because the semiconductor material transfer devices are often shared, it is usually impossible to perfectly connect, so the standby time also needs to wait for the time of waiting for the semiconductor material transfer device. [00024] The scheduling module database 1026 in FIG. 2 also belongs to one of the contents of the database 102. The scheduling module database 1026 includes a plurality of different scheduling modes, which can be flexibly set in a specific semiconductor material. When the transfer device corresponds to a specific semiconductor machine, for example, a general serial wafer pick-and-place, or a method for saving the time to extract the wafer in advance, or adding a semiconductor machine cleaning time in the schedule, or more The setting of continuous pick-and-place, overtaking, etc. of the same semiconductor machine. By selecting the appropriate schedule from the scheduling module library 1026, the standby time can be reduced. [00025] FIG. 3 is a schematic diagram of an embodiment of a computing unit 106 of the semiconductor machine capacity simulation system 100 of the present disclosure. The computing unit 106 of the semiconductor machine capacity simulation system 100 of FIG. 1 includes a dead-end prevention unit 1062 and a multi-thread execution unit 1026 in FIG. In one embodiment, the semiconductor material transfer device model and the semiconductor machine model required for the production line are respectively passed from the semiconductor material transfer device database 1022 and the semiconductor machine database 1024 through the editing interface 104. Now, the editing interface 104 can instantly transmit the line model set by the user to the dead knot prevention unit 1062 by setting the parameters, setting the parameters and selecting the appropriate schedule from the scheduling module database 1026. The dead knot prevention unit 1062 can perform preliminary verification on the line model on the line, and prompt the user if there is a situation in which a conflict or a predictable dead knot is apparent. In other embodiments, the dead knot prevention unit 1062 can also provide a user-optimized setting. The prompt timing of the dead knot prevention unit 1062 may also be when the user has completed setting the entire production line model instead of an instant prompt. [00026] After passing through the dead knot prevention unit 1062, and the user has completed the setup of the entire production line model, the multiple execution sequence execution unit 1064 can establish an independent for each semiconductor material transfer device and each semiconductor machine in the production line model. The execution order. For example, the editing interface 104 in FIG. 3 includes two semiconductor material transfer device models and a semiconductor machine model, and the execution sequence corresponds to the left semiconductor material transfer device model (for example, the first robot arm), and the execution sequence B corresponds to the middle. The semiconductor machine model (such as a wafer cassette carrier), the execution sequence C corresponds to the semiconductor material carrier device model on the right (for example, the second robot arm). Execution of the sequence A to C respectively performs independent simulations on the same time axis, solid arrows indicate running, and dashed arrows indicate communication between execution sequences. In this embodiment, the first robot arm corresponding to the execution of the sequence A starts at the time point B, and at the time point C, the wafer is transferred to the wafer cassette carrier corresponding to the execution sequence B, and the execution sequence corresponds to The second robot arm starts at time point A and waits until time point D to remove the wafer from the wafer cassette carrier. [00027] The multiple execution sequence execution unit 1064 in this embodiment can perform simulations at a higher speed than the actual operating speed of the semiconductor machine and the semiconductor material transfer device to save time, in some embodiments, multiple The simulation speed of the execution sequence execution unit 1064 may be 30 to 100 times the actual operation speed. In some embodiments, the multiple execution execution unit 1064 can assist the user in obtaining a method for improving the productivity of the production line model through a specific algorithm, or a method of reducing the cost without affecting the production capacity, for example, Change the schedule settings or change the configuration of the semiconductor machine and/or semiconductor material transfer device. [00028] FIG. 4 is a schematic diagram of an embodiment of a semiconductor machine capacity simulation system of the present disclosure applied to a Hybrid Bonding production line 400. The hybrid bonding line 400 is disposed by a user in the editing interface 104 of the semiconductor machine capacity simulation system 100 of the present disclosure, and includes a load port 402, a storage chamber 404, and a surface treatment machine 406. A cleaning tank 408, a pre-bonding processing machine 410, and an annealing processing machine 412. The mixing and joining production line 400 can be set in the atmosphere according to the user's setting, or can be set in a nitrogen environment; the user can directly use the carrier 402, the storage chamber 404, the surface treatment machine 406, the cleaning tank 408, Details of preset parameters, recipes, and the like of the pre-joining processing machine 410, the annealing processing machine 412, and the like can also be edited through the editing interface 104. The editing interface 104 can display the selected machine table and contour according to the actual scale, and can clearly see the area occupied by the machine and the relative position of each other. In some embodiments, the editing interface 104 can also display a more detailed appearance of the selected machine to enhance the user's understanding. For example, the perspective of the above view shows the actual appearance of the selected machine, but the present invention does not. This is limited to this. [00029] The carrier 402 is used to store a plurality of semiconductor wafers in a semiconductor manufacturing process, and has a door that can be automatically switched. As shown, the magazine 402 contains at least three Front Opening Unified Pods 402a-402c. The wafer transfer cassette 402a is used to store a plurality of first semiconductor wafers; the wafer transfer cassette 402b is used to store a plurality of second semiconductor wafers; and the wafer transfer cassette 402c is used to store the completed processing (that is, the first a plurality of third semiconductor wafer sets of the third semiconductor wafer set obtained by pre-bonding the semiconductor wafer and the second semiconductor wafer. The robot arm 403a is used to feed a plurality of first semiconductor wafers into the storage chamber 404 in a series manner, that is, to confirm that the storage chamber 404 is available before starting to feed the plurality of first semiconductor wafers into the storage chamber. In chamber 404, robotic arm 403b is used to feed a plurality of second semiconductor wafers into storage chamber 404 in a tandem manner. The storage chamber 404 can be a closed chamber having a positive pressure and filled with an inert gas. [00030] The robot arm 405 is used to sequentially feed the wafers in the storage chamber 404 into the surface treatment machine 406, and the robot arm 405 advances a first semiconductor wafer and a piece from the storage chamber 404 in advance. The second semiconductor wafer, when the surface processing machine 406 is available, will feed the two semiconductor wafers at a time. In this embodiment, the surface processing machine 406 performs plasma activation of the first semiconductor wafer and the second semiconductor wafer by plasma, for example, using a gas containing hydrogen to generate a plasma. , but not limited to this. [00031] The robot arm 407 is used to feed the wafers that have been surface-activated in the surface treatment machine 406 into the cleaning tank 408 in a series manner, and the cleaning tank 408 can wash away impurities on the semiconductor wafer. The robot arm 409 feeds the cleaned semiconductor wafer into the pre-bonding processing machine 410 to bond the first semiconductor wafer and the second semiconductor wafer to obtain the third semiconductor wafer set, in an embodiment. The pre-joining processor stage 410 is operated in a pressure of about 30 MPa or less and a nitrogen-filled environment of about 100 to 500 degrees Celsius. The robot arm 411 transfers the bonded third semiconductor wafer set to the annealing machine stage 412, for example, annealing at a temperature of about 300 to 400 degrees Celsius, and is sent back by the robot arm 411 after the annealing process is completed. The wafer transfer cassette 402c of the cassette 402 is stored. [00032] Some embodiments of the present disclosure provide a semiconductor device capacity simulation method, including: separately obtaining process information of a plurality of semiconductor devices; respectively obtaining specification information of a plurality of semiconductor material transfer devices; and from the semiconductor devices And selecting a part of each of the semiconductor material transfer devices to establish a production line model; and using a process information and specification information corresponding to the selected semiconductor machine and the semiconductor material transfer devices to be used in a processor The simulation of the production line model was carried out. [00033] Some embodiments of the present disclosure provide a semiconductor machine capacity simulation method, including: respectively obtaining a process recipe operation time of a plurality of semiconductor machines of a production line; respectively obtaining specifications of a plurality of semiconductor material transfer devices of the production line Information; and performing simulation of the production line on a processor according to process schedule and specification information of the process recipes corresponding to the semiconductor machine and the semiconductor material transfer devices. [00034] Some embodiments of the present disclosure provide a semiconductor machine capacity simulation system, including: a database including a plurality of semiconductor machine models and a plurality of semiconductor material transfer device models, wherein the semiconductor machine models include processes Information, the semiconductor material transfer device model includes specification information; an editing interface for allowing a user to separately select from the semiconductor machine models and the semiconductor material transfer device models in the database according to requirements Selecting a portion to create a production line model: and a computing unit for calling the semiconductor machine models and the semiconductor material transfer device models in the database according to the production line model in the editing interface Simulation of the production line model. [00035] The foregoing has outlined the features of some embodiments, and those skilled in the art can understand the various aspects of the disclosure. Those skilled in the art will appreciate that the present disclosure can be readily utilized as a basis for designing or modifying other processes and structures to achieve the same objectives and/or the same advantages as the embodiments described herein. A person skilled in the art should understand that the present invention is not limited to the spirit and scope of the disclosure, and those skilled in the art can make various changes, substitutions and substitutions without departing from the spirit and scope of the disclosure.

100‧‧‧Semiconductor machine capacity simulation system

102‧‧‧Database

104‧‧‧Editing interface

106‧‧‧Computation unit

1022‧‧‧Semiconductor Material Transfer Device Database

1024‧‧‧Semiconductor machine database

1026‧‧‧ Scheduling Module Database

1062‧‧‧ Dead knot prevention unit

400‧‧‧Mixed joint production line

402‧‧‧ contained

402a‧‧‧ wafer transfer box

402b‧‧‧ wafer transfer box

402c‧‧‧ wafer transfer box

403a‧‧‧Machine arm

403b‧‧‧Machine arm

405‧‧‧Machine arm

407‧‧‧Machine arm

409‧‧‧Machine arm

411‧‧‧Machine arm

413‧‧‧Machine arm

404‧‧‧Storage chamber

406‧‧‧ surface treatment machine

408‧‧‧cleaning tank

410‧‧‧Pre-joining machine

412‧‧‧ Annealing machine

In order to assist the reader to achieve the best understanding, it is recommended to refer to the attached figure and its detailed text description when reading this disclosure. Please note that in order to comply with industry standards, the drawings in this patent specification are not necessarily drawn to the correct scale. In some drawings, the dimensions may be deliberately enlarged or reduced to assist the reader in understanding the discussion.

1 is a schematic diagram of an embodiment of a semiconductor machine capacity simulation system according to the present disclosure; [00010] FIG. 2 is a schematic diagram of a data library and an editing interface of a semiconductor machine capacity simulation system according to the present disclosure; [00011] 3 is a schematic diagram of an embodiment of a computing unit of a semiconductor machine capacity simulation system according to the present disclosure; and [00012] FIG. 4 is a schematic diagram of an embodiment of a semiconductor machine capacity simulation system applied to a hybrid bonding production line. .

(no)

Claims (10)

A semiconductor machine capacity simulation method includes: separately obtaining process information of a plurality of semiconductor machines; respectively obtaining specification information of a plurality of semiconductor material transfer devices; respectively, from the semiconductor devices and the semiconductor material transfer devices A part of the selection is made to establish a production line model; and the simulation of the production line model is performed on a processor by using the selected semiconductor machine and the process information and specification information corresponding to the semiconductor material transfer devices. The method of claim 1, wherein the simulation of the production line model is performed on the processor by using the selected semiconductor machine and the process information and specification information corresponding to the semiconductor material transfer devices. : setting schedule information between the semiconductor devices and the semiconductor material transfer devices; and processing information corresponding to the selected semiconductor devices and the semiconductor material transfer devices according to the schedule information And specification information to simulate the line model on the processor. The method of claim 2, further comprising: using the processor to change the line model to obtain another line model having a higher capacity than the line model. The method of claim 1, wherein performing the simulation of the line model on the processor comprises: performing simulation of the line model on the processor in a time-reduced manner. The method of claim 1, wherein the simulation of the production line model is performed on the processor by using the selected semiconductor machine and the process information and specification information corresponding to the semiconductor material transfer devices. And using the selected semiconductor machine and the process information and specification information corresponding to the semiconductor material transfer devices to detect whether the production line model has a deadlock on the processor. A semiconductor machine capacity simulation method includes: obtaining process recipe operation time of a plurality of semiconductor machines of a production line respectively; obtaining specification information of a plurality of semiconductor material transfer devices of the production line respectively; and according to the semiconductor machines and The process recipe and specification information corresponding to the process recipes of the semiconductor material transfer devices are used to simulate the production line on a processor. The method of claim 6, wherein the simulation of the production line on the processor according to the process schedule and specification information of the semiconductor machine and the semiconductor material transfer device includes: The processing time and specification information of the process recipes corresponding to the semiconductor devices and the semiconductor material transfer devices are used to detect whether the production line will be dead on the processor. The method of claim 6, wherein the simulation of the production line on the processor according to the process schedule and specification information of the semiconductor machine and the semiconductor material transfer device includes: The semiconductor package and the process recipe and specification information corresponding to the semiconductor material transfer devices are used to optimize the production line on the processor. A semiconductor machine capacity simulation system includes: a database comprising a plurality of semiconductor machine models and a plurality of semiconductor material transfer device models, wherein the semiconductor machine models include process information, and the semiconductor material transfer device models Include specification information; an editing interface for allowing a user to select a part of the semiconductor machine model and the semiconductor material transfer device models in the database to establish a production line model as needed: The computing unit is configured to call the semiconductor machine models and the semiconductor material transfer device models in the database according to the production line model in the editing interface to perform simulation of the production line model. The system of claim 9, wherein the calculating unit comprises: a dead knot preventing unit for analyzing whether the line model established by the user is dead knot; and a calculating unit for using the user unit The selected semiconductor machine model and the process information and specification information corresponding to the semiconductor material transfer device models are used to perform double speed simulation on the production line model.