TW201821813A - Resistivity measuring method - Google Patents

Resistivity measuring method Download PDF

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TW201821813A
TW201821813A TW106140021A TW106140021A TW201821813A TW 201821813 A TW201821813 A TW 201821813A TW 106140021 A TW106140021 A TW 106140021A TW 106140021 A TW106140021 A TW 106140021A TW 201821813 A TW201821813 A TW 201821813A
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resistivity
mercury
single crystal
semiconductor single
crystal wafer
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TW106140021A
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TWI693411B (en
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久米史高
船木光義
樫野久壽
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日商信越半導體股份有限公司
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant

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  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Abstract

The present invention provides a resistivity measuring method comprising: a mercury electrode forming step of forming a mercury electrode by bringing mercury into contact with a semiconductor single crystalline wafer; a forward bias voltage application step of applying a forward bias voltage to the mercury electrode; a C-V measuring step of applying a reverse bias voltage to the mercury electrode, and measuring a varying capacitance of the semiconductor single crystalline wafer; and a resistivity computing step of computing a resistivity on the basis of a relationship between the reverse bias voltage and the capacitance. In this way, a resistivity measuring method using a C-V technique is provided by which the resistivity of a semiconductor single crystalline wafer can be more reliably measured.

Description

電阻率測定方法Resistivity measurement method

本發明係關於一種電阻率測定方法,更詳細來說,係關於一種根據C-V法的電阻率測定方法。The present invention relates to a resistivity measurement method, and more specifically, to a resistivity measurement method according to the C-V method.

習知上,使用水銀作為電極的C-V(capacitance - voltage)法以測定電阻率的方法係廣為人知。使用水銀作為電極的C-V法中,係使水銀電極接觸矽磊晶層等半導體單晶晶圓的表面而形成蕭特基能障,且藉由使逆向偏壓從譬如1V連續變化並同時施加至水銀電極,而於半導體單晶晶圓的內部擴大空乏層而使其容量改變。Conventionally, a C-V (capacitance-voltage) method using mercury as an electrode to measure resistivity is widely known. In the CV method using mercury as an electrode, a Schottky barrier is formed by contacting a mercury electrode with a surface of a semiconductor single crystal wafer such as a silicon epitaxial layer, and a reverse bias voltage is continuously changed from, for example, 1V and simultaneously applied to Mercury electrodes expand the empty layer inside the semiconductor single crystal wafer to change its capacity.

然後,再從逆向偏壓與容量的關係算出所欲深度中的摻雜物濃度,此外更使用ASTM STANDARDS F723等換算式,將摻雜物濃度換算成電阻率。以下,將使用ASTM STANDARDS F723換算式摻雜物濃度換算成電阻率一事略稱為ASTM換算。Then, the dopant concentration in the desired depth is calculated from the relationship between the reverse bias and the capacity. In addition, a conversion formula such as ASTM STANDARDS F723 is used to convert the dopant concentration into resistivity. Hereinafter, conversion of the dopant concentration into the resistivity using the ASTM STANDARDS F723 conversion type is abbreviated as ASTM conversion.

使用水銀電極重複測定半導體單晶晶圓的電氣特性時,為了獲得重現性提升的電氣特性,而將水銀堆或水銀導管接地,以去除水銀移動時產生的靜電,已揭露於專利文獻1。 [先前技術文獻] [專利文獻]When a mercury single electrode is used to repeatedly measure the electrical characteristics of a semiconductor single crystal wafer, in order to obtain electrical characteristics with improved reproducibility, a mercury stack or a mercury conduit is grounded to remove static electricity generated during the movement of mercury. [Prior Art Literature] [Patent Literature]

[專利文獻1]日本特開2015-99833號公報[Patent Document 1] Japanese Patent Laid-Open No. 2015-99833

[發明所欲解決之問題] 例如,根據使用水銀作為電極的C-V法的電阻率測定方法中,為了於平時管理該電阻率測定裝置、或是為了再次測定製品保證用的電阻率,只要於半導體單晶晶圓之主表面的相同位置連續測定複數次,則電阻率便會有逐漸降低、或逐漸提高的傾向。[Problems to be Solved by the Invention] For example, in the resistivity measurement method of the CV method using mercury as an electrode, in order to manage the resistivity measurement device at ordinary times or to measure the resistivity for product reassurance, it is only required for semiconductor The continuous measurement of the same position on the main surface of a single crystal wafer is repeated several times, and the resistivity tends to gradually decrease or gradually increase.

本發明係為解決上述課題所催生之物,目的在於提供一種根據C-V法的電阻率測定方法,該方法能夠更確實地測定半導體單晶晶圓的電阻率。 [解決問題之技術手段]The present invention has been made to solve the above-mentioned problems, and an object thereof is to provide a resistivity measurement method based on the C-V method, which can more accurately measure the resistivity of a semiconductor single crystal wafer. [Technical means to solve problems]

為了達成上述目的,本發明提供一種電阻率測定方法,包含:水銀電極形成步驟,係使水銀接觸半導體單晶晶圓而成為水銀電極;順向偏壓施加步驟,係於該水銀電極施加順向偏壓;C-V測定步驟,係於該水銀電極施加逆向偏壓並測定因而變化的該半導體單晶晶圓的容量;以及電阻率演算步驟,係自該逆向偏壓與該容量的關係而演算電阻率。 另外,本發明中所謂的順向偏壓,意指在形成蕭特基能障的半導體單晶晶圓與水銀電極之間,沿電流流動的方向施加電壓。In order to achieve the above object, the present invention provides a method for measuring resistivity, including: a mercury electrode forming step, which is a method in which mercury is brought into contact with a semiconductor single crystal wafer to become a mercury electrode; a forward bias applying step is applied to the mercury electrode to apply forward Bias voltage; CV measurement step is to apply a reverse bias voltage to the mercury electrode and measure the capacity of the semiconductor single crystal wafer that changes accordingly; and resistivity calculation step is to calculate the resistance from the relationship between the reverse bias voltage and the capacity rate. In addition, the so-called forward bias in the present invention means that a voltage is applied between a semiconductor single crystal wafer forming a Schottky barrier and a mercury electrode in a direction in which a current flows.

藉此,水銀電極與半導體單晶晶圓之間累積的電荷便會由於因順向偏壓所供給的逆向電荷而被抵銷消滅,因而能更確實且高精度地測定電阻率,並能實行重現性良好的電阻率測定。As a result, the electric charge accumulated between the mercury electrode and the semiconductor single crystal wafer is eliminated and eliminated due to the reverse electric charge supplied by the forward bias, so that the resistivity can be measured more accurately and accurately, and can be implemented. Resistivity measurement with good reproducibility.

此時該順向偏壓的施加量,以該半導體單晶晶圓的電阻率越低則設為越大為佳。At this time, the applied amount of the forward bias is preferably set to be larger as the resistivity of the semiconductor single crystal wafer is lower.

由於電阻率越低則不純物濃度便越高,且半導體單晶晶圓與水銀電極之間容易累積電荷,因此只要如上述般調整順向偏壓的施加量,便能實行重現性更好的電阻率測定。The lower the resistivity, the higher the impurity concentration, and the easier it is to accumulate charge between the semiconductor single crystal wafer and the mercury electrode. Therefore, as long as the amount of forward bias is adjusted, the reproducibility can be improved. Resistivity measurement.

根據本發明的電阻率測定方法,由於能夠將連續複數次C-V測定半導體單晶晶圓時明顯化之電阻率逐漸降低或逐漸提高的傾向予以減輕,因而能更確實地測定半導體單晶晶圓的電阻率。According to the resistivity measurement method of the present invention, since the tendency to gradually reduce or increase the resistivity that is apparent when a semiconductor single crystal wafer is measured by a plurality of consecutive CVs is reduced, the semiconductor single crystal wafer can be measured more reliably. Resistivity.

以下將基於圖式說明本發明的實施型態。圖1係呈現本發明之電阻率測定方法的一範例的步驟示意圖,且代表本發明依照水銀電極形成步驟(步驟a)、順向偏壓施加步驟(步驟b)、C-V測定步驟(步驟c)、以及電阻率演算步驟(步驟d)的順序進行。Hereinafter, embodiments of the present invention will be described based on the drawings. FIG. 1 is a schematic diagram showing an example of the resistivity measurement method of the present invention, and represents the present invention in accordance with a mercury electrode formation step (step a), a forward bias application step (step b), and a CV measurement step (step c). And the resistivity calculation step (step d).

圖2係呈現本發明之電阻率測定方法所使用的C-V法測定裝置的一範例的水銀探針10的示意圖。在作為半導體單晶晶圓1例如於單晶矽基板上形成矽磊晶層而成的磊晶矽晶圓的主表面,將收納於收納容器12、13的水銀31、32自下方朝上導引的同時使其接觸,而成為水銀電極33、34,並予以C-V測定而求取電阻率。作為矽以外的半導體單晶晶圓1,能應用於GaP、GaN、SiC等化合物半導體單晶晶圓的電阻率測定。FIG. 2 is a schematic diagram of a mercury probe 10 showing an example of a C-V method measurement device used in the resistivity measurement method of the present invention. On the main surface of an epitaxial silicon wafer formed as a semiconductor single crystal wafer 1 by forming a silicon epitaxial layer on a single crystal silicon substrate, for example, mercury 31 and 32 stored in the storage containers 12 and 13 are guided upward from below. They were brought into contact with each other at the same time, and became mercury electrodes 33 and 34. The CV measurement was performed to obtain the resistivity. As a semiconductor single crystal wafer 1 other than silicon, it can be applied to resistivity measurement of compound semiconductor single crystal wafers such as GaP, GaN, and SiC.

圖2所示的水銀探針10中,半導體單晶晶圓1,將被測定的該主表面朝下而支承於工件台11,並承載於水銀電極33、34的上方。進行C-V測定求取電阻率時,收納於收納容器12、13的水銀31、32藉由通過導管15、16內部上升並接觸半導體單晶晶圓1的主表面,形成蕭特基能障而成為水銀電極33、34。相對於在水銀電極34施加有逆向偏壓V,水銀電極33則接地61。In the mercury probe 10 shown in FIG. 2, the semiconductor single crystal wafer 1 is supported on the work table 11 with the main surface to be measured downward, and is carried above the mercury electrodes 33 and 34. When the CV measurement is performed to obtain the resistivity, the mercury 31 and 32 stored in the storage containers 12 and 13 rise through the inside of the conduits 15 and 16 and contact the main surface of the semiconductor single crystal wafer 1 to form a Schottky barrier. Mercury electrodes 33,34. The mercury electrode 33 is grounded 61 with a reverse bias voltage V applied to the mercury electrode 34.

作為電極所使用的水銀31、32每當接觸半導體單晶晶圓1時受到附著於該半導體單晶晶圓1之主表面的粒子所汙染,則水銀31、32的電阻便會逐漸提高,而對電氣特性的測定造成不好的影響。為了防止此事,便使接觸過半導體單晶晶圓1的水銀31、32暫時回到收納容器12、13,而在使水銀31、32整體起泡攪拌淨化後再供給水銀31、32於電極用。When the mercury 31, 32 used as an electrode is contaminated by particles attached to the main surface of the semiconductor single crystal wafer 1 whenever it contacts the semiconductor single crystal wafer 1, the resistance of the mercury 31, 32 will gradually increase, and It adversely affects the measurement of electrical characteristics. In order to prevent this, the mercury 31, 32 that has been in contact with the semiconductor single crystal wafer 1 is temporarily returned to the storage containers 12, 13, and the mercury 31, 32 is bubbled, stirred and purified as a whole, and then the mercury 31, 32 is supplied to the electrodes. use.

進行此起泡攪拌時,水銀31、32會與收納容器12、13的內壁摩擦而產生靜電。收納容器12、13若為例如聚碳酸酯製的情況,則會帶電成-(負)極。相對於此,水銀31、32會帶電成+(正)極。When this foaming and stirring is performed, the mercury 31 and 32 rub against the inner walls of the storage containers 12 and 13 to generate static electricity. When the storage containers 12 and 13 are made of polycarbonate, for example, they are charged to a minus (negative) pole. In contrast, mercury 31, 32 will be charged to the + (positive) pole.

再者,水銀31、32通過導管15、16內部上升時,水銀31、32會與導管15、16的內壁摩擦而產生靜電。若導管15、16為如鐵氟龍(註冊商標)製的情況,則會帶電成-(負)極。相對於此,水銀31、32會帶電成+(正)極。In addition, when the mercury 31, 32 rises through the inside of the ducts 15, 16, the mercury 31, 32 rubs against the inner walls of the ducts 15, 16 to generate static electricity. If the catheters 15 and 16 are made of Teflon (registered trademark), they will be charged into minus (negative) poles. In contrast, mercury 31, 32 will be charged to the + (positive) pole.

因此,收納容器12、13透過覆蓋該收納容器12、13的導電性橡膠墊片41、42與接地線52、54連接。再者,導管15、16透過覆蓋該導管15、16的導電性橡膠墊片43、44與接地線51、53連接。導電性橡膠墊片41、42、43及44中,由於有例如碳纖維或銀等導電性材料配合而為0.008Ω・cm左右的低電阻率,因此能輕易吸收在收納容器12、13或導管15、16產生的靜電,而使其逃至接地62、63的接地線51、52、53及54。Therefore, the storage containers 12 and 13 are connected to the ground wires 52 and 54 through the conductive rubber pads 41 and 42 covering the storage containers 12 and 13. The ducts 15 and 16 are connected to the ground wires 51 and 53 through conductive rubber gaskets 43 and 44 covering the ducts 15 and 16. The conductive rubber gaskets 41, 42, 43, and 44 have a low resistivity of about 0.008 Ω ・ cm due to the combination of conductive materials such as carbon fiber or silver, so they can be easily absorbed in the storage containers 12, 13, or the duct 15. The static electricity generated by, 16 causes it to escape to the ground lines 51, 52, 53 and 54 of the ground 62, 63.

圖3所示之測定電阻率用的C-V特性測定系統100,包括:一水銀探針130(圖2的水銀探針10),係作為電極使水銀31、32接觸半導體單晶晶圓1;一LCR測量儀140,係藉由透過連結於該水銀探針130的測定導線161、162提供高頻波,並在施加順向偏壓之後,於半導體單晶晶圓1施加逆向偏壓而使空乏層形成的同時測量該空乏層的容量;一分析軟體,安裝於藉由GPIB(General Purpose Interface Bus)傳輸線163連接至該LCR測量儀140的PC(個人電腦)150,係根據逆向偏壓及空乏層的容量而計算出電阻率。The CV characteristic measurement system 100 for measuring resistivity shown in FIG. 3 includes: a mercury probe 130 (the mercury probe 10 in FIG. 2), which is used as an electrode to allow mercury 31 and 32 to contact the semiconductor single crystal wafer 1; The LCR measuring instrument 140 provides high-frequency waves through measurement leads 161 and 162 connected to the mercury probe 130, and after applying a forward bias, a reverse bias is applied to the semiconductor single crystal wafer 1 to form an empty layer. While measuring the capacity of the empty layer; an analysis software installed on a PC (personal computer) 150 connected to the LCR meter 140 via a GPIB (General Purpose Interface Bus) transmission line 163, based on the reverse bias and the empty layer Capacity to calculate resistivity.

測定半導體單晶晶圓1的電阻率時,使用LCR測量儀140而使逆向偏壓V連續變化並同時施加至與承載於水銀探針130內的半導體單晶晶圓1形成蕭特基能障的水銀電極34,而於半導體單晶晶圓1的內部擴大空乏層而使容量C改變的同時,藉由LCR測量儀140測量該容量C。然後再使用安裝於PC 150的分析軟體,根據逆向偏壓V與空乏層之容量C的關係而計算出電阻率。When measuring the resistivity of the semiconductor single crystal wafer 1, the LCR meter 140 is used to continuously change the reverse bias voltage V and simultaneously apply the reverse bias voltage V to form a Schottky barrier with the semiconductor single crystal wafer 1 carried in the mercury probe 130. The mercury electrode 34 on the inside of the semiconductor single crystal wafer 1 expands the empty layer to change the capacity C, and the capacity C is measured by the LCR meter 140. Then, using the analysis software installed on the PC 150, the resistivity was calculated based on the relationship between the reverse bias voltage V and the capacity C of the empty layer.

只要使用與圖2同樣的水銀探針10,並根據習知方法,重複測定作為半導體單晶晶圓1的例如在單晶矽基板上形成之P型矽磊晶層的電阻率(在相同位置重複C-V測定,而求取電阻率),則如圖4所示,有著電阻率逐漸降低的傾向。再者,只要重複測定N型矽磊晶層的電阻率,則便如圖5所示,會有著電阻率逐漸提高的傾向。可以想見,這是由於每當重複電阻率測定,即每當施加逆向偏壓V時,水銀探針10的水銀電極34與半導體單晶晶圓1之間電荷逐漸累積之故。As long as a mercury probe 10 similar to that in FIG. 2 is used, and according to a conventional method, the resistivity of a P-type silicon epitaxial layer formed on a single crystal silicon substrate as a semiconductor single crystal wafer 1 is repeatedly measured (at the same position). The CV measurement is repeated to obtain the resistivity), as shown in FIG. 4, the resistivity tends to gradually decrease. Furthermore, as long as the resistivity of the N-type epitaxial layer is repeatedly measured, as shown in FIG. 5, the resistivity tends to gradually increase. It is conceivable that this is because whenever the resistivity measurement is repeated, that is, whenever the reverse bias voltage V is applied, the charge between the mercury electrode 34 of the mercury probe 10 and the semiconductor single crystal wafer 1 gradually accumulates.

因此,本發明中,係藉由施加順向偏壓,而去除施加逆向偏壓V時累積在水銀電極34與半導體單晶晶圓1之間的電荷。施加順向偏壓的時機,可在施加逆向偏壓V之前或之後。使水銀電極接觸半導體單晶晶圓並在相同位置重複進行C-V測定時,將施加順向偏壓的時機設定為逆向偏壓V的施加後,意指將施加順向偏壓的時機設定為下一次逆向偏壓V的施加前。是此,施加逆向偏壓V並進行C-V測定步驟而一時累積在水銀電極與晶圓之間的電荷,便能藉由之後的順向偏壓施加步驟而予以去除。並且,由於會進行下一次的C-V測定,便能防止如習知方法般因電荷累積而電阻率漸增、漸減之現象。Therefore, in the present invention, the charge accumulated between the mercury electrode 34 and the semiconductor single crystal wafer 1 when the reverse bias V is applied is removed by applying a forward bias. The timing of applying the forward bias may be before or after the reverse bias V is applied. When the mercury electrode is brought into contact with the semiconductor single crystal wafer and the CV measurement is repeated at the same position, the timing of applying the forward bias is set to the application of the reverse bias V, which means that the timing of applying the forward bias is set to Before the reverse bias V is applied once. For this reason, the reverse bias voltage V is applied and the C-V measurement step is performed, and the electric charge accumulated between the mercury electrode and the wafer at one time can be removed by the subsequent forward bias application step. In addition, since the next C-V measurement is performed, it is possible to prevent the resistivity from gradually increasing and decreasing due to charge accumulation as in the conventional method.

在圖6,例示了重複測定P型矽磊晶層的電阻率時,不施加(習知方法)及施加(本發明)順向偏壓時的電阻率變動。圖6的例子中,係藉由在使順向偏壓從-1V至-18V以1V的間隔增加絕對值並同時予以施加後,再使逆向偏壓V從+1V至+15V以1V間隔增加並同時予以施加,而進行電阻率測定。相對於不施加順向偏壓時電阻率逐漸降低的情形,只要施加順向偏壓,則電阻率便能幾乎維持一定。但是順向偏壓的施加方法,沒有必要一定得逐漸增加絕對值至所欲電壓,例如,施加一定的電壓作為順向電壓亦可。In FIG. 6, when the resistivity of the P-type silicon epitaxial layer is repeatedly measured, the resistivity variation when the forward bias voltage is not applied (known method) and when the present invention is applied (the present invention) is exemplified. In the example of FIG. 6, the reverse bias voltage V is increased from + 1V to + 15V at 1V intervals after the absolute value of the forward bias voltage is increased from -1V to -18V at 1V intervals. At the same time, the resistivity was measured by applying it at the same time. In contrast to the case where the resistivity gradually decreases when no forward bias is applied, as long as the forward bias is applied, the resistivity can be maintained almost constant. However, it is not necessary to gradually increase the absolute value of the forward bias voltage to the desired voltage. For example, a certain voltage may be applied as the forward voltage.

施加的順向偏壓的施加量,以該半導體單晶晶圓1的電阻率越低則設為越大為佳。作為其範例,圖7(a)中呈現P型矽磊晶層之電阻率與順向偏壓的關係,圖7(b)中呈現了N型矽磊晶層之電阻率與順向偏壓的關係。但是,無論順向偏壓的施加量較根據圖7(a)、圖7(b)之關係而求得的值要小,又或是無關乎電阻率而為一定值,皆能將在相同位置之重複C-V測定時的電阻率逐漸提高(或者降低)的傾向予以抑制。The amount of forward bias applied is preferably set to be larger as the resistivity of the semiconductor single crystal wafer 1 is lower. As an example, the relationship between the resistivity and forward bias of the P-type silicon epitaxial layer is shown in FIG. 7 (a), and the resistivity and forward bias of the N-type silicon epitaxial layer is shown in FIG. 7 (b). Relationship. However, whether the applied amount of forward bias is smaller than the value obtained according to the relationship of Fig. 7 (a) and Fig. 7 (b), or it is a certain value regardless of the resistivity, it can be the same. The tendency of the resistivity to gradually increase (or decrease) during repeated CV measurement of the position is suppressed.

更具體而言,半導體單晶晶圓1若為P型時則將負(-)電壓,若為N型時則將正(+)電壓作為順向偏壓而施加至使半導體單晶晶圓1與水銀32接觸而形成蕭特基能障的水銀電極34[圖8(1)]More specifically, if the semiconductor single crystal wafer 1 is a P-type, a negative (-) voltage is applied, and if it is an N-type, a positive (+) voltage is applied as a forward bias to the semiconductor single crystal wafer 1. 1 A mercury electrode 34 that forms a Schottky barrier by contacting it with mercury 32 [Fig. 8 (1)]

如此一來,殘留在水銀電極34與半導體單晶晶圓1之間的電荷便會由於因順向電壓所供給之相反的電荷而被抵銷消滅,因而能使半導體單晶晶圓1內所形成之空乏層35的厚度回歸正常水平[圖8(2)]。由於在此狀態下只要於水銀電極34施加逆向偏壓,則正常水平厚度的空乏層35便會形成[圖8(3)],因此進行過在相同位置之重複C-V測定時的電阻率在N型時為上升、P型時為下降的傾向皆受到改善。In this way, the charge remaining between the mercury electrode 34 and the semiconductor single crystal wafer 1 will be eliminated and eliminated due to the opposite charge supplied by the forward voltage, so that the semiconductor single crystal wafer 1 can be stored in the semiconductor single crystal wafer 1. The thickness of the formed empty layer 35 returned to a normal level [Fig. 8 (2)]. In this state, as long as a reverse bias is applied to the mercury electrode 34, an empty layer 35 with a normal horizontal thickness will be formed [Fig. 8 (3)]. Therefore, the resistivity when the CV measurement is repeated at the same position is N. Both the tendency to rise in the pattern and the decline in the P-type are improved.

半導體單晶晶圓1由於電阻率越低則不純物濃度便越高,而在接觸半導體單晶晶圓1的水銀電極34也容易殘留許多電荷。因此,以半導體單晶晶圓1的電阻率越低,順向偏壓的施加量設為越大為佳。Since the semiconductor single crystal wafer 1 has a lower resistivity, the impurity concentration increases, and a mercury electrode 34 in contact with the semiconductor single crystal wafer 1 also tends to leave a lot of electric charge. Therefore, the lower the resistivity of the semiconductor single crystal wafer 1, the larger the amount of forward bias applied is preferably set.

如上述,在本發明中,首先,使用如圖2、3所示的裝置,使水銀接觸半導體晶圓而形成水銀電極(水銀電極形成步驟)(步驟a)。並且,對半導體單晶晶圓1的順向偏壓施加步驟(步驟b)結束後,使用LCR測量儀140而使逆向偏壓V連續變化並同時施加至水銀電極34,而於半導體單晶晶圓1的內部擴大空乏層而使容量C改變的同時,藉由LCR測量儀140進行C-V測定步驟(步驟c)。相同位置的重複測定時,亦可在C-V測定步驟(步驟c)之後進行順向偏壓施加步驟(步驟b)。此時,如上述之在C-V測定步驟(步驟c)之後進行順向偏壓施加步驟(步驟b),意指在相同位置的下一次C-V測定步驟(步驟c)之前進行順向偏壓施加步驟(步驟b)。As described above, in the present invention, first, using a device as shown in FIGS. 2 and 3, contact a mercury with a semiconductor wafer to form a mercury electrode (a mercury electrode forming step) (step a). In addition, after the step of applying a forward bias to the semiconductor single crystal wafer 1 (step b), the LCR measuring instrument 140 is used to continuously change the reverse bias V and simultaneously apply it to the mercury electrode 34. While the empty layer is enlarged inside the circle 1 to change the capacity C, the CV measurement step is performed by the LCR meter 140 (step c). When repeating the measurement at the same position, a forward bias application step (step b) may be performed after the C-V measurement step (step c). At this time, as described above, the forward bias applying step (step b) is performed after the CV measuring step (step c), which means that the forward bias applying step is performed before the next CV measuring step (step c) at the same position. (Step b).

接著,使用安裝於PC 150的分析軟體,進行根據逆向偏壓V與空乏層之容量C的關係而演算電阻率的電阻率演算步驟(步驟d)。此時,只要將逆向偏壓V與容量C的關係繪製成圖表,便能獲得C-V特性。此外,由於只要將逆向偏壓與容量代入如下記之(1)式及(2)式,便能計算出半導體單晶晶圓1內的深度W以及深度W中的摻雜物濃度N(W),因此能獲得深度方向中的摻雜物濃度的分布。 【數學式1】 W=Aε0 εSi /C 【數學式2】 N(W)=2/(qε0 εSi A2 )×{d(C-2 )/dV}-1 其中,A為電極面積,ε0 為真空電容率,εSi 為Si的相對電容率,q為電子的電荷量。Next, using the analysis software installed on the PC 150, a resistivity calculation step (step d) of calculating the resistivity based on the relationship between the reverse bias voltage V and the capacity C of the empty layer is performed. At this time, as long as the relationship between the reverse bias voltage V and the capacity C is plotted, a CV characteristic can be obtained. In addition, as long as the reverse bias voltage and capacity are substituted into the following equations (1) and (2), the depth W in the semiconductor single crystal wafer 1 and the dopant concentration N (W in the depth W) can be calculated. ), So that the distribution of the dopant concentration in the depth direction can be obtained. [Mathematical formula 1] W = Aε 0 ε Si / C [Mathematical formula 2] N (W) = 2 / (qε 0 ε Si A 2 ) × {d (C -2 ) / dV} -1 where A is The electrode area, ε 0 is the vacuum permittivity, ε Si is the relative permittivity of Si, and q is the charge of the electron.

並且,在深度方向中的摻雜物濃度的分布之中,只要指定測定深度,即能獲得該深度中的摻雜物濃度。再者,將所獲得的摻雜物濃度根據ASTM STANDARDS F723等換算式換算,便能將摻雜物濃度換算成電阻率。若為如上述之本發明,即能抑制習知方法中尤其是重複C-V測定時,半導體晶圓與水銀電極之間因電荷累積而電阻率漸增、漸減之現象,而更確實且高重現性、高精度地求取電阻率。In addition, in the distribution of the dopant concentration in the depth direction, as long as the measurement depth is specified, the dopant concentration in the depth can be obtained. Furthermore, by converting the obtained dopant concentration according to a conversion formula such as ASTM STANDARDS F723, the dopant concentration can be converted into resistivity. According to the present invention as described above, it is possible to suppress the phenomenon that the resistivity gradually increases and decreases due to the accumulation of charge between the semiconductor wafer and the mercury electrode in the conventional method, especially when the CV measurement is repeated, and it is more reliable and highly reproducible. Calculate resistivity with high accuracy and accuracy.

另外,無論是在相同位置進行水銀電極的形成、C-V測定、電阻率演算後再度從水銀電極的形成開始重新重複的情況,或是進行水銀電極的形成後持續維持水銀電極並於相同位置重複C-V測定的情況,電荷都會逐漸累積,因此本發明對哪一種情況都有效。 更具體地說明重複的情況。 例如,可在相同位置重複圖1的(步驟a)~(步驟d)。亦即,可使水銀接觸晶圓的主表面而形成蕭特基能障,且依序進行順向偏壓施加、逆向偏壓施加、演算電阻率,之後再使水銀自晶圓主表面脫離,且為了下一次的測定,於相同位置再度使水銀接觸晶圓的主表面並重複上述流程[參照圖1的箭頭(1)]。 再者,亦能進行(步驟a)後,便直接就這麼在相同位置重複(步驟b)、(步驟c)及(步驟d)。亦即,可在形成有蕭特基能障的狀態下,重複進行順向偏壓施加、逆向偏壓施加及電阻率演算[參照圖1的箭頭(2)]。 除此之外,亦能進行(步驟a)後,便直接就這麼在相同位置重複(步驟b)及(步驟c),之後再進行(步驟d)。亦即,亦能在形成了蕭特基能障後,直接就這麼重複進行順向偏壓施加及逆向偏壓施加,最後再一起進行電阻率演算[參照圖1的箭頭(3)]。 無論何者,皆能抑制電荷累積所導致之電阻率的漸增及漸減並予以測定。 [實施例]In addition, whether the mercury electrode formation, CV measurement, and resistivity calculation are performed again at the same location, or the mercury electrode formation is continued and the mercury electrode is continuously maintained and the CV is repeated at the same location. In the case of measurement, the electric charge is gradually accumulated, so the present invention is effective in any case. The case of duplication will be described more specifically. For example, (step a) to (d) of FIG. 1 may be repeated at the same position. That is, the mercury can be contacted with the main surface of the wafer to form a Schottky barrier, and forward bias application, reverse bias application, and resistivity calculation can be performed in order, and then the mercury can be separated from the main surface of the wafer. And for the next measurement, the mercury is brought into contact with the main surface of the wafer again at the same position and the above process is repeated [see arrow (1) in FIG. 1]. In addition, after performing (step a), the steps (b), (c), and (d) can be repeated directly at the same position. That is, in a state where the Schottky barrier is formed, forward bias application, reverse bias application, and resistivity calculation can be repeated [see arrow (2) in FIG. 1]. In addition, it can also be performed (step a), and then repeat (step b) and (step c) directly at the same position, and then perform (step d). That is, after the Schottky barrier is formed, the forward bias application and the reverse bias application can be repeated directly, and finally the resistivity calculation can be performed together [see arrow (3) in FIG. 1]. Either way, it is possible to suppress the gradual increase and decrease of the resistivity caused by the accumulation of electric charge and measure it. [Example]

以下,雖然呈現實施例及比較例並更具體地說明本發明,但本發明並非限定於這些的實施例。Hereinafter, the present invention will be described more specifically with reference to examples and comparative examples, but the present invention is not limited to these examples.

[實施例1] 實施本發明之電阻率測定方法。具體而言重複進行了圖1所示的(步驟a)~(步驟d)。使用圖2所示之水銀探針10而重複5次C-V測定電阻率約0.9 Ωcm的P型矽磊晶層1時,係藉由每次從-1V至-18V以1V間隔增加絕對值並施加順向偏壓後,再使逆向偏壓V從+1V至+15V以1V間隔增加並予以施加,而進行電阻率測定。其結果,以測定值的平均值除以標準偏差σ而求得之CV值(變異係數)為0.03%。[Example 1] The resistivity measurement method of the present invention was implemented. Specifically, (step a) to (step d) shown in FIG. 1 are repeated. Using the mercury probe 10 shown in FIG. 2 and repeating the CV measurement of the P-type silicon epitaxial layer 1 having a resistivity of about 0.9 Ωcm 5 times, the absolute value is increased and applied at intervals of 1V from -1V to -18V After the forward bias, the reverse bias V was increased from + 1V to + 15V at 1V intervals and applied, and the resistivity was measured. As a result, the CV value (coefficient of variation) obtained by dividing the average value of the measured values by the standard deviation σ was 0.03%.

[比較例1] 將實施例1中用於測定的電阻率約0.9 Ωcm的P型矽磊晶層1,如習知方法般不施加順向偏壓而重複5次C-V測定而求取電阻率。其結果,CV值為0.15%。 [產業上之利用可能性][Comparative Example 1] The P-type silicon epitaxial layer 1 having a resistivity of about 0.9 Ωcm used in Example 1 was measured, and the CV measurement was repeated 5 times without applying a forward bias as in a conventional method to obtain the resistivity. . As a result, the CV value was 0.15%. [Industrial possibilities]

由於根據本發明之電阻率的測定方法,能藉由施加順向偏壓,而去除施加逆向偏壓V時累積在水銀電極與半導體單晶晶圓之間的電荷,因而能將重複測定時半導體單晶晶圓內所形成之空乏層的厚度維持在正常水平,而能抑制電阻率逐漸降低或逐漸提高的傾向。其結果,便能提升電阻率之重複測定的精度。Since the resistivity measurement method according to the present invention can remove the charge accumulated between the mercury electrode and the semiconductor single crystal wafer when the reverse bias voltage V is applied by applying a forward bias voltage, the semiconductor during repeated measurement can be removed. The thickness of the empty layer formed in the single crystal wafer is maintained at a normal level, and the tendency of the resistivity to decrease or increase gradually can be suppressed. As a result, the accuracy of repeated measurement of resistivity can be improved.

另外,本發明並不為上述實施型態所限制。上述實施型態為舉例說明,凡具有與本發明的申請專利範圍所記載之技術思想為實質上同樣之構成,產生相同之功效者,皆包括在本發明的技術範圍內。In addition, the present invention is not limited by the above embodiments. The above-mentioned embodiment is an example. Anyone having a technical idea that is substantially the same as that described in the patent application scope of the present invention and produces the same effect is included in the technical scope of the present invention.

1‧‧‧半導體單晶晶圓 1‧‧‧Semiconductor single crystal wafer

1‧‧‧P型矽磊晶層 1‧‧‧P-type silicon epitaxial layer

10‧‧‧水銀探針 10‧‧‧ Mercury Probe

11‧‧‧工件台 11‧‧‧Workbench

12‧‧‧收納容器 12‧‧‧Storage Container

13‧‧‧收納容器 13‧‧‧Storage Container

15‧‧‧導管 15‧‧‧ catheter

16‧‧‧導管 16‧‧‧ Catheter

31‧‧‧水銀 31‧‧‧ Mercury

32‧‧‧水銀 32‧‧‧ Mercury

33‧‧‧水銀電極 33‧‧‧ Mercury electrode

34‧‧‧水銀電極 34‧‧‧ Mercury electrode

35‧‧‧空乏層 35‧‧‧ empty layer

41‧‧‧導電性橡膠墊片 41‧‧‧Conductive rubber gasket

42‧‧‧導電性橡膠墊片 42‧‧‧Conductive rubber gasket

43‧‧‧導電性橡膠墊片 43‧‧‧Conductive rubber gasket

44‧‧‧導電性橡膠墊片 44‧‧‧Conductive rubber gasket

51‧‧‧接地線 51‧‧‧ ground wire

52‧‧‧接地線 52‧‧‧ ground wire

53‧‧‧接地線 53‧‧‧ ground wire

54‧‧‧接地線 54‧‧‧ ground wire

61‧‧‧地 61‧‧‧ land

62‧‧‧地 62‧‧‧ land

63‧‧‧地 63‧‧‧ land

100‧‧‧C-V特性測定系統 100‧‧‧C-V characteristic measurement system

130‧‧‧水銀探針 130‧‧‧ Mercury Probe

140‧‧‧LCR測量儀 140‧‧‧LCR measuring instrument

150‧‧‧PC(個人電腦) 150‧‧‧PC (personal computer)

161‧‧‧測定導線 161‧‧‧Measurement Lead

162‧‧‧測定導線 162‧‧‧Measurement Lead

163‧‧‧GPIB傳輸線 163‧‧‧GPIB transmission line

圖1係呈現本發明之電阻率測定方法的一範例的步驟示意圖。 圖2係呈現本發明之電阻率測定方法所使用的C-V法測定裝置的一範例的水銀探針的示意圖。 圖3係本發明之電阻率測定方法所使用的C-V特性測定系統。 圖4係根據習知方法重複C-V測定求取P型矽磊晶層的電阻率時所出現的傾向。 圖5係根據習知方法重複C-V測定求取N型矽磊晶層的電阻率時所出現的傾向。 圖6係重複C-V測定求取P型矽磊晶層的電阻率時,在不施加順向偏壓之情況與施加順向偏壓之情況下的電阻率變動的例示。 圖7中(a)係P型矽磊晶層之電阻率與順向偏壓的關係的例示。(b)係N型矽磊晶層之電阻率與順向偏壓的關係的例示。 圖8係於半導體單晶晶圓施加順向偏壓時的說明示意圖,其中(1)係呈現於殘留有電荷的半導體單晶晶圓施加順向偏壓的狀態;(2)係呈現施加順向偏壓後空乏層之厚度回到正常水平的狀態;(3)係呈現形成有正常水平厚度之空乏層的狀態。FIG. 1 is a schematic diagram showing an example of the resistivity measurement method of the present invention. FIG. 2 is a schematic diagram of a mercury probe showing an example of a C-V method measurement device used in the resistivity measurement method of the present invention. Fig. 3 is a C-V characteristic measurement system used in the resistivity measurement method of the present invention. FIG. 4 is a tendency that appears when a C-V measurement is repeated according to a conventional method to obtain the resistivity of a P-type silicon epitaxial layer. FIG. 5 shows the tendency that occurs when the C-V measurement is repeated to obtain the resistivity of an N-type silicon epitaxial layer according to a conventional method. FIG. 6 is an example of resistivity variation when the C-V measurement is repeated to obtain the resistivity of the P-type silicon epitaxial layer when the forward bias is not applied and when the forward bias is applied. FIG. 7 (a) is an example of the relationship between the resistivity of the P-type silicon epitaxial layer and the forward bias. (B) An example of the relationship between resistivity and forward bias of an N-type epitaxial layer. FIG. 8 is a schematic explanatory diagram when a forward bias is applied to a semiconductor single crystal wafer, where (1) is a state where a forward bias is applied to a semiconductor single crystal wafer with a remaining charge; (2) is a state where a forward bias is applied After the bias is applied, the thickness of the empty layer returns to a normal level; (3) The state where the empty layer with a normal horizontal thickness is formed.

Claims (2)

一種電阻率測定方法,包含: 水銀電極形成步驟,係使水銀接觸半導體單晶晶圓而成為水銀電極; 順向偏壓施加步驟,係於該水銀電極施加順向偏壓; C-V測定步驟,係於該水銀電極施加逆向偏壓並測定因而變化的該半導體單晶晶圓的容量;以及 電阻率演算步驟,係自該逆向偏壓與該容量的關係而演算電阻率。A resistivity measuring method includes: a mercury electrode forming step of contacting a semiconductor single crystal wafer with mercury to become a mercury electrode; a forward bias applying step of applying a forward bias to the mercury electrode; a CV measuring step of A reverse bias is applied to the mercury electrode and the capacity of the semiconductor single crystal wafer that is changed is measured; and a resistivity calculation step is to calculate the resistivity from the relationship between the reverse bias and the capacity. 如請求項1所述之電阻率測定方法,其中該順向偏壓的施加量係該半導體單晶晶圓的電阻率越低則設為越大。The resistivity measurement method according to claim 1, wherein the applied amount of the forward bias is set to be larger as the resistivity of the semiconductor single crystal wafer is lower.
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