TW201810709A - Interposer structure of mirco-light emitting diode unit and fabricating method thereof, mirco-light emitting diode unit and fabricating method thereof and mirco-light emitting diode apparatus - Google Patents

Abstract

A fabricating method of an interposer structure of a mirco light emitting diode unit is provided. After mirco-light emitting diode is formed on a growing substrate, a transfer substrate is provided and a sacrificial layer is formed on the transfer substrate. A portion of the sacrificial layer of the transfer substrate is removed to form a gap between the micro-light emitting diode and the transfer substrate. The micro-light emitting diode is fixed to the transfer substrate provisionally by a portion of the sacrificial layer which is not be removed.

Description

Intermediate structure of micro light emitting diode unit and manufacturing method thereof, micro light emitting diode unit and manufacturing method thereof, and micro light emitting diode device

The invention relates to a photovoltaic element and a manufacturing method thereof, and in particular to a micro-light-emitting diode unit intermediary structure and a manufacturing method thereof, a micro-light-emitting diode unit, a manufacturing method thereof, and a micro-light-emitting diode device. .

In the manufacturing process of the conventional micro-light-emitting diode intermediary structure, it is often necessary to use a highly precise and expensive transposed tip, which makes mass production difficult and the manufacturing cost too high. In addition, the general manufacturing method of the micro-light-emitting diode intermediary structure further requires multiple transpositions. The multiple transposition operations are time-consuming and are not conducive to the manufacturing yield of the micro-light-emitting diode unit.

The invention provides a micro-light-emitting diode device, a micro-light-emitting diode unit and a manufacturing method thereof, and a micro-light-emitting diode unit intermediary structure and a manufacturing method thereof.

The invention provides a micro light emitting diode unit and a manufacturing method thereof, and a micro light emitting diode unit intermediary structure and a manufacturing method thereof, which have high yields.

The method for manufacturing a micro-light-emitting diode intermediate structure of the present invention includes the following steps. A semiconductor structure is provided. The semiconductor structure includes a plurality of semiconductor layers and a first sacrificial layer sequentially stacked on an inner surface of a growth substrate, wherein the multilayer semiconductor layer includes a first type semiconductor layer and a second type having a polarity opposite to that of the first type semiconductor layer. Semiconductor layer. A supporting structure is provided. The supporting structure includes a transfer substrate and a second sacrificial layer covering an inner surface of the transfer substrate. The first sacrificial layer of the semiconductor structure is bonded to the second sacrificial layer of the carrier structure, wherein after the first sacrificial layer is bonded to the second sacrificial layer, the first sacrificial layer is located between the multilayer semiconductor layer and the second sacrificial layer. The growth substrate of the semiconductor structure is removed. The first type semiconductor layer and the second type semiconductor layer are patterned separately to form a plurality of first type semiconductor patterns and a plurality of second type semiconductor patterns. A plurality of insulation patterns separated from each other are formed, and the insulation patterns cover the corresponding second-type semiconductor patterns. Forming a plurality of first electrodes and a plurality of second electrodes, wherein the first electrode is located on the corresponding first type semiconductor pattern, the second electrode is located on the corresponding second type semiconductor pattern, and the second type semiconductor pattern and the corresponding first The one-type semiconductor pattern, the corresponding first electrode, and the corresponding second electrode constitute a plurality of miniature light emitting diodes. Remove at least part of the first sacrificial layer, at least part of the second sacrificial layer, or at least part of the stacked layers of the foregoing, so that there is a gap between each micro-light emitting diode and the transfer substrate, and the micro-light The diode is connected to the transfer substrate through a plurality of connection portions of the insulation pattern.

The intermediary structure of the micro-light-emitting diode unit of the present invention includes a transmission substrate, a plurality of micro-light-emitting diodes, and a plurality of insulation patterns. A plurality of micro light emitting diode arrays are arranged on the inner surface of the transfer substrate. Each micro-light emitting diode includes a multilayer semiconductor pattern, a first electrode, and a second electrode. The multilayer semiconductor pattern includes at least a first-type semiconductor pattern and a second-type semiconductor pattern having a polarity opposite to that of the first-type semiconductor pattern, wherein the vertical projection area of the first-type semiconductor pattern on the transfer substrate exceeds Transfer the vertical projection area on the substrate. The first electrode is located on the first type semiconductor pattern. The second electrode is located on the second type semiconductor pattern. A plurality of insulation patterns cover the corresponding micro light-emitting diodes. The insulation pattern has a plurality of connection portions. The micro light-emitting diode is connected to the transfer substrate through a connection portion. There is a gap between each micro light-emitting diode and the transfer substrate. Multiple insulation patterns are separated from each other.

The miniature light emitting diode unit of the present invention includes a multilayer semiconductor pattern, an insulation pattern, a first electrode, and a second electrode. The multilayer semiconductor pattern includes at least a first type semiconductor pattern and a second type semiconductor having a polarity opposite to that of the first type semiconductor pattern. The vertical projection area of the first type semiconductor pattern on the second type semiconductor pattern exceeds the area of the second type semiconductor pattern. The insulation pattern covers the first type semiconductor pattern and the second type semiconductor pattern, and the insulation pattern has a plurality of openings. The first electrode and a second electrode are connected to the first type semiconductor pattern and the second type semiconductor pattern through the openings, respectively.

The miniature light emitting diode device of the present invention includes an array substrate, an adhesive layer, and the at least one miniature light emitting diode unit. The array substrate includes a receiving substrate and a pixel array layer disposed on an inner surface of the receiving substrate. The pixel array layer includes at least one sub-pixel. The adhesive layer is disposed on the sub-pixel and partially covers the pixel array layer located on the sub-pixel. The micro light-emitting diode unit is disposed on the adhesive layer of the sub-pixel.

A method for manufacturing a micro-light-emitting diode unit intermediary structure includes the following steps. A multilayer semiconductor layer is sequentially formed on the growth substrate, and the multilayer semiconductor layer includes at least a first-type semiconductor layer and a second-type semiconductor having a polarity opposite to that of the first-type semiconductor layer. A plurality of electrodes are formed on the first type semiconductor layer and the second type semiconductor layer, respectively. Multiple electrodes are separated from each other. The multilayer semiconductor layer and the plurality of electrodes constitute a micro-light emitting diode. A bearing structure is formed. The bearing structure includes a transfer substrate, a sacrificial layer covering the transfer substrate, and a plurality of circuit structures on the sacrificial layer, and the circuit structures are separated from each other. The electrode of the micro-light-emitting diode is bonded to the circuit structure of the carrier structure, so that the electrode of the micro-light-emitting diode on the growth substrate faces the circuit structure of the carrier structure. After the electrodes of the micro light-emitting diode are bonded to the circuit structure of the carrier structure, the growth substrate is removed. Remove a part of the sacrificial layer directly under the micro-light-emitting diode, and retain another part of the sacrificial layer outside the shielding area of the micro-light-emitting diode.

A method for manufacturing a miniature light emitting diode unit includes the following steps. The aforementioned micro-light-emitting diode unit intermediary structure is provided. Provide elastic transposition head to extract micro light-emitting diode, part of circuit structure and part of support layer. Provide elastic transposition head to extract micro light-emitting diode, part of circuit structure and part of support layer. The micro light emitting diode, part of the circuit structure and part of the supporting layer are transposed on the receiving substrate.

The miniature light emitting diode device of the present invention includes a receiving substrate, a pixel array layer, an adhesive layer, and at least one miniature light emitting diode unit. The pixel array layer is disposed on the inner surface of the receiving substrate. The pixel array layer includes at least one sub-pixel. The adhesive layer is disposed on the sub-pixel and partially covers the pixel array layer located on the sub-pixel. At least one miniature light emitting diode unit is disposed on the adhesive layer of the sub-pixel. The micro light emitting diode unit includes at least a supporting layer, a plurality of circuit structures, and a micro light emitting diode. The outer surface of the support layer is connected to the adhesive layer. A plurality of circuit structures are disposed on the inner surface of the support layer. Multiple circuit structures are separated from each other. The micro light emitting diode is arranged on the circuit structure. The micro light emitting diode includes a multilayer semiconductor pattern and a plurality of electrodes. The multilayer semiconductor pattern includes at least a first type semiconductor pattern and a second type semiconductor pattern having a polarity opposite to that of the first type semiconductor pattern. The plurality of electrodes are respectively disposed on the first type semiconductor pattern and the second type semiconductor pattern. A plurality of electrodes are separated from each other, and each electrode is respectively connected to a corresponding circuit structure.

Based on the above, a method for manufacturing an intermediary structure of a micro-light emitting diode unit according to an embodiment of the present invention includes: providing a semiconductor structure, the semiconductor structure including a plurality of semiconductor layers and a first sacrificial layer sequentially stacked on an inner surface of a growth substrate, wherein The multilayer semiconductor layer includes a first-type semiconductor layer and a second-type semiconductor layer of opposite polarity to the first-type semiconductor layer. A supporting structure is provided. The supporting structure includes a transfer substrate and a second sacrificial layer covering an inner surface of the transfer substrate. The first sacrificial layer of the semiconductor structure is bonded to the second sacrificial layer of the carrier structure, wherein after the first sacrificial layer is bonded to the second sacrificial layer, the first sacrificial layer is located between the multilayer semiconductor layer and the second sacrificial layer. The growth substrate of the semiconductor structure is removed. The first type semiconductor layer and the second type semiconductor layer are patterned separately to form a plurality of first type semiconductor patterns and a plurality of second type semiconductor patterns. A plurality of insulation patterns separated from each other are formed, and the insulation patterns cover the corresponding second-type semiconductor patterns. Forming a plurality of first electrodes and a plurality of second electrodes, wherein the first electrode is located on the corresponding first type semiconductor pattern, the second electrode is located on the corresponding second type semiconductor pattern, and the second type semiconductor pattern and the corresponding first The one-type semiconductor pattern, the corresponding first electrode, and the corresponding second electrode constitute a plurality of miniature light emitting diodes. Removing at least part of the first sacrificial layer, at least part of the second sacrificial layer, or at least part of the stacked layers of the foregoing, so that there is a gap between each micro-light emitting diode and the transfer substrate, and the micro The light emitting diode is connected to the transfer substrate through a plurality of connection portions of the insulation pattern. Thereby, the intermediate structure of the micro-light-emitting diode unit and the manufacturing method of the micro-light-emitting diode unit can omit at least one transposition operation, thereby achieving the effect of simplifying the manufacturing process.

In addition, in the method for manufacturing a micro-light-emitting diode unit interposer according to another embodiment of the present invention, the micro-light-emitting diode is a circuit structure that is first fixed on a transmission substrate by a flip-chip method. When extracting the micro-light-emitting diode, the elastic transposition head is in contact with the flat surface of the micro-light-emitting diode. That is to say, in the process of extracting the micro-light-emitting diode, the contact area between the elastic transposition head and the micro-light-emitting diode is large, so that the success rate and efficiency of the micro-light-emitting diode by the elastic transposition head are greatly improved.

In order to make the above features and advantages of the present invention more comprehensible, embodiments are hereinafter described in detail with reference to the accompanying drawings.

1A to 1J are schematic cross-sectional views illustrating a method for manufacturing a micro-light emitting diode device according to an embodiment of the present invention. FIGS. 1A to 1H are schematic cross-sectional views illustrating a method for manufacturing a micro-light-emitting diode intermediary structure. Referring to FIG. 1A, first, a semiconductor structure 10 is provided. The semiconductor structure 10 includes a multilayer semiconductor (not labeled) and a first sacrificial layer 140 sequentially stacked on the inner surface of the growth substrate S1. The first sacrificial layer 140 is disposed on a multilayer semiconductor. The multilayer semiconductor includes a first-type semiconductor layer 130 and a second-type semiconductor layer 110 having a polarity opposite to the first-type semiconductor layer. The polarities of the first-type and second-type semiconductor layers 130 and 110 may be N-type or P-type semiconductor layers, respectively. In the embodiment of the present invention, the first type semiconductor layer 130 is a P-type semiconductor layer on the inner surface of the growth substrate S1 and the second type semiconductor layer 110 is an N-type semiconductor layer on the first type semiconductor layer and the growth substrate S1. Between is an example, but it is not limited to this. In other embodiments, the first type semiconductor layer 130 is an N-type semiconductor layer on the inner surface of the growth substrate S1 and the second type semiconductor layer 110 is a P-type semiconductor layer on the first type semiconductor layer. In the embodiment of the present invention, a film layer may be optionally inserted at the interface between the first type semiconductor layer and the second type semiconductor layer or the interface between the first type semiconductor layer and the second type semiconductor layer may be used as the light emitting layer. 120. In the embodiment of the present invention, a film layer can be inserted at the interface between the first type semiconductor layer and the second type semiconductor layer as the light emitting layer 120 as an example, but it is not limited thereto. In other embodiments, a film layer is not inserted as a light emitting layer at the interface between the first type semiconductor layer and the second type semiconductor layer. Please refer to FIG. 1B. Next, a supporting structure 20 is provided. The carrier structure 20 includes a transfer substrate S2 and a second sacrificial layer 210 covering the inner surface of the transfer substrate S2. In this embodiment, the second sacrificial layer 210 is, for example, a photoresist layer or a metal layer, but the present invention is not limited thereto. Next, the first sacrificial layer 140 of the semiconductor structure 10 and the second sacrificial layer 210 of the carrier structure 20 are bonded to fix the semiconductor structure 10 on the carrier structure 20. As shown in FIG. 1B, after the first sacrificial layer 140 is bonded to the second sacrificial layer 210, the first sacrificial layer 140 is located between a plurality of semiconductor layers (for example, the first type semiconductor layer 130) and the second sacrificial layer 210. Furthermore, the second sacrificial layer 210, the first sacrificial layer 140, the multilayer semiconductor layer, and the growth substrate S1, which are sequentially stacked on the inner surface of the transfer substrate S2, that is, the second sacrificial layer 210 and the first sacrificial layer 140 are all positioned. Under the multilayer semiconductor layer and the growth substrate S1. In other words, the second sacrificial layer 210, the first sacrificial layer 140, the multilayer semiconductor layer (for example, the first type semiconductor layer 130, the second type semiconductor layer 110), and the growth substrate S1 are sequentially stacked in a direction d away from the transfer substrate S2. . In other embodiments, as described above, the light emitting layer 120 may be selectively disposed between the first type semiconductor layer 130 and the second type semiconductor layer 110.

Referring to FIGS. 1B and 1C, the growth substrate S1 of the semiconductor structure 10 is removed. For example, in this embodiment, a laser lift-off technology may be used to remove the growth substrate S1 on the second type semiconductor layer 110, but the present invention is not limited thereto, and is implemented in other implementations. In an example, the growth substrate S1 may be removed by other appropriate methods.

Referring to FIGS. 1C and 1D, the second type semiconductor layer 110 and the light emitting layer 120 are patterned to form a plurality of second type semiconductor patterns 112 and a plurality of light emitting patterns 122 separated from each other. A corresponding second type semiconductor pattern 112 is disposed on each light emitting pattern 122. In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first type semiconductor layer and the second type semiconductor layer, there will be no patterned light emitting layer 120. Referring to FIG. 1D and FIG. 1E, the first type semiconductor layer 130 is patterned to form a plurality of first type semiconductor patterns 132 separated from each other. The first sacrificial layer 140 can protect the first type semiconductor layer 130 from being etched. The first-type semiconductor layer 130 is broken. A corresponding light-emitting pattern 122 and a corresponding second-type semiconductor pattern 112 are disposed on each of the first-type semiconductor patterns 132. In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first type semiconductor layer and the second type semiconductor layer, a corresponding second type semiconductor is disposed on each first type semiconductor pattern 132. Pattern 112. The vertical projection area of each first type semiconductor pattern 132 on the transmission substrate S2 exceeds the vertical projection area of the corresponding second type semiconductor pattern 112 on the transmission substrate S2 and the vertical projection area of the corresponding light emitting pattern 122 on the transmission substrate S2. . The first type semiconductor pattern 132, the light emitting pattern 122, and the second type semiconductor pattern 112 are sequentially arranged in a direction d away from the transfer substrate S2, that is, the first type semiconductor pattern 132 is closest to the transfer substrate S2, and the second type semiconductor pattern 112 is away from The transfer substrate S2 is farthest. In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor pattern 132 and the second type semiconductor pattern 112 are far away from the transfer substrate S2. In the order d, the first type semiconductor pattern 132 is closest to the transfer substrate S2, and the second type semiconductor pattern 112 is farthest from the transfer substrate S2.

Referring to FIG. 1F, a plurality of insulation patterns 312 are formed separately from each other. The insulating pattern 312 covers the corresponding second-type semiconductor pattern 112, the light-emitting pattern 122, and the first-type semiconductor pattern 132. The second pattern semiconductor pattern 112 is not covered by the insulating pattern 312. In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first and second type semiconductor layers, the insulating pattern 310 covers the corresponding second type semiconductor pattern 112 and the first type semiconductor pattern. 132. In this embodiment, the insulating pattern 310 has a connection portion 312a. For example, the connection portion 312 a of the insulation pattern 310 extends from the upper surface of the corresponding second-type semiconductor pattern 112 to the side of the second-type semiconductor pattern 112 and covers the sides of the light-emitting pattern 122 and the first-type semiconductor pattern 132. Specifically, in this embodiment, the insulation pattern 310 includes a first insulation pattern 312 and a second insulation pattern 314. The first insulating pattern 312 is formed on the second type semiconductor layer 112 and covers the sidewall 112 a of the second type semiconductor pattern 112, the sidewall 122 a of the light emitting pattern 122, and the sidewall 132 a of the first type semiconductor pattern 132. The second insulating pattern 314 is formed on the second type semiconductor layer 112 and covers the other sidewall 112b of the second type semiconductor layer 112 and the other sidewall 122b of the light emitting pattern 122, and exposes (or is called uncovered) The other side wall 132b of the semiconductor layer 132. The first insulating pattern 312 includes a connection portion 312 a extending outside the second-type semiconductor pattern 112, the light-emitting pattern 122, and the first-type semiconductor pattern 132. The connection portion 312 a extends from the second type semiconductor layer 112, the light emitting pattern 122, and the first type semiconductor pattern 132 to the first sacrificial layer 140. In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first type and the second type semiconductor layers, the insulation pattern 310 includes the design of the first and second insulation patterns 312 and 314 and other components. The connection relationship will be changed. For example, the first insulation pattern 312 is formed on the second type semiconductor pattern 112 and covers the sidewall 112 a of the second type semiconductor pattern 112 and the sidewall 132 a of the first type semiconductor pattern 132. The second insulation pattern 314 is formed on the second type semiconductor pattern 112 and covers the other sidewall 112 b of the second type semiconductor pattern 112 and the other sidewall 132 b exposing the first type semiconductor pattern 132 and so on. The connection portion 312 a of the first insulation pattern 312 is connected to the transfer substrate S2 through the first sacrificial layer 140.

Referring to FIG. 1G, a first electrode 410 and a second electrode 420 are formed. The first electrode 410 is located on the first type semiconductor pattern 132 and is electrically connected to the first type semiconductor pattern 132. The second electrode 420 is located on the second-type semiconductor pattern 112 and is electrically connected to the second-type semiconductor pattern 112. The first type semiconductor pattern 132, the light emitting pattern 122, the second type semiconductor pattern 112, the first electrode 410, and the second electrode 420 may constitute a micro-light emitting diode LED. In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first and second type semiconductor layers, the first type semiconductor pattern 132, the second type semiconductor pattern 112, the first electrode 410, and The second electrode 420 may constitute a miniature light emitting diode LED. Among them, the size of the miniature light-emitting diode LED is micrometer or nanometer. In this embodiment, the first electrode 410 and the second electrode 420 can be formed simultaneously in the same process, but the present invention is not limited thereto.

Please refer to FIG. 1G and FIG. 1H. Next, at least part of the first sacrificial layer 140, at least part of the second sacrificial layer 210, or at least part of the foregoing stacked layers are removed, so that each micro-light emitting diode There is a gap g between the body LED and the inner surface of the transfer substrate S2. Thus, the micro-light-emitting diode unit intermediate structure 1000 is completed. For example, in this embodiment, a part of the exposed (or uncovered) portion of the micro-light emitting diode LED and the insulating pattern 310 (including the first and second insulating patterns 312 and 314) may be removed. A sacrificial layer 140, and a portion of the first sacrificial layer (ie, the first sacrificial pattern 142) located directly under the micro-light emitting diode LED and directly under the connection portion 312a is retained; the micro-light emitting diode LED and the insulation can be removed The pattern 310 (including the first and second insulating patterns 312 and 314) is exposed (or uncovered) and the second sacrificial layer 210 is located in a portion directly below the micro-light emitting diode LED, while remaining in the connection portion 312a. The lower part of the second sacrificial layer (ie, the second sacrificial pattern or the retained second sacrificial pattern 212).

As shown in FIG. 1H, the first sacrificial pattern 142 is stacked on a corresponding second sacrificial pattern 212, and the stacked first sacrificial pattern 142 and the retained second sacrificial pattern 212 form a sacrificial structure or a connection Structure S. The connection portion 312a connected to the micro light-emitting diode LED is temporarily fixed on the inner surface of the transfer substrate S2 through the sacrificial structure S. There is a gap g between the sacrificial structure S and the inner surface of the transfer substrate S2. In this embodiment, the first sacrificial pattern 142 covers the bottom of the first type semiconductor pattern 132 of the micro light emitting diode LED, that is, the first type semiconductor pattern 132 is located on the top surface of the first sacrificial pattern 142, and the first sacrificial pattern 142 142 is located below the first type semiconductor pattern 132, and the second sacrificial pattern 212 exposes (or is called uncovered) a partial bottom surface (or a lower surface) 142b of the first sacrificial pattern 142. In a preferred embodiment, the thickness of the first type semiconductor pattern 132 in the direction d is smaller than that of the second type semiconductor pattern 112. However, the present invention is not limited to this. In other embodiments, the micro-light emitting diode LED may be temporarily fixed on the transfer substrate S2 by using other types of sacrificial structures. In the following paragraphs, it will be illustrated with other drawings.

1G, at least one of the first sacrificial layer 140 or the second sacrificial layer 210 is an organic material layer, and the other of the first sacrificial layer 140 or the second sacrificial layer 210 is an inorganic material layer. In this embodiment, the first sacrificial layer 140 may be an inorganic material layer (for example, a metal or an alloy) and the material of the first sacrificial layer 140 is different from the insulating pattern 310, and the second sacrificial layer 210 may be an organic material layer ( For example: photoresist) is an example, but it is not limited to this. The second sacrificial layer 210 has a function of temporarily adhering the micro light emitting diode LED to the transfer substrate. Referring to FIG. 1G and FIG. 1H, in this embodiment, a part of the first sacrificial layer 140 between two adjacent micro-light-emitting diode LEDs may be removed first to pattern a plurality of first sacrificial patterns 142. Next, a dry etching process (eg, an oxygen-containing plasma process) may be used to remove a portion of the second sacrificial layer 210 directly below the first sacrificial pattern 142 and retain a portion of the second sacrificial layer 210 directly below the connection portion 312a. A second sacrificial pattern 212 is formed. Since the dry etching process is not easy to etch inorganic materials, such as the insulating pattern 310 (including the first and second insulating patterns 312 and 314) and the first sacrificial pattern 142, during the process of forming the second sacrificial pattern 212, the insulating pattern 310 (including the The first and second insulating patterns 312, 314) and the first sacrificial pattern 142 can be retained, thereby forming a sacrificial structure S as shown in FIG. 1H. The insulating pattern 310 is made of silicon oxide, silicon nitride, silicon oxynitride, other suitable materials, or a combination of the two. However, the present invention is not limited to this. In other embodiments, other suitable methods may also be used to form a sacrificial structure for temporarily fixing the micro-light-emitting diode LED, such as controlling the number of etching seconds and the resulting etching selectivity.

Please refer to FIG. 1I. Next, a flexible light-emitting diode P on the substrate S2 is picked-up by using an elastic transposition head P to form a miniature light-emitting diode unit 100. When the elastic transducing head P extracts the micro-light-emitting diode LED and moves in a direction d away from the transfer substrate S2, a part of the connection portion 312a will be broken, that is, a portion of the connection portion 312a will remain in the micro-light-emitting diode LED. The other part of the upper part and the connection part 312a will remain on the sacrificial structure S, so that the micro-light-emitting diode LED is separated from the transfer substrate S2, thereby forming the micro-light-emitting diode unit 100.

Referring to FIG. 1J, the micro-light emitting diode unit 100 is placed on the receiving substrate 710. FIG. 1J and the following embodiment only show a case where one sub-pixel has one driving micro-light-emitting diode LED, but the present invention is not limited thereto, and one sub-pixel may also have more than one micro-light-emitting diode. LED. The miniature light emitting diode device 10000 is, for example, a display or other electronic equipment with a display. The micro-light-emitting diode device 10000 includes at least a receiving substrate 710, a pixel array layer 720, an adhesive layer 730, a wire 500, and a micro-light-emitting diode unit 100. An array substrate 800 is constituted by at least the receiving substrate 710 and the pixel array layer 720. The pixel array layer 720 is disposed on the inner surface of the receiving substrate 710. The pixel array layer 720 has a plurality of sub-pixels (not shown) and a plurality of driving elements (not shown), and each of the sub-pixels has at least one driving element for driving the micro-light emitting diode LED. Generally, the position of the micro light-emitting diode LED is the sub-pixel. The adhesive layer 730 at least partially covers the pixel array layer 720 located at the sub-pixel. The micro light emitting diode LED is disposed on the adhesive layer 730. In detail, the micro light emitting diode unit 100 includes a first-type semiconductor pattern 132, a light-emitting pattern 122 on the first-type semiconductor pattern 132, a second-type semiconductor pattern 112 on the light-emitting pattern 122, and a first type semiconductor pattern, respectively. The semiconductor pattern 132 and the second type semiconductor pattern 112 are electrically connected to the first and second electrodes 410 and 420 and the insulating pattern 310 (including the first and second insulating patterns 312 and 314). The vertical projection area of the first type semiconductor pattern 132 on the second type semiconductor pattern 112 exceeds the area of the second type semiconductor pattern 112. The insulating pattern 310 (including the first and second insulating patterns 312 and 314) covers the first type semiconductor pattern 132 and the second type semiconductor pattern 112 and exposes (or is called uncovered) the first and second electrodes 410 and 420. The first and second electrodes 410 and 420 are located on the same side of the first type semiconductor pattern 132. In other words, the micro-light-emitting diode LED of the micro-light-emitting diode unit 100 is preferably a horizontal light-emitting diode chip, but it is not intended to limit the present invention. The micro-light-emitting diode LED may also be a vertical light-emitting diode. Wafer. In this embodiment, the first type semiconductor pattern 132 is, for example, a P type semiconductor pattern, and the second type semiconductor pattern 112 is, for example, an N type semiconductor pattern, but the present invention is not limited thereto. Furthermore, as described above, if the light emitting pattern 122 is not inserted between the first and second type semiconductor layers, the first type semiconductor pattern 132, the second type semiconductor pattern 112, the first electrode 410, and the second type The electrode 420 may constitute a micro light emitting diode LED.

In this embodiment, the insulating pattern 310 (including the first and second insulating patterns 312 and 314) covers the micro-light emitting diode LED and the insulating pattern 310 (for example, the first insulating pattern 312) has an extension to the micro-light emitting diode LED.外 连接 部 312a. The micro light emitting diode unit 100 further includes a first sacrificial pattern 142. The first sacrificial pattern 142 covers the bottom of the first type semiconductor pattern 132, that is, the first type semiconductor pattern 132 is located on the first sacrificial pattern 142. Therefore, the first type semiconductor pattern 132 is located between the second type semiconductor pattern 112 and the first sacrificial pattern 142. If there is a light emitting pattern 122, the first type semiconductor pattern 132 is located between the light emitting pattern 122 and the first sacrificial pattern 142. Furthermore, the first sacrificial pattern 142 has a first surface (or referred to as an upper surface or an inner surface) 142a in contact with the first type semiconductor pattern 132, and a second surface (or referred to as a bottom surface) opposite the first surface 142a Surface or outer surface) 142b and a side wall 142c located between the first surface 142a and the second surface 142b, that is, a side wall 142c connecting the first surface 142a and the second surface 142b. The insulating pattern 312 covers the first surface 142 a of the first sacrificial pattern 142 and exposes (or is called uncovered) the sidewall 142 c and the second surface 142 b of the first sacrificial pattern 142. However, the present invention is not limited thereto. In other embodiments, the micro light emitting diode unit may not include the first sacrificial pattern 142. In the following paragraphs, it will be illustrated with other drawings.

In the manufacturing method of the micro-light-emitting diode unit intermediary structure 1000 and the micro-light-emitting diode unit 100 described above, it is preferable to design the first type semiconductor pattern 132 as a P-type semiconductor and the second type semiconductor pattern 132 as an N-type semiconductor. The thickness of the first type semiconductor pattern 132 in the direction d is smaller than the thickness of the second type semiconductor pattern 112 in the direction d. However, in order to prevent the first semiconductor pattern 132 from being easily broken due to its thin thickness, the lower surface of the micro-light-emitting diode LED is covered with a first sacrificial pattern 142, as compared with a light-emitting diode that is not covered with the first sacrificial pattern 142. The polar body is prevented from being flipped again before the first and second electrodes are deposited, so that the first type semiconductor pattern 132 is located at the uppermost layer. In this embodiment, since the first sacrificial pattern 142 is provided, at least one transposition action can be omitted, thereby achieving the effect of simplifying the manufacturing process. In addition, because there is a gap g between the lower surface of the first sacrificial pattern 142 of the sacrificial structure S and the upper surface (or called the inner surface) of the transfer substrate S2, a temporary fixed structure is formed. The light-emitting diode unit 100 avoids the labor-consuming and time-consuming operation of alignment, and increases the speed of transposing the micro-light-emitting diode unit 100.

FIG. 2A to FIG. 2B are schematic cross-sectional views of a part of a manufacturing method of an intermediary structure of a micro-light-emitting diode unit according to an embodiment of the present invention. The manufacturing method of the intermediate structure of the micro-light-emitting diode unit of FIG. 2A to FIG. 2B is similar to that of the intermediate structure of the micro-light-emitting diode unit of FIG. 1H to FIG. 1I. Therefore, the same or corresponding components are the same. Or the corresponding reference sign. The main difference between the two is that the structures and forming methods of the first and second sacrificial patterns 142A and 212A in FIGS. 2A to 2B are different from the structures and forming methods of the first and second sacrificial patterns 142 and 212 in FIGS. 1H to 1I. In addition, in the manufacturing process of the micro light-emitting diode unit interposer 1000A, the manufacturing process before FIG. 2A is the same as the manufacturing process shown in FIGS. 1A to 1G, so please refer to FIG. 1A for the manufacturing process before FIG. 2A Up to FIG. 1G and the foregoing description, the illustration and description will not be repeated here.

Referring to FIG. 1G and FIG. 2A, after forming the structure shown in FIG. 1G, then, at least part of the first sacrificial layer 140, at least part of the second sacrificial layer 210, or at least part of the foregoing two are removed. The layers are stacked so that there is a gap g between each micro light emitting diode LED and the inner surface of the transfer substrate S2 to complete the micro light emitting diode unit interposer 1000A. Different from the micro-emitting diode unit interposer 1000 of FIG. 1G, in the embodiment of FIG. 2A, the first sacrificial layer 140 and the second sacrificial layer 210 may both be organic materials or inorganic materials, and may be the same in the same embodiment. The first and second sacrificial patterns 142A and 212A are patterned at the same time during the process. In detail, the micro light emitting diode LED and the insulation pattern 310 (including the first and second insulation patterns 312 and 134) can be simultaneously removed to be exposed (or not covered) and located directly below the micro light emitting diode LED. Part of the first sacrificial layer 140 and part of the second sacrificial layer 210, while part of the first sacrificial layer 140 (ie, the first sacrificial pattern 142A) and part of the second sacrificial layer 210 (directly under the connection portion 312a) remain. That is, the second sacrificial pattern 212A). Alternatively, the first sacrificial layer 140 may be an inorganic material layer (for example, a metal or an alloy) and the material of the first sacrificial layer 140 is different from the insulating pattern 312, and the second sacrificial layer 210 may be an organic material layer (for example, a photoresist ), Wherein the first sacrificial layer 140 is removed by wet etching, and the second sacrificial layer 210 is removed in stages using a dry etching process (for example, an oxygen-containing plasma process), but the present invention is not limited thereto. The first sacrificial pattern 142A and the second sacrificial pattern 212A of the sacrificial structure S jointly expose (or be referred to as uncovered) the bottom of the first type semiconductor pattern 132. The sacrificial structure S is connected to the connection portion 312 a of the insulating pattern 310 (for example, the first insulating pattern 312).

Please refer to FIG. 2B. Next, an elastic transducing head P is used to extract the micro-light-emitting diode LED on the transfer substrate S2 to form a micro-light-emitting diode unit 100A. When the elastic transducing head P extracts the micro-light emitting diode LED and moves in a direction d away from the transfer substrate S2, the connection portion 312a of the insulation pattern 310 (for example, the first insulation pattern 312) is broken, that is, a part of the connection portion 312a Will remain on the micro-light-emitting diode LED, and the other part of the connection portion 312a will remain on the sacrificial structure S, so that the micro-light-emitting diode LED is separated from the transfer substrate S2, and a micro-light-emitting diode unit 100A is formed, However, the present invention is not limited thereto.

The micro light-emitting diode unit 100A includes a first-type semiconductor pattern 132, a second-type semiconductor pattern 112 on the first-type semiconductor pattern 132, and electrically connected to the first-type semiconductor pattern 132 and the second-type semiconductor pattern 112, respectively. The first and second electrodes 410 and 420 and the insulation pattern 310 (including the first and second insulation patterns 312 and 314). In other embodiments, as described above, if a light emitting pattern 122 is inserted between the first type semiconductor layer and the second type semiconductor layer, the light emitting pattern 122 is located on the first type semiconductor pattern 132 and the second type semiconductor pattern 112 Located on the light emitting pattern 122. The vertical projection area of the first type semiconductor pattern 132 on the second type semiconductor pattern 112 exceeds the area of the second type semiconductor pattern 112. The insulating pattern 310 (including the first and second insulating patterns 312 and 314) covers the first type semiconductor pattern 132 and the second type semiconductor pattern 112 and partially exposes (or is called uncovered) the first and second electrodes 410 and 420. The first and second electrodes 410 and 420 are located on the same side of the first type semiconductor pattern 132. In other words, the micro light-emitting diode unit 100A is preferably a horizontal light-emitting diode wafer.

Different from the micro light emitting diode unit 100, the micro light emitting diode unit 100A does not include the sacrificial structure S covering the first type semiconductor pattern 132, and the bottom of the first type semiconductor pattern 132 may be exposed, that is, the first The bottom (lower surface) of the semiconductor pattern 132 is not covered by the film layer. The manufacturing method of the micro-light-emitting diode unit intermediary structure 1000A and the micro-light-emitting diode unit 100A has similar effects and advantages to the aforementioned micro-light-emitting diode unit intermediary structure 1000 and the micro-light-emitting diode unit 100. Will not be repeated here.

FIG. 3A to FIG. 3B are schematic cross-sectional views of a part of a method for manufacturing a micro-light-emitting diode unit interposer structure according to an embodiment of the present invention. The manufacturing method of the intermediate structure of the micro-light-emitting diode unit of FIG. 3A to FIG. 3B is similar to that of the intermediate structure of the micro-light-emitting diode unit of FIG. 1H to FIG. 1I. Therefore, the same or corresponding components are the same. Or the corresponding reference sign. The main difference between the two is that in the embodiment of FIGS. 3A to 3B, the second sacrificial layer 210 may not be patterned. In addition, in the manufacturing process of the micro-light-emitting diode unit interposer 1000B, the manufacturing process before FIG. 3A is the same as the manufacturing process of FIG. 1A to FIG. 1G, so for the manufacturing process before FIG. 3A, please refer to FIG. 1A to FIG. 1G and the foregoing description are not repeated here.

Referring to FIG. 1G and FIG. 3A, after forming the structure as shown in FIG. 1G, then, at least part of the first sacrificial layer 140, at least part of the second sacrificial layer 210, or a combination thereof are removed, so that each A gap g exists between the micro-light-emitting diode LED and the transfer substrate S2 to complete the micro-light-emitting diode unit intermediary structure 1000B. Different from the manufacturing method of the micro-light-emitting diode unit interposer 1000, in the embodiment of FIG. 3A, in addition to removing the micro-light-emitting diode LED and the insulation pattern 310 (the first and second insulation patterns 312) , 314) In addition to the exposed (uncovered) part of the first sacrificial layer 142, a part of the first sacrificial layer 142 located directly under the micro light-emitting diode LED can be removed, while remaining directly under the connection portion 312a. Part of the first sacrificial layer 142 (ie, the first sacrificial pattern 142B) and the complete second sacrificial layer 210. The second sacrificial layer 210 covers the transfer substrate S2. The first sacrificial pattern 142B is disposed on the second sacrificial layer 210. The connection portion 312 a of the insulating pattern 310 (for example, the first insulating pattern 312) is temporarily fixed on the second sacrificial layer 210 through the first sacrificial pattern 142B. The micro-light emitting diode LED, the connection portion 312 a of the insulating pattern 310 (for example, the first insulating pattern 312), the first sacrificial pattern 142B, and the upper surface of the second sacrificial layer 210 define a gap g. For example, in the embodiment of FIG. 3A, the first sacrificial layer 140 may be an inorganic material layer (for example, a metal), and the second sacrificial layer 210 may be an organic material layer (for example, a photoresist). A portion of the first sacrificial layer 140 is removed by etching to pattern the first sacrificial pattern 142B, and the second sacrificial layer 210 remains. Since the wet etching sequence can remove the inorganic material but is not easy to remove the organic material (eg, the second sacrificial layer 210), the second sacrificial layer 210 can be retained during the process of patterning the first sacrificial pattern 142B.

Referring to FIG. 3B, the elastic light-emitting head P is used to extract the micro-light-emitting diode LED on the transfer substrate S2 to form a micro-light-emitting diode unit 100B. When the elastic transducing head P extracts the micro-light emitting diode LED and moves in a direction d away from the transfer substrate S2, the connection portion 312a of the insulation pattern 310 (for example, the first insulation pattern 312) is broken, that is, a part of the connection portion 312a Will remain on the micro-light-emitting diode LED, and the other part of the connection portion 312a will remain on the sacrificial structure S, so that the micro-light-emitting diode LED is separated from the transfer substrate S2, thereby forming a micro-light-emitting diode unit 100B.

The micro light emitting diode unit 100B includes a first type semiconductor pattern 132, a light emitting pattern 122 on the first type semiconductor pattern 132, a second type semiconductor pattern 112 on the light emitting pattern 122, and the first type semiconductor pattern 132 and The first and second electrodes 410 and 420 and the insulating pattern 310 (including the first and second insulating patterns 312 and 314) electrically connected to the second type semiconductor pattern 112. In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first type semiconductor layer and the second type semiconductor layer, the second type semiconductor pattern 112 is located on the first type semiconductor pattern 132. The vertical projection area of the first type semiconductor pattern 132 on the second type semiconductor pattern 112 exceeds the area of the second type semiconductor pattern 112. The insulating pattern 310 (including the first and second insulating patterns 312 and 314) covers the first type semiconductor pattern 132 and the second type semiconductor pattern 112 and partially exposes (or is called uncovered) the first and second electrodes 410 and 420. The first and second electrodes 410 and 420 are located on the same side of the first type semiconductor pattern 132. In other words, the micro light emitting diode unit 100B is preferably a horizontal light emitting diode wafer.

Different from the micro light emitting diode unit 100, the micro light emitting diode unit 100B does not include a sacrificial pattern covering the first type semiconductor pattern 132, and the bottom (or lower surface) of the first type semiconductor pattern 132 may be Exposed (or called uncovered). The manufacturing method of the micro-light-emitting diode unit intermediary structure 1000B and the micro-light-emitting diode unit 100B has similar effects and advantages as the aforementioned micro-light-emitting diode unit intermediary structure 1000 and the micro-light-emitting diode unit 100 Will not be repeated here.

4A to 4H are schematic cross-sectional views of a method for manufacturing a micro-light-emitting diode unit interposer according to an embodiment of the present invention. The manufacturing method of the intermediary structure of the micro-light-emitting diode unit of FIGS. 4A to 4H is similar to the manufacturing method of the intermediary structure of the micro-light-emitting diode unit of FIGS. 1A to 1I, and therefore the same or corresponding components are the same or related The corresponding reference sign indicates. The main difference between the two is that in the embodiment of FIGS. 4A to 4H, the first type semiconductor pattern 132C is formed after the insulating pattern 310C and the first and second electrodes 410 and 420 are formed, unlike in FIG. 1A. In the embodiment shown in FIG. 1I, the insulating pattern 310 and the first and second electrodes 410 and 420 are formed after the first type semiconductor pattern 132 is patterned. The following mainly explains the differences. Please refer to the previous description for the same points, and will not repeat them here.

Referring to FIG. 4A, first, a semiconductor structure 10 is provided. The semiconductor structure 10 includes a multilayer semiconductor (not labeled) and a first sacrificial layer 140 sequentially stacked on the inner surface of the growth substrate S1. The first sacrificial layer 140 is disposed on a multilayer semiconductor. The multilayer semiconductor includes a first-type semiconductor layer 130 and a second-type semiconductor layer of opposite polarity to the first-type semiconductor layer 110. The polarities of the first-type and second-type semiconductor layers 130 and 110 may be N-type or P-type semiconductor layers, respectively. In the embodiment of the present invention, the first type semiconductor layer 130 is a P-type semiconductor layer on the inner surface of the growth substrate S1 and the second type semiconductor layer 110 is an N-type semiconductor layer on the first type semiconductor layer and the growth substrate S1. Between is an example, but it is not limited to this. In other embodiments, the first type semiconductor layer 130 is an N-type semiconductor layer on the inner surface of the growth substrate S1 and the second type semiconductor layer 110 is a P-type semiconductor layer on the first type semiconductor layer. In the embodiment of the present invention, a film layer may be optionally inserted at the interface between the first type semiconductor layer and the second type semiconductor layer or the interface between the first type semiconductor layer and the second type semiconductor layer may be used as the light emitting layer. 120. In the embodiment of the present invention, a film layer can be inserted at the interface between the first type semiconductor layer and the second type semiconductor layer as the light emitting layer 120 as an example, but it is not limited thereto. In other embodiments, a film layer is not inserted as a light emitting layer at the interface between the first type semiconductor layer and the second type semiconductor layer. Please refer to FIG. 4B. Next, a supporting structure 20 is provided. The carrier structure 20 includes a transfer substrate S2 and a second sacrificial layer 210 covering the inner surface of the transfer substrate S2. Next, as shown in FIG. 4B, the first sacrificial layer 140 of the semiconductor structure 10 and the second sacrificial layer 210 of the carrier structure 20 are bonded to fix the semiconductor structure 10 on the carrier structure 20. Please refer to FIGS. 4B and 4C. Next, the growth substrate S1 of the semiconductor structure 10 is removed. Referring to FIGS. 4C and 4D, the second type semiconductor layer 110 and the light emitting layer 120 are patterned to form a plurality of second type semiconductor patterns 112 and a plurality of light emitting patterns 122 separated from each other. A corresponding second type semiconductor pattern 112 is disposed on each light emitting pattern 122. In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first type semiconductor layer and the second type semiconductor layer, the light emitting layer 120 will not be patterned. A corresponding second type semiconductor pattern 112 is arranged.

The difference from the embodiment of FIGS. 1A to 1I is that, as shown in FIGS. 4D and 4E, in this embodiment, the first type is patterned after the second type semiconductor pattern 112 and the light emitting pattern 122 are patterned. Before the semiconductor layer 130, an insulating pattern 310C is formed on the second type semiconductor pattern 112, the light emitting pattern 122, and the first type semiconductor layer 130. In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first type semiconductor layer and the second type semiconductor layer, the insulating pattern 310C covers the corresponding second type semiconductor pattern 112 and the first type semiconductor pattern. 132C. The insulating pattern 310C covers the sidewalls 112 a and 112 b of the second-type semiconductor pattern 112 and the sidewalls 122 a and 122 b of the light emitting pattern 122. The insulation pattern 310C has a connection portion 312 aC extending outside the second-type semiconductor pattern 112 and the light-emitting pattern 122. The connection portion 312aC is extended and fixed on the first type semiconductor layer 130. Next, first and second electrodes 410 and 420 are formed on the insulating pattern 310C. The first electrode 410 is electrically connected to the first type semiconductor layer 130. The second electrode 420 is electrically connected to the second-type semiconductor pattern 112.

Please refer to FIG. 4E and FIG. 4F. Next, a part of the first-type semiconductor layer 130 exposed (or called uncovered) by the second-type semiconductor pattern 112, the insulating pattern 310C, and the first and second electrodes 410 and 420 is removed. To form a plurality of first-type semiconductor patterns 132C. A corresponding light-emitting pattern 122 and a corresponding second-type semiconductor pattern 112 are disposed on each of the first-type semiconductor patterns 132C. Correspondingly, a first type semiconductor pattern 132C, a light emitting pattern 122, a second type semiconductor pattern and the first and second electrodes 410, 420 constitute a micro light emitting diode LED. In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor pattern 132C, the second type semiconductor pattern 112, the first electrode 410, and The second electrode 420 may constitute a micro light emitting diode LED. Among them, the size of the miniature light-emitting diode LED is micrometer or nanometer. A plurality of micro light emitting diode LED arrays are arranged on the transfer substrate S2. The vertical projection area of the first type semiconductor pattern 132C of each miniature light-emitting diode LED on the transfer substrate S2 preferably exceeds the vertical projection area of the corresponding second type semiconductor pattern 112 on the transfer substrate S2 and the corresponding light emitting pattern. The vertical projection area of 122 on the transfer substrate S2. The first type semiconductor pattern 132C, the light emitting pattern 122, and the second type semiconductor pattern 112 of each miniature light emitting diode LED are sequentially arranged in a direction d away from the transfer substrate S2. Different from the embodiment of FIGS. 1A to 1I, as shown in FIG. 4F, in this embodiment, the insulating pattern 310C (for example, the first insulating pattern 312C) does not cover the sidewall 132 a of the first type semiconductor pattern 132C.

Please refer to FIG. 4F and FIG. 4G. Then, at least part of the first sacrificial layer 140, at least part of the second sacrificial layer 210, or at least part of the stacked layers of the foregoing are removed, so that each micro-light emitting diode There is a gap g between the body LED and the inner surface of the transfer substrate S2. For example, there is a gap between the outer surface (bottom surface) of the first first sacrificial layer 140 under each micro-light emitting diode LED and the inner surface of the transfer substrate S2. g, thus completing the micro-light-emitting diode unit intermediate structure 1000C. For example, in this embodiment, a portion of the first sacrificial layer 140 exposed (or called uncovered) by the micro-light emitting diode LED and the insulating pattern 310C may be removed, while remaining on the micro-light emitting diode. A portion of the first sacrificial layer (ie, the first sacrificial pattern 142) directly under the LED and directly under the connection portion 312aC; it can be removed (or called uncovered) and located by the micro-light emitting diode LED and the insulating pattern 310C and located The second sacrificial layer 210 of the portion directly below the miniature light-emitting diode LED remains a portion of the second sacrificial layer (ie, the second sacrificial pattern 212) located directly below the connection portion 312aC. As shown in FIG. 4G, a portion of the first sacrificial pattern 142 is stacked on the corresponding second sacrificial pattern 212. The stacked first sacrificial pattern 142 and the second sacrificial pattern 212 form a sacrificial structure or a connection structure. S. The connection portion 312aC connected to the micro light-emitting diode LED is temporarily fixed to the transfer substrate S2 through the sacrificial structure S. There is a gap g between the sacrificial structure S and the inner surface S2 of the transfer substrate. In this embodiment, the first sacrificial pattern 142 covers the bottom of the first type semiconductor pattern 132C of the micro light-emitting diode LED, and the second sacrificial pattern 212 exposes (or is called uncovered) the first sacrificial pattern 142 and the first The one-type semiconductor pattern 132C overlaps a part.

Referring to FIG. 4H, the elastic light-emitting head P is used to extract the micro-light-emitting diode LED on the transfer substrate S2. When the elastic transducing head P extracts the micro-light-emitting diode LED and moves in a direction d away from the transfer substrate S2, at least part of the sacrificial structure S is separated from the transfer substrate S2, so that the micro-light-emitting diode LED leaves the transfer substrate S2. And form a micro light emitting diode unit 100C. In detail, if the size of the second sacrificial pattern 212 is extremely small (eg, several square micrometers), in this embodiment, the second sacrificial pattern 212 may be peeled from the first sacrificial pattern 142 and left on the transfer substrate S2. However, the present invention is not limited to this. In other embodiments, when the flexible transducing head P extracts the micro-light-emitting diode LED, other situations may occur, for example: (1) the second sacrificial pattern 212 may partially remain in The first sacrificial pattern 142, (2) the second sacrificial pattern 212 may partially remain on the transfer substrate S2, or (3) the second sacrificial pattern 212 may be peeled off from the transfer substrate S2 and leave.

Referring to FIG. 4H, the micro-light emitting diode unit 100C includes a first-type semiconductor pattern 132C, a light-emitting pattern 122 on the first-type semiconductor pattern 132C, a second-type semiconductor pattern 112 on the light-emitting pattern 122, and the first and second semiconductor patterns 112, respectively. The first and second electrodes 410 and 420 and the insulating pattern 310C which are electrically connected to the first semiconductor pattern 132C and the second semiconductor pattern 112 are electrically connected. The vertical projection area of the first type semiconductor pattern 132C on the second type semiconductor pattern 112 exceeds the area of the second type semiconductor pattern 112. The insulating pattern 310C covers the first type semiconductor pattern 132C and the second type semiconductor pattern 112 and exposes the first and second electrodes 410 and 420.

In this embodiment, the insulating pattern 310C covers the micro light-emitting diode LED and has a connection portion 312 aC extending to the outside of the light-emitting pattern 122 and the second-type semiconductor pattern 112. Specifically, the insulating pattern 310C includes a first insulating pattern 312C and a second insulating pattern 314C. The first insulating pattern 312C is formed on the second-type semiconductor pattern 112 and covers a sidewall 112 a of the second-type semiconductor pattern 112 and a sidewall 122 a of the light-emitting pattern 122. The first insulating pattern 312C exposes (or is called uncovered) the sidewall 132a of the first type semiconductor pattern 132C. The second insulation pattern 314C is formed on the second type semiconductor pattern 112 and covers the sidewall 112 b of the second type semiconductor pattern 112 and the sidewall 122 b of the light emitting pattern 122. The second insulation pattern 314C exposes (or is called uncovered) the sidewall 132b of the first type semiconductor pattern 132C. In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first and second type semiconductor layers, the insulating pattern 310C includes the design of the first and second insulating patterns 312C and 314C and other components Connection will be changed as described above. The insulating pattern 310C (including the first and second insulating patterns 312C and 314C) does not exceed the first type semiconductor pattern 132C. In this embodiment, the micro light emitting diode unit 100C further includes a first sacrificial pattern 142. The first sacrificial pattern 142 covers the bottom of the first type semiconductor pattern 132. The first type semiconductor pattern 132C is located between the light emitting pattern 122 and the first sacrificial pattern 142. However, the present invention is not limited thereto. In other embodiments, the micro light emitting diode unit may not include the first sacrificial pattern 142. The manufacturing method of the micro-light-emitting diode unit intermediary structure 1000C and the micro-light-emitting diode unit 100C has similar effects and advantages as the aforementioned micro-light-emitting diode unit intermediary structure 1000 and the micro-light-emitting diode unit 100 Will not be repeated here.

FIG. 5A to FIG. 5B are schematic cross-sectional views of a method for manufacturing a part of an intermediary structure of a micro-light-emitting diode unit according to an embodiment of the present invention. The manufacturing method of the intermediate structure of the micro-light-emitting diode unit of FIGS. 5A to 5B is similar to the manufacturing method of the intermediate structure of the micro-light-emitting diode unit of FIGS. 4G to 4H. Therefore, the same or corresponding components are the same. Or the corresponding reference sign. The main difference between the two is that the structures and formation methods of the first and second sacrificial patterns 142D and 212D in FIGS. 5A to 5B are different from those of the first and second sacrificial patterns 142 and 212 in FIGS. 4G to 4H. In addition, in the manufacturing process of the micro-light emitting diode unit interposer 1000D, the manufacturing process before FIG. 5A is the same as the manufacturing process shown in FIGS. 4A to 4F, so please refer to FIG. 4A for the manufacturing process before FIG. 5A. Up to FIG. 4F and the foregoing description, the illustration and description will not be repeated here.

Please refer to FIG. 4F and FIG. 5A. After forming the structure shown in FIG. 4F, then, at least part of the first sacrificial layer 140, at least part of the second sacrificial layer 210 or at least part of the foregoing Stack the layers so that there is a gap g between each micro-light-emitting diode LED and the transfer substrate S2, for example: the outer surface (bottom surface) of the first type semiconductor pattern 132C of each micro-light-emitting diode LED and the transfer substrate A gap g exists between the inner surfaces of S2, thereby completing the micro-light-emitting diode unit intermediary structure 1000D. Different from the micro light-emitting diode unit interposer 1000, in the embodiment of FIG. 5A, the first sacrificial layer 140 and the second sacrificial layer 210 may both be organic materials or inorganic materials, and may be in the same process. At the same time, the first and second sacrificial patterns 142D and 212D are patterned. In detail, the light-emitting diode LED and the insulating pattern 310C (including the first and second insulating patterns 312C and 314C) can be removed (or uncovered) and located directly below the micro-light emitting diode LED. A portion of the first sacrificial layer 140 and a portion of the second sacrificial layer 210, while a portion of the first sacrificial layer 140 (ie, the first sacrificial pattern 142D) and a portion of the second sacrificial layer 210 (ie, directly below the connection portion 312aC) remain. The second sacrificial pattern 212D). The first sacrificial pattern 142D and the second sacrificial pattern 212D of the sacrificial structure (or connection structure) S are collectively exposed (or called uncovered) the bottom of the first type semiconductor pattern 132C. The sacrificial structure S is connected to the connection portion 312 aC of the insulating pattern 310C (for example, the first insulating pattern 312C).

Referring to FIG. 5B, the elastic light-emitting head P is used to extract the micro-light-emitting diode LED on the transfer substrate S2 to form a micro-light-emitting diode unit 100D. When the elastic transposition head P extracts the micro-light emitting diode LED and moves in a direction d away from the transfer substrate S2, the first type semiconductor pattern 132C is separated from the sacrificial structure S, for example, the sacrificial structure S will remain on the inner surface of the transfer substrate S2. , Further forming a micro light emitting diode unit 100D.

The micro light emitting diode unit 100D includes a first type semiconductor pattern 132C, a light emitting pattern 122 on the first type semiconductor pattern 132C, a second type semiconductor pattern 112 on the light emitting pattern 122, and the first type semiconductor pattern 132C and The second type semiconductor pattern 112 is electrically connected to the first and second electrodes 410 and 420 and the insulating pattern 310C (including the first and second insulating patterns 312C and 314C). In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor pattern 132C, the second type semiconductor pattern 112, the first electrode 410, and The second electrode 420 may constitute a micro light emitting diode unit LED. Among them, the size of the miniature light-emitting diode unit LED is micron or nanometer. The vertical projection area of the first type semiconductor pattern 132C on the second type semiconductor pattern 112 exceeds the area of the second type semiconductor pattern 112. The insulating pattern 310C (including the first and second insulating patterns 312C and 314C) covers the first type semiconductor pattern 132C and the second type semiconductor pattern 112 and partially exposes (or is called uncovered) the first and second electrodes 410 and 420. The first and second electrodes 410 and 420 are located on the same side of the first type semiconductor pattern 132C. In other words, the micro light emitting diode unit 100D is a horizontal light emitting diode wafer. The insulating pattern 310C (including the first and second insulating patterns 312C and 314C) covers the micro-light-emitting diode LED, and the insulating pattern 310C (for example, the first insulating pattern 312C) has a light emitting pattern 122 and a second type semiconductor pattern 112 Connection portion 312aC.

Different from the micro light emitting diode unit 100C, the micro light emitting diode unit 100D does not include a sacrificial pattern covering the first type semiconductor pattern 132C, and the bottom of the first type semiconductor pattern 132C may be exposed (or Is covered). The manufacturing method of the micro-light-emitting diode unit intermediary structure 1000D and the micro-light-emitting diode unit 100D has similar effects and advantages as the aforementioned micro-light-emitting diode unit intermediary structure 1000 and the micro-light-emitting diode unit 100 Will not be repeated here.

FIG. 6A to FIG. 6B are schematic cross-sectional views of a part of a manufacturing method of an intermediary structure of a micro-light emitting diode unit according to an embodiment of the present invention. The manufacturing method of the intermediate structure of the micro-light-emitting diode unit of FIG. 6A to FIG. 6B is similar to that of the intermediate structure of the micro-light-emitting diode unit of FIGS. 4G to 4H. Therefore, the same or corresponding components are the same. Or the corresponding reference sign. The main difference between the two is that in the embodiment of FIGS. 6A to 6B, the second sacrificial layer 210 may not be patterned. In addition, during the manufacturing process of the micro-light-emitting diode unit interposer 1000E, the manufacturing process before FIG. 6A is the same as the manufacturing process of FIGS. 4A to 4F, so for the manufacturing process before FIG. 6A, please refer to FIG. 4A to FIG. 4F and the foregoing description are not repeated here.

Please refer to FIG. 4F and FIG. 6A. After forming the structure shown in FIG. 4F, then, at least part of the first sacrificial layer 140, at least part of the second sacrificial layer 210, or at least part of the foregoing two are removed. The layers are stacked so that a gap g exists between each micro-light-emitting diode LED and the transfer substrate S2, thereby completing the micro-light-emitting diode unit intermediary structure 1000E. Different from the micro-light-emitting diode unit intermediate structure 1000C, in the embodiment of FIG. 6A, in addition to removing the micro-light-emitting diode LED and the insulating pattern 310C (including the first and second insulating patterns 312C and 314C) The part of the first sacrificial layer 142 that is exposed (or called uncovered) can be removed, and the part of the first sacrificial layer 142 located directly under the micro-light-emitting diode LED can be removed, and the part directly under the connection portion 312aC can be retained. A portion of the first sacrificial layer 142 (ie, the first sacrificial pattern 142E) and a complete second sacrificial layer 210. The second sacrificial layer 210 covers the inner surface of the transfer substrate S2. The first sacrificial pattern 142E is disposed on the second sacrificial layer 210. The connection portion 312aC of the insulating pattern 310C (for example, the first insulating pattern 312C) is temporarily fixed on the second sacrificial layer 210 through the first sacrificial pattern 142E. The bottom surface (or lower surface or outer surface) of the miniature light-emitting diode LED, that is, the bottom surface (or lower surface or outer surface) of the first type semiconductor pattern 132C, the first sacrificial pattern 142E, and the inner surface of the second sacrificial layer 210 (Also called the upper surface) defines the gap g.

Referring to FIG. 6B, the elastic light emitting head P is used to extract the micro light emitting diode LED on the transfer substrate S2 to form a micro light emitting diode unit 100E. When the elastic transposition head P extracts the micro light-emitting diode LED and moves in a direction d away from the transfer substrate S2, the first type semiconductor pattern 132C is separated from the first sacrificial pattern 142E, for example, the first sacrificial pattern 142E is left at the second sacrificial pattern. On the inner surface (or referred to as the upper surface) of the layer 210, a micro light emitting diode unit 100E is further formed.

The micro light-emitting diode unit 100E includes a first-type semiconductor pattern 132C, a light-emitting pattern 122 on the first-type semiconductor pattern 132C, a second-type semiconductor pattern 112 on the light-emitting pattern 122, and the first-type semiconductor pattern 132C and The second type semiconductor pattern 112 is electrically connected to the first and second electrodes 410 and 420 and the insulating pattern 310C (including the first and second insulating patterns 312C and 314C). In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first and second type semiconductor layers 132C and 112, the first type semiconductor pattern 132C, the second type semiconductor pattern 112, the first type The electrode 410 and the second electrode 420 may constitute a micro light-emitting diode unit LED. Among them, the size of the miniature light-emitting diode unit LED is micron or nanometer. The vertical projection area of the first type semiconductor pattern 132C on the second type semiconductor pattern 112 exceeds the area of the second type semiconductor pattern 112. The insulating pattern 310C (including the first and second insulating patterns 312C and 314C) covers the first type semiconductor pattern 132C and the second type semiconductor pattern 112 and exposes (or is called uncovered) the first and second electrodes 410 and 420. The first and second electrodes 410 and 420 are located on the same side of the first type semiconductor pattern 132C. In other words, the micro light emitting diode unit 100E is a horizontal light emitting diode wafer. The insulating pattern 310C (including the first and second insulating patterns 312C and 314C) covers the micro-light-emitting diode LED, and the insulating pattern 310C (for example, the first insulating pattern 312C) has a light emitting pattern 122 and a second type semiconductor pattern 112 Connection portion 312aC. Different from the micro light emitting diode unit 100C, the micro light emitting diode unit 100E does not include a sacrificial pattern covering the first type semiconductor pattern 132C, and the bottom of the first type semiconductor pattern 132C may be exposed (or cover). The manufacturing method of the micro-light-emitting diode unit intermediary structure 1000E and the micro-light-emitting diode unit 100E has similar effects and advantages to the aforementioned micro-light-emitting diode unit intermediary structure 1000 and the micro-light-emitting diode unit 100. Will not be repeated here.

7A to 7I are schematic cross-sectional views of a method for manufacturing a micro-light-emitting diode unit interposer structure according to an embodiment of the present invention. The manufacturing method of the light-emitting diode intermediary structure of FIGS. 7A to 7I is similar to the manufacturing method of the micro-light-emitting diode intermediary structure of FIGS. 1A to 1I, and therefore the same or corresponding components are represented by the same or corresponding reference numerals. . The main difference between the two is that in the embodiment of FIGS. 7A to 7I, the first and second sacrificial patterns 142F and 212F are formed before the insulating pattern 310F is formed (including the first and second insulating patterns 312F and 314F). Unlike in the embodiment of FIGS. 1A to 1I, the first and second sacrificial patterns 142 and 212 are formed after the insulating pattern 310 (including the first and second insulating patterns 312 and 314) is formed first. The following mainly explains the differences. Please refer to the previous description for the same points, and will not repeat them here.

Referring to FIG. 7A, first, a semiconductor structure 10 is provided. The semiconductor structure 10 includes a multilayer semiconductor (not labeled) and a first sacrificial layer 140 sequentially stacked on the inner surface of the growth substrate S1. The first sacrificial layer 140 is disposed on a multilayer semiconductor. The multilayer semiconductor includes a first-type semiconductor layer 130 and a second-type semiconductor layer 110 having a polarity opposite to the first-type semiconductor layer. The polarities of the first-type and second-type semiconductor layers 130 and 110 may be N-type or P-type semiconductor layers, respectively. In the embodiment of the present invention, the first type semiconductor layer 130 is a P-type semiconductor layer on the inner surface of the growth substrate S1 and the second type semiconductor layer 110 is an N-type semiconductor layer on the first type semiconductor layer and the growth substrate S1. Between is an example, but it is not limited to this. In other embodiments, the first type semiconductor layer 130 is an N-type semiconductor layer on the inner surface of the growth substrate S1 and the second type semiconductor layer 110 is a P-type semiconductor layer on the first type semiconductor layer. In the embodiment of the present invention, a film layer may be optionally inserted at the interface between the first type semiconductor layer and the second type semiconductor layer or the interface between the first type semiconductor layer and the second type semiconductor layer may be used as the light emitting layer. 120. In the embodiment of the present invention, a film layer can be inserted at the interface between the first type semiconductor layer and the second type semiconductor layer as the light emitting layer 120 as an example, but it is not limited thereto. In other embodiments, a film layer is not inserted as a light emitting layer at the interface between the first type semiconductor layer and the second type semiconductor layer. Please refer to FIG. 7B. Next, a supporting structure 20 is provided. The carrier structure 20 includes a transfer substrate S2 and a second sacrificial layer 210 covering the inner surface of the transfer substrate S2. Next, as shown in FIG. 7B, the first sacrificial layer 140 of the semiconductor structure 10 and the second sacrificial layer 210 of the carrier structure 20 are bonded to fix the semiconductor structure 10 on the carrier structure 20. Referring to FIGS. 7B and 7C, the growth substrate S1 of the semiconductor structure 10 is removed. Please refer to FIG. 7C and FIG. 7D. Next, the second type semiconductor layer 110, the light emitting layer 120, and the first type semiconductor layer 130 are patterned to form a plurality of second type semiconductor patterns 112 separated from each other and a plurality of light emission separated from each other. The pattern 122 and a plurality of first-type semiconductor patterns 132C separated from each other. In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first type semiconductor layer and the second type semiconductor layer, a corresponding second type semiconductor is disposed on each first type semiconductor pattern 132C. Pattern 112. The corresponding one-type semiconductor pattern 132C, one light-emitting pattern 122, and one second-type semiconductor pattern are sequentially stacked in a direction d away from the transfer substrate S2, that is, the first-type semiconductor pattern 132C is closest to the transfer substrate S2, and the second The semiconductor pattern 112 is farthest from the transfer substrate S2. In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor pattern 132C and the second type semiconductor pattern 112 are far away from the transfer substrate S2. They are arranged in order in the direction d, that is, the first type semiconductor pattern 132C is closest to the transfer substrate S2, and the second type semiconductor pattern 112 is farthest from the transfer substrate S2.

Please refer to FIG. 7D and FIG. 7E. Next, a part of the first sacrificial layer 140 and a part of the second sacrificial layer 210 exposed (or called uncovered) by the first type semiconductor pattern 132C are removed to form a plurality of first sacrificial layers. The sacrificial pattern 142F and the plurality of second sacrificial patterns 212F. Each first sacrificial pattern 142F and a corresponding second sacrificial pattern 212F are stacked into a sacrificial structure or a connection structure S. The first type semiconductor pattern 132C, the light emitting pattern 122, and the second type semiconductor pattern are disposed on the sacrificial structure S. In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor pattern 132C and the second type semiconductor pattern 112 are disposed in the sacrificial structure S. on. Please refer to FIG. 7F. Next, the insulating pattern 310F includes a first insulating pattern 312F and a second insulating pattern 314F. The first insulating pattern 312F is formed on the second type semiconductor pattern 112 and covers the sidewall 112 a of the second type semiconductor pattern 112, the sidewall 122 a of the light emitting pattern 122, and the sidewall 132 a of the first type semiconductor pattern 132C. The first insulation pattern 312F can further cover the sidewall of the sacrificial structure S. A second insulating pattern 314F is formed on the second type semiconductor layer 112 and covers the other side wall 112b of the second type semiconductor layer 112 and the other side wall 122b of the light emitting pattern 122 and exposes (or is called uncovered) the first type The other sidewall 132b of the semiconductor pattern 132C. In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first and second type semiconductor layers, the insulating pattern 310F includes the design of the first and second insulating patterns 312F and 314F and other components. The connection relationship will be changed. For example, the first insulating pattern 312F is formed on the second type semiconductor pattern 112 and covers the sidewall 112a of the second type semiconductor pattern 112 and the sidewall 132a of the first type semiconductor pattern 132C. The second insulation pattern 314 is formed on the second type semiconductor pattern 112 and covers the other side wall 112b of the second type semiconductor pattern 112 and the other side wall 132b of the first type semiconductor pattern 132C exposed (or not covered). Wait. The first insulation pattern 312F has a connection portion 312aF. The connecting portion 312aF extends outside the micro-light emitting diode LED and is connected to the sacrificial structure S. Furthermore, in this embodiment, the connection portion 312aF may be directly connected / directly contacted to the inner surface of the transfer substrate S2, and may be in contact with the inner surface of the transfer substrate S2.

Referring to FIG. 7G, a first electrode 410 and a second electrode 420 are formed on the micro light-emitting diode LED. The first electrode 410 is located on the first-type semiconductor pattern 132C and is electrically connected to the first-type semiconductor pattern 132C. The second electrode 420 is located on the second-type semiconductor pattern 112 and is electrically connected to the second-type semiconductor pattern 112. Please refer to FIG. 7G and FIG. 7H. Next, the first sacrificial pattern 142F, the second sacrificial pattern 212F, or at least part of the stacked layers of the foregoing are removed, so that the bottom surface of each micro-light emitting diode LED (for example: the first A sacrificial pattern 142F bottom surface), an insulating pattern 310F (for example, the first insulating pattern 312F) has a gap g between the connecting portion 312aF and the inner surface of the transfer substrate S2, and thus the intermediary structure of the micro-light emitting diode unit is completed 1000F. For example, in this embodiment, the second sacrificial pattern 212F located directly under the micro light emitting diode LED may be removed, while the first sacrificial pattern 142F located directly under the micro light emitting diode LED may be removed. The first sacrificial pattern 142F is located between the bottom surface (or called the lower surface or the outer surface) of the micro-light emitting diode LED and the inner surface of the transfer substrate S2. The first sacrificial pattern 142F covers the bottom of the first type semiconductor pattern 132C and is connected to the connection portion 312aF. The connection portion 312aF, the bottom surface of the first sacrificial pattern 142F, and the inner surface of the transfer substrate S define a gap g.

Referring to FIG. 7I, the micro-light-emitting diode LED on the transfer substrate S2 is extracted by the elastic transposition head P, and then the micro-light-emitting diode unit 100F is formed. When the flexible transducing head P extracts the micro-light-emitting diode LED and moves in a direction d away from the transfer substrate S2, a part of the connection portion 312aF is disconnected, that is, a portion of the connection portion 312aF remains in the micro-light-emitting diode. On the LED, another part of the connection portion 312aF will remain on the inner surface of the transfer substrate S2, so that the micro-light-emitting diode LED is separated from the transfer substrate S2, thereby forming a micro-light-emitting diode unit 100F.

The micro light emitting diode unit 100F includes a first type semiconductor pattern 132C, a light emitting pattern 122 on the first type semiconductor pattern 132C, a second type semiconductor pattern 112 on the light emitting pattern 122, and the first type semiconductor pattern 132C and The second type semiconductor pattern 112 is electrically connected to the first and second electrodes 410 and 420 and the insulating pattern 310F (including the first and second insulating patterns 312F and 314F). In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor pattern 132C, the second type semiconductor pattern 112, the first electrode 410, and The second electrode 420 may constitute a micro light emitting diode unit LED. Among them, the size of the miniature light-emitting diode unit LED is micron or nanometer. The vertical projection area of the first type semiconductor pattern 132C on the second type semiconductor pattern 112 preferably exceeds the area of the second type semiconductor pattern 112. The insulating pattern 310F (including the first and second insulating patterns 312F and 314F) covers the first type semiconductor pattern 132C and the second type semiconductor pattern 112 and exposes (or is called uncovered) the first electrode 410 and the second electrode 420. The first electrode 410 and the second electrode 420 are located on the same side of the first type semiconductor pattern 132C. In other words, the micro-light-emitting diode unit 100F is preferably a horizontal light-emitting diode wafer.

The insulating pattern 310F (including the first and second insulating patterns 312F and 314F) covers the micro light emitting diode LED, and the insulating pattern 310F (for example, the first insulating pattern 312F) has a connection portion 312 aF extending outside the micro light emitting diode LED. In this embodiment, the micro light emitting diode unit 100F further includes a first sacrificial pattern 142F. The first sacrificial pattern 142F covers the bottom of the first type semiconductor pattern 132C. The first type semiconductor pattern 132C is located between the light emitting pattern 122 and the first sacrificial pattern 142F. Different from the micro light emitting diode unit 100 of FIG. 1I, the first insulating pattern 312F covers the second type semiconductor pattern 112, the light emitting layer 122, and the sidewalls 112a, 122a, and 132a of the first type semiconductor pattern 132C in addition to the first insulating pattern 312F. A sidewall 142c of a sacrificial pattern 142F. The manufacturing method of the micro-light-emitting diode unit intermediary structure 1000F and the micro-light-emitting diode unit 100F has similar effects and advantages to the aforementioned micro-light-emitting diode unit intermediary structure 1000 and the micro-light-emitting diode unit 100. Will not be repeated here.

FIG. 8A to FIG. 8B are schematic cross-sectional views of a part of a method for manufacturing a micro-light-emitting diode intermediate structure according to an embodiment of the present invention. The manufacturing method of a part of the micro-light-emitting diode intermediary structure of FIGS. 8A to 8B is similar to the manufacturing method of the part of the micro-light-emitting diode unit intermediary structure of FIGS. 7H to 7I. Therefore, the same or corresponding components are the same or The corresponding reference sign indicates. The main difference between the two is that in the embodiment of FIGS. 8A to 8B, the first sacrificial pattern 142F is removed and the second sacrificial pattern 212F is retained. In addition, in the manufacturing process of the micro-light-emitting diode unit interposer 1000G, the manufacturing process before FIG. 8A is the same as the manufacturing process shown in FIGS. 7A to 7G, so please refer to FIG. 8A for the manufacturing process before FIG. 8A. 7A to 7G and the foregoing descriptions are not repeated here.

Referring to FIG. 7G and FIG. 8A, after forming the structure shown in FIG. 7G, then, at least part of the first sacrificial layer 140, at least part of the second sacrificial layer 210, or a combination thereof are removed, so that each A gap g exists between the bottom surface of the micro-light-emitting diode LED and the inner surface of the transfer substrate S2 to complete the micro-light-emitting diode unit intermediate structure 1000G. Different from the micro light emitting diode unit interposer 1000, in the embodiment of FIG. 8A, the first sacrificial pattern 142F can be removed and the second sacrificial pattern 212F can be retained. The second sacrificial pattern 212F is located on the inner surface of the transfer substrate S. The connection portion 312aF is connected to the second sacrificial pattern 212F. The connection portion 312aF of each insulating pattern 310F (for example, the first insulating pattern 312F), the inner surface (or top surface) of the second sacrificial pattern 212F, and the bottom of the first type semiconductor layer 132C define a gap g.

Referring to FIG. 8B, the elastic light-emitting head P is used to extract the micro-light-emitting diode LED on the transfer substrate S2 to form a micro-light-emitting diode unit 100G. When the elastic transducing head P extracts the micro light-emitting diode LED and moves in a direction d away from the transfer substrate S2, a part of the connection portion 312aF of the insulation pattern 310F (for example, the first insulation pattern 312F) is disconnected, that is, connected A part of the portion 312aF will remain on the micro-light-emitting diode LED, and another portion of the connection portion 312aF will remain on the inner surface of the transfer substrate S2, so that the micro-light-emitting diode LED is separated from the inner surface of the transfer substrate S2, and further, A micro light emitting diode unit 100G is formed.

The micro light emitting diode unit 100G includes a first type semiconductor pattern 132C, a light emitting pattern 122 on the first type semiconductor pattern 132C, a second type semiconductor pattern 112 on the light emitting pattern 122, and the first type semiconductor pattern 132C and The second type semiconductor pattern 112 is electrically connected to the first and second electrodes 410 and 420 and the insulating pattern 310F (including the first and second insulating patterns 312F and 314F). In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor pattern 132C, the second type semiconductor pattern 112, the first electrode 410, and The second electrode 420 may constitute a micro light emitting diode unit LED. Among them, the size of the miniature light-emitting diode unit LED is micron or nanometer. The vertical projection area of the first type semiconductor pattern 132C on the second type semiconductor pattern 112 exceeds the area of the second type semiconductor pattern 112. The insulating patterns 312F and 314F cover the first type semiconductor pattern 132C and the second type semiconductor pattern 112 and expose (or be referred to as uncovered) the first and second electrodes 410 and 420. The first and second electrodes 410 and 420 are located on the same side of the first type semiconductor pattern 132. In other words, the micro light emitting diode unit 100G is a horizontal light emitting diode wafer. Different from the micro-light-emitting diode unit 100F, the micro-light-emitting diode unit 100G does not include a sacrificial pattern, and the bottom of the first type semiconductor layer 132 may be exposed (or called uncovered). The manufacturing method of the micro-light-emitting diode unit intermediary structure 100G and the micro-light-emitting diode unit 100G has similar effects and advantages to the aforementioned micro-light-emitting diode unit intermediary structure 1000 and the micro-light-emitting diode unit 100 manufacturing method. Will not be repeated here.

FIG. 9A to FIG. 9B are schematic cross-sectional views of a part of a manufacturing method of an intermediary structure of a micro-light emitting diode unit according to an embodiment of the present invention. The manufacturing method of the intermediate structure of the micro-light-emitting diode unit of FIG. 9A to FIG. 9B is similar to the manufacturing method of the intermediate structure of the micro-light-emitting diode unit of FIG. 7H to FIG. 7I. Therefore, the same or corresponding components are the same. Or the corresponding reference sign. The main difference between the two is that in the embodiment of FIGS. 9A to 9B, both the first sacrificial pattern 142F and the second sacrificial pattern 212F can be removed. For the method of removing, refer to FIG. 2A. In addition, in the manufacturing process of the micro-light-emitting diode unit interposer 1000H, the manufacturing process before FIG. 9A is the same as the manufacturing process shown in FIGS. 7A to 7G, so for the manufacturing process before FIG. 9A, please refer to FIG. 7A. Up to FIG. 7G and the foregoing description, the illustration and description will not be repeated here.

Referring to FIG. 7G and FIG. 9A, after forming the structure shown in FIG. 7G, then, at least part of the first sacrificial pattern 142F, at least part of the second sacrificial pattern 212F, or a combination thereof are removed to make the micro-light emission A gap g exists between the bottom surface of the diode LED and the inner surface of the transfer substrate S2 to complete the micro-light-emitting diode unit interposer 1000H. Different from the micro light emitting diode unit interposer 1000, in the embodiment of FIG. 9A, the first sacrificial pattern 142F and the second sacrificial pattern 212F can be removed. The connection portion 312aF of the insulating pattern 312F, the bottom (or outer surface) of the first type semiconductor layer 132, and the inner surface of the transfer substrate S2 define a gap g.

Referring to FIG. 9B, the elastic light emitting head P is used to extract the micro light emitting diode LED on the transfer substrate S2 to form a micro light emitting diode unit 100H. When the elastic transducing head P extracts the micro-light-emitting diode LED and moves in a direction d away from the transfer substrate S2, a part of the connection portion 312aF of the insulation pattern 310F (for example, the first insulation pattern 312F) is broken, that is, the connection portion A part of 312aF will remain on the micro-light-emitting diode LED, and another part of the connection portion 312aF will remain on the inner surface of the transfer substrate S2, so that the micro-light-emitting diode LED is separated from the inner surface of the transfer substrate S2, thereby forming Miniature light emitting diode unit 100H.

The micro light emitting diode unit 100G includes a first type semiconductor pattern 132C, a light emitting pattern 122 on the first type semiconductor pattern 132C, a second type semiconductor pattern 112 on the light emitting pattern 122, and the first type semiconductor pattern 132C and The second type semiconductor pattern 112 is electrically connected to the first and second electrodes 410 and 420 and the insulating pattern 310F (including the first and second insulating patterns 312F and 314F). In other embodiments, as described above, if the light emitting layer 120 is not inserted between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor pattern 132C, the second type semiconductor pattern 112, the first electrode 410, and The second electrode 420 may constitute a micro light emitting diode unit LED. Among them, the size of the miniature light-emitting diode unit LED is micron or nanometer. The vertical projection area of the first type semiconductor pattern 132C on the second type semiconductor pattern 112 exceeds the area of the second type semiconductor pattern 112. The insulating pattern 310F (including the first and second insulating patterns 312F and 314F) covers the first type semiconductor pattern 132C and the second type semiconductor pattern 112 and exposes (or is called uncovered) the first and second electrodes 410 and 420. The first and second electrodes 410 and 420 are located on the same side of the first type semiconductor pattern 132C. In other words, the micro light emitting diode unit 100H is a horizontal light emitting diode wafer. Different from the micro light emitting diode unit 100F, the micro light emitting diode unit 100H does not include a sacrificial pattern, and the bottom of the first type semiconductor layer 132C may be exposed (or referred to as uncovered). The manufacturing method of the micro-light-emitting diode unit intermediary structure 1000H and the micro-light-emitting diode unit 100H has the same effects and advantages as the aforementioned micro-light-emitting diode unit intermediary structure 1000 and the micro-light-emitting diode unit 100. Will not be repeated here.

10A to 10G are schematic cross-sectional views of a method for manufacturing a micro-light emitting diode device according to an embodiment of the present invention. Please refer to FIG. 10A. First, a multilayer semiconductor (not labeled) is sequentially formed on an inner surface of a growth substrate 510. The multilayer semiconductor includes a first type semiconductor layer 520 and a second type semiconductor layer 540 of opposite polarity to the first type semiconductor layer. . The polarities of the first-type and second-type semiconductor layers 520 and 540 may be N-type or P-type semiconductor layers, respectively. In the embodiment of the present invention, the first type semiconductor layer 520 is a P-type semiconductor layer on the inner surface of the growth substrate S1 and the second type semiconductor layer 540 is an N-type semiconductor layer on the first type semiconductor layer and the growth substrate S1. Between is an example, but it is not limited to this. In other embodiments, the first type semiconductor layer 520 is an N-type semiconductor layer on the inner surface of the growth substrate S1 and the second type semiconductor layer 540 is a P-type semiconductor layer on the first type semiconductor layer. In the embodiment of the present invention, a film layer may be optionally inserted at the interface between the first type semiconductor layer and the second type semiconductor layer or the interface between the first type semiconductor layer and the second type semiconductor layer may be used as the light emitting layer. 530. In the embodiment of the present invention, a film layer can be inserted at the interface between the first type semiconductor layer and the second type semiconductor layer as the light emitting layer 530 as an example, but it is not limited thereto. In other embodiments, a film layer is not inserted as a light emitting layer at the interface between the first type semiconductor layer and the second type semiconductor layer. A plurality of electrodes 550 are formed on the first type semiconductor layer 520 and the second type semiconductor layer 540, respectively. The first type semiconductor layer 520, the selective light emitting layer 530, and the second type semiconductor layer 540 are sequentially arranged in a direction d1 away from the growth substrate 510. The plurality of electrodes 550 are electrically connected to the first type semiconductor layer 520 and the second type semiconductor layer 540, respectively. The first type semiconductor layer 520, the light emitting layer 530, the second type semiconductor layer 540, and the plurality of electrodes 550 constitute a micro light emitting diode LED. In other embodiments, as described above, if the light emitting layer 530 is not inserted between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor pattern 520, the second type semiconductor pattern 540, and a plurality of electrodes 550 Can form a miniature light-emitting diode LED. Among them, the size of the miniature light-emitting diode LED is micrometer or nanometer. The plurality of electrodes 550 of the micro light emitting diode LED are all located on the same side of the first type semiconductor layer 520. In other words, the micro light emitting diode LED is preferably a horizontal light emitting diode chip. In this embodiment, the growth substrate 510 is, for example, a sapphire substrate. However, the present invention is not limited to this. In other embodiments, the materials of the growth substrate 510, the first-type semiconductor layer 520, and the second-type semiconductor layer 540 may be other suitable materials.

FIG. 11 is a schematic top view illustrating a method of manufacturing the micro-light emitting diode device corresponding to FIG. 10B. Please refer to FIGS. 10B and 11. Next, a supporting structure 600 is provided. The carrier structure 600 includes a transfer substrate 610, a sacrificial layer 620 covering the inner surface of the transfer substrate 610, and a circuit structure 640 on the sacrificial layer 620. In this embodiment, the supporting structure 600 may optionally include a support layer 630, and the support layer 630 includes a first support portion 632 and a second support portion 634. The support layer 630 is located on the sacrificial layer 620. The circuit structure 640 is located on the support layer 630. To simplify the manufacturing process, the transfer substrate 610, the sacrificial layer 620, and the support layer 630 may be taken from a silicon-on-insulator (SOI) wafer. For example, the insulating silicon-coated wafer may include two layers of silicon and one layer of silicon oxide, wherein an insulating layer (such as silicon oxide) is sandwiched between the two layers of silicon. For example, the transfer substrate 610 is composed of a silicon wafer, the sacrificial layer 620 is composed of an insulating layer, and the support layer 630 is composed of a silicon wafer. The insulating layer is an electrically insulating substance, and the electrically insulating substance is, for example, silicon dioxide. Or sapphire, but the invention is not limited to this.

The support layer 630 defines two openings 632a between the first support portion 632 and the second support portion 634. In this embodiment, the second support portion 634 is located between the two openings 632a, and the first support portion 632 is located outside the two openings 632a and not between the two openings 632a. In this embodiment, the first support portion 632 and the second support portion 634 can be selectively disconnected, that is, the support layer 630 can have only one opening 632a. The circuit structure 640 includes a main body portion 642 and a narrow portion (or a connecting portion) 644 extending outward from the main body portion 642. The width W1 of the main body portion 642 is larger than the width W2 of the narrow portion 644. The main body portion 642 is disposed on the second support portion 634. The narrow portion 644 is filled in at least a part of the opening 632 a between the first support portion 632 and the second support portion 634 to bridge the first support portion 632 and the second support portion 634.

Referring to FIG. 10C, the electrode 550 of the micro-light-emitting diode LED and the circuit structure 640 of the carrier structure 600 are bonded, so that the electrode 550 of the micro-light-emitting diode LED faces the circuit structure 640 and is electrically connected to the circuit structure 640. In short, the miniature light-emitting diode LED is bonded to the circuit structure 640 by solder (solder (not shown)) in a flip chip manner. For example, before the bonding step, solder is located on the carrier structure 600. In this embodiment, the vertical projection of the micro-light emitting diode LED on the transmission substrate 610 is located in the opening 632a of the first support portion 632 within the vertical projection of the transmission substrate 610. The second support portion 634 overlaps the micro light emitting diode LED. In this embodiment, a portion of the main body 642 corresponding to one of the electrodes 550 of the micro-light-emitting diode LED, preferably, a protrusion is provided to allow the micro-light-emitting diode LED to be bonded to the carrier structure 600. The surface of the first type semiconductor pattern 520 can be substantially displayed on a horizontal line to facilitate the subsequent absorption and transfer processes, and to increase the joint yield of the micro-light-emitting diode LED and the carrier structure 600. However, the present invention does not take this as an example. However, in other embodiments, other suitable designs may be used. Referring to FIG. 10C and FIG. 10D, the growth substrate 510 on the micro-light emitting diode LED is removed. For example, in this embodiment, the laser lift-off technology can be used to remove the growth substrate 510, but the present invention is not limited to this. In other embodiments, other suitable The method removes the growth substrate 510.

FIG. 12 is a schematic top view illustrating a method of manufacturing the micro-light emitting diode device corresponding to FIG. 10E. Fig. 10E corresponds to the section line A-A 'of Fig. 12. Please refer to FIG. 10D, FIG. 10E, and FIG. 12, then, remove a part of the sacrificial layer 620, such as the area 622, directly under the micro-light-emitting diode LED, and reserve another part outside the shielding area of the micro-light-emitting diode LED. The sacrificial layer 620, such as the region 624, forms a gap G in FIG. 10E. For example, the bottom surface (or outer surface) of the second support portion 634, the bottom surface (or outer surface) of the narrow portion (or connection portion) 644 located in each opening 632a, and the sacrificial layer of another portion A gap G exists between 620 (eg, region 624) and the inner surface of the transfer substrate 610. In other embodiments, at least one of the bottom surface (or outer surface) of the second support portion 634, the bottom surface (or outer surface) of the narrow portion (or connection portion) 644 in each opening 632a, There is a gap G between the bottom surface (or outer surface) of the support portion 632, another portion of the sacrificial layer 620 (for example, the region 624), and the inner surface of the transfer substrate 610. Specifically, in this embodiment, a portion of the sacrificial layer 620, such as the area 622, may be removed directly below the second support portion 634 and directly below the narrow portion 644 of the circuit structure 640, and the first support portion 632 may be retained directly below A portion of the sacrificial layer 620, such as region 624. In other words, a part of the sacrificial layer 620, such as the region 622, in the opening 632a of the first supporting part 632 may be removed, while a part of the sacrificial layer 620, such as the region 624, covered by the first supporting part 632 may be removed. After the narrow portion 644 of the circuit structure 640 and a portion of the sacrificial layer 620 below the second support portion 634, such as the region 622 being hollowed out, the micro-light emitting diode LED passes through the narrow portion 644 of the circuit structure 640 and is not removed. The first support portion 632 is temporarily fixed on the transfer substrate 610. In other words, in this embodiment, the narrow portion 644 of the line structure 640 is used as a tether as a temporary fixing structure of the micro-light-emitting diode LED. The temporary fixing structure is sufficient to support the micro-light-emitting diode LED. Function, at the same time, it facilitates the subsequent extraction of the transposition head P, and forms a contact force that is weaker than the adhesive transmission substrate 610 before the second support portion 634 is removed.

Please refer to FIG. 12. In this embodiment, the number of the tethers (for example, the narrow part 644) may be multiple, and the multiple tethers (for example, the narrow part 644) may be disposed on the left and right sides of the micro-light emitting diode LED. Side (projected on the transfer substrate 610), and the width W2 of each tether (for example, the narrow portion 644) may be the same. However, the present invention is not limited to this. The number of tethers, the position of the tethers, and the width of the tethers can be made other appropriate designs, which will be illustrated below with reference to other figures.

FIG. 13 is a schematic top view of a method for manufacturing a micro light emitting diode device according to another embodiment of the present invention. In the embodiment of FIG. 13, the number of tethers (eg, the narrow portion 644) may be only one, and the tethers (eg, the narrow portion 644) may be configured in a micro-light emitting diode including the first type semiconductor layer 520. On one side, for example, left, right, top, or bottom. FIG. 14 is a schematic top view of a method for manufacturing a micro light emitting diode device according to another embodiment of the present invention. In the embodiment of FIG. 14, the number of tethers (eg, the narrow portion 644) may be multiple, and multiple tethers (eg, the narrow portion 644) may also be respectively disposed in a micro-type including the first type semiconductor layer 520 The upper and lower sides of the light emitting diode. FIG. 15 is a schematic top view of a method for manufacturing a micro light emitting diode device according to another embodiment of the present invention. In the embodiment of FIG. 15, the number of the tethers (for example, the narrow portion 644) may be multiple, and the multiple tethers (for example, the narrow portion 644) may be all disposed in the micro-type including the first type semiconductor layer 520 The same side of the light emitting diode, for example, the above side is an example, but it is not limited thereto. In other embodiments, a plurality of tethers (for example, the narrow portion 644) may also be disposed on the lower side of the micro-light emitting diode including the first type semiconductor layer 520. FIG. 16 is a schematic top view of a method for manufacturing a micro-light emitting diode device according to an embodiment of the present invention. In the embodiment of FIG. 16, the width W2 of the tether (for example, the narrow portion 644) may be tapered from the edge of the second support portion 634 to the edge of the first support portion 632. The design of the tapered width W2 enables the narrow portion 644 of the circuit structure 640 to be further away from the micro light emitting diode (ie, the width of the narrow portion 644) when the micro light emitting diode LED including the first type semiconductor layer 520 is subsequently extracted. W2 is the smallest), and the long narrow portion 644 remains connected to the electrode 550 of the micro-light emitting diode. The long narrow portion 644 beyond the shielding area of the micro-light-emitting diode helps the micro-light-emitting diode to be electrically connected with other conductive elements in the subsequent process, and increases the contact area.

Please refer to FIG. 10E again. After removing a part of the sacrificial layer 620 (such as the area 622) directly below the second support portion 634 and the narrow portion 644 of the circuit structure 640, as shown in FIG. 10F, then, the elasticity is changed. The head P extracts the micro-light-emitting diode LED, the wiring structure 640 connected to the electrode 550, and the second support portion 634. When the elastic transposition head P extracts the micro-light-emitting diode LED, the wiring structure 640 joined with the electrode 550, and the second supporting portion 634, a part of the narrow portion 644 of the wiring structure 640 is broken, that is, the narrow portion 644 The portion will remain on the micro-light-emitting diode LED, and the other portion of the narrow portion 644 will remain on the sacrificial structure S, so that the micro-light-emitting diode LED is separated from the inner surface of the transfer substrate 610.

It is worth mentioning that, as shown in FIG. 10F, since the micro-light-emitting diode LED is a circuit structure 640 fixed on the transfer substrate 610 in a flip-chip manner, the micro-light-emitting diode LED is extracted when the elastic transposition head P is used. At this time, the elastic transposition head P is in contact with the flatter outer surface 520a of the micro-light emitting diode LED (ie, the surface 520a of the first semiconductor layer 520 facing away from the electrode 550). That is to say, in the process of extracting the micro-light-emitting diode LED, the contact area of the elastic transposition head P and the micro-light-emitting diode LED is large, so that the success rate of extracting the micro-light-emitting diode LED by the elastic transposition head P is large. Greatly improved.

Referring to FIG. 10G, the elastic transducing head P is configured to transfer the micro-light-emitting diode LED, part of the circuit structure 640 and the second support portion 634 onto the receiving substrate 710 to form a micro-light-emitting diode device 2000. Referring to FIG. 10G, the micro light emitting diode device 2000 includes at least a receiving substrate 710, a pixel array layer 720, an adhesive layer 730, a second support portion 634, a circuit structure 640, and a micro light emitting diode LED. An array substrate 800 is constituted by at least the receiving substrate 710 and the pixel array layer 720. The pixel array layer 720 is disposed on the inner surface of the receiving substrate 710. The pixel array layer 720 has a plurality of sub pixels (not shown) and a plurality of driving elements (not shown). Each sub pixel has at least one driving element. To drive miniature light-emitting diode LEDs. Generally, the position of the micro light-emitting diode LED is the sub-pixel. The adhesive layer 730 covers the pixel array layer 720. The second support portion 634 is disposed on the adhesive layer 730. The circuit structure 640 is disposed on the second support portion 634. The second supporting portion 634 is sandwiched between the circuit structure 640 and the adhesive layer 730. Furthermore, the second support portion 634 has a lower surface 634a in contact with the adhesive layer 730, an upper surface 634b opposite the lower surface 634a, and a side wall 634c connecting the upper surface 634b and the lower surface 634a. In this embodiment, the circuit structure 640 (eg, the main body portion 642) may cover a part of the upper surface 634b of the second support portion 634 and the circuit structure 640 (eg, the narrow portion 644) may cover the side wall 634c of the second support portion 634. And extends to the adhesive layer 730. In this embodiment, the material of the support layers 632 and 634 may include silicon, silicon oxide, or a combination of the two.

The micro light emitting diode LED is disposed on the circuit structure 640. The micro light emitting diode LED includes a first type semiconductor layer 520, a light emitting layer 530 disposed on the first type semiconductor layer 520, a second type semiconductor layer 540 disposed on the light emitting layer 530, and a plurality of electrodes 550. The plurality of electrodes 550 are respectively disposed on the first-type semiconductor layer 520 and the second-type semiconductor layer 540 and the circuit structure 640 is electrically connected. In addition, as described above, if the light emitting layer 530 is not interposed between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor pattern 520, the second type semiconductor pattern 540, and the plurality of electrodes 550 may form a micro Light-emitting diode LED. One of the electrodes 550, the second-type semiconductor layer 540, the light-emitting layer (optionally) 530, and the first-type semiconductor layer 520 are sequentially arranged along a direction d2 away from the receiving substrate 710.

The circuit structure 640 is electrically connected to the pixel array layer 720. In detail, the conductive structure 740 can be formed on the circuit structure 640 after the micro-light-emitting diode LED, the second supporting portion 634 and a part of the circuit structure 640 are transferred onto the receiving substrate 710 by the elastic transposition head P. The conductive structure 740 covers the circuit structure 640 and fills the opening 730 a of the adhesive layer 730 to be electrically connected to the pixel array layer 720. The circuit structure 640 can be electrically connected to the pixel array layer 720 through the conductive structure 740. For example, one of the electrodes 550 of the micro-light-emitting diode LED is electrically connected to the pixel array layer 720 through one of the corresponding circuit structures 640, one of the corresponding conductive structures 740, and one of the openings 730a, and the micro-light-emission The other electrode 550 of the diode LED is electrically connected to the pixel array layer 720 via its corresponding other circuit structure 640, its corresponding another conductive structure 740 and the other opening 730a. It is worth mentioning that, in this embodiment, since the vertical projection of the circuit structure 640 on the receiving substrate 710 exceeds the vertical projection of the second support portion 634 on the receiving substrate 710 and the micro-light emitting diode LED on the receiving substrate 710 Vertical projection. In other words, part of the circuit structure 640 extends beyond the shielding area of the second support portion 634 and the micro-light emitting diode LED. Thereby, the conductive layer 740 can be easily overlapped with the circuit structure 640, thereby improving the yield of the electrical connection between the micro light emitting diode LED and the pixel array layer 720.

17A to 17G are schematic cross-sectional views of a method for manufacturing a micro-light emitting diode device according to an embodiment of the present invention. The manufacturing method of the micro-light-emitting diode device of FIGS. 17A to 17G is similar to the manufacturing method of the micro-light-emitting diode device of FIGS. 10A to 10G, and therefore the same or corresponding components are represented by the same or corresponding reference numerals. The main difference between the two is that the tether structure of the embodiment of FIGS. 17A to 17G is different from the tether structure of the embodiment of FIGS. 10A to 10G. The following mainly explains the differences. Please refer to the previous description for the same points, and will not repeat them here.

Referring to FIG. 17A, first, a multilayer semiconductor (not labeled) including a first-type semiconductor layer 520 and a second-type semiconductor layer 540 of opposite polarity to the first-type semiconductor layer is sequentially formed on the inner surface of the growth substrate 510. The polarities of the first-type and second-type semiconductor layers 520 and 540 may be N-type or P-type semiconductor layers, respectively. In the embodiment of the present invention, the first type semiconductor layer 520 is a P-type semiconductor layer on the inner surface of the growth substrate S1 and the second type semiconductor layer 540 is an N-type semiconductor layer on the first type semiconductor layer and the growth substrate S1. Between is an example, but it is not limited to this. In other embodiments, the first type semiconductor layer 520 is an N-type semiconductor layer on the inner surface of the growth substrate S1 and the second type semiconductor layer 540 is a P-type semiconductor layer on the first type semiconductor layer. In the embodiment of the present invention, a film layer may be optionally inserted at the interface between the first type semiconductor layer and the second type semiconductor layer or the interface between the first type semiconductor layer and the second type semiconductor layer may be used as the light emitting layer. 530. In the embodiment of the present invention, a film layer can be inserted at the interface between the first type semiconductor layer and the second type semiconductor layer as the light emitting layer 530 as an example, but it is not limited thereto. In other embodiments, a film layer is not inserted as a light emitting layer at the interface between the first type semiconductor layer and the second type semiconductor layer. A plurality of electrodes 550 are formed on the first type semiconductor layer 520 and the second type semiconductor layer 540, respectively. The first type semiconductor layer 520, the selective light emitting layer 530, and the second type semiconductor layer 540 are sequentially arranged in a direction d1 away from the growth substrate 510. The plurality of electrodes 550 are electrically connected to the first type semiconductor layer 520 and the second type semiconductor layer 540, respectively. The first type semiconductor layer 520, the light emitting layer 530, the second type semiconductor layer 540, and the plurality of electrodes 550 constitute a micro light emitting diode LED. In other embodiments, as described above, if the light emitting layer 530 is not inserted between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor pattern 520, the second type semiconductor pattern 540, and a plurality of electrodes 550 Can form a miniature light-emitting diode LED. Among them, the size of the miniature light-emitting diode LED is micrometer or nanometer.

Please refer to FIG. 17B and FIG. 18. FIG. 18 is a schematic top view illustrating a method of manufacturing the micro-light emitting diode device corresponding to FIG. 17B. Next, a bearing structure 600A is provided. The carrier structure 600A includes a transfer substrate 610, a sacrificial layer 620 covering the transfer substrate 610, and a circuit structure 640A on the sacrificial layer 620. The supporting structure 600A further includes a supporting layer 630A. The support layer 630A is located on the sacrificial layer 620. The circuit structure 640A is located on the support layer 630A. The support layer 630A includes a first support portion 632 and a second support portion 634. The support layer 630A defines an opening 632a. Different from the embodiment of FIGS. 10A to 10G, the supporting layer 630A further includes a third supporting portion 636. The third support portion 636 is connected between the second support portion 634A on one side of the first support portion 632A. The third support portion 636 is in a thin strip shape, and a part of the opening 632a between the first support portion 632A and the second support portion 634A is exposed (or referred to as uncovered). For example, the projection shape of the opening 632a perpendicularly projected on the transfer substrate 610 is similar to a C shape, and the sacrificial layer 620 can be seen through the opening 632a. The circuit structure 640A is disposed on the second support portion 634A, and the first support portion 632A and the third support portion 636 are exposed (or referred to as uncovered). Wherein, the circuit structure 640A does not extend into the opening 632a, the circuit structure 640A can be regarded as having only a main body portion.

Referring to FIG. 17C, the electrode 550 of the micro-light-emitting diode LED and the circuit structure 640A of the carrier structure 600A are bonded so that the electrode 550 of the micro-light-emitting diode LED faces the circuit structure 640 and is electrically connected to the circuit structure 640. In other words, the micro-light emitting diode LED is fixed on the circuit structure 640A in a flip chip manner. In this embodiment, the vertical projection of the micro-light emitting diode LED on the transmission substrate 610 is located in the opening 632a of the first support portion 632A within the vertical projection of the transmission substrate 610. The second support portion 634A overlaps the micro light emitting diode LED. In this embodiment, a portion of the main body 642 corresponding to one of the electrodes 550 of the micro-light-emitting diode LED, preferably, a protrusion is provided to allow the micro-light-emitting diode LED to be bonded to the carrier structure 600. The surface of the first type semiconductor pattern 520 can be substantially displayed on a horizontal line to facilitate the subsequent absorption and transfer processes, and to increase the joint yield of the micro-light-emitting diode LED and the carrier structure 600. However, the present invention does not take this as an example. However, in other embodiments, other suitable designs may be used. Referring to FIG. 17C and FIG. 17D, the growth substrate 510 on the micro light emitting diode LED is removed. For example, in this embodiment, the laser lift-off technology can be used to remove the growth substrate 510, but the present invention is not limited to this. In other embodiments, other suitable The method removes the growth substrate 510.

FIG. 19 is a schematic top view of a method for manufacturing the micro-light emitting diode device corresponding to FIG. 17E. In particular, Fig. 17E corresponds to the section line A-A 'of Fig. 19. Please refer to FIG. 17D, FIG. 17E, and FIG. 19, then, remove a part of the sacrificial layer 620, such as the area 622, directly under the micro-light-emitting diode LED, and reserve another part outside the shielding area of the micro-light-emitting diode LED. The sacrificial layer 620, such as the region 624, forms the gap G of FIG. 17E. For example, the bottom surface (or outer surface) of the second support portion 634A, a portion of the bottom surface (or outer surface) of the first support portion 632A, the bottom surface (or outer surface) of the third support portion 636, A gap G exists between another portion of the sacrificial layer 620 (for example, the region 624) and the inner surface of the transfer substrate 610. In other embodiments, the bottom surface (or outer surface) of the second support portion 634A, a portion of the bottom surface (or outer surface) of the first support portion 632, the bottom surface (or outer surface) of the third support portion 636, A gap G exists between another portion of the sacrificial layer 620 (for example, the region 624) and the inner surface of the transfer substrate 610. In this embodiment, a part of the sacrificial layer 620 directly under the second supporting portion 634A and a place under the third supporting portion 636 may be removed, such as a region 622, while a part of the sacrificial layer 620 directly under the first supporting portion 632A is retained. , Such as area 624. In other words, a part of the sacrificial layer 620, such as the region 622, in the opening 632a of the first supporting portion 632A may be removed, while a part of the sacrificial layer 620, such as the region 624, covered by the first supporting portion 632A may be removed. A portion of the sacrificial layer 620 directly below the second support portion 634A and directly below the third support portion 636, for example, after the region 622 is hollowed out, the micro light-emitting diode LED is temporarily fixed on the thin support portion 636 On the substrate 610. In other words, in this embodiment, the third support portion 636 is used as a tether. Compared with the embodiment of FIG. 10A to FIG. 10G, this embodiment has only one micro-emitting diode LED as a tether, so the transfer efficiency of the micro-emitting diode LED can be improved.

Referring to FIG. 19, in this embodiment, the number of the tether (for example, the third supporting portion 636) may be one, and it is located on one side of the micro light emitting diode including the first type semiconductor layer 520. However, the present invention is not limited to this. In other embodiments, the number of tethers, the position of the tethers, and the width of the tethers can be made other appropriate designs. For example, similar to the tether (eg, the narrow portion 644) of FIG. 12, the number of the tethers (eg, the third support portion 636) may be multiple, and may be disposed in the first type semiconductor layer 520. The left and right sides of the micro light-emitting diode; similar to the tether (for example: the narrow part 644) in FIG. 14, the number of the tether (for example, the third supporting part 636) may be multiple, and the tether (for example: The third supporting portion 636) may also be arranged on the upper and lower sides of the micro light emitting diode including the first type semiconductor layer 520; similar to the tether (eg, the narrow portion 644) of FIG. 15, the tether (eg, the third The number of supporting portions 636) may be multiple, and multiple tethers (for example, the third supporting portion 636) may also be disposed on the same side of the micro-light emitting diode including the first type semiconductor layer 520; The tether (for example, the narrow part 644) is similar, and the tether (for example, the third support part 636) may also have a design in which the width can be tapered from the edge of the second support part 634A to the edge of the first support part 632A.

Please refer to FIG. 17E again, after removing a part of the sacrificial layer 622 directly under the second support portion 634A and directly under the third support portion 636, as shown in FIG. 17F, then, the elastic transposition head P is configured to extract the micro-light emitting two. The polar body unit 100 and the micro light emitting diode unit 100 include a micro light emitting diode LED, a circuit structure 640A connected to the electrode 550, and a second support portion 634A. When the elastic transposition head P extracts the micro light-emitting diode LED, the circuit structure 640A and the second support portion 634A joined with the electrode 550, a part of the thin strip-shaped third support portion 636 is broken, that is, the third support portion A part of 636 is left on the micro-light-emitting diode LED, and another part of the third supporting part 636 is left on the sacrificial structure S, so that the micro-light-emitting diode LED is separated from the inner surface of the transfer substrate 610. Referring to FIG. 17G, the elastic transducing head P is further configured to transfer the micro-light-emitting diode LED, the circuit structure 640A, and the second support portion 634A onto the receiving substrate 710 to form a micro-light-emitting diode unit 2000A.

The micro light emitting diode device 2000A includes at least a receiving substrate 710, a pixel array layer 720, an adhesive layer 730, a second support portion 634A, a circuit structure 640A, and a micro light emitting diode LED. An array substrate 800 is constituted by at least the receiving substrate 710 and the pixel array layer 720. The pixel array layer 720 is disposed on the inner surface of the receiving substrate 710. The pixel array layer 720 has a plurality of sub pixels (not shown) and a plurality of driving elements (not shown). Each sub pixel has at least one driving element. To drive miniature light-emitting diode LEDs. Generally, the position of the micro light-emitting diode LED is the sub-pixel. The adhesive layer 730 covers the pixel array layer 720. The second support portion 634A is disposed on the adhesive layer 730. The circuit structure 640A is disposed on the second support portion 634A. The second support portion 634A is sandwiched between the circuit structure 640 and the adhesive layer 730. The second support portion 634A has a lower surface 634a in contact with the adhesive layer 730, an upper surface 634b opposite to the lower surface 634a, and a side wall 634c connecting the upper surface 634b and the lower surface 634a. The circuit structure 640A covers a part of the upper surface 634b of the second support portion 634. Different from the miniature light emitting diode device 2000 of FIG. 10G, the circuit structure 640A does not cover the side wall 634c of the second support portion 634A, and the circuit structure 640A does not contact the adhesive layer 730. In this embodiment, the material of the second support portion 634A may include silicon, silicon oxide, or a combination thereof. For example, the second support portion 634 may include two layers of silicon and one layer of silicon oxide, wherein the silicon oxide is sandwiched between the two layers of silicon.

The circuit structure 640A is electrically connected to the pixel array layer 720. Specifically, the conductive structure 740 can be formed on the circuit structure 640A after the micro-light-emitting diode LED, the second supporting portion 634A, and the circuit structure 640A are transferred onto the receiving substrate 710 by the elastic transposition head P. The conductive structure 740 covers the circuit structure 640A and fills the opening 730 a of the adhesive layer 730 to be electrically connected to the pixel array layer 720. For example, one of the electrodes 550 of the micro-light-emitting diode LED is electrically connected to the pixel array layer 720 via one of its corresponding circuit structures 640A, one of its corresponding conductive structures 740, and one of its openings 730a. The other electrode 550 of the diode LED is electrically connected to the pixel array layer 720 through its corresponding other circuit structure 640A, its corresponding another conductive structure 740 and the other opening 730a. The micro light emitting diode LED is disposed on the circuit structure 640A. The micro light emitting diode LED includes a first type semiconductor layer 520, a light emitting layer 530 disposed on the first type semiconductor layer 520, a second type semiconductor layer 540 disposed on the light emitting layer 530, and a first type semiconductor layer, respectively. 520 and a plurality of electrodes 550 electrically connected to the circuit structure 640A on the second type semiconductor layer 540. In addition, as described above, if the light emitting layer 530 is not interposed between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor pattern 520, the second type semiconductor pattern 540, and the plurality of electrodes 550 may form a micro Light-emitting diode LED. One of the electrodes 550, the second-type semiconductor layer 540, the light-emitting layer (optionally) 530, and the first-type semiconductor layer 520 are sequentially arranged along a direction d2 away from the receiving substrate 710. 17A to 17G manufacturing method of micro-light-emitting diode device and the micro-light-emitting diode device 2000A manufactured therefrom are the same as those of the micro-light-emitting diode device of FIGS. 10A to 10G and the micro-light-emitting diode device manufactured therefrom. Similar effects and advantages of the light-emitting diode device 2000 are not repeated here.

20A to 20G are schematic cross-sectional views illustrating a method for manufacturing a micro light emitting diode device according to an embodiment of the present invention. The manufacturing method of the micro-light-emitting diode device of FIGS. 20A to 20G is similar to the manufacturing method of the micro-light-emitting diode device of FIGS. 10A to 10G, and therefore the same or corresponding components are represented by the same or corresponding reference numerals. The main difference between the two is that the tether structure of the embodiment of FIGS. 20A to 20G is different from the tether structure of the embodiment of FIGS. 10A to 10G. The following mainly explains the differences. Please refer to the previous description for the same points, and will not repeat them here.

Referring to FIG. 20A, first, a multilayer semiconductor (not labeled) including a first-type semiconductor layer 520 and a second-type semiconductor layer 540 of opposite polarity to the first-type semiconductor layer is sequentially formed on the inner surface of the growth substrate 510. The polarities of the first-type and second-type semiconductor layers 520 and 540 may be N-type or P-type semiconductor layers, respectively. In the embodiment of the present invention, the first type semiconductor layer 520 is a P-type semiconductor layer on the inner surface of the growth substrate S1 and the second type semiconductor layer 540 is an N-type semiconductor layer on the first type semiconductor layer and the growth substrate S1. Between is an example, but it is not limited to this. In other embodiments, the first type semiconductor layer 520 is an N-type semiconductor layer on the inner surface of the growth substrate S1 and the second type semiconductor layer 540 is a P-type semiconductor layer on the first type semiconductor layer. In the embodiment of the present invention, a film layer may be optionally inserted at the interface between the first type semiconductor layer and the second type semiconductor layer or the interface between the first type semiconductor layer and the second type semiconductor layer may be used as the light emitting layer. 530. In the embodiment of the present invention, a film layer can be inserted at the interface between the first type semiconductor layer and the second type semiconductor layer as the light emitting layer 530 as an example, but it is not limited thereto. In other embodiments, a film layer is not inserted as a light emitting layer at the interface between the first type semiconductor layer and the second type semiconductor layer. A plurality of electrodes 550 are formed on the first type semiconductor layer 520 and the second type semiconductor layer 540, respectively. The first type semiconductor layer 520, the selective light emitting layer 530, and the second type semiconductor layer 540 are sequentially arranged in a direction d1 away from the growth substrate 510. The plurality of electrodes 550 are electrically connected to the first type semiconductor layer 520 and the second type semiconductor layer 540, respectively. The first type semiconductor layer 520, the light emitting layer 530, the second type semiconductor layer 540, and the plurality of electrodes 550 constitute a micro light emitting diode LED. In other embodiments, as described above, if the light emitting layer 530 is not inserted between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor pattern 520, the second type semiconductor pattern 540, and a plurality of electrodes 550 Can form a miniature light-emitting diode LED. Among them, the size of the miniature light-emitting diode LED is micrometer or nanometer.

FIG. 21 is a schematic top view illustrating a method of manufacturing the micro-light emitting diode device corresponding to FIG. 20B. Please refer to FIG. 20B and FIG. 21. Next, a supporting structure 600B is provided. The carrier structure 600B includes a transfer substrate 610, a sacrificial layer 620 covering the transfer substrate 610, and a circuit structure 640B on the sacrificial layer 620. The supporting structure 600B further includes a support layer 630B. The support layer 630B is located on the sacrificial layer 620. The circuit structure 640B is located on the support layer 630B. The support layer 630B includes a first support portion 632B and a second support portion 634B. The first support portion 632B defines an opening 632a. The second support portion 634B is located in the opening 632a. Different from the embodiment of FIGS. 10A to 10G, the supporting layer 630B further includes a third supporting portion 636. The second supporting portion 634B has a first side s1 and a second side s2 opposite to each other. The third support portion 636 is connected between the first support portion 632B and the first side s1 of the second support portion 634B. The third support portion 636 is in a thin strip shape, and a part of the opening 632a between the first support portion 632B and the second support portion 634B is exposed (or referred to as uncovered). For example, the projection shape of the opening 632a perpendicularly projected on the transfer substrate 610 is similar to a C shape, and the sacrificial layer 620 can be seen through the opening 632a. The circuit structure 640B is disposed on the second support portion 634B, and the first support portion 632B and the third support portion 636 are exposed (or referred to as uncovered). One of the circuit structures 640B includes a main body portion 642 and a narrow portion 644 extending outward from the main body portion 642. The width W1 of the main body portion 642 is larger than the width W2 of the narrow portion 644. The main body portion 642 is disposed on the second support portion 634B. The narrow portion 644 is connected to the main body portion 642 and fills a part of the opening 632a between the first and second insulating patterns 632B and 634B so as to bridge between the first supporting portion 632B and the second side s2 of the second supporting portion 634B between. Wherein, the other of the circuit structure 640A is disposed on the second supporting portion 634B and does not extend to any opening, the circuit structure 640B can be regarded as having only a main body portion.

Referring to FIG. 20C, the electrode 550 of the micro-light-emitting diode LED and the circuit structure 640B of the carrier structure 600B are bonded, so that the electrode 550 of the micro-light-emitting diode LED faces the circuit structure 640B and is electrically connected to the circuit structure 640B. In other words, the micro light emitting diode LED is fixed on the circuit structure 640B in a flip chip manner. In this embodiment, the vertical projection of the light-emitting diode LED on the transmission substrate 610 is located in the opening 632a of the first support portion 632B within the vertical projection of the transmission substrate 610. The second support portion 634B overlaps the micro light emitting diode LED. In this embodiment, it corresponds to a main body portion 642 portion of one of the electrodes 550 of the micro-light emitting diode LED (for example, a circuit structure 640B disposed on the second support portion 634B and not extending to any opening), preferably On the ground, a protrusion will be presented to allow the surface of the first type semiconductor pattern 520 to be substantially displayed on a horizontal line after the micro-light-emitting diode LED is bonded to the carrying structure 600B to facilitate the subsequent absorption and transfer processes, and As a result, the bonding yield of the micro-light-emitting diode LED and the carrier structure 600B is increased, but the present invention is not limited thereto. In other embodiments, other suitable designs may be used. Referring to FIG. 20C and FIG. 20D, the growth substrate 510 on the micro light emitting diode LED is removed. For example, in this embodiment, the laser lift-off technology can be used to remove the growth substrate 510, but the present invention is not limited to this. In other embodiments, other suitable The method removes the growth substrate 510.

FIG. 22 is a schematic top view illustrating a method of manufacturing the micro-light emitting diode device corresponding to FIG. 20E. In particular, Fig. 20E corresponds to the section line A-A 'of Fig. 22. Please refer to FIG. 20D, FIG. 20E, and FIG. 22, and then, remove a part of the sacrificial layer 620, such as the area 622, directly under the micro-light-emitting diode LED, and reserve another part outside the shielding area of the micro-light-emitting diode LED. The sacrificial layer 620, such as the region 624, forms the gap G of FIG. 20E. For example, the bottom surface (or outer surface) of the second support portion 634B, a portion of the bottom surface (or outer surface) of one of the first support portions 632B, and a narrow portion (or connection portion) located in the opening 632a. A gap G exists between the bottom surface (or outer surface) of 644, the bottom surface (or outer surface) of the third support portion 636, another portion of the sacrificial layer 620 (eg, region 624), and the inner surface of the transfer substrate 610. In other embodiments, the bottom surface (or outer surface) of the second support portion 634B, a portion of the bottom surface (or outer surface) of the first support portion 632B, and a narrow portion (or connection portion) located in the opening 632a. A gap G exists between the bottom surface (or outer surface) of 644, the bottom surface (or outer surface) of the third support portion 636, another portion of the sacrificial layer 620 (eg, region 624), and the inner surface of the transfer substrate 610. In this embodiment, a portion of the sacrificial layer 620, such as the area 622, may be removed directly below the second support portion 634B, directly below the narrow portion 644 of the circuit structure 640B, and directly below the third support portion 636, while retaining the first support. A portion of the sacrificial layer 620 directly below the portion 632B, such as the region 624. In other words, a portion of the sacrificial layer 620, such as the region 622, in the opening 632a of the first support portion 632B may be removed, while a portion of the sacrificial layer 620, such as the region 624, covered by the first support portion 632B may be removed. A portion of the sacrificial layer 620 directly below the second support portion 634B, directly below the narrow portion 644 of the circuit structure 640B, and directly below the third support portion 636, such as after the area 622 is hollowed out, and the micro-light emitting diode LED is transmitted through The narrow portion 644 and the thin strip-shaped third support portion 636 of the fragile circuit structure 640B are temporarily fixed on the transfer substrate 610. In other words, in this embodiment, the narrow portion 644 of the line structure 640B and the thin strip-shaped third support portion 636 are used as a tether. Please refer to FIG. 22. In this embodiment, the number of the narrow portion 644 serving as a tether and the third supporting portion 636 serving as a tether may be one each, and the narrow portion 644 and the third supporting portion 636 may be located in a micro-light-emitting state. On the opposite sides of the diode LED, the width W2 of the narrow portion 644 may be uniform, and the width of the third support portion 636 may be uniform. However, the present invention is not limited to this, the number of the narrow portions 644 and the third support portions 636 as the tethers, the positions of the narrow portions 644 and the third support portions 636 as the tethers, and the narrow portions 644 as the tethers Other suitable designs can be made with the width of the third support portion 636.

As shown in FIG. 20F, next, the elastic transposition head P is made to extract a micro light-emitting diode LED, a wiring structure 640B connected to the electrode 550, and a second support portion 634B. When the elastic transposition head P extracts the micro-light-emitting diode LED, the circuit structure 640B and the second support portion 634B joined to the electrode 550, a portion of the narrow portion 644 of the fragile circuit structure 640B and the third strip-shaped support portion A portion of 636 will be disconnected, that is, a portion of the third support portion 636 and a portion of the narrow portion 644 will remain on the micro-light emitting diode LED, and another portion of the third support portion 636 and the narrow portion 644 will remain. A part will remain on the sacrificial structure S to separate the micro-light emitting diode LED from the inner surface of the transfer substrate 610. Referring to FIG. 20G, the elastic transducing head P is further configured to transfer the micro-light-emitting diode LED, a part of the circuit structure 640B, and the second support portion 634B onto the receiving substrate 710 to form a light-emitting diode device 2000B.

Referring to FIG. 20G, the micro light emitting diode device 2000B includes at least a receiving substrate 710, a pixel array layer 720, an adhesive layer 730, a second support portion 634B, a circuit structure 640B, and a micro light emitting diode LED. An array substrate 800 is constituted by at least the receiving substrate 710 and the pixel array layer 720. The pixel array layer 720 is disposed on the inner surface of the receiving substrate 710. The pixel array layer 720 has a plurality of sub pixels (not shown) and a plurality of driving elements (not shown). Each sub pixel has at least one driving element. To drive miniature light-emitting diode LEDs. Generally, the position of the micro light-emitting diode LED is the sub-pixel. The adhesive layer 730 covers the pixel array layer 720. The second supporting portion 634B is disposed on the adhesive layer 730. The circuit structure 640B is disposed on the second support portion 634B. The second supporting portion 634B is sandwiched between the circuit structure 640B and the adhesive layer 730. Furthermore, the second supporting portion 634B has a lower surface 634a in contact with the adhesive layer 730, an upper surface 634b opposite the lower surface 634a, and a side wall 634c connecting the upper surface 634b and the lower surface 634a. The main body portion 642 and the narrow portion 644 of one of the circuit structures 640B respectively cover a portion of the upper surface 634b of the second support portion 634 and a portion of the side wall 634c of the second support portion 634, and the narrow portion 644 extends to the adhesive layer 730. The other of the circuit structures 640B (for example, the main body portion 642) is only located on a part of the upper surface 634b of the second support portion 634, and does not extend to the side wall 634c of the second support portion 634. In this embodiment, the material of the second support portion 634B may include silicon, silicon oxide, or a combination thereof. For example, the second support portion 634 may include two layers of silicon and one layer of silicon oxide, wherein the silicon oxide is sandwiched between the two layers of silicon.

The circuit structure 640B is electrically connected to the pixel array layer 720. In detail, the conductive structure 740 can be formed on the circuit structure 640B after the micro-light-emitting diode LED, the second supporting portion 634B, and a part of the circuit structure 640B are transferred to the receiving substrate 710 by the elastic transposition head P. The conductive structure 740 covers the circuit structure 640B and fills the opening 730 a of the adhesive layer 730 to be electrically connected to the pixel array layer 720. For example, one of the electrodes 550 of the micro-light-emitting diode LED is electrically connected to the pixel array layer 720 via one of its corresponding circuit structures 640B, one of its corresponding conductive structures 740, and one of its openings 730a, and the micro-light emission The other electrode 550 of the diode LED is electrically connected to the pixel array layer 720 via its corresponding other circuit structure 640B, its corresponding another conductive structure 740 and the other opening 730a. The micro light emitting diode LED is disposed on the circuit structure 640B. The micro light emitting diode LED includes a first type semiconductor layer 520, a light emitting layer 530 disposed on the first type semiconductor layer 520, a second type semiconductor layer 540 disposed on the light emitting layer 530, and a plurality of electrodes 550. The plurality of electrodes 550 are respectively disposed on the first type semiconductor layer 520 and the second type semiconductor layer 540 and are electrically connected to the circuit structure 640B. In addition, as described above, if the light emitting layer 530 is not interposed between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor pattern 520, the second type semiconductor pattern 540, and the plurality of electrodes 550 may form a micro Light-emitting diode LED. One of the electrodes 550, the second-type semiconductor layer 540, the light-emitting layer 530, and the first-type semiconductor layer 520 are sequentially arranged along a direction d2 away from the receiving substrate 710. 20A to 20G manufacturing method of micro-light-emitting diode device and manufactured micro-light-emitting diode device 2000B have the same manufacturing method of the light-emitting diode device of FIGS. 10A to 10G and light-emitting diode 2 Similar effects and advantages of the polar device 2000 are not repeated here.

In summary, a method for manufacturing a micro-light-emitting diode unit interposer according to an embodiment of the present invention includes: joining a first sacrificial layer of a semiconductor structure and a second sacrificial layer of a carrier structure; and a second type of patterned semiconductor structure A semiconductor layer, a light emitting layer, and a first type semiconductor layer to form a second type semiconductor pattern, a light emitting pattern, and a first type semiconductor pattern; forming an insulating pattern; the insulating pattern covering the second type semiconductor pattern and the light emitting pattern; forming the first and second electrode. The second type semiconductor pattern, the light emitting pattern, the first type semiconductor pattern, the first electrode and the second electrode constitute a micro-light emitting diode; at least a part of the first sacrificial layer, at least a part of the second sacrificial layer, or the Combined so that there is a gap between the micro light emitting diode and the transfer substrate. Thereby, the intermediate structure of the micro-light-emitting diode unit and the manufacturing method of the micro-light-emitting diode unit can omit at least one transposition operation, thereby achieving the effect of simplifying the manufacturing process.

In addition, in the method for manufacturing a micro-light-emitting diode unit interposer according to another embodiment of the present invention, the micro-light-emitting diode is a circuit structure that is first fixed on a transmission substrate by a flip-chip method. When extracting the micro-light-emitting diode, the elastic transposition head is in contact with the flat surface of the micro-light-emitting diode. In other words, in the process of extracting the micro-light-emitting diode, the contact area between the elastic transposition head and the micro-light-emitting diode is large, so that the success rate of extracting the micro-light-emitting diode by the elastic transposition head is large.

Although the present invention has been disclosed as above with the examples, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field can make some modifications and retouching without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be determined by the scope of the attached patent application.

10‧‧‧Semiconductor Structure
20‧‧‧ bearing structure
100, 100A, 100B, 100C, 100D, 100E, 100F, 100G, 100H‧‧‧ mini light emitting diode units
110‧‧‧Second type semiconductor layer
112‧‧‧Second type semiconductor pattern
112a, 112b, 122a, 122b, 132a, 132b, 142c, 634c
120, 530‧‧‧ luminescent layer
122‧‧‧ Illuminated Pattern
130‧‧‧The first type semiconductor layer
132, 132C‧‧‧The first type of semiconductor pattern
140‧‧‧First sacrificial layer
142, 142A, 142B, 142D, 142E, 142F‧‧‧First sacrificial pattern
142a, 142b, 520a, 634a, 634b‧‧‧ surface
210‧‧‧Second sacrifice layer
212, 212A, 212D, 212F‧‧‧Second sacrifice pattern
310, 310C, 310F‧‧‧ Insulation pattern
312, 312C, 312F‧‧‧First insulation pattern
314, 314C, 314F‧‧‧Second insulation pattern
312a, 312aC, 312aF‧‧‧ Connection
410‧‧‧first electrode
420‧‧‧Second electrode
520‧‧‧The first type semiconductor layer
520a‧‧‧ surface
540‧‧‧Second type semiconductor layer
550‧‧‧ electrode
600, 600A, 600B‧‧‧bearing structure
610‧‧‧Transfer substrate
620‧‧‧ sacrificial layer
622, 624‧‧‧ area
630, 630A, 630B‧‧‧ support layer
632, 632A, 632B‧‧‧ first support
632a‧‧‧open
634, 634A, 634B‧‧‧Second support
636‧‧‧third support
640, 640A, 640B‧‧‧ Line Structure
642‧‧‧Main body
644‧‧‧Narrow section
710‧‧‧Receiving substrate
720‧‧‧ pixel array layer
730‧‧‧ Adhesive layer
730a‧‧‧ opening
740‧‧‧ conductive layer
800‧‧‧Array substrate
1000, 1000A, 1000B, 1000C, 1000D, 1000E, 1000F, 1000G, 1000H‧‧‧ mini light-emitting diode unit intermediary structure
10000, 2000, 2000A, 2000B ‧‧‧ Mini Light Emitting Diode Device
A-A'‧‧‧ hatch
d, d1, d2‧‧‧ directions
g, G‧‧‧ clearance
LED‧‧‧light-emitting diode
S‧‧‧ sacrificial structure
S1, 510‧‧‧ growth substrate
s1‧‧‧first side
S2‧‧‧Transfer substrate
s2‧‧‧second side
P‧‧‧ Elastic Transpose Head
W1, W2‧‧‧Width

1A to 1J are schematic cross-sectional views of a method for manufacturing a micro-light emitting diode according to an embodiment of the present invention. FIG. 2A to FIG. 2B are schematic cross-sectional views of a part of a manufacturing method of a micro-light-emitting diode intermediary structure according to an embodiment of the present invention. 3A to 3B are schematic cross-sectional views of a part of a manufacturing method of a micro-light-emitting diode intermediary structure according to an embodiment of the present invention. 4A to 4H are schematic cross-sectional views illustrating a method for manufacturing a micro-light-emitting diode intermediary structure according to an embodiment of the present invention. 5A to 5B are schematic cross-sectional views of a part of a manufacturing method of a micro-light-emitting diode intermediary structure according to an embodiment of the present invention. 6A to 6B are schematic cross-sectional views of a part of a method for manufacturing a micro-light-emitting diode intermediary structure according to an embodiment of the present invention. 7A to 7I are schematic cross-sectional views illustrating a method for manufacturing a micro-light-emitting diode intermediary structure according to an embodiment of the present invention. 8A to 8B are schematic cross-sectional views of a part of a manufacturing method of a micro-light-emitting diode intermediary structure according to an embodiment of the present invention. 9A to 9B are schematic cross-sectional views of a part of a manufacturing method of a micro-light-emitting diode intermediary structure according to an embodiment of the present invention. 10A to 10G are schematic cross-sectional views of a method for manufacturing a micro-light emitting diode device according to an embodiment of the present invention. FIG. 11 is a schematic top view illustrating a method of manufacturing the micro-light emitting diode device corresponding to FIG. 10B. FIG. 12 is a schematic top view illustrating a method of manufacturing the micro-light emitting diode device corresponding to FIG. 10E. FIG. 13 is a schematic top view of a method for manufacturing a micro light emitting diode device according to another embodiment of the present invention. FIG. 14 is a schematic top view of a method for manufacturing a micro light emitting diode device according to another embodiment of the present invention. FIG. 15 is a schematic top view of a method for manufacturing a micro light emitting diode device according to another embodiment of the present invention. FIG. 16 is a schematic top view of a method for manufacturing a micro-light emitting diode device according to an embodiment of the present invention. 17A to 17G are schematic cross-sectional views of a method for manufacturing a micro-light emitting diode device according to an embodiment of the present invention. FIG. 18 is a schematic top view illustrating a method of manufacturing the micro-light emitting diode device corresponding to FIG. 17B. FIG. 19 is a schematic top view of a method for manufacturing the micro-light emitting diode device corresponding to FIG. 17E. 20A to 20G are schematic cross-sectional views illustrating a method for manufacturing a micro light emitting diode device according to an embodiment of the present invention. FIG. 21 is a schematic top view illustrating a method of manufacturing the micro-light emitting diode device corresponding to FIG. 20B. FIG. 22 is a schematic top view illustrating a method of manufacturing the micro-light emitting diode device corresponding to FIG. 20E.

112‧‧‧Second type semiconductor pattern

112a, 112b, 122a, 122b, 132a, 132b ‧‧‧ side walls

122‧‧‧ Illuminated Pattern

132‧‧‧The first type of semiconductor pattern

142‧‧‧First Sacrifice Pattern

142b‧‧‧ surface

212‧‧‧Second Sacrifice Pattern

310‧‧‧ Insulation Pattern

312, 314‧‧‧ first and second insulation patterns

312a‧‧‧connection

410‧‧‧first electrode

420‧‧‧Second electrode

Intermediate structure of 1000‧‧‧ miniature light emitting diode unit

g‧‧‧ clearance

LED‧‧‧Mini Light Emitting Diode

S‧‧‧ sacrificial structure

S2‧‧‧Transfer substrate

Claims (31)

A method for manufacturing a micro-light-emitting diode unit intermediary structure includes: providing a semiconductor structure, the semiconductor structure including a plurality of semiconductor layers and a first sacrificial layer sequentially stacked on an inner surface of a growth substrate, wherein the multilayer The semiconductor layer includes a first-type semiconductor layer and a second-type semiconductor layer of opposite polarity to the first-type semiconductor layer; a carrier structure is provided, and the carrier structure includes a transfer substrate and a substrate covering the inner surface of the transfer substrate. A second sacrificial layer; the first sacrificial layer joining the semiconductor structure and the second sacrificial layer of the carrier structure, wherein after the first sacrificial layer is joined with the second sacrificial layer, the first sacrificial layer is located in the Between the multilayer semiconductor layer and the second sacrificial layer; removing the growth substrate of the semiconductor structure; patterning the first type semiconductor layer and the second type semiconductor layer respectively to form a plurality of first type semiconductor patterns and a plurality of Second type semiconductor patterns; forming a plurality of insulation patterns separated from each other, the insulation patterns covering the corresponding second type semiconductor patterns Forming a plurality of first electrodes and a plurality of second electrodes, wherein the first electrodes are located on the corresponding first type semiconductor patterns, and the second electrodes are located on the corresponding second type semiconductor patterns, the The plurality of second-type semiconductor patterns, the corresponding first-type semiconductor patterns, the corresponding first electrodes, and the corresponding second electrodes constitute a plurality of micro-light-emitting diodes; and removing at least part of the first light-emitting diodes; A sacrificial layer, at least part of the second sacrificial layer, or at least part of the foregoing two stacked layers, so that there is a gap between each of the light emitting diodes and the transfer substrate, and the micro light emitting diodes The body is connected to the transfer substrate through a plurality of connection portions of the insulation patterns. The method for manufacturing a micro-light-emitting diode unit interposer according to item 1 of the scope of patent application, wherein the method for forming the insulating patterns includes: forming a first insulating pattern, and corresponding to one of the second type On the semiconductor layer and covering one of the sidewalls of the second type semiconductor pattern and one of the sidewalls of the first type semiconductor pattern; and forming a second insulating pattern corresponding to one of the second And covering one of the other sidewalls of the second type semiconductor layer, and exposing one of the other sidewalls of the first first type semiconductor layer, wherein the first insulation The pattern has a corresponding each of the connection portions, and each of the connection portions extends onto the first sacrificial layer. According to the manufacturing method of the micro-light-emitting diode unit interposer described in item 2 of the patent application scope, wherein one of the first sacrificial layer and the second sacrificial layer is an organic material layer, the other one is The first sacrificial layer and the second sacrificial layer are inorganic material layers, and the first sacrificial layer and the second sacrificial layer are different from the insulating pattern materials. The insulating pattern materials are selected from silicon nitride, silicon oxide, or Silicon oxynitride. The method for manufacturing a micro-light-emitting diode unit interposer according to item 3 of the patent application scope, wherein at least one of the first sacrificial layer and at least part of the second sacrificial layer are removed, The other method of retaining at least a portion of the first sacrificial layer and at least a portion of the second sacrificial layer includes: removing the organic material layer using a dry etching process, and retaining the inorganic material layer. The method for manufacturing a micro-light-emitting diode unit interposer according to item 3 of the scope of patent application, wherein at least one of the first sacrificial layer and at least part of the second sacrificial layer are removed, and A method of retaining at least a portion of the first sacrificial layer and at least a portion of the second sacrificial layer includes: removing the inorganic material layer using a wet etching process, and retaining the organic material layer. The method for manufacturing a micro-light-emitting diode unit interposer according to item 1 of the scope of patent application, wherein the insulating patterns are formed after the second semiconductor patterns are patterned; and the insulating patterns are formed After that, the first semiconductor patterns are patterned, each of the insulation patterns covers a sidewall corresponding to one of the second semiconductor patterns and exposes a sidewall corresponding to one of the first semiconductor patterns, and each of the connections A portion is formed on a corresponding one of the first semiconductor patterns. The method for manufacturing a micro-light-emitting diode unit interposer according to item 1 of the scope of patent application, wherein the method for forming the insulating patterns includes: after patterning the multilayer semiconductor layer, patterning the first sacrificial layer and The second sacrificial layer to form a plurality of first sacrificial patterns and a plurality of second sacrificial patterns, each of the first sacrificial pattern and the corresponding second sacrificial pattern are stacked into a sacrificial structure, and each of the light emitting diodes is disposed on On the corresponding sacrificial structures; after forming the sacrificial structure, a first insulating pattern is formed on the second type semiconductor patterns corresponding to one of them and covering the second type semiconductors corresponding to one of them The sidewalls of the pattern and the sidewalls of the first type semiconductor patterns corresponding to one of them; after the sacrificial structure is formed, a second insulating pattern is formed on the second type of semiconductor layers corresponding to one of them and covered Corresponding to the other side wall of the second type semiconductor layers of one of them and exposing the other side of the first first type semiconductor patterns corresponding to one of them A wall, wherein the first insulating pattern has a corresponding each of the connection portions, and each of the connection portions extends onto the transfer substrate. An intermediary structure of a miniature light emitting diode unit includes: a transfer substrate; a plurality of miniature light emitting diodes, an array of which is arranged on an inner surface of the transfer substrate, and each of the light emitting diodes includes: a multilayer semiconductor pattern, including at least A first type semiconductor pattern and a second type semiconductor pattern of opposite polarity to the first type semiconductor pattern, wherein the vertical projection area of the first type semiconductor pattern on the transfer substrate exceeds the second type semiconductor pattern in A vertical projection area on the transfer substrate; a first electrode on the first type semiconductor pattern; and a second electrode on the second type semiconductor pattern; and a plurality of insulating patterns covering the corresponding The micro-light-emitting diodes, the insulation patterns have a plurality of connection portions, the micro-light-emitting diodes are connected to the transmission substrate through the connection portions, and each of the micro-light-emitting diodes and the transmission substrate There is a gap between them, and the insulation patterns are separated from each other. The micro-light-emitting diode unit intermediary structure according to item 8 of the scope of patent application, further comprising: a plurality of first sacrificial patterns; and a plurality of second sacrificial patterns disposed on the transfer substrate, each of the first sacrificial patterns. The pattern corresponds to each of the second sacrificial patterns, and at least a portion of each of the first sacrificial patterns and at least a portion of each of the second sacrificial patterns are stacked on each other to form a sacrificial structure, and the connecting portion passes through a portion of the sacrificial structure. The structure is connected to the transfer substrate. The micro-light-emitting diode unit intermediary structure according to item 9 of the scope of patent application, wherein the first sacrificial patterns cover the corresponding lower surfaces of the plurality of micro-light-emitting diodes, and each of the first The gap exists between the sacrificial pattern and the transfer substrate. The intermediary structure of the micro-light-emitting diode unit described in item 9 of the scope of the patent application, wherein the gap exists between the sacrificial structure, the lower surface of the micro-light-emitting diodes, and the transfer substrate. The micro-light-emitting diode unit intermediary structure described in item 8 of the scope of patent application, further comprising: a plurality of first sacrificial patterns, which are located directly below the corresponding connection portions; and a second sacrificial layer covering the The transfer substrate, the first sacrificial patterns are disposed on a part of the second sacrificial layer, the connecting portions are connected to the second sacrificial layer through the corresponding first sacrificial patterns, and the second sacrificial layer, each The gap exists between the first sacrificial pattern and the lower surface of the micro-light emitting diodes. The micro-light-emitting diode unit intermediary structure according to item 8 of the scope of the patent application, wherein the connection portions cover the side surfaces of the corresponding light-emitting diodes and directly contact the transfer substrate. The micro-light-emitting diode unit intermediary structure according to item 13 of the scope of the patent application, further comprising: a plurality of first sacrificial patterns located between the micro-light-emitting diodes and the transfer substrate, the first sacrificial patterns The pattern covers the corresponding lower surfaces of the micro-light-emitting diodes and is connected to the corresponding connection portions, and the gap exists between each of the first sacrificial pattern, the connection portions, and the lower surface of the light-emitting diodes. . The micro-light-emitting diode unit intermediary structure described in item 13 of the scope of patent application, further comprising: a plurality of second sacrificial patterns, which are located on the transfer substrate, are connected to corresponding connection portions, and each of the second The gap exists between the sacrificial pattern, the connection portions, and the lower surfaces of the plurality of light emitting diodes. According to the micro-light-emitting diode unit intermediary structure described in item 9 of the patent application scope, wherein one of the first sacrificial patterns and the second sacrificial patterns is an inorganic material, the first sacrificial patterns and the first sacrificial patterns are The other of the two sacrificial patterns is an organic material. The first sacrificial patterns and the second sacrificial patterns are different from the insulating pattern materials, and the insulating pattern materials are selected from silicon nitride, silicon oxide, or silicon oxynitride. . The micro-light-emitting diode unit interposer according to item 8 of the scope of the patent application, wherein the first type semiconductor pattern is a P type semiconductor, the second type semiconductor pattern is an N type semiconductor, and the first type semiconductor pattern The thickness is smaller than the thickness of the second type semiconductor pattern. A miniature light-emitting diode unit includes: a multilayer semiconductor pattern including at least a first-type semiconductor pattern and a second-type semiconductor of opposite polarity to the first-type semiconductor pattern; an insulating pattern covering the first-type semiconductor A pattern and the second type semiconductor pattern, and the insulating pattern has a plurality of openings; and a first electrode and a second electrode, respectively, connected to the first type semiconductor pattern and the second type semiconductor pattern through the openings; And a first sacrificial pattern covering an outer surface of the first type semiconductor pattern, the first type semiconductor pattern being located between the second type semiconductor and the first sacrificial pattern, wherein a material of the first sacrificial pattern is different from The material of the insulating pattern is silicon oxide, silicon nitride, or silicon oxynitride. The micro light-emitting diode unit according to item 18 of the application, wherein the first sacrificial pattern has an inner surface that is in contact with the outer surface of the first type semiconductor pattern, and the insulating pattern partially covers the first sacrificial pattern. The inner surface. A miniature light-emitting diode device includes: an array substrate including: a receiving substrate; a pixel array layer disposed on an inner surface of the receiving substrate and including at least one sub-pixel; an adhesive layer disposed on the On the sub-pixel, and partially covering the pixel array layer located on the sub-pixel; and at least one miniature light emitting diode unit as described in item 18 of the scope of patent application, which is disposed on the sub-pixel On the adhesive layer. A method for manufacturing a micro-light-emitting diode unit intermediary structure includes: sequentially forming a plurality of semiconductor layers on a growth substrate, and the multilayer semiconductor layer includes at least a first-type semiconductor layer and a first-type semiconductor; A second type semiconductor with opposite layer polarity; forming a plurality of electrodes on the first type semiconductor layer and the second type semiconductor layer, respectively, wherein the electrodes are separated from each other, and the multilayer semiconductor layer and the electrodes constitute a micro-emitting diode; A polar body; forming a carrying structure, the carrying structure includes a transfer substrate, a sacrificial layer covering the transfer substrate, and a plurality of circuit structures on the sacrificial layer, and the circuit structures are separated from each other; The electrodes of the body and the circuit structures of the carrier structure, so that the electrodes of the micro-light-emitting diodes on the growth substrate face the circuit structures of the carrier structure; After the electrodes are bonded to the circuit structures of the carrier structure, the growth substrate is removed; and the micro-light emitting diode is removed directly below the growth substrate. Portions of the sacrificial layer, and retention of the micro light-emitting diode to another part of the outer shielding of the area of the sacrificial layer. The method for manufacturing a micro-light-emitting diode unit intermediary structure according to item 21 of the application, wherein the supporting structure includes a supporting layer, and the step of forming the supporting structure includes: patterning the supporting layer and supporting the supporting layer. The layer forms at least one opening. According to the manufacturing method of the micro-light-emitting diode unit intermediary structure described in item 22 of the scope of the patent application, wherein one of the circuit structures is filled in the at least one opening and covers a part of the surface of the support layer. A method for manufacturing a micro-light-emitting diode unit, comprising: providing the carrying structure and the micro-light-emitting diode as described in item 21 of the scope of patent application; providing an elastic transposition head for extracting the micro-light-emitting diode, a part thereof The circuit structures and part of the support layer; and transposing the micro-light emitting diode, part of the circuit structures and part of the support layer on a receiving substrate. The method for manufacturing a micro-light-emitting diode unit according to item 24 of the scope of patent application, wherein when the elastic transposition head extracts the micro-light-emitting diode, part of the circuit structures and part of the support layer, the circuits At least one of the structures is disconnected to separate the micro-light-emitting diode from the transfer substrate, and the micro-light-emitting diode, part of the circuit structures, and part of the support layer constitute a micro-light-emitting diode unit. A carrying structure of a miniature light emitting diode includes: a transfer substrate; a sacrificial layer provided on the transfer substrate; a support layer provided on the sacrificial layer, and the support layer having a plurality of openings; a plurality of lines The structure is arranged on the inner surface of the support layer, and the circuit structures are separated from each other. The parallel circuit structures are respectively filled into at least the corresponding openings of a part; a miniature light emitting diode, including: a multilayer semiconductor pattern, At least a first type semiconductor pattern and a second type semiconductor of opposite polarity to the first type semiconductor pattern; and a plurality of electrodes on the first type semiconductor layer and the second type semiconductor layer, wherein the electrodes Are separated from each other; and the electrodes of the micro-light-emitting diode are bonded to the circuit structures of the carrier structure, so that the electrodes of the micro-light-emitting diode face and connect to the circuit structure. According to the supporting structure of the micro-light emitting diode according to item 26 of the patent application scope, there is a gap between the transmission substrate and the supporting layer. A miniature light-emitting diode device includes: a receiving substrate; a pixel array layer disposed on an inner surface of the receiving substrate and including at least one sub-pixel; an adhesive layer disposed on the sub-pixel, and Part of the pixel array layer is located on the sub-pixel; at least one micro light-emitting diode unit is disposed on the adhesion layer of the sub-pixel, and it includes at least: a support layer, an outer surface of the sub-pixel and the adhesion Layer connection; a plurality of circuit structures arranged on the inner surface of the support layer, and the circuit structures are separated from each other; and a micro light emitting diode disposed on the circuit structures, the micro light emitting diode includes: a plurality of layers The semiconductor pattern includes at least a first-type semiconductor pattern and a second-type semiconductor pattern having a polarity opposite to that of the first-type semiconductor pattern; and a plurality of electrodes are disposed on the first-type semiconductor pattern and the second type, respectively. On the semiconductor pattern, the electrodes are separated from each other, and each of the electrodes is respectively connected to a corresponding one of the circuit structures. The miniature light emitting diode device according to item 28 of the scope of patent application, wherein at least one of the circuit structures extends beyond one side of the supporting layer. The micro-light-emitting diode device according to item 29 of the scope of patent application, further includes a plurality of conductive layers, and the conductive layers are separated from each other, wherein at least one of the circuit structures extends from the support layer to the adhesion. Layers, and each of the circuit structures is electrically connected to the pixel array layer through the corresponding conductive layers. The micro-light emitting diode device according to item 28 of the scope of the patent application, wherein the material of the supporting layer is silicon or a combination of silicon and silicon oxide.