TW201810608A - Electrostatic discharge protection circuit - Google Patents

Abstract

A electrostatic discharge protection circuit is provided and includes a silicon controlled rectifier (SCR), at least one first diode and at least one second diode. The SCR includes two bipolar junction transistors (BJT). The first BJT has a first terminal coupled to anode of the SCR. The second BJT has a first terminal coupled to a base of the first BJT, a base coupled to a second terminal of the first BJT, and a second terminal coupled to a cathode of the SCR. The first diode has an anode coupled to a first voltage, a cathode coupled to an anode of the SCR. The second diode has an anode coupled to the base of the first BJT, and a cathode coupled to the cathode of the SCR.

Description

Electrostatic discharge protection circuit

The present invention relates to an electrostatic discharge protection circuit, and more particularly to an electrostatic discharge protection circuit using a tamper-controlled rectifier.

Electrostatic discharge is a phenomenon in which charges are transferred between two objects of different potentials, which may cause damage to the integrated circuit due to the possibility of generating a large energy transfer in a short period of time. As semiconductor sizes become smaller and smaller, electrostatic discharge damage will become more and more serious. A silicon controlled rectifier (SCR) is a common electrostatic discharge protection device. Please refer to Figure 1. The controlled rectifier has a PNP type bipolar junction transistor (BJT) 110 and an NPN type. The double carrier junction transistor 120. The base of the bi-carrier junction transistor 110 is an N-well, and the base of the bi-carrier junction transistor 120 is a P-well. The trigger voltage of the 整流-controlled rectifier is determined by the avalanche voltage between the N/P wells. Once an avalanche occurs between the N/P wells, the bi-carrier junction transistor 110, 120 will be turned on, and the controlled rectifier will enter the latching state, at which point the current generated by the electrostatic discharge can be released. by The avalanche voltage is very high, so the conventional voltage-controlled rectifier has a large trigger voltage, which is usually larger than the breakdown voltage of the transistor gate. The disadvantage is that the electrostatic discharge is generated before the rectifier rectifier enters the locked state. Voltage can damage some components in the circuit. Therefore, how to solve this problem is a topic of concern to those skilled in the field.

The invention provides an electrostatic discharge protection circuit comprising a controlled rectifier, at least one first diode and at least one second diode. The step-controlled rectifier includes a first bi-carrier junction transistor and a second bi-carrier junction transistor. The first pole of the first bipolar junction transistor is coupled to the anode of the step-controlled rectifier. The first pole of the second bipolar junction transistor is coupled to the base of the first bipolar junction transistor, the base is coupled to the second pole of the first bipolar junction transistor, and the second The pole is coupled to the negative pole of the step-controlled rectifier. The anode of the first diode is coupled to the first voltage, and the cathode is coupled to the anode of the step-controlled rectifier. The anode of the second diode is coupled to the base of the first bipolar junction transistor, and the cathode is coupled to the cathode of the rectifier rectifier.

In some embodiments, the negative pole of the pilot rectifier is coupled to a second voltage. The ESD protection circuit further includes a third diode, the anode of which is coupled to the second voltage, and the cathode is coupled to the first voltage.

In some embodiments, the ESD protection circuit further includes a fourth diode and a fifth diode. The anode of the fourth diode is coupled to the second voltage, and the cathode is coupled to the third voltage. The anode of the fifth diode is coupled to the third voltage, and the cathode is coupled to the second voltage.

In some embodiments, the ESD protection circuit further includes a sixth diode having an anode coupled to the third voltage and a cathode coupled to the first voltage.

In some embodiments, the ESD protection circuit further includes a seventh diode having a positive electrode coupled to the second voltage and a negative electrode coupled to the fourth voltage.

In some embodiments, the pilot rectifier includes the following components. The substrate has a first well region and a second well region, wherein the first well region surrounds the second well region, and the doping type of the first well region is different from the doping type of the second well region. The first electrode is formed over the second well region, the doping type of the first electrode being the same as the doping type of the second well region. The second electrode is formed on the second well region and surrounds the first electrode, the doping type of the second electrode is different from the doping type of the second well region, and the first electrode and the second electrode are coupled to the controlled rectifier negative electrode. A third electrode is formed over the first well region and surrounds the second electrode, the third electrode having a different type of doping than the first well region. The fourth electrode is formed on the first well region and surrounds the third electrode, the doping type of the fourth electrode is the same as the doping type of the first well region, and the third electrode and the fourth electrode are coupled to the controlled rectifier positive electrode.

The above described features and advantages of the invention will be apparent from the following description.

110, 120‧‧‧Double carrier junction transistor

210‧‧‧Input pads

220‧‧‧Power pads

230‧‧‧ Grounding pads

241~245‧‧‧Electrostatic discharge protection circuit

250‧‧‧Internal circuits

260‧‧‧Output pads

VDD, VSS, DVDD, DVSS‧‧‧ voltage

310‧‧‧Controlled rectifier

311‧‧‧ positive

312‧‧‧negative

313, 314‧‧‧Double carrier junction transistor

320‧‧‧Power pads

D1~D7‧‧‧ Diode

510‧‧‧ Grounding pads

710‧‧‧Substrate

711, 712‧‧ ‧ well area

721~724‧‧‧electrode

AB‧‧‧ tangent

P, N, P+, N+‧‧‧ mixed types

[Fig. 1] is a circuit diagram showing a pilot rectifier according to the prior art.

FIG. 2 is a circuit diagram showing the arrangement of an electrostatic protection circuit in a general integrated circuit according to an embodiment.

Fig. 3 is a circuit diagram showing an electrostatic discharge protection circuit according to the first embodiment.

Fig. 4 is a circuit diagram showing an electrostatic discharge protection circuit according to a second embodiment.

Fig. 5 is a circuit diagram showing an electrostatic discharge protection circuit according to a third embodiment.

Fig. 6 is a circuit diagram showing an electrostatic discharge protection circuit according to a fourth embodiment.

Fig. 7 is a cross-sectional view showing a process of a controlled rectifier according to a fifth embodiment.

Fig. 8 is a top view showing a step-controlled rectifier according to a fifth embodiment.

The terms "first", "second", "etc." used in this document are not intended to mean the order or the order, and are merely to distinguish between elements or operations described in the same technical terms. In addition, as used herein, "coupled" may mean that two elements are electrically connected, either directly or indirectly. That is, when the following description "the first object is coupled to the second object", other items may be disposed between the first object and the second object.

In a general integrated circuit, an electrostatic protection circuit can be disposed around an input pad, an output pad, a power pad, and/or a ground pad, thereby clamping an overload voltage and providing A low impedance path to discharge the current generated by the electrostatic discharge. For example, please refer to FIG. 2. FIG. 2 is a diagram showing electrostatic protection in a general integrated circuit according to an embodiment. Circuit diagram of the road. In the embodiment of FIG. 2, the power pad 220 is used to provide the system voltage (VDD), and the ground pad 230 provides the ground voltage (VSS). The signal is input from the input pad 210, and the signal is output through the internal circuit 250. To the output pad 260. The ESD protection circuits 241-245 are used to protect the internal circuit 250. The ESD protection circuit 241 is disposed between the system voltage VDD and the input pad 210. The ESD protection circuit 242 is disposed on the input pad 210 and the ground voltage. Between VSS, the electrostatic discharge protection circuit 243 is disposed between the system voltage VDD and the output pad 260, the electrostatic discharge protection circuit 244 is disposed between the output pad 260 and the ground voltage VSS, and the electrostatic discharge protection circuit 245 is disposed between The system voltage VDD is between the ground voltage VSS. However, the electrostatic discharge protection circuit proposed below may be disposed at any one of the electrostatic discharge protection circuits 241 to 245 of FIG. 2 or other suitable positions, and the present invention is not limited thereto. The design of the electrostatic discharge protection circuit will be described in detail below.

[First Embodiment]

3 is a circuit diagram showing an electrostatic discharge protection circuit according to a first embodiment. Referring to FIG. 3, the ESD protection circuit of FIG. 3 includes at least a rectifier rectifier 310 and diodes D1 and D2. The controlled rectifier 310 has an anode 311 and a cathode 312, and the controlled rectifier 310 includes a bipolar junction transistor 313 (also referred to as a first bipolar junction transistor) and a bicarrier. The junction transistor 314 (also referred to as a second bipolar junction transistor). The first pole of the bipolar junction transistor 313 (eg, the emitter) is coupled to the anode 311 of the step-controlled rectifier 310. The first pole of the sub-junction transistor 314 (eg, the collector) is coupled to the base of the bipolar junction transistor 313 The base of the bipolar junction transistor 314 is coupled to the second pole of the bipolar junction transistor 313 (eg, the collector), and the second pole of the bipolar junction transistor 314 (eg, The emitter is coupled to the negative electrode 312 of the step-controlled rectifier 310. In addition, the diodes D1 (also referred to as the first diodes) are connected in series with each other, the anode of which is coupled to the voltage DVDD, and the cathode of the anode is coupled to the anode 311 of the step-controlled rectifier 310. The diodes D2 (also referred to as second diodes) are also connected in series with each other, the anode of which is coupled to the base of the bipolar junction transistor 313, and the cathode is coupled to the cathode 312 of the rectifier rectifier 310.

In this embodiment, the power pad 320 provides a voltage DVDD (also referred to as a first voltage), and the negative electrode 312 of the voltage controlled rectifier 310 is coupled to a voltage DVSS (also referred to as a second voltage), the two voltages DVDD DVSS is paired to provide power to the digital circuitry. When an electrostatic discharge occurs on the power pad 320 and there is a large positive voltage, the voltage will straddle the emitter and base of the diode D1, the bipolar junction transistor 313, and the diode. On D2, since the cut-in voltage of the diode D2 is smaller than the avalanche voltage between the two bases of the bipolar junction transistors 313 and 314, the diode D2 will first generate sufficient current. Thereby, the bi-carrier junction transistors 313, 314 are turned on, so that the step-controlled rectifier 310 enters a locked state. The number of diodes D2 must be sufficient so that no current is generated on the diode D2 during normal operation to trigger the pilot rectifier 310. In other words, the trigger voltage of the electrostatic discharge protection circuit in this embodiment is diode D2. The number is determined by which the problem that the trigger voltage of the rectifier rectifier 310 is too high can be solved. In FIG. 3, the number of diodes D2 is four, but in other embodiments, more or less can be set. Diode D2, the invention is not limited thereto.

When the voltage controlled rectifier 310 enters the latched state, the potential difference between the positive electrode 311 and the negative electrode 312 is referred to as a hold voltage, and the hold voltage generally needs to be higher than the potential difference between the normal operation voltage DVDD and the voltage DVSS. In some applications, since a higher voltage DVDD is used, the diode D1 is required to equivalently increase the holding voltage. In this embodiment, there are three diodes D1, but the present invention does not limit the diode D1. Number of. It is worth noting that the setting of the diode D1 can also affect the trigger voltage of the ESD protection circuit. If one diode D2 is reduced and one diode D1 is added, the trigger voltage of the ESD protection circuit is unchanged, but Keep the voltage increasing.

The above operation is to provide positive ESD protection, while the diode D3 is used to provide reverse ESD protection. Specifically, the anode of the diode D3 (also referred to as the third diode) is coupled to the voltage DVSS, and the anode is coupled to the voltage DVDD. When a large negative voltage appears on the power pad 320, the diode D3 will be biased, thereby providing a low impedance current path.

In some embodiments, the ESD protection circuit of FIG. 3 further includes diodes D4, D5. The anode of the diode D4 (also referred to as the fourth diode) is coupled to the voltage DVSS, and the cathode is coupled to the voltage VSS (also referred to as the third voltage). The anode of the diode D5 (also referred to as the fifth diode) is coupled to the voltage VSS, and the cathode is coupled to the voltage DVSS. The voltage VSS is paired with another voltage VDD (shown in FIG. 5), which is a power supply for providing an analog circuit in this embodiment, but the invention is not limited thereto.

In some embodiments, the ESD protection circuit of FIG. 3 is further included Diode D6 (also known as the sixth diode). The anode of the diode D6 is coupled to the voltage VSS, and the cathode is coupled to the voltage DVDD to provide another reverse electrostatic discharge protection path.

[Second embodiment]

4 is a circuit diagram showing an electrostatic discharge protection circuit according to a second embodiment. In some embodiments, due to the size limitation of the integrated circuit, the discharge capability of the step-controlled rectifier is insufficient, so the electrostatic discharge protection circuit of FIG. 3 needs to be repeatedly set as shown in FIG. 4, but the components of FIG. 4 are The function is similar to that of FIG. 3 and will not be described here.

[Third embodiment]

FIG. 5 is a circuit diagram showing an electrostatic discharge protection circuit according to a third embodiment. Please refer to FIG. 5, which is similar to FIG. 3, and only the differences will be described herein. In the embodiment of FIG. 5, the ESD protection circuit is coupled to the ground pad 510. In addition, the anode of the diode D7 (also referred to as the seventh diode) is coupled to the voltage DVSS, and the cathode is coupled to the voltage VDD (also referred to as the fourth voltage). As described above, those skilled in the art, when in accordance with the teachings of FIG. 3 and FIG. 5, may have the electrostatic discharge protection circuit disposed on other pads and coupled to other voltages after a slight retouching.

[Fourth embodiment]

Fig. 6 is a circuit diagram showing an electrostatic discharge protection circuit according to a fourth embodiment. In the fourth embodiment, the electrostatic discharge protection circuit of the third embodiment is repeatedly configured, thereby increasing the discharge capacity.

[Fifth Embodiment]

7 is a diagram showing a process of a controlled rectifier according to a fifth embodiment Cross-sectional view, FIG. 8 is a top view showing a controlled rectifier according to a fifth embodiment. Specifically, FIG. 7 is a cross-sectional view taken along line AB of FIG. Referring to FIG. 7 and FIG. 8, in this embodiment, a pitch controlled rectifier is formed in a ring type manner, whereby a wider current path can be provided. Specifically, the tamper-controlled rectifier 310 has a P-type substrate 710 having a first well region 711 of the N-type and a second well region 712 of the P-type, and the first well region 711 surrounds the second well region 712. . The second well region 712 has a P+ type first electrode 721 and an N+ type second electrode 722. The second electrode 722 surrounds the first electrode 721, and the second electrode 722 and the first electrode 721 have shallow trench isolation (Shallow The trench isolation, STI), and the first electrode 721 and the second electrode 722 are both coupled to the negative electrode 312 of the step-controlled rectifier 310. The first well region 711 has a P+ type third electrode 723 and an N+ type fourth electrode 724. The third electrode 723 surrounds the second electrode 722, and the third electrode 723 and the second electrode 722 have shallow trench isolation therebetween. The fourth electrode 724 surrounds the third electrode 723, and the fourth electrode 724 and the third electrode 723 also have shallow trench isolation therebetween. The third electrode 723 and the fourth electrode 724 are coupled to the anode 311 of the controlled rectifier 310. In this embodiment, the electrodes 721 to 724 are, for example, doped polysilicon. In the pilot rectifier 310, the semiconductor structure of the P-N-P-N is from the third electrode 723, the first well region 711, the second well region 712, to the second electrode 722. As shown in FIG. 8, the current flows from the periphery to the center, and the surrounding design can increase the width of the path, thereby increasing the discharge capability of the controlled rectifier 310.

It should be noted that those skilled in the art have the ability to modify the types of inclusions in Figures 7 and 8, and the present invention is not limited thereto. For example, the substrate 710 can be N-type, and the first well region 711 can be a P-type, a second well region. 712 may be P-type, first electrode 721 may be N+ type, second electrode 722 may be P+ type, third electrode 723 may be N+ type, and fourth electrode 724 may be P+ type. In other words, the doping type of the first well region 711 is different from the doping type of the second well region 712, the doping type of the first electrode 721 is the same as the doping type of the second well region 712, and the reference of the second electrode 722 The impurity type is different from the doping type of the second well region 712, the doping type of the third electrode 723 is different from the doping type of the first well region 711, and the doping type of the fourth electrode is the same as that of the first well region 711. Mixed type. The types of impurities of the respective electrodes and well regions described above are not limited to the embodiments of Figs.

In the electrostatic discharge protection circuit proposed by the embodiment of the present invention, the setting of the diode can reduce the trigger voltage and increase the holding voltage. In addition, the discharge capacity of the controlled rectifier can be increased by the two-dimensional ring setting.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

Claims (6)

An electrostatic discharge protection circuit comprising: a controlled rectifier comprising: a first dual carrier junction transistor, a first pole coupled to the anode of the step-controlled rectifier; and a second dual carrier junction The first pole of the crystal is coupled to the base of the first bipolar junction transistor, the base is coupled to the second pole of the first bipolar junction transistor, and the second pole is coupled to the a cathode of the rectifier; at least one first diode having a positive pole coupled to a first voltage, a cathode coupled to the anode of the step-controlled rectifier, and at least a second diode coupled to the anode The base of the first bipolar junction transistor is coupled to the negative electrode of the step-controlled rectifier. The electrostatic discharge protection circuit of claim 1, wherein the negative electrode of the controlled rectifier is coupled to a second voltage, the electrostatic discharge protection circuit further comprising: a third diode, the positive pole is coupled To the second voltage, the negative electrode is coupled to the first voltage. The electrostatic discharge protection circuit of claim 2, further comprising: a fourth diode, the positive pole of which is coupled to the second voltage, and the negative pole is coupled And a fifth diode, wherein a positive electrode is coupled to the third voltage, and a negative electrode is coupled to the second voltage. The electrostatic discharge protection circuit of claim 3, further comprising: a sixth diode, the anode of which is coupled to the third voltage, and the anode is coupled to the first voltage. The electrostatic discharge protection circuit of claim 3, further comprising: a seventh diode, the anode of which is coupled to the second voltage, and the anode is coupled to a fourth voltage. The electrostatic discharge protection circuit of claim 1, wherein the controlled rectifier comprises: a substrate having a first well region and a second well region, wherein the first well region surrounds the second well region And the doping type of the first well region is different from the doping type of the second well region; a first electrode is formed on the second well region, wherein the doping type of the first electrode is the same as the a doping type of the second well region; a second electrode formed over the second well region and surrounding the first electrode, wherein the second electrode has a different impurity type than the second well region a miscellaneous type, and the first electrode and the second electrode are coupled to the controlled rectifier The negative electrode; a third electrode formed on the first well region and surrounding the second electrode, wherein the third electrode has a different type of doping than the first well region; and a fourth electrode formed on the first well region and surrounding the third electrode, wherein the fourth electrode has the same type of doping as the doping type of the first well region, and the third electrode and the third electrode A four electrode is coupled to the anode of the step-controlled rectifier.