TW201729315A - Method and system for process control with flexible sampling - Google Patents

Abstract

The generation of flexible sparse metrology sample plans includes receiving a full set of metrology signals from one or more wafers from a metrology tool, determining a set of wafer properties based on the full set of metrology signals and calculating a wafer property metric associated with the set of wafer properties, calculating one or more independent characterization metrics based on the full set of metrology signals, and generating a flexible sparse sample plan based on the set of wafer properties, the wafer property metric, and the one or more independent characterization metrics. The one or more independent characterization metrics of the one or more properties calculated with metrology signals from the flexible sparse sampling plan is within a selected threshold from one or more independent characterization metrics of the one or more properties calculated with the full set of metrology signals.

Description

Method and system for program control using flexible sampling

The present invention is generally directed to wafer metrics for lithography control, and in particular, the present invention relates to the generation of flexible sampling patterns for noise reduction and improved feedback processing tool feedback correction.

Fabricating semiconductor devices, such as logic and memory devices, typically includes processing a plurality of features, such as a wafer, to form various features and levels of the devices using a plurality of processes. For example, lithography involves the transfer of a pattern from a master reticle/mask to one of the photoresists disposed on a wafer. Additional examples of processes include, but are not limited to, chemical mechanical polishing (CMP), etching, deposition, and ion implantation. As used in this invention, the term "wafer" generally refers to a substrate formed from a semiconductor or non-semiconductor material. For example, a semiconductor or non-semiconductor material can include, but is not limited to, single crystal germanium, gallium arsenide, or indium phosphide. A wafer can include one or more layers. For example, such layers can include, but are not limited to, a photoresist, a dielectric material, a conductive material, and a half conductive material. Many different types of such layers are known in the art, and as used herein, the term "wafer" is intended to encompass a wafer on which all of these types of layers are formed. One or more of the layers formed on a wafer may be patterned or unpatterned. For example, a wafer can include a plurality of dies each having reproducible patterning characteristics. The formation and processing of such material layers can ultimately result in the completion of the device. Many different types of devices can be formed on a wafer, and as used herein, the term "wafer" is intended to encompass a wafer on which any type of device known in the art can be fabricated. Metrics are used in various steps during a semiconductor process to monitor program control during device fabrication. The types of metrics used for program control include overlay metrics, critical dimension (CD) metrics, wafer geometry metrics, and the like. For example, during a program step such as a lithography process step, an overlay error may occur between one of the current layers of the semiconductor device and a previous layer. The overlap is defined as the offset between the current layer of a semiconductor device and one or more previous layers of the semiconductor device. Overlay errors can result from a variety of reasons including lithography tool (scanner) errors, wafer geometry induced errors, etch induced errors, and the like. A feedback control system is employed to control overlap and minimize overlap errors during fabrication of a semiconductor device. The feedback control system relies on: i) using a metrology tool to measure the overlap; ii) calculating the scanner correctable error that minimizes overlap; and iii) feeding back such corrections through an advanced program control (APC) algorithm. Conventional overlap control schemes rely on measuring a fixed subset of overlapping targets on the wafer (ie, static sampling maps) to model the overlay error and calculate the scanner correctable error. Previous applications of overlay metrics used static sampling maps where each wafer measured in each batch received the same sample map. In this case, the sample map represents a selected subset of all available overlapping targets on the wafer. Therefore, under normal circumstances, a periodic "dense map" measurement is performed in which a very dense overlapping sample map (e.g., thousands of targets) is used to measure some wafers so that a domain-by-domain correction can be produced. These periodic measurements are time consuming and labor intensive. In addition, this procedure must be repeated to correct for significant irregularities and high-order overlap markers. Additional methods include relying on an advanced field-by-domain extrapolation modeling technique in which information from static sampling maps is used to calculate field-by-domain corrections and does not rely on periodic dense map measurements. This approach requires extensive optimization and careful setup. In addition, extrapolation techniques cannot be used for some irregular overlay markers. As semiconductor devices shrink in size, metrology procedures become more important for the successful manufacture of acceptable semiconductor devices. Thus, it would be advantageous to provide a system and method that provides improved metrology capabilities and eliminates the disadvantages of the prior methods as identified above.

A system for forming a virtual dense sampling map using a plurality of flexible sparse sampling maps is disclosed. In an embodiment, the system includes a one-measurement subsystem configured to perform one or more metric measurements on one or more wafers of a batch of wafers. In another embodiment, the system includes a controller communicatively coupled to one or more portions of the metric subsystem. In another embodiment, the controller includes one or more processors configured to execute program instructions, the program instructions being configured to cause the one or more processors to receive based on the metric subsystem The one or more metric measurements of the one or more wafers to generate a plurality of flexible sparse sampling patterns; directing the metric subsystem to two or more crystals at locations of the plurality of flexible sparse sampling patterns A circle performs a metric measurement, wherein each flexible sparse sample map is associated with one of the two or more wafers; by combining the metric measurements performed at locations of the plurality of flexible sparse sample maps As a result, a virtual dense map of one of the metric signals is formed; and a set of processing tools can be used to correct the error based on the virtual dense map of the metric signal. A system for generating one or more flexible sparse sampling maps is disclosed. In an embodiment, the system includes a one-measurement subsystem configured to perform one or more metric measurements on one or more wafers. In another embodiment, the system includes a controller communicatively coupled to one or more portions of the metric subsystem. The controller includes one or more processors configured to execute program instructions, the program instructions being configured to cause the one or more processors to receive from the one or more wafers from the measurement subsystem One metric signal ensemble; determining a set of wafer properties based on the metric signal ensemble and calculating a wafer property metric associated with the set of wafer properties; calculating one or more independent property metrics based on the metric signal corpus; And generating a flexible sparse sampling map based on the set of wafer properties, the wafer property metric, and the one or more independent characteristic metrics, wherein the one or more properties are calculated using metric signals from the flexible sparse sampling map The one or more independent characteristic metrics are within one of one or more independent characteristic metrics selected from the one or more properties calculated using the metric signal ensemble. A system for generating one or more flexible sparse sampling maps is disclosed. In an example, the system includes a one-measurement subsystem configured to perform one or more metric measurements on one or more wafers. In another embodiment, the system includes a controller communicatively coupled to one or more portions of the metric subsystem. The controller includes one or more processors configured to execute program instructions, the program instructions being configured to cause the one or more processors to receive from the one or more wafers from the measurement subsystem One metric signal ensemble; determining a set of wafer properties based on the metric signal ensemble and calculating a set of accuracy metrics for the set of wafer properties; calculating a correlation with each of the set of accuracy metrics for the set of wafer properties One of the statistical metrics; and generating a flexible sparse sampling map based on the statistical metrics associated with each of the set of accuracy metrics. A system for generating one or more flexible sparse sampling maps is disclosed. In an embodiment, the system includes a one-measurement subsystem configured to perform one or more metric measurements on one or more wafers. In another embodiment, the system includes a controller communicatively coupled to one or more portions of the metric subsystem. The controller includes one or more processors configured to execute program instructions, the program instructions being configured to cause the one or more processors to receive from the one or more wafers from the measurement subsystem One metric signal ensemble; determining a set of wafer properties based on the metric signal ensemble and calculating a set of accuracy metrics of the set of wafer properties; and generating a flexible sparse sampling map based on the set of accuracy metrics The flexible sparse sampling map is generated by identifying a target location within the full sampling map that displays an accuracy indicator value below a selected threshold. The above general description and the following detailed description are intended to be illustrative and not restrictive. The accompanying drawings, which are incorporated in FIG

Related application It Cross reference The right of this application to be related to the following (several) applications ("Related Applications") and claiming the earliest available valid filing date of the (or other) application (for example, claiming (s) related applications other than provisional patent applications) The earliest available priority date of any and all parental applications, grandparent applications, and grandparents' applications, or the provisional patent application, (several) related applications under 35 USC § 119(e) Any and all parental applications, grandparents’ applications, and great-grandparents’ applications, etc.).Related applications: In order to meet the additional statutory requirements of the USPTO, this application constitutes US Provisional Patent Application No. 62, entitled "COMPOSITE WAFER CONTROL USING FLEXIBLE SAMPLING", filed on June 18, 2015 by the inventors of Onur Demirer, William Pierson and Roie Volkovich. One of the non-provisional patent applications of U.S. Patent No. 1,181, the entire disclosure of which is incorporated herein by reference. In order to meet the additional statutory requirements of the USPTO, this application constitutes a US interim patent entitled "OPTIMIIZING SAMPLING BASED ACCURACY" filed on September 21, 2015 by the inventors of Mark Wagner, Roie Volkovich, Dana Klein, Bill Pierson and Onur Demirier. One of the non-provisional patent applications of the application Serial No. 62/221,588, the entire disclosure of which is incorporated herein by reference. Reference will now be made in detail to the claims Referring generally to Figures 1A through 4, a method and system for generating a flexible sampling map for use in processing tool calibration in accordance with the present invention is described. Embodiments of the present invention are directed to the generation of flexible sparse sampling maps that represent a subset of available measurement target locations for one or more wafers of a batch of wafers. Additional embodiments of the present invention are directed to the use of metrology data (which is obtained using multiple flexible sparse maps) to produce composite wafer corrections. Based on analyzing one or more independent metrics (eg, accuracy metrics) such as, but not limited to, a program mark metric (eg, PSQ), a patterned wafer geometry metric (eg, PWG), an overlay target asymmetry metric (eg, Qmerit) or overlapping target accuracy metrics (eg, overlapping target accuracy flags) to produce a flexible sparse sampling map. FIG. 1A illustrates a conceptual block diagram of one of the metrology systems 100 for performing one or more metric measurements in accordance with one or more embodiments of the present invention. In an embodiment, system 100 includes a metrics subsystem 102. The metrology subsystem 102 is configured to measure one or more characteristics of one or more of the metric targets 111 of the wafer 112. For example, the metrology subsystem 102 can be configured to measure/characterization one or more of an overlay metric target, an optical critical dimension (CD) target, or a focus/dose target. For example, metric subsystem 102 can measure one or more metric targets 116 in one or more domains 113 of a wafer, as depicted in Figures IB-FIG. It should be noted that a simplified block diagram of one of the metrology systems 100 has been depicted for simplicity. This drawing, which includes components and geometric configurations, is not restrictive, but is for illustration only. It will be appreciated that herein, the metrology system can include any number of optical elements, illumination sources, and detectors to implement the metrics described herein (eg, overlay metrics, CD metrics, focus/dose metrics), such metrics The program may be based on metric measurement techniques such as contrast based imaging, scatterometry, ellipsometry, SEM, and/or AFM techniques. In an embodiment, the metrics subsystem 102 includes an overlay metrics subsystem or tool. In one embodiment, as shown in FIG. 1D, the metrics subsystem 102 is an imaging-based metrics subsystem. For example, the imaging-based metric subsystem is configured to measure one or more contrast-based domain images of one or more targets 111 of wafers 112 disposed on stage 136. In an embodiment, in terms of imaging metrics, system 100 can include: an illumination source 122 configured to generate illumination 134; a detector 130 configured to collect from one or more One or more of the wafers 112 (eg, one or more wafers of one or more wafers) measure light reflected by the target 111; and one or more optical components. In one embodiment, the one or more optical components (eg, beam splitter 126 and the like) are configured to direct a first portion of illumination from illumination source 122 along a target path 132 to be disposed on One or more metrology targets 111 on one or more of the processing layers of a wafer 112 (which is disposed on the stage 136). In addition, a second portion of one of the light from illumination source 122 is directed to one or more reference optics 140 along reference path 138. Illumination source 122 of system 100 can include any illumination source known in the art. In an embodiment, illumination source 122 can include a broadband source. For example, illumination source 122 can include, but is not limited to, a halogen light source (HLS), an arc lamp, or a laser sustain plasma source. In another embodiment, illumination source 122 can include a narrow frequency source. For example, illumination source 122 can include, but is not limited to, one or more lasers. In an embodiment, one or more optical components of system 100 may include, but are not limited to, one or more beam splitters 126. For example, beam splitter 126 can split beam 134 from illumination source 122 into two paths: a target path 132 and a reference path 138. In this regard, target path 132 and reference path 138 may form part of a dual beam interference optical system. For example, beam splitter 126 can direct a first portion of one of the beams from illumination path 134 along target path 132 while allowing a second portion of one of the beams from illumination path 134 to be transmitted along reference path 138. Beam splitter 126 can transmit a portion of the light from illumination path 134 along reference path 138 to reference optics 140 such as, but not limited to, a reference mirror. Reference path 138 and reference optics 140 can include any optical component known in the art based on the overlay metric of imaging, including but not limited to a reference mirror, a reference objective, and configured to selectively block Reference shutter 138 is one of the paths. In general, a dual beam interference optical system can be configured as a Linnik interferometer. The Linnik interferometry is generally described in U.S. Patent No. 4,818,110, issued Apr. 4, 1989, and U.S. Patent No. 6,172,349, issued Jan. . In another embodiment, system 100 can include an objective lens 128. The objective lens 128 can facilitate directing light along the target path 132 to the surface of the wafer 112 disposed on the stage 136. After the beam splitting procedure by beam splitter 126, objective lens 128 can focus light from target path 132 (which can be collinear with the main optical axis) onto metric target 111 of wafer 112. Any objective lens known in the art can be adapted for implementation in this embodiment. In addition, a portion of the light that impinges on the surface of the wafer 112 can be reflected, scattered, or diffracted by the metrology target 111 of the wafer 112 and directed toward the detector 130 along the main optical axis 124 via the objective lens 128 and the beam splitter 126. . It should be further appreciated that intermediate optical devices such as intermediate lenses, mirrors, additional beam splitters, filters, polarizers, imaging lenses, and the like can be placed between objective 128 and detector 130. In another embodiment, the detector 130 can be configured to collect image data from the surface of the wafer 112. For example, light may travel along the main optical axis 124 to the detector 130 after being reflected or scattered from the surface of the wafer 112. It will be appreciated that any detector system known in the art is suitable for implementation in this embodiment. For example, detector 130 can include a camera system based on a charge coupled device (CCD). As another example, detector 130 can include a time delay integrated (TDI)-CCD based camera system. In another aspect, the detector 130 can be communicatively coupled to the controller 104. In this regard, the digitized image data can be transmitted from the detector 130 to the controller via a signal such as a wired signal (eg, a copper wire, fiber optic cable, and the like) or a wireless signal (eg, a wireless RF signal). 104. Next, as will be described in further detail herein, the controller 104 can calculate a set of processing tool correctable errors based on the metric measurements received from the detector 130 and feed the corrections back to a processing tool 105 (eg, a scanner) ). A measurement and calculation technique that can be extended to the imaging-based overlay metric described herein is described in U.S. Patent No. 8,330, 281, issued Dec. 11, 2012, and U.S. Patent No. 7,355,291, issued Apr. 8, 2008. The entire contents of the patents are hereby incorporated by reference. In one embodiment, as shown in FIG. 1E, the metrics subsystem 102 is a metrics subsystem based on scatterometry. For example, the scatterometry based metrics subsystem is an overlay metric based on scatterometry and configured to measure a pupil image of one or more targets 111 of the wafer 112. As another example, the metrology subsystem 102 includes a CD metrology tool suitable for measuring one or more CD parameters from one or more CD targets disposed on the wafer 112. The CD metrology tool can be configured to measure any CD parameters known in the art. For example, the CD metrology tool can measure one or more of the following parameters from one or more CD targets: height, CD (eg, bottom CD, intermediate CD or top CD), and sidewall angle (SWA) (eg, bottom SWA, Intermediate SWA or top SWA). In this embodiment, the metric subsystem 102 can be configured in any manner for performing scatterometry or ellipsometry. In an embodiment, as shown in FIG. 1E, the metrology subsystem 102 can include an illumination source 150, a polarizing element 152, an analyzer 154, and a detector 160. In another embodiment, the metrology subsystem 102 can include additional optical components 156 and 158. For example, optical elements 156 and 158 can include, but are not limited to, one or more lenses (eg, focusing lenses), one or more mirrors, one or more filters, and/or one or more collimators. The use of scatterometry for detecting overlay errors is generally described in U.S. Patent No. 9,347,879, issued on May 24, the entire disclosure of which is incorporated herein by reference. The use of scatterometry for detecting overlay errors is generally described in U.S. Patent No. 6,689,519, issued Feb. 10, 2004, which is incorporated herein in its entirety by reference. The principle of ellipsometry is generally provided by Harland G. Tompkins and Eugene A. Irene, "Handbook of Ellipsometry" (William Andrew, Inc., First Edition, 2005), which is incorporated herein by reference in its entirety. Referring again to FIG. 1A, in an embodiment, system 100 includes a controller 104. In an embodiment, the controller 104 is communicatively coupled to the metrics subsystem 102. For example, as shown in FIGS. 1D-1E, controller 104 can be coupled to the output of one of detectors 130, 160 of one of metric subsystems 102. The controller 104 can be coupled to the detector in any suitable manner (e.g., by indicating one or more transmission media in dashed lines) such that the controller 104 can receive the output produced by the metrology subsystem 102. In an embodiment, controller 104 includes one or more processors 106. One or more processors 106 are configured to execute a set of program instructions. The program instructions can implement any of the program steps described in this disclosure. One or more processors 106 of controller 104 may include any one or more of the processing elements known in the art. In this regard, one or more processors 106 can include any microprocessor-type device configured to execute software algorithms and/or instructions. In one embodiment, one or more processors 106 may be configured as a desktop computer, a large computer system, a workstation, an imaging computer, a parallel processor configured to execute a program (which is configured to operate the operating system 100) Or a computer system (such as a network computer), as described in the present invention. It will be appreciated that the steps described in this disclosure can be implemented by a single computer system or (alternatively) multiple computer systems. In general, the term "processor" is broadly defined to encompass any device having one or more processing elements that execute program instructions from a non-transitory memory medium 108. Moreover, different subsystems of system 100 (e.g., metric subsystems, displays, or user interfaces) can include processors or logic elements suitable for implementing at least a portion of the steps described in this disclosure. Therefore, the above description should not be construed as limiting the invention, but merely illustrative. The memory medium 108 or memory can include any storage medium known in the art suitable for storing program instructions executable by the associated one or more processors 106. For example, the memory medium 108 can include a non-transitory memory medium. For example, the memory medium 108 can include, but is not limited to, a read only memory, a random access memory, a magnetic or optical memory device (eg, a magnetic disk), a magnetic tape, a solid state disk drive, and the like. By. In another embodiment, it should be noted herein that memory 108 is configured to store output from one or more results of metric subsystem 102 and/or various steps described herein. It should be further noted that the memory 108 can be housed in a common controller enclosure with one or more processors 106. In an alternate embodiment, memory 108 can be positioned at the distal end relative to the physical location of processor 106. For example, one or more processors 106 of controller 104 can access a remote memory (eg, a server) that can be accessed through a network (eg, the Internet, an internal network, and the like). In another embodiment, memory medium 108 includes program instructions for causing one or more processors 106 to implement the various steps described in this disclosure. In another embodiment, the controller 104 of the system 100 can be configured to receive and/or retrieve data or information from other systems (eg, from a test by transmitting a medium that can include one of a wired and/or wireless portion) The test result of the system or the measurement result from a measurement system). In this manner, the transmission medium can be used as a data link between the controller 104 of the system 100 and other subsystems. Moreover, controller 104 can transmit data to an external system via a transmission medium, such as a network connection. In another embodiment, system 100 includes a user interface (not shown). In an embodiment, the user interface is communicatively coupled to one or more processors 106 of the controller 104. In another embodiment, the user interface device can be used by controller 104 to accept selections and/or instructions from a user. In some embodiments, which are further described herein, a display can be used to display material to a user (not shown). Then, a user can input a selection and/or an instruction (eg, a measurement domain location or a user selection for a domain location for the regression procedure) in response to the information displayed to the user via the display device. The user interface device can include any of the user interfaces known in the art. For example, the user interface can include, but is not limited to, a keyboard, a keypad, a touch screen, a joystick, a knob, a scroll wheel, a trackball, a switch, a dial, a slider, and a A scroll bar, a slider, a handle, a touch pad, a pedal, a steering wheel, a joystick, a panel input device or the like. In the case of a touch screen interface device, those skilled in the art will recognize that a large number of touch screen interface devices may be suitable for implementation in the present invention. For example, the display device can be coupled to a touch screen interface (such as, but not limited to, a capacitive touch screen, a resistive touch screen, a surface acoustic wave based touch screen, an infrared based touch screen or Similar) integration. In general, any touch screen interface that can be integrated with the display portion of a display device is suitable for implementation in the present invention. In another embodiment, the user interface can include, but is not limited to, a panel mounting interface. Display devices (not shown) may include any of the display devices known in the art. In an embodiment, the display device can include, but is not limited to, a liquid crystal display (LCD). In another embodiment, the display device can include, but is not limited to, an organic light emitting diode (OLED) based display. In another embodiment, the display device can include, but is not limited to, a CRT display. Those skilled in the art will recognize that a variety of display devices may be suitable for implementation in the present invention and that particular selection of display devices may depend on various factors including, but not limited to, exterior dimensions, cost, and the like. In general, any display device that can be integrated with a user interface device (e.g., touch screen, panel mount interface, keyboard, mouse, track pad, and the like) is suitable for implementation in the present invention. Embodiments of the system 100 illustrated in Figures 1A-1E can be further configured as described herein. Additionally, system 100 can be configured to perform any of the other steps(s) of any of the method embodiments(s) described herein. 2 is a flow diagram of steps performed in a method 200 of program control having multiple flexible sparse sampling maps in accordance with one or more embodiments of the present invention. In step 202, a plurality of flexible sparse sampling maps are generated. Utilizing a flexible sparse sampling map allows for optimization (or at least improved) sampling based on accuracy/independent indicator information collected by the self-metric subsystem 102. The metrics subsystem 102 can be an independent metric tool, an integrated metric tool (eg, a metric based on scatterometry or imaging), or a combination thereof. The optimization of the method based on accuracy/independent indicator information is used to reduce the number of samples and measure the duration of the measurement by selecting a subset of the measurement targets representing the target ensemble or sufficient set. A method for generating a flexible sparse sampling map based on independent indicator information such as an accuracy indicator value will be described in further detail herein. In step 204, metric measurements are performed at locations of a plurality of flexible sample maps on one or more wafers. In step 206, a virtual dense map of metric measurements is formed by combining results from metric measurements performed at locations of the plurality of flexible sample maps. Applying the flexible sampling map of the present invention allows field-by-domain correction to be generated from the virtual dense map generated in step 206. This method does not require a periodic dense map measurement. Moreover, the virtual raster map forming step 206 does not involve only one of a plurality of flexible sampling maps. Specifically, forming the virtual dense map first includes removing the grid mark from each flexible sample wafer via the controller 104. Next, one or more algorithms executed by the controller 104 may apply a weighted combination of one of the adjacent domain information to each domain, thereby filtering out the noise. The noise filtering capability of Method 200 becomes especially useful as wafer-to-wafer variations and inter-batch variations increase. By using this method, the zone variation in the wafer 112 can be more accurately captured and the virtual dense map can be used to calculate the domain-by-domain correction. In step 208, the processing tool correctable error is calculated based on the virtual dense map of the metric measurements. For example, after forming a virtual dense sampling map containing various metric signals associated with locations of the virtual dense sampling map, controller 104 may calculate one or more correctable errors based on the virtual dense sampling map. The correctable error can be calculated using any known correctable calculation procedure known in the art that is corrected by the processing tool. In an additional step, the processing tool can correct the error for adjusting one or more processing tools 105. For example, as shown in FIG. 1A, once the controller 104 is used to calculate a processing tool correctable error, the controller 104 can adjust one or more operational parameters of the processing tool 105 (eg, a scanner). The calculation of the correctable error of the processing tool and the use of the overlap function in the calculation of the correctable error of the processing tool is described in U.S. Patent No. 7,876,438, issued Jan. 25, 2011, which is incorporated herein by reference. U.S. Patent No. 6,704,661, U.S. Patent No. 6,768,967, U.S. Patent No. 6,867,866, U.S. Patent No. 6,898,596, U.S. Patent No. 6,919,964, U.S. Patent No. 7,069,153, U.S. Patent No. 7,145,664, U.S. Patent No. 7,873,585, and U.S. Patent An example of modeling used in the context of a semiconductor metrology system is generally described in the application Serial No. 12/486,830, the entire disclosure of which is incorporated herein by reference. 3A is a flow chart showing one of the steps performed in a method 300 of generating a flexible sparse metric sampling map in accordance with an embodiment of the present invention. It should be noted herein that the steps of method 300 may be implemented in whole or in part by system 100. However, it should be further appreciated that the method 300 is not limited to the system 100, as all or a portion of the steps of the method 300 may be implemented in addition to or in place of the system level embodiments. Moreover, it should be noted herein that the steps and embodiments associated with the method 200 previously described herein should be interpreted as being expandable to the method 300. In this regard, the steps of method 200 and method 300 can be combined in any suitable manner. In step 302, a metric complete set of metric signals from one or more of the wafers 112 is acquired. For example, as shown in FIG. 1A, the metrology subsystem 102 retrieves one or more metric measurements from one or more wafers 112 and transmits the measurements to the controller 104. For example, the metrology subsystem 102 can collect a metric signal set or a sufficient set from a set of representative wafers 112 of a batch of wafers. It should be noted that the full sampling of step 302 is not limited to measuring a single wafer, but may be composed of sub-sampling from different wafers. In an embodiment, the metrology subsystem 102 can include an imaging-based metrology tool configured to collect one or more images of one or more targets 111 (see FIG. 1D). In another embodiment, the metrology subsystem 102 can include a metrology-based metrology tool configured to collect one of the light scattered or reflected (or otherwise emitted) from the wafer 112 (see FIG. 1E). For example, the metric signals collected by the metrics subsystem 102 may include one or more scatter-based pupil images that are collected via the metric subsystem 102 and the self-scattering measurement overlap (SCOL) target and/or the multi-layer SCOL target. As another example, the metric signals collected by the metrics subsystem 102 can include one or more contrast-based domain images collected from the image-based overlay (IBO) target and/or the multi-layer IBO target via the metrics subsystem 102. . The metric signals acquired in step 302 can be obtained from any number of locations on the wafer 112. For example, the metric signal can be collected from any of the targets 111 of the wafer 112. In an embodiment, the metric signal may be collected from a set of similar targets. In another embodiment, metric signals may be collected from different types of targets. For example, a portion of the metric signal may be collected from a first type of overlapping metric target while a second portion of the metric signal is collected from a second type of overlapping metric target, and so on. As another example, a portion of the metric signal can be collected from an overlay metric target while a second portion of the metric signal is collected from an optical CD and/or focus/dose target. It should be noted that the terms "measurement signal ensemble" and "measurement signal sufficient set" may be used interchangeably herein and interpreted to describe that the addition of one or more metric signals does not improve the program acquisition or tracking of signal acquisition levels. . In step 304, a set of wafer properties is determined and one of the wafer property metrics associated with the set of wafer properties is calculated. For example, controller 104 may determine a set of wafer properties from the metric signal ensemble after self-metric subsystem 102 receives the metric signal ensemble. Controller 104 can then calculate one or more wafer property metrics associated with the set of wafer properties. For example, controller 104 can determine a set of overlapping values corresponding to respective locations of the metric signal set. Controller 104 may then calculate one or more metrics associated with the set of overlapping values. For example, controller 104 may determine one or more statistical metrics associated with the distribution of overlapping values obtained using the full sampling map. The one or more statistical metrics can include any of the statistical metrics known in the art. For example, controller 104 may calculate one of the mean, standard deviation (σ), or a multiple thereof (eg, 3σ) associated with the distribution of overlapping values obtained using the full sampling map, and the like. As another example, the controller 104 can determine a set of SWA values corresponding to the target at the location of the metric signal from a previous layer. Controller 104 may then calculate one or more metrics associated with the set of SWA values. For example, the controller 104 can determine one or more statistical metrics associated with the distribution of SWA values obtained using the full sampling map. For example, controller 104 may calculate one of the average values, standard deviations (σ), or multiples thereof (eg, 3σ) associated with the distribution of SWA values obtained using the full sampling map, and the like. It should be noted that the scope of the invention is not limited to the examples provided above. It will be appreciated herein that the present invention extends to any wafer properties (e.g., CD values) known in the art and any wafer property metrics (e.g., statistical metrics) known in the art. In step 306, one or more independent characteristic metrics are calculated. For the purposes of the present invention, the term "independent characteristic metric" is interpreted to mean that it is independent of the wafer properties (eg, overlap, SWA, CD, etc.) selected for control in step 304, but provides for a given wafer. A characteristic measure of additional information about the nature. For example, the one or more independent characteristic metrics can include one or more accuracy metrics. For example, the one or more accuracy metrics can include, but are not limited to, an overlay target accuracy metric, such as an overlap target accuracy flag. For example, one such overlapping target accuracy flag is the pupil 3σ accuracy flag. The pupil 3σ flag is derived by measuring a pupil image and calculating the 3σ of all pixels in the pupil. The pupil 3σ flag indicates the target quality and other accuracy related issues such as arcing. Gutjahr et al. describe overlap and aperture in "Root cause analysis of overlay metrology excursions with scatterometry overlay technology (SCOL)" (Proc. SPIE 9778, Metrology, Inspection, and Process Control for Microlithography (March 24, 2016)). The relationship between the 3σ accuracy flags. It should be noted that the scope of the invention is not limited to overlapping target accuracy flags as discussed above. One or more of the independent characteristic metrics of step 306 can be extended to any characteristic metric or accuracy metric known in the art for wafer metrics, such as, but not limited to, a program mark metric (eg, PSQ), a patterned crystal Circular geometry metrics (eg, PWG), an overlapping target asymmetry metric (eg, Qmerit), and overlapping target accuracy metrics (eg, overlap accuracy flags). These metrics can be used to identify changes in overlay marks, problem areas on the wafer, more intensive measurement locations for diagnostic purposes, and avoidance locations due to measurement unreliability, and the like. A quality metric (i.e., Qmerit) for measuring the asymmetry of overlapping targets is described in U.S. Patent Application Serial No. 13/508,495, the entire disclosure of which is incorporated herein by reference. . In step 308, one or more flexible sparse sampling maps are generated. FIG. 3B illustrates a conceptual diagram of a full sampling map 310 and a flexible sparse sampling map 320. In one embodiment, the one or more flexible sparse sampling maps are generated based on a set of wafer properties, a measure of wafer properties, and/or one or more independent property metrics. In an embodiment, one or more flexible sparse sampling maps are generated such that one or more of the one or more wafer properties are obtained using a flexible sparse sampling map equivalent to (at a selected tolerance level) The metric complete set of metrics is used to obtain one or more independent property metrics for one or more wafer properties. In one embodiment, one or more flexible sparse sampling maps are generated such that if a flexible sparse sampling map is used to acquire one or more of the one or more wafer properties, one or more independent characteristic metrics are used and one of the metric signal ensembles is used to obtain one of Or one or more independent characteristic metrics of a plurality of wafer properties are within a selected threshold, then they are defined as being equivalent to each other. In another embodiment, one or more flexible sparse sampling maps are generated such that if a flexible sparse sampling map is used to acquire one or more of the one or more wafer properties and use the metric signal corpus to obtain One or more of the one or more wafer properties are measured within a statistical parameter (eg, a multiple of σ), then they are defined as being equivalent to each other. In one embodiment, one or more flexible sparse sampling maps are generated by simultaneously optimizing all wafer properties together. For example, wafer properties, corresponding accuracy metrics, target placement, and signal parameters (eg, intensity, sensitivity, etc.) can be optimized to find the most accurate set of results. In another embodiment, for at least one wafer property, at least one wafer property metric relates to a common optimization of wafer properties. In one embodiment, the plurality of flexible sparse sampling maps are generated such that each of the wafers within a wafer lot or each successive wafer batch uses a sampling pattern that is different from one of the other wafers. In an embodiment, the flexible sparse map is generated such that it is evenly distributed over one or more wafers 112 and meets regional and global test balance criteria (ie, balanced test repetition). It should be noted that in the case of overlapping measurements, these properties give a flexible sparse sampling map the ability to accurately pattern the grid overlap. In another embodiment, the flexible sparse sampling map generated in step 308 can be used to filter raster noise from the metric signals measured by each wafer. It should be noted that the grid overlap represents the extent of the exposure domain offset. Additionally, one or more flexible sparse sampling maps 320 provide accuracy and robustness with a small number of samples. Thus, the flexible sparse sampling map 320 can be used with an integrated metrology tool to measure each wafer within a given wafer lot with a very small number of samples (eg, 20 to 50 targets per wafer) and is calculated Inter-wafer grid changes are filtered out before the next batch of composite domain-by-domain corrections. The flexible sparse sampling map 320 can be generated such that each flexible sparse sampling map has a particular amount of overlap with the remaining sampling map while satisfying the same balancing criteria as the static sampling map. For example, a user may minimize the overlap between the flexible sparse sampling maps 320 to maximize (or at least increase) the total target measured by the different sampling maps. As another example, a user can utilize the overlap between the flexible sparse sampling maps 320 to consistently compare multiple wafers within each other. The flexible sampling method of the present invention also includes an independent characteristic metric (such as, but not limited to, a program mark metric (e.g., PSQ), a patterned wafer geometry metric (e.g., PWG), an overlay target asymmetry metric (e.g., Qmerit). And run-time updates of the flexible sparse sampling map 320 of overlapping target accuracy metrics (eg, overlapping target accuracy flags). 4 is a flow chart showing the steps performed in a method 400 of generating a flexible sparse metric sampling map in accordance with an embodiment of the present invention. It should be noted herein that the steps of method 400 may be implemented in whole or in part by system 100. However, it should be further appreciated that the method 400 is not limited to the system 100, as all or a portion of the steps of the method 400 may be implemented in addition to or in place of the system level embodiments. Moreover, it should be noted herein that the steps and embodiments associated with the methods 200 and 300 previously described herein should be interpreted as being expandable to method 400. In this regard, the steps of methods 200, 300, and 400 can be combined in any suitable manner. In step 402, a metric complete set of metric signals from one or more of the wafers 112 is acquired. In step 404, a set of wafer properties is determined and a set of accuracy indicators associated with the set of wafer properties is calculated. In step 406, a statistical metric associated with each of the set of accuracy metrics for the set of wafer properties is calculated. In step 408, a flexible sparse sampling map based on one of the statistical metrics associated with each of the set of accuracy metrics is generated. The calculated accuracy indicator can be expressed as follows:Where OVL_A represents one of the accuracy indicators associated with the overlap, m represents the type of accuracy indicator, and i, j represents the target location on the wafer. It should be noted that the above description is not limited to overlapping, but can be extended to any type of wafer property such as, but not limited to, one or more CD parameters (eg, SWA). As previously discussed herein, the type of accuracy indicator can include, but is not limited to, a program mark metric (eg, PSQ), a patterned wafer geometry metric (eg, PWG), an overlay target asymmetry metric (eg, Qmerit). And overlapping target accuracy metrics (eg overlapping target accuracy flags). The statistical metric associated with each of the set of accuracy metrics for the set of wafer properties can include any statistical metric known in the art. For example, the statistical metric calculated in step 406 can include, but is not limited to, an average of one of a wafer property distribution (eg, a normal distribution), a standard deviation, or the like. In one embodiment, the flexible sparse sampling map of step 408 is generated by identifying a target location within a full sample map that displays an accuracy indicator value below a statistically defined threshold. For example, for each accuracy indicator type, the statistical definition threshold may include a multiple of σ above the average of the accuracy indicators. For example, the statistical definition threshold can include the following:In the above statistically defined threshold, the flexible sparse sampling map will consist of a target location having an accuracy index that is lower than one of the sums provided above. In another embodiment, selected regions of the wafer are selectively targeted. In one embodiment, calculating one or more of the statistical metrics of step 404 can include calculating an accuracy with the wafer property set for at least one of a center of one or more wafers or an edge of one or more wafers Each of the indicator groups is associated with one or more statistical measures. A statistically defined threshold can then be applied to the set of accuracy indicators using one or more statistical metrics associated with the accuracy metrics acquired from the center and/or edge of the one or more wafers. In an alternate embodiment, a selected threshold level can be used to generate a flexible sparse sampling map. In this regard, method 400 can be performed without step 406. For example, a flexible sparse sampling map can be generated by identifying a target location within a full sample map that displays an accuracy indicator value that is below a threshold for each of the accuracy types. All of the methods described herein can include storing the results of one or more of the method embodiments in a storage medium. These results can include any of the results described herein and can be stored in any manner known in the art. The storage medium may include any of the storage media described herein or any other suitable storage medium known in the art. After the results have been stored, the results can be accessed in the storage medium and used by any of the methods or system embodiments described herein, formatted for display to a user for another software Modules, methods or systems, etc. In addition, the results can be stored "permanently", "semi-permanently" stored, temporarily stored or stored for a period of time. For example, the storage medium can be a random access memory (RAM), and the results are not necessarily stored in the storage medium indefinitely. Having described and described the specific aspects of the invention as described herein, it will be understood by those skilled in the art that All such changes and modifications within the true spirit and scope of the subject matter described herein are included in the scope of the invention. In addition, it is to be understood that the invention is defined by the scope of the accompanying claims. It should be understood by those skilled in the art that, in general, the terms used herein, and particularly the scope of the accompanying claims (such as the subject matter of the accompanying claims), are generally intended to be "open" (for example, the term "including" Should be interpreted as "including (but not limited to)", the term "having" should be interpreted as "at least with", etc.). Those skilled in the art will further appreciate that if one is intended to claim a particular number of claims, then this intent will be explicitly stated in the claim, and in the absence of this statement, there is no such intent. For example, to facilitate understanding, the scope of the accompanying claims below may include the introduction of the phrase "at least one" and "one or more" to introduce the claim. However, the use of such phrases should not be construed as implied: the indefinite article "a" is used to introduce a claim to the claim that any particular claim that contains the recited claim is limited to the invention that contains only one such statement. Even if the same request contains the introductory phrase "one or more" or "at least one" and the indefinite article such as "a" (for example, "a" should normally be interpreted to mean "at least one" or "one" Or more"); the above also applies to the use of the definite article used to introduce the claim item. In addition, even if a particular number of one of the claims is explicitly recited, those skilled in the art will recognize that the description should generally be interpreted as meaning at least the recited number (e.g., "two statements" without other modifiers. An unmodified narrative generally means at least two narratives or two or more recitings). In addition, in the case where an idiom similar to "one of A, B, and C, etc." is used, the structure generally means the meaning that the familiar person is accustomed to understand (for example, "having A, B. And a system of at least one of C" will include, but is not limited to, having only A, only having B, having only C, having both A and B, having both A and C, having both B and C, and/or Systems with A, B, and C, etc.). In the case where an idiom similar to "one of A, B or C, etc." is used, this structure generally means the meaning that the familiar person is accustomed to understand (for example, "having A, B or C" A system of at least one of the above will include, but is not limited to, having only A, only having B, having only C, having both A and B, having both A and C, having both B and C, and/or having both A , B and C, etc.). Those skilled in the art should further understand that almost any transitional conjunction and/or phrase that presents two or more alternatives, whether in [Implementation], [Scope of Invention Application] or Drawing, should be understood to cover The possibility of including one of the two, either or both. For example, the phrase "A or B" will be understood to include the possibility of "A" or "B" or "A and B". It is believed that the present invention and its various advantages are understood by the foregoing description, and it is understood that the form and construction of the components can be carried out without departing from the disclosed subject matter or without all of its material advantages. The configuration makes various changes. The form described is for illustration only, and the scope of the following claims is intended to cover and cover such modifications.

100‧‧‧Metric system
102‧‧‧Measurement subsystem
104‧‧‧ Controller
105‧‧‧Processing tools
106‧‧‧ Processor
108‧‧‧Memory media
111‧‧‧Measurement target
112‧‧‧ wafer
113‧‧‧ domain
116‧‧‧Measurement target
122‧‧‧Lighting source
124‧‧‧Main optical axis
126‧‧‧beam splitter
128‧‧‧ objective lens
130‧‧‧Detector
132‧‧‧Target path
134‧‧‧Lighting/beam/lighting path
136‧‧‧Stores
138‧‧‧Reference path
140‧‧‧Reference optics
150‧‧‧Lighting source
152‧‧‧Polarized elements
154‧‧‧Analyzer
156‧‧‧Optical components
158‧‧‧Optical components
160‧‧‧Detector
200‧‧‧ method
202‧‧‧Steps
204‧‧‧Steps
206‧‧‧Steps
208‧‧‧Steps
300‧‧‧ method
302‧‧‧Steps
304‧‧‧Steps
306‧‧‧Steps
308‧‧‧Steps
310‧‧‧Full sampling map
320‧‧‧Flexible Sparse Sampling
400‧‧‧ method
402‧‧‧Steps
404‧‧‧Steps
406‧‧‧Steps
408‧‧‧Steps

A person skilled in the art can better understand the advantages of the present invention by referring to the accompanying drawings, wherein: FIG. 1A is a concept of a measurement system for measuring a measurement target of a semiconductor wafer according to an embodiment of the present invention. Block diagram. 1B is a top plan view of a semiconductor wafer having a delimited field in accordance with an embodiment of the present invention. 1C is a top plan view of one of the individual domains of a semiconductor wafer showing a plurality of targets within the domain, in accordance with an embodiment of the present invention. 1D is a block diagram of an imaging-based metrology system for measuring a metric target of a semiconductor wafer in accordance with an embodiment of the present invention. 1E is a block diagram of a metric system based on scatterometry for measuring a metric target of a semiconductor wafer in accordance with an embodiment of the present invention. 2 is a flow chart showing steps performed in a method of providing a process tool correctable error via a plurality of flexible sparse sampling maps in accordance with an embodiment of the present invention. 3A is a flow chart showing the steps performed in a method of generating one or more flexible sparse sampling maps in accordance with an embodiment of the present invention. 3B is a top plan view of a full sampling map and a flexible sparse sampling map in accordance with an embodiment of the present invention. 4 is a flow chart showing the steps performed in a method of generating one or more flexible sparse sampling maps in accordance with an embodiment of the present invention.

100‧‧‧Metric system

102‧‧‧Measurement subsystem

104‧‧‧ Controller

105‧‧‧Processing tools

106‧‧‧ Processor

108‧‧‧Memory media

111‧‧‧Measurement target

112‧‧‧ wafer

Claims (33)

A metrology system comprising: a metrology subsystem configured to perform one or more metric measurements on one or more wafers; and a controller communicatively coupled to one of the metrology subsystems or a plurality of portions, the controller including one or more processors configured to execute program instructions, the program instructions being configured to cause the one or more processors to: receive from the one or more One of the plurality of wafers measurs a signal ensemble; determining a set of wafer properties based on the metric signal ensemble and calculating a wafer property metric associated with the set of wafer properties; calculating one or more based on the metric signal ensemble An independent characteristic metric; and generating a flexible sparse sampling map based on the set of wafer properties, the wafer property metric, and the one or more independent characteristic metrics, wherein the metric signal from the flexible sparse sampling map is used to calculate the one The one or more independent characteristic metrics of the plurality of properties are within one of one or more independent property metrics selected from the one or more properties calculated using the metric signal ensemble. The metric system of claim 1, wherein the controller is further configured to: generate at least one additional flexible sparse sampling map. The metric system of claim 2, wherein the controller is configured to direct the metric subsystem to perform one or more metric measurements at the location of the flexible sparse sampling map and at least the additional flexible sparse sampling map. The metric system of claim 3, wherein the controller is further configured to: combine results from the one or more metric measurements performed at the location of the flexible sparse sampling map and at least the additional flexible sparse sampling map, To form a virtual dense sampling map. A metrology system of claim 4, wherein the controller is further configured to: calculate one or more correctable errors based on the virtual intensive sampling map. A metrology system of claim 5, wherein the controller is further configured to: adjust one or more processing tools based on the correctable errors. The metric system of claim 1, wherein the metric subsystem comprises: an imaging based metric tool. The metric system of claim 1, wherein the metric subsystem comprises: a metric based on scatterometry. The metric system of claim 1, wherein the metric subsystem comprises: an integrated metric tool. The metric system of claim 1, wherein the set of wafer properties determined by the controller comprises: a set of overlapping values. The metric system of claim 1, wherein the set of wafer properties determined by the controller comprises: a set of sidewall angle values. The metric system of claim 1, wherein the set of wafer properties determined by the controller comprises: a set of critical dimension values. The metric system of claim 1, wherein the wafer property metric calculated by the controller comprises: a statistical metric. The metric system of claim 13, wherein the statistical metric comprises: at least one of an average or a standard deviation. The metric system of claim 1, wherein the one or more independent characteristic metrics are independent of the set of wafer properties. The metric system of claim 1, wherein the one or more independent characteristic metrics comprise: one or more accuracy metrics. The metric system of claim 16, wherein the one or more accuracy metrics comprise: at least one of a program mark metric, a pattern wafer geometry metric, an overlap target asymmetry metric, or an overlap target accuracy metric. A metrology system comprising: a metrology subsystem configured to perform one or more metric measurements on one or more wafers; and a controller communicatively coupled to one of the metrology subsystems or a plurality of portions, the controller including one or more processors configured to execute program instructions, the program instructions being configured to cause the one or more processors to: receive from the one or more Measuring a complete set of signals by one of the plurality of wafers; determining a set of wafer properties based on the metric complete set of the metric signals and calculating a set of accuracy indicators of the set of wafer properties; calculating the set of accuracy indicators for the set of wafer properties Each of the associated ones is a statistical metric; and a flexible sparse sampling map is generated based on the statistical metrics associated with each of the set of accuracy metrics. The metric system of claim 18, wherein the flexible sparse sampling map is generated by identifying a target location within a full sampling map that displays an accuracy indicator that is below a statistically defined threshold. The metric system of claim 18, wherein the calculating one of the statistical metrics associated with each of the set of accuracy metrics for the set of wafer properties comprises: for the center of the one or more wafers or the one or more At least one of the edges of the wafer calculates a statistical metric associated with each of the set of accuracy metrics for the set of wafer properties. The metric system of claim 18, wherein the controller is further configured to: generate at least one additional flexible sampling map. The metric system of claim 21, wherein the controller is configured to direct the metric subsystem to perform one or more metric measurements at the location of the flexible sparse sampling map and at least the additional flexible sparse sampling map. The metric system of claim 22, wherein the controller is further configured to: combine results from the one or more metric measurements performed at the location of the flexible sparse sampling map and at least the additional flexible sparse sampling map, To form a virtual dense sampling map. The metric system of claim 23, wherein the controller is further configured to: calculate one or more correctable errors based on the virtual dense sampling map. The metric system of claim 24, wherein the controller is further configured to: adjust one or more processing tools based on the correctable errors. The metric system of claim 18, wherein the metric subsystem comprises: an imaging based metric tool. The metric system of claim 18, wherein the metric subsystem comprises: a metric based on scatterometry. The metric system of claim 18, wherein the metric subsystem comprises: an integrated metric tool. The metric system of claim 18, wherein the set of wafer properties determined by the controller comprises: a set of overlapping values. The metric system of claim 18, wherein the set of wafer properties determined by the controller comprises: a set of critical dimension values. The metric system of claim 18, wherein the set of accuracy metrics comprises: at least one of a program mark metric, a pattern wafer geometry metric, an overlap target asymmetry metric, or an overlap target accuracy metric. A metrology system comprising: a metrology subsystem configured to perform one or more metric measurements on one or more wafers; and a controller communicatively coupled to one of the metrology subsystems or a plurality of portions, the controller including one or more processors configured to execute program instructions, the program instructions being configured to cause the one or more processors to: receive from the one or more Measuring a complete set of signals by one of the plurality of wafers; determining a set of wafer properties based on the ensemble of the metric signal and calculating a set of accuracy indicators of the set of wafer properties; and generating a flexible sparse sampling map based on the set of accuracy indicators The flexible sparse sampling map is generated by identifying a target position within a full sampling map that displays an accuracy indicator value below a selected threshold. A metrology system comprising: a metrology subsystem configured to perform one or more metric measurements on one or more wafers of a batch of wafers; and a controller communicatively coupled to the One or more portions of a quantum system, the controller including one or more processors configured to execute program instructions, the program instructions being configured to cause the one or more processors: based on the metric The one or more metric measurements of the one or more wafers received by the system to generate a plurality of flexible sparse sampling maps; directing the metric subsystem to two or two locations at the plurality of flexible sparse sampling maps The above wafer performs metric measurements, wherein each flexible sparse sampling map is associated with one of the two or more wafers; by combining the metrics from the locations of the plurality of flexible sampling maps The result of the measurement forms a virtual dense map of the metric signal; and the set of processing tool correctable errors is calculated based on the virtual dense map of the metric signal.