TW201724875A - Audio device and multimedia device including audio device - Google Patents

Audio device and multimedia device including audio device Download PDF

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TW201724875A
TW201724875A TW105118057A TW105118057A TW201724875A TW 201724875 A TW201724875 A TW 201724875A TW 105118057 A TW105118057 A TW 105118057A TW 105118057 A TW105118057 A TW 105118057A TW 201724875 A TW201724875 A TW 201724875A
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voltage
ground
detecting electrode
plug
electrode
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TW105118057A
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TWI726885B (en
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盧炯東
李明晋
李龍熙
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三星電子股份有限公司
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Abstract

Disclosed is an audio device including an audio codec circuit connected to a first channel electrode, a second channel electrode, and a microphone detection electrode, and a jack detection circuit connected to a first channel detection electrode, a ground detection electrode, and the microphone detection electrode, and, in response to voltages of the first channel detection electrode and the ground detection electrode corresponding to a ground voltage, the jack detection circuit detects insertion of a jack, applies the ground voltage to the ground detection electrode, and applies a bias voltage to the microphone detection electrode.

Description

音訊裝置以及包含該音訊裝置的多媒體裝置Audio device and multimedia device including the same

根據例示性實施例的設備及方法是有關於一種電子裝置,且更具體而言,是有關於一種音訊裝置及包含所述音訊裝置的多媒體裝置。An apparatus and method in accordance with an illustrative embodiment is directed to an electronic device and, more particularly, to an audio device and a multimedia device including the audio device.

智慧型電話、智慧型平板電腦(smart pad)等多媒體裝置能夠產生並播放視訊資料及音訊資料。音訊資料可經由揚聲器來播放,或者可經由個人播放單元(例如,耳機或頭戴式耳機)來播放。多媒體裝置在未連接有個人播放單元時一般經由揚聲器來播放音訊資料,而在有連接個人播放單元時則經由個人播放單元來播放音訊資料。針對此類功能,多媒體裝置可包括插頭偵測電路,所述插頭偵測電路用於偵測個人播放單元的插頭是否插入插頭槽中。當插頭與插頭槽耦接或與所述插頭槽分離時,可能會產生各種雜訊,而這些雜訊可能會無意地經由個人播放單元而播放,進而給使用者造成不便。因此,為進一步方便使用者,需要一種在插頭與插頭槽耦接或與插頭槽分離時可用於防止產生無意的雜訊的單元或方法。Multimedia devices such as smart phones and smart pads can generate and play video data and audio data. The audio material can be played via a speaker or can be played via a personal playback unit (eg, a headset or a headset). The multimedia device generally plays the audio data via the speaker when the personal playback unit is not connected, and plays the audio data through the personal playback unit when the personal playback unit is connected. For such functions, the multimedia device can include a plug detection circuit for detecting whether a plug of the personal playback unit is inserted into the plug slot. When the plug is coupled to the plug slot or separated from the plug slot, various noises may be generated, and the noise may be unintentionally played through the personal playback unit, thereby causing inconvenience to the user. Therefore, in order to further facilitate the user, there is a need for a unit or method that can be used to prevent unintentional noise when the plug is coupled to the plug slot or separated from the plug slot.

例示性實施例提供一種用於提高使用者方便性(user convenience)的音訊裝置及包含此音訊裝置的多媒體裝置。The exemplary embodiment provides an audio device for improving user convenience and a multimedia device including the audio device.

根據例示性實施例的態樣,提供一種音訊裝置,此音訊裝置包括:音訊編解碼器電路,連接至第一通道電極、第二通道電極及麥克風偵測電極;以及插頭偵測電路,連接至第一通道偵測電極、接地偵測電極及所述麥克風偵測電極,且因應於所述第一通道偵測電極的電壓及所述接地偵測電極的電壓對應於接地電壓,所述插頭偵測電路偵測插頭的插入,而對所述接地偵測電極施加所述接地電壓,並對所述麥克風偵測電極施加偏置電壓。According to an aspect of the exemplary embodiment, an audio device includes: an audio codec circuit connected to a first channel electrode, a second channel electrode, and a microphone detecting electrode; and a plug detecting circuit connected to a first channel detecting electrode, a ground detecting electrode, and the microphone detecting electrode, and the plug detecting according to a voltage of the first channel detecting electrode and a voltage of the ground detecting electrode corresponding to a ground voltage The measuring circuit detects the insertion of the plug, applies the ground voltage to the ground detecting electrode, and applies a bias voltage to the microphone detecting electrode.

根據另一例示性實施例的態樣,提供一種多媒體裝置,所述多媒體裝置包括:應用處理器;隨機存取記憶體;儲存裝置;視訊編解碼器,用以藉由所述應用處理器的控制而處理視訊資料;顯示器,用以藉由所述視訊編解碼器的控制而顯示視訊訊號;插頭槽,供外部插頭插入;音訊編解碼器,連接至所述插頭槽中的第一通道電極、第二通道電極及麥克風偵測電極,並用以藉由所述應用處理器的控制而處理音訊資料;以及插頭偵測電路,連接至所述插頭槽中的第一通道偵測電極、接地偵測電極及所述麥克風偵測電極,且因應於所述第一通道偵測電極的電壓及所述接地偵測電極的電壓對應於接地電壓,所述插頭偵測電路偵測所述外部插頭插入所述插頭槽中,而對所述接地偵測電極施加所述接地電壓,並對所述麥克風偵測電極施加偏置電壓。According to another aspect of the exemplary embodiments, a multimedia device is provided, the multimedia device includes: an application processor; a random access memory; a storage device; a video codec, configured by the application processor Controlling and processing video data; display for displaying video signals by control of the video codec; plug slot for external plug insertion; audio codec connecting to first channel electrode in the plug slot a second channel electrode and a microphone detecting electrode for processing audio data by control of the application processor; and a plug detecting circuit connected to the first channel detecting electrode and the ground detecting in the plug slot a detecting electrode and the microphone detecting electrode, wherein the plug detecting circuit detects the external plug insertion according to a voltage of the first channel detecting electrode and a voltage of the ground detecting electrode corresponding to a ground voltage In the plug slot, the ground voltage is applied to the ground detecting electrode, and a bias voltage is applied to the microphone detecting electrode.

根據又一例示性實施例的態樣,提供一種音訊裝置,所述音訊裝置包括:邏輯閘電路,用以因應於插頭槽中的第一通道偵測電極的電壓及接地偵測電極的電壓為接地電壓而輸出第一位凖訊號,並因應於所述插頭槽中所述第一通道偵測電極的所述電壓及所述接地偵測電極的所述電壓中的至少一者為所述接地電壓而輸出第二位凖訊號;電晶體,用以因應於所述邏輯閘電路輸出所述第一位凖訊號而將所述接地偵測電極連接至被供應所述接地電壓的接地節點;以及偏置電壓產生器,用以因應於所述邏輯閘電路輸出所述第一位凖訊號而產生偏置電壓並將所述偏置電壓施加至麥克風偵測電極,並因應於所述邏輯閘電路輸出所述第二位凖訊號而將所述接地電壓施加至所述麥克風偵測電極。According to another aspect of the exemplary embodiment, an audio device is provided. The audio device includes: a logic gate circuit for detecting a voltage of a first channel detecting electrode and a ground detecting electrode voltage in the plug slot. And outputting a first bit signal to the ground voltage, and at least one of the voltage of the first channel detecting electrode and the voltage of the ground detecting electrode in the plug slot is the ground And outputting a second bit signal; the transistor is configured to connect the ground detecting electrode to the ground node to which the ground voltage is supplied according to the logic gate circuit outputting the first bit signal; a bias voltage generator for generating a bias voltage according to the logic gate circuit outputting the first bit signal and applying the bias voltage to the microphone detecting electrode, and corresponding to the logic gate circuit The second bit signal is output to apply the ground voltage to the microphone detecting electrode.

根據又一例示性實施例的態樣,提供一種偵測電路,所述偵測電路包括:或邏輯閘,用以根據第一通道偵測電極電壓及接地偵測電極電壓而產生邏輯訊號,所述邏輯訊號為高電壓及低電壓中的一者;第一電晶體,用以根據所述邏輯訊號而選擇性地對麥克風偵測電極施加接地訊號;以及第二電晶體,用以根據所述邏輯訊號而選擇性地對所述接地偵測電極施加所述接地訊號。According to another aspect of the exemplary embodiment, a detection circuit is provided. The detection circuit includes: or a logic gate for generating a logic signal according to the first channel detection electrode voltage and the ground detection electrode voltage. The logic signal is one of a high voltage and a low voltage; a first transistor for selectively applying a ground signal to the microphone detecting electrode according to the logic signal; and a second transistor for The ground signal is selectively applied to the ground detecting electrode by a logic signal.

在下文中,將結合附圖來闡述例示性實施例。提供該些例示性實施例是為了使此揭露內容透徹及完整,並向熟習此項技術者充分傳達本發明概念的範圍。因此,儘管本文中闡述例示性實施例,然而所述揭露內容應被視為包含各種潤飾、等效形式及/或替代形式。就圖示說明而言,相同的參考編號指代相同的元件。Hereinafter, the illustrative embodiments will be explained in conjunction with the drawings. The exemplified embodiments are provided so that this disclosure will be thorough and complete, and the scope of the inventive concept will be fully conveyed by those skilled in the art. Accordingly, the present disclosure is to be considered as being inclusive of various modifications, equivalents and/or alternative forms. In the description of the figures, the same reference numerals refer to the same elements.

本文所用術語僅用於闡述例示性實施例,而並非旨在限制本發明概念。當此說明書中使用用語「包括」時,是指所陳述的特徵、整數、步驟、操作、元件及/或組件的存在,但不排除一或多個其他特徵、整數、步驟、操作、元件、組件及/或其群組的存在或附加。The terminology used herein is for the purpose of illustration and description of the embodiments The use of the term "comprising", when used in this specification, refers to the presence of the recited features, integers, steps, operations, components and/or components, but does not exclude one or more other features, integers, steps, operations, components, The presence or addition of components and/or groups thereof.

此外,應理解,儘管本文中可能使用「第一」、「第二」等用語來闡述各種元件、組件、區、層及/或區段,然而這些元件、組件、區、層及/或區段不應受這些用語限制。因此,在不背離本發明概念教示內容的條件下,以下所論述的第一元件、組件、區、層或區段可被稱為第二元件、組件、區、層或區段。In addition, it will be understood that, although the terms "first", "second", and the like may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or regions Segments should not be restricted by these terms. Therefore, a first element, component, region, layer or section that is discussed below may be referred to as a second element, component, region, layer or section, without departing from the inventive concept.

除非另外定義,否則本文所用的全部用語(包括技術及科學用語)的含義皆與本發明概念所屬技術領域中具有通常知識者所通常理解的含義相同。更應理解,這些用語(例如常用字典中所定義的用語)應被解釋為具有與其在相關技術的上下文中的意義一致的含義,且除非本文中進行明確定義,否則不應將其解釋為具有理想化或過於正式的意義。本文所用用語「及/或」包括相關列出項其中的一或多個項的任意及所有組合。例如「…中的至少一者」等表達當出現在一系列元件之前時,是修飾整個系列的元件,而並非修飾所述系列中的各別元件。Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning meaning meaning It should be further understood that these terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the related art, and should not be construed as having Idealized or overly formal meaning. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items. For example, "at least one of", etc., when applied before a series of elements, is an element that modifies the entire series, and does not modify the individual elements of the series.

圖1是說明根據例示性實施例的多媒體裝置10的方塊圖。作為實例,多媒體裝置10可包含於智慧型電話、智慧型平板電腦、智慧型電視、平板電腦(tablet computer)、膝上型電腦、個人數位助理(personal digital assistant,PDA)、可攜式多媒體播放機(portable multimedia player,PMP)、數位照相機、音樂播放器、可攜式遊戲機(portable game console)、導航系統及例如智慧型手錶、腕帶型電子裝置、項鏈型電子裝置、眼鏡型電子裝置等任意穿戴式裝置。參照圖1,多媒體裝置10可包括應用處理器11、隨機存取記憶體12、儲存裝置13、電力管理電路14、電源供應器15、視訊編解碼器16、顯示器17、照相機18、音訊編解碼器19、揚聲器20、麥克風21、數據機22、天線23、插頭偵測器100及插頭槽200。FIG. 1 is a block diagram illustrating a multimedia device 10 in accordance with an exemplary embodiment. As an example, the multimedia device 10 can be included in a smart phone, a smart tablet, a smart TV, a tablet computer, a laptop, a personal digital assistant (PDA), and a portable multimedia player. Portable multimedia player (PMP), digital camera, music player, portable game console, navigation system and, for example, smart watch, wristband electronic device, necklace type electronic device, glasses type electronic device Any wearable device. Referring to FIG. 1, the multimedia device 10 may include an application processor 11, a random access memory 12, a storage device 13, a power management circuit 14, a power supply 15, a video codec 16, a display 17, a camera 18, and an audio codec. The device 19, the speaker 20, the microphone 21, the data machine 22, the antenna 23, the plug detector 100 and the plug slot 200.

應用處理器11可執行用於控制多媒體裝置10的控制功能,且可執行用於處理各種資料的算術功能。應用處理器11可執行作業系統及各種應用。The application processor 11 can execute a control function for controlling the multimedia device 10, and can perform an arithmetic function for processing various materials. The application processor 11 can execute an operating system and various applications.

隨機存取記憶體12可用作應用處理器11的主記憶體單元。舉例而言,隨機存取記憶體12可儲存由應用處理器11所處理的程序碼(process code)及各種資料。隨機存取記憶體12可包括動態隨機存取記憶體(Dynamic Random Access Memory,DRAM)、靜態隨機存取記憶體(Static RAM,SRAM)、相變隨機存取記憶體(Phase-change RAM,PRAM)、磁性隨機存取記憶體(Magnetic RAM,MRAM)、鐵電式隨機存取記憶體(Ferroelectric RAM,FeRAM)或電阻式隨機存取記憶體(Resistive RAM,RRAM)。The random access memory 12 can be used as a main memory unit of the application processor 11. For example, the random access memory 12 can store a process code processed by the application processor 11 and various materials. The random access memory 12 may include a dynamic random access memory (DRAM), a static random access memory (SRAM), a phase change random access memory (Phase-change RAM, PRAM). ), magnetic random access memory (MRAM), ferroelectric random access memory (Ferroelectric RAM, FeRAM) or resistive random access memory (Restive RAM, RRAM).

儲存裝置13可用作應用處理器11的輔助記憶體單元。舉例而言,儲存裝置13可儲存各種應用的原始碼或作業系統的原始碼或出於長期儲存目的而儲存的由應用或作業系統產生的各種資料。儲存裝置13可包括快閃記憶體、相變隨機存取記憶體、磁性隨機存取記憶體、鐵電式隨機存取記憶體或電阻式隨機存取記憶體。The storage device 13 can be used as an auxiliary memory unit of the application processor 11. For example, the storage device 13 can store the source code of the various applications or the source code of the operating system or various materials generated by the application or operating system for long term storage purposes. The storage device 13 may include a flash memory, a phase change random access memory, a magnetic random access memory, a ferroelectric random access memory, or a resistive random access memory.

電力管理電路14可將電力自電源供應器15分配或供應至多媒體裝置10的各組件。電力管理電路14可根據多媒體裝置10的狀況或由多媒體10所執行的工作量來調整要分配或供應到多媒體裝置10各組件的電量。舉例而言,電力管理電路14可控制多媒體裝置10的省電模式或多媒體裝置10的組件的省電模式。The power management circuit 14 can distribute or supply power from the power supply 15 to various components of the multimedia device 10. The power management circuit 14 can adjust the amount of power to be distributed or supplied to the various components of the multimedia device 10 based on the condition of the multimedia device 10 or the amount of work performed by the multimedia 10. For example, the power management circuit 14 can control the power saving mode of the multimedia device 10 or the power saving mode of the components of the multimedia device 10.

視訊編解碼器16可產生或播放視訊資料。舉例而言,視訊編解碼器16可對相機18產生的訊號進行編碼,以產生視訊資料。視訊編解碼器16可對相機18產生的視訊資料或儲存於儲存裝置13中或隨機存取記憶體12中的視訊資料進行解碼,並可藉由顯示器17來播放所解碼的視訊資料。舉例而言,顯示器17可包括液晶顯示器(Liquid Crystal Display,LCD)、有機發光二極體(Organic Light Emitting Diode,OLED)、主動矩陣式有機發光二極體(Active Matrix OLED,AMOLED)、可撓式顯示器或電子墨水。The video codec 16 can generate or play video material. For example, video codec 16 may encode the signals generated by camera 18 to produce video material. The video codec 16 can decode the video data generated by the camera 18 or the video data stored in the storage device 13 or the random access memory 12, and can play the decoded video data through the display 17. For example, the display 17 may include a liquid crystal display (LCD), an organic light emitting diode (OLED), an active matrix organic light emitting diode (AMOLED), and a flexible display. Display or electronic ink.

音訊編解碼器19可產生或儲存音訊資料。舉例而言,音訊編解碼器19可對麥克風21產生的訊號進行編碼,以產生音訊資料。音訊編解碼器19可對麥克風21產生的音訊資料或儲存於儲存裝置13中或隨機存取記憶體12中的音訊資料進行解碼,並可藉由揚聲器20來播放所解碼的音訊資料。The audio codec 19 can generate or store audio material. For example, the audio codec 19 can encode the signal generated by the microphone 21 to generate audio material. The audio codec 19 can decode the audio data generated by the microphone 21 or the audio data stored in the storage device 13 or the random access memory 12, and can play the decoded audio data through the speaker 20.

音訊編解碼器19可連接至插頭偵測器100及插頭槽200。插頭偵測器100可偵測外部個人播放單元的插頭是否插入插頭槽200,並可將偵測結果作為輸出訊號OUT提供至音訊編解碼器19。若有外部個人播放單元插入插頭槽200,則音訊編解碼器19可藉由所連接的個人播放單元來播放音訊資料。The audio codec 19 can be connected to the plug detector 100 and the plug slot 200. The plug detector 100 can detect whether the plug of the external personal play unit is inserted into the plug slot 200, and can provide the detection result to the audio codec 19 as the output signal OUT. If an external personal playback unit is inserted into the plug slot 200, the audio codec 19 can play the audio material by the connected personal playback unit.

插頭偵測器100可偵測插入插頭槽200的外部個人播放單元是否包括麥克風。若外部個人播放單元包括麥克風,則音訊編解碼器19可基於自外部個人播放單元的麥克風接收到的訊號來產生音訊資料。The plug detector 100 can detect whether an external personal playback unit inserted into the plug slot 200 includes a microphone. If the external personal playback unit includes a microphone, the audio codec 19 can generate audio data based on signals received from the microphone of the external personal playback unit.

舉例而言,音訊編解碼器19及插頭偵測器100可實作於一個半導體封裝中。舉例而言,插頭偵測器100可包含於音訊編解碼器19中。For example, the audio codec 19 and the plug detector 100 can be implemented in a semiconductor package. For example, the plug detector 100 can be included in the audio codec 19.

數據機22可藉由天線23與外部裝置通訊。舉例而言,數據機22可基於以下多種無線通訊模式中的至少一者而與外部裝置通訊:例如長期演進(Long Term Evolution,LTE)、WiMax、全球行動系統(Global System for Mobile,GSM)通訊、分碼多工存取(Code Division Multiple Access,CDMA)、藍芽(Bluetooth)、近場通訊(Near Field Communication,NFC)、WiFi、射頻識別(Radio Frequency Identification,RFID)等等;或是基於各種有線通訊模式,例如通用序列匯流排(Universal Serial Bus,USB)、序列先進技術附接(Serial AT Attachment,SATA)、高速晶片互連(High Speed InterChip,HSIC)、小型電腦系統介面(Small Computer System Interface,SCSI)、火線(Firewire)、周邊元件互連(Peripheral Component Interconnection,PCI)、快速周邊元件互連(PCI express,PCIe)、快速非揮發性記憶體(NonVolatile Memory express,NVMe)、通用快閃儲存器(Universal Flash Storage,UFS)、安全數位(Secure Digital,SD)、安全數位輸入輸出(SDIO)、通用非同步收發器(Universal Asynchronous Receiver Transmitter,UART)、序列週邊介面(Serial Peripheral Interface,SPI)、高速序列週邊介面(High Speed SPI,HS-SPI)、RS232、內部整合電路(Inter-Integrated Circuit,I2C)、高速內部整合電路(HS-I2C)、晶片間音訊(Integrated-Interchip Sound,I2S)、索尼/菲力浦數位介面(Sony/Philips Digital Interface,S/PDIF)、多媒體卡(MultiMedia Card,MMC)、嵌入式多媒體卡(embedded MMC,eMMC)等等。The data machine 22 can communicate with an external device via the antenna 23. For example, data machine 22 can communicate with external devices based on at least one of a variety of wireless communication modes: Long Term Evolution (LTE), WiMax, Global System for Mobile (GSM) communication, for example. , Code Division Multiple Access (CDMA), Bluetooth, Near Field Communication (NFC), WiFi, Radio Frequency Identification (RFID), etc.; or based on Various wired communication modes, such as Universal Serial Bus (USB), Serial AT Attachment (SATA), High Speed InterChip (HSIC), Small Computer System Interface (Small Computer) System Interface (SCSI), Firewire, Peripheral Component Interconnection (PCI), PCI Express, PCIe, Non-Volatile Memory Express (NVMe), General Purpose Flash memory (Universal Flash Storage, UFS), All Digital (Secure Digital, SD), Secure Digital Input/Output (SDIO), Universal Asynchronous Receiver Transmitter (UART), Serial Peripheral Interface (SPI), High Speed Serial Interface (High Speed SPI) , HS-SPI), RS232, Inter-Integrated Circuit (I2C), High-Speed Internal Integrated Circuit (HS-I2C), Inter-Integrated-Interchip Sound (I2S), Sony/Philips Digital Interface ( Sony/Philips Digital Interface, S/PDIF), MultiMedia Card (MMC), Embedded Multimedia Card (embedded MMC, eMMC), etc.

圖2繪示外部個人播放單元的插頭300插入插頭槽200的實例。舉例而言,圖2繪示4極插頭300的例示性插入特徵。2 illustrates an example in which the plug 300 of the external personal playback unit is inserted into the plug slot 200. For example, FIG. 2 illustrates an exemplary insertion feature of a 4-pole plug 300.

參照圖1及圖2,插頭槽200可包括主體210、第一通道電極220、第二通道電極230、接地電極240、第一通道偵測電極225、接地偵測電極245及麥克風偵測電極255。主體210可形成於例如多媒體裝置10的機箱(case)、模具或框架中。Referring to FIG. 1 and FIG. 2 , the plug slot 200 can include a main body 210 , a first channel electrode 220 , a second channel electrode 230 , a ground electrode 240 , a first channel detecting electrode 225 , a ground detecting electrode 245 , and a microphone detecting electrode 255 . . The body 210 can be formed in, for example, a case, a mold, or a frame of the multimedia device 10.

第一通道電極220及第二通道電極230可連接至音訊編解碼器19。當插頭300未與插頭槽200耦接時,音訊編解碼器19可對第一通道電極220及第二通道電極230施加電源電壓。當插頭300與插頭槽200耦接時,音訊編解碼器19可分別將音訊訊號傳遞至第一通道電極220及第二通道電極230。The first channel electrode 220 and the second channel electrode 230 can be connected to the audio codec 19. When the plug 300 is not coupled to the plug slot 200, the audio codec 19 can apply a power voltage to the first channel electrode 220 and the second channel electrode 230. When the plug 300 is coupled to the plug slot 200, the audio codec 19 can transmit the audio signal to the first channel electrode 220 and the second channel electrode 230, respectively.

接地電極240可連接至音訊編解碼器19或插頭偵測器100,且可連接至音訊編解碼器19的接地節點或插頭偵測器100的接地節點。所述接地節點可為被供應接地電壓的節點。The ground electrode 240 can be connected to the audio codec 19 or the plug detector 100 and can be connected to the ground node of the audio codec 19 or the ground node of the plug detector 100. The ground node may be a node to which a ground voltage is supplied.

第一通道偵測電極225及接地偵測電極245可連接至插頭偵測器100。插頭偵測器100可基於第一通道偵測電極225的電壓及接地偵測電極245的電壓而偵測插頭300是否與插頭槽200耦接。The first channel detecting electrode 225 and the ground detecting electrode 245 can be connected to the plug detector 100. The plug detector 100 can detect whether the plug 300 is coupled to the plug slot 200 based on the voltage of the first channel detecting electrode 225 and the voltage of the ground detecting electrode 245.

麥克風偵測電極255可連接插頭偵測器100及音訊編解碼器19。當插頭300未與插頭槽200耦接時,插頭偵測器100可將接地電壓傳遞至麥克風偵測電極255。若偵測到插頭300插入插頭槽200,則插頭偵測器100可對麥克風偵測電極255施加偏置電壓,且可藉此偵測插入插頭槽200的個人播放單元是否包括麥克風。在確定插入插頭槽200的個人播放單元不包括麥克風時,插頭偵測器100可對麥克風偵測電極255施加接地電壓。而在確定插入插頭槽200的個人播放單元包括麥克風時,插頭偵測器100可對麥克風偵測電極255連續施加偏置電壓。音訊編解碼器19可基於麥克風偵測電極255的電壓變化而獲得音訊資料。The microphone detecting electrode 255 can be connected to the plug detector 100 and the audio codec 19. When the plug 300 is not coupled to the plug slot 200, the plug detector 100 can transmit a ground voltage to the microphone detecting electrode 255. If it is detected that the plug 300 is inserted into the plug slot 200, the plug detector 100 can apply a bias voltage to the microphone detecting electrode 255, and can thereby detect whether the personal playback unit inserted into the plug slot 200 includes a microphone. When it is determined that the personal playback unit inserted into the plug slot 200 does not include a microphone, the plug detector 100 can apply a ground voltage to the microphone detecting electrode 255. When it is determined that the personal playback unit inserted into the plug slot 200 includes a microphone, the plug detector 100 can continuously apply a bias voltage to the microphone detecting electrode 255. The audio codec 19 can obtain audio data based on the voltage change of the microphone detecting electrode 255.

舉例而言,插入插頭槽200的插頭300可包括4個極310、320、330及340。第一極310可自第一通道電極220接收第一通道的音訊訊號,即,左通道的音訊訊號。第二極320可自第二通道電極230接收音訊訊號,即,右通道的音訊訊號。第三極330可自接地電極240接收接地電壓。第四極340可藉由麥克風偵測電極255而將音訊訊號傳遞至音訊編解碼器19。For example, the plug 300 inserted into the plug slot 200 can include four poles 310, 320, 330, and 340. The first pole 310 can receive the audio signal of the first channel, that is, the audio signal of the left channel, from the first channel electrode 220. The second pole 320 can receive an audio signal from the second channel electrode 230, that is, an audio signal of the right channel. The third pole 330 can receive a ground voltage from the ground electrode 240. The fourth pole 340 can transmit the audio signal to the audio codec 19 by the microphone detecting electrode 255.

第一極310與第二極320可藉由第一絕緣體315而彼此電性隔離。第二極320與第三極330可藉由第二絕緣體325而彼此電性隔離。第三極330與第四極340可藉由第三絕緣體335而彼此電性隔離。The first pole 310 and the second pole 320 can be electrically isolated from each other by the first insulator 315. The second pole 320 and the third pole 330 can be electrically isolated from each other by the second insulator 325. The third pole 330 and the fourth pole 340 are electrically isolated from each other by the third insulator 335.

舉例而言,插頭槽200的接地電極240及接地偵測電極245在插頭槽200中可不對齊。舉例而言,由於加工錯誤或根據規格中的定義,接地偵測電極245及接地電極240可不置於與第一絕緣體315、第二絕緣體325及第三絕緣體335平行的軸線上。For example, the ground electrode 240 and the ground detecting electrode 245 of the plug slot 200 may not be aligned in the plug slot 200. For example, the ground detecting electrode 245 and the ground electrode 240 may not be placed on an axis parallel to the first insulator 315, the second insulator 325, and the third insulator 335 due to a processing error or according to a definition in the specification.

圖3繪示外部個人播放單元的插頭400插入插頭槽200的實例。舉例而言,圖3繪示3極插頭400的例示性插入特徵。圖3所示的插頭槽200具有與圖2所示的插頭槽200相同的結構。因此,將不再對插頭槽200予以贅述。FIG. 3 illustrates an example in which the plug 400 of the external personal playback unit is inserted into the plug slot 200. For example, FIG. 3 illustrates an exemplary insertion feature of a 3-pole plug 400. The plug slot 200 shown in FIG. 3 has the same structure as the plug slot 200 shown in FIG. 2. Therefore, the plug slot 200 will not be described again.

舉例而言,插入插頭槽200的插頭400可包括3個極410、420及430。第一極410可自第一通道電極220接收第一通道的音訊訊號,例如,左通道的音訊訊號。第二極420可自第二通道電極230接收第二通道的音訊訊號,例如,右通道的音訊訊號。第三極430可自接地電極240接收接地電壓。與圖2所示的插頭300相比,插頭400的第三極430可延伸至與圖2所示插頭300的第四極340對應的位置。插頭400可不具有被分配至麥克風的極,且連接至插頭400的個人播放單元可不具有麥克風。For example, the plug 400 inserted into the plug slot 200 can include three poles 410, 420, and 430. The first pole 410 can receive the audio signal of the first channel from the first channel electrode 220, for example, the audio signal of the left channel. The second pole 420 can receive the audio signal of the second channel from the second channel electrode 230, for example, the audio signal of the right channel. The third pole 430 can receive a ground voltage from the ground electrode 240. The third pole 430 of the plug 400 can extend to a position corresponding to the fourth pole 340 of the plug 300 shown in FIG. 2 as compared to the plug 300 shown in FIG. The plug 400 may not have a pole that is assigned to the microphone, and the personal playback unit connected to the plug 400 may not have a microphone.

第一極410與第二極420可藉由第一絕緣體415而彼此電性隔離。第二極420與第三極430可藉由第二絕緣體425而彼此電性隔離。The first pole 410 and the second pole 420 are electrically isolated from each other by the first insulator 415. The second pole 420 and the third pole 430 can be electrically isolated from each other by the second insulator 425.

圖4是根據例示性實施例所繪示的插頭偵測器100的100a的電路圖。參照圖2至圖4,插頭偵測器100可包括第一電阻R1、第二電阻R2、比較器CP、第一上拉電阻PUR1、邏輯閘電路OR、第二上拉電阻PUR2、第一電晶體TR1、訊號產生器SG及偏置電壓產生電路BG。FIG. 4 is a circuit diagram of 100a of plug detector 100, depicted in accordance with an illustrative embodiment. Referring to FIG. 2 to FIG. 4, the plug detector 100 may include a first resistor R1, a second resistor R2, a comparator CP, a first pull-up resistor PUR1, a logic gate circuit OR, a second pull-up resistor PUR2, and a first power. The crystal TR1, the signal generator SG, and the bias voltage generating circuit BG.

第一電阻R1及第二電阻R2可串聯於被供應電源電壓VDD的電源節點與被供應接地電壓的接地節點之間。位於第一電阻R1與第二電阻R2之間的節點的電壓可為第一電壓V1。The first resistor R1 and the second resistor R2 may be connected in series between a power supply node to which the power supply voltage VDD is supplied and a ground node to which the ground voltage is supplied. The voltage of the node between the first resistor R1 and the second resistor R2 may be the first voltage V1.

比較器CP係建構用以為將第一電壓V1與第一通道偵測電極225的電壓進行比較。若第一通道偵測電極225的電壓等於或高於第一電壓V1,則比較器CP可輸出高位凖訊號。若第一通道偵測電極225的電壓低於第一電壓V1,則比較器CP可輸出低位凖訊號。比較器CP的輸出可被傳遞至邏輯閘電路OR。The comparator CP is constructed to compare the voltage of the first voltage V1 with the first channel detecting electrode 225. If the voltage of the first channel detecting electrode 225 is equal to or higher than the first voltage V1, the comparator CP can output a high level signal. If the voltage of the first channel detecting electrode 225 is lower than the first voltage V1, the comparator CP can output a low level signal. The output of the comparator CP can be passed to the logic gate circuit OR.

上拉電阻PUR1可連接於電源節點與第一通道偵測電極225之間。上拉電阻PUR1可將電源電壓VDD傳遞至第一通道偵測電極225,藉此使得第一通道偵測電極225的電壓在插頭300或400未與插頭槽200耦接時等於電源電壓VDD。The pull-up resistor PUR1 can be connected between the power supply node and the first channel detecting electrode 225. The pull-up resistor PUR1 can transfer the power supply voltage VDD to the first channel detecting electrode 225, thereby causing the voltage of the first channel detecting electrode 225 to be equal to the power supply voltage VDD when the plug 300 or 400 is not coupled to the plug slot 200.

邏輯閘電路OR可對比較器CP的輸出及接地偵測電極245的電壓執行OR運算。邏輯閘電路OR的輸出可作為輸出訊號OUT而經由輸出端OT傳遞至音訊編解碼器19。舉例而言,當邏輯閘電路的輸出處於低位準時(即,當第一通道偵測電極225的電壓及接地偵測電極245的電壓為接地電壓或近似於接地電壓的低電壓時),可偵測到插頭300或400與插頭槽200耦接。當邏輯閘電路OR的輸出處於高位準時(即,當第一通道偵測電極225的電壓及接地偵測電極245的電壓中的至少一者為電源電壓或近似於電源電壓的正電壓時),可偵測到插頭300或400未與插頭槽200耦接。The logic gate circuit OR can perform an OR operation on the output of the comparator CP and the voltage of the ground detecting electrode 245. The output of the logic gate circuit OR can be passed as an output signal OUT to the audio codec 19 via the output OT. For example, when the output of the logic gate circuit is at a low level (ie, when the voltage of the first channel detecting electrode 225 and the voltage of the ground detecting electrode 245 are a ground voltage or a low voltage close to a ground voltage), detectable It is detected that the plug 300 or 400 is coupled to the plug slot 200. When the output of the logic gate circuit OR is at a high level (ie, when at least one of the voltage of the first channel detecting electrode 225 and the voltage of the ground detecting electrode 245 is a power source voltage or a positive voltage similar to the power source voltage), It can be detected that the plug 300 or 400 is not coupled to the plug slot 200.

第一電晶體TR1可連接於麥克風偵測電極255與被供應接地電壓的接地節點之間,並可在邏輯閘電路OR的控制下運作。當邏輯閘電路OR的輸出處於高位準時(即,當插頭300或400未與插頭槽200耦接時),第一電晶體TR1將接地電極與麥克風偵測電極255連接。亦即,可對麥克風偵測節點255供應接地電壓。當邏輯閘電路OR的輸出處於低位準時(即,當插頭300或400與插頭槽200耦接時),第一電晶體TR1可斷開。亦即,麥克風偵測電極255的電壓可由偏置電壓產生電路BG控制。The first transistor TR1 can be connected between the microphone detecting electrode 255 and the ground node to which the ground voltage is supplied, and can operate under the control of the logic gate circuit OR. When the output of the logic gate circuit OR is at a high level (ie, when the plug 300 or 400 is not coupled to the pin slot 200), the first transistor TR1 connects the ground electrode to the microphone detecting electrode 255. That is, the microphone detection node 255 can be supplied with a ground voltage. When the output of the logic gate circuit OR is at a low level (i.e., when the plug 300 or 400 is coupled to the pin slot 200), the first transistor TR1 can be turned off. That is, the voltage of the microphone detecting electrode 255 can be controlled by the bias voltage generating circuit BG.

訊號產生器SG可輸出致能訊號EN。舉例而言,當邏輯閘電路OR的輸出處於高位準時(即,當插頭300或400未與插頭槽200耦接時),可停用致能訊號EN。當邏輯閘電路OR的輸出處於低位準時(即,當插頭300或400與插頭槽200耦接時),可啟用致能訊號EN。The signal generator SG can output the enable signal EN. For example, when the output of the logic gate circuit OR is at a high level (ie, when the plug 300 or 400 is not coupled to the plug slot 200), the enable signal EN can be deactivated. When the output of the logic gate circuit OR is at a low level (i.e., when the plug 300 or 400 is coupled to the pin slot 200), the enable signal EN can be enabled.

當致能訊號EN被啟用時,偏置電壓產生電路BG可對麥克風偵測電極255供應偏置電壓BIAS。當致能訊號EN被停用時,偏置電壓產生電路BG可被禁能而不輸出偏置電壓BIAS。舉例而言,偏置電壓產生電路BG可輸出接地電壓。When the enable signal EN is enabled, the bias voltage generating circuit BG can supply the bias voltage BIAS to the microphone detecting electrode 255. When the enable signal EN is deactivated, the bias voltage generating circuit BG can be disabled without outputting the bias voltage BIAS. For example, the bias voltage generating circuit BG can output a ground voltage.

偏置電壓產生電路BG可包括第二比較器CP2、第二電晶體TR2、第三電阻R3、第四電阻R4及第五電阻R5。The bias voltage generating circuit BG may include a second comparator CP2, a second transistor TR2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5.

第三電阻R3與第四電阻R4串聯於第二電晶體TR2與被供應接地電壓的接地節點之間。位於第三電阻R3與第四電阻R4之間的節點可連接至第二比較器CP2的正輸入端。參考電壓VREF可被施加至第二比較器CP2的負輸入端。The third resistor R3 and the fourth resistor R4 are connected in series between the second transistor TR2 and a ground node to which the ground voltage is supplied. A node located between the third resistor R3 and the fourth resistor R4 is connectable to a positive input terminal of the second comparator CP2. The reference voltage VREF can be applied to the negative input of the second comparator CP2.

第二電晶體TR2可連接於第三電阻R3與被供應電源電壓VDD的電源節點之間。第二電晶體TR2可由第二比較器CP2的輸出控制。位於第二電晶體TR2與第三電阻R3之間的節點的電壓可為偏置電壓BIAS。偏置電壓BIAS可經由第五電阻R5而傳遞至麥克風偵測電極255。偏置電壓產生電路BG可調整偏置電壓BIAS,以使位於第三電阻R3與第四電阻R4之間的節點的電壓與參考電壓VREF相等。The second transistor TR2 may be connected between the third resistor R3 and a power supply node to which the power supply voltage VDD is supplied. The second transistor TR2 can be controlled by the output of the second comparator CP2. The voltage at the node between the second transistor TR2 and the third resistor R3 may be the bias voltage BIAS. The bias voltage BIAS can be transferred to the microphone detecting electrode 255 via the fifth resistor R5. The bias voltage generating circuit BG can adjust the bias voltage BIAS such that the voltage of the node between the third resistor R3 and the fourth resistor R4 is equal to the reference voltage VREF.

圖5是根據例示性實施例所繪示的偵測插頭300或400是否插入插頭槽200的方法流程圖。FIG. 5 is a flow chart of a method of detecting whether a plug 300 or 400 is inserted into the plug slot 200, according to an exemplary embodiment.

參照圖2至圖5,在步驟S110中,對第一通道電極220、接地電極240及麥克風偵測電極255施加接地電壓VSS。舉例而言,在插頭300未插入插頭槽200的情況下,音訊編解碼器19可對第一通道電極220、第二通道電極230及接地電極240施加接地電壓VSS。由於插頭偵測器100的邏輯閘電路OR的輸出在插頭300未插入插頭槽200中的情況下處於高位凖,因此可藉由電晶體TR1對麥克風偵測電極255供應接地電壓VSS。Referring to FIGS. 2 to 5, in step S110, a ground voltage VSS is applied to the first channel electrode 220, the ground electrode 240, and the microphone detecting electrode 255. For example, in a case where the plug 300 is not inserted into the plug slot 200, the audio codec 19 can apply a ground voltage VSS to the first channel electrode 220, the second channel electrode 230, and the ground electrode 240. Since the output of the logic gate circuit OR of the plug detector 100 is at a high level in the case where the plug 300 is not inserted into the plug slot 200, the ground detecting voltage VSS can be supplied to the microphone detecting electrode 255 by the transistor TR1.

在步驟S120中,若插頭300與插頭槽200耦接,則第一通道電極220可藉由第一極310連接至第一通道偵測電極225。因此,第一通道偵測電極225的電壓可藉由第一通道電極220的接地節點而減小至接地電壓VSS。另外,接地偵測電極245可藉由第三極330電性連接至接地電極240。因此,接地偵測電極245的電壓可藉由接地電極240的接地節點而減小至接地電壓VSS。如此一來,若插頭300與插頭槽200耦接,則第一通道偵測電極225的電壓及接地偵測電極245的電壓可減小至接地電壓VSS,且輸出訊號OUT可減小至低位凖。In step S120, if the plug 300 is coupled to the plug slot 200, the first channel electrode 220 can be connected to the first channel detecting electrode 225 by the first pole 310. Therefore, the voltage of the first channel detecting electrode 225 can be reduced to the ground voltage VSS by the ground node of the first channel electrode 220. In addition, the ground detecting electrode 245 can be electrically connected to the ground electrode 240 through the third pole 330. Therefore, the voltage of the ground detecting electrode 245 can be reduced to the ground voltage VSS by the ground node of the ground electrode 240. In this way, if the plug 300 is coupled to the plug slot 200, the voltage of the first channel detecting electrode 225 and the voltage of the ground detecting electrode 245 can be reduced to the ground voltage VSS, and the output signal OUT can be reduced to a low level. .

由於發現插頭300未插入插頭槽200(除非邏輯閘電路OR的輸出訊號OUT處於低位凖),因此偵測操作將被終止。若邏輯閘電路OR的輸出訊號OUT處於低位凖,則在步驟S130中可偵測到插頭300插入插頭槽200。在此之後,第一電晶體TR1可將麥克風偵測電極255與接地節點電性隔離,且偏置電壓產生電路BG可將偏置電壓BIAS傳遞至麥克風偵測電極255。Since the plug 300 is found not inserted into the plug slot 200 (unless the output signal OUT of the logic gate circuit OR is in the low position 凖), the detecting operation will be terminated. If the output signal OUT of the logic gate circuit OR is in the low position, the plug 300 can be detected to be inserted into the plug slot 200 in step S130. After that, the first transistor TR1 can electrically isolate the microphone detecting electrode 255 from the ground node, and the bias voltage generating circuit BG can transmit the bias voltage BIAS to the microphone detecting electrode 255.

在步驟S140中,可確定麥克風偵測電極255的電壓低於偏置電壓BIAS或低於在位凖上與偏置電壓BIAS近似的電壓。舉例而言,如圖3所示,在3極插頭400插入插頭槽200的情況下,麥克風偵測電極255可藉由第三極430而連接至接地電極。因此,麥克風偵測電極224的電壓可減小至較偏置電壓BIAS為低的電壓(即,可減小至接地電壓VSS),並可偵測到個人播放單元中不具有麥克風。如圖2所示,在4極插頭300插入插頭槽200中的情況下,第四極340可連接至個人播放單元的麥克風。舉例而言,麥克風可具有範圍為1.35千歐(kΩ)至33千歐的電阻。麥克風偵測電極255的電壓可變為藉由利用第五電阻R5及麥克風的電阻對第三電阻R3與第二電晶體TR2之間的節點的電壓進行分壓而設定的偏置電壓BIAS。因此,在步驟S150中,可偵測到個人播放單元具有麥克風。In step S140, it may be determined that the voltage of the microphone detecting electrode 255 is lower than the bias voltage BIAS or lower than the voltage at the bit 凖 which is similar to the bias voltage BIAS. For example, as shown in FIG. 3, in the case where the 3-pole plug 400 is inserted into the plug slot 200, the microphone detecting electrode 255 can be connected to the ground electrode by the third pole 430. Therefore, the voltage of the microphone detecting electrode 224 can be reduced to a voltage lower than the bias voltage BIAS (ie, can be reduced to the ground voltage VSS), and the personal playback unit can be detected without the microphone. As shown in FIG. 2, in the case where the 4-pole plug 300 is inserted into the plug slot 200, the fourth pole 340 can be connected to the microphone of the personal playback unit. For example, the microphone can have a resistance ranging from 1.35 kilo ohms (kΩ) to 33 kilo ohms. The voltage of the microphone detecting electrode 255 may be a bias voltage BIAS set by dividing the voltage of the node between the third resistor R3 and the second transistor TR2 by the resistance of the fifth resistor R5 and the microphone. Therefore, in step S150, it can be detected that the personal playback unit has a microphone.

舉例而言,若偵測到個人播放單元具有麥克風,則偏置電壓產生電路BG可將偏置電壓BIAS連續地傳遞至麥克風偵測電極255。個人播放單元的麥克風可使用所述偏置電壓來獲得音訊訊號。所獲得的音訊訊號可表現於麥克風偵測電極255的電壓變化中。For example, if it is detected that the personal playback unit has a microphone, the bias voltage generating circuit BG can continuously transmit the bias voltage BIAS to the microphone detecting electrode 255. The microphone of the personal playback unit can use the bias voltage to obtain an audio signal. The obtained audio signal can be expressed in the voltage change of the microphone detecting electrode 255.

圖6繪示當3極插頭400插入插頭槽200或與插頭槽200分離時的連接狀態。參照圖6,接地電極240與接地偵測電極245在插頭槽200中未對齊。因此,接地電極240在與第二絕緣體425對齊的位置處未電性連接至插頭400。接地偵測電極245及麥克風偵測電極255可連接至第三極430。在此種狀態中,電流路徑CP可由位於接地偵測電極245與麥克風偵測電極255之間的第三極430形成,且第三極430的電壓可取決於接地偵測電極245的電壓及麥克風偵測電極255的電壓。FIG. 6 illustrates a connection state when the 3-pole plug 400 is inserted into or separated from the plug slot 200. Referring to FIG. 6, the ground electrode 240 and the ground detecting electrode 245 are not aligned in the plug slot 200. Therefore, the ground electrode 240 is not electrically connected to the plug 400 at a position aligned with the second insulator 425. The ground detecting electrode 245 and the microphone detecting electrode 255 can be connected to the third pole 430. In this state, the current path CP may be formed by the third pole 430 between the ground detecting electrode 245 and the microphone detecting electrode 255, and the voltage of the third pole 430 may depend on the voltage of the ground detecting electrode 245 and the microphone. The voltage of the electrode 255 is detected.

圖7繪示在圖6所示連接狀態中插頭偵測器100中所涉及的電壓變化的時序圖。參照圖5、圖6及圖7,插頭槽200及3極插頭400可如圖6中所示彼此連接。第一通道偵測電極225可藉由第一上拉電阻PUR1連接至電源節點。因此,如在第一時間點T1之前所示,當插頭400未插入插頭槽200時,第一通道偵測電極225的電壓可為電源電壓VDD。如圖6中所示,若第一通道偵測電極225藉由第一極410連接至第一通道電極220,則第一通道偵測電極225的電壓可如在第一時間點T1處所示的因接地電壓VSS被供應至第一通道電極220而減小至接地電壓VSS。FIG. 7 is a timing diagram showing voltage changes involved in the plug detector 100 in the connected state shown in FIG. 6. Referring to Figures 5, 6, and 7, the plug slot 200 and the 3-pole plug 400 can be connected to each other as shown in Figure 6. The first channel detecting electrode 225 can be connected to the power supply node by the first pull-up resistor PUR1. Therefore, as shown before the first time point T1, when the plug 400 is not inserted into the plug slot 200, the voltage of the first channel detecting electrode 225 may be the power source voltage VDD. As shown in FIG. 6, if the first channel detecting electrode 225 is connected to the first channel electrode 220 by the first pole 410, the voltage of the first channel detecting electrode 225 can be as shown at the first time point T1. The ground voltage VSS is supplied to the first channel electrode 220 to be reduced to the ground voltage VSS.

接地偵測電極245可藉由第二上拉電阻PUR2連接至電源節點。因此,當插頭400未插入插頭槽200時,接地偵測電極245的電壓可如在第一時間點T1之前所示的為電源電壓VDD。如圖6中所示,若接地偵測電極245藉由第三極430連接至麥克風偵測電極255,則接地偵測電極245的電壓可如在第一時間點T1處所示的因麥克風偵測電極255的接地電壓VSS而藉由被接通的第一電晶體TR1減小至接地電壓VSS。The ground detecting electrode 245 can be connected to the power supply node by the second pull-up resistor PUR2. Therefore, when the plug 400 is not inserted into the plug slot 200, the voltage of the ground detecting electrode 245 can be the power supply voltage VDD as shown before the first time point T1. As shown in FIG. 6, if the ground detecting electrode 245 is connected to the microphone detecting electrode 255 through the third pole 430, the voltage of the ground detecting electrode 245 can be detected by the microphone as shown at the first time point T1. The ground voltage VSS of the electrode 255 is reduced to the ground voltage VSS by the first transistor TR1 that is turned on.

當插頭400未插入插頭槽200時,第一通道偵測電極225的電壓及接地偵測電極245的電壓可變為電源電壓VDD或近似於電源電壓VDD的電壓。因此,如在第一時間點T1之前所示,比較器CP可輸出具有高位凖的輸出訊號且邏輯閘電路OR可輸出具有高位凖的輸出訊號OUT。當插頭400如圖6中所示的插入插頭槽200時,第一通道偵測電極225的電壓及接地偵測電極245的電壓可減小至接地電壓VSS或近似於接地電壓VSS的電壓。因此,如在第一時間點T1處所示,比較器CP可輸出低位凖訊號且邏輯閘電路OR可輸出具有低位凖的輸出訊號OUT。When the plug 400 is not inserted into the plug slot 200, the voltage of the first channel detecting electrode 225 and the voltage of the ground detecting electrode 245 may be changed to the power source voltage VDD or a voltage approximately equal to the power source voltage VDD. Therefore, as shown before the first time point T1, the comparator CP can output an output signal having a high level 且 and the logic gate circuit OR can output an output signal OUT having a high level 。. When the plug 400 is inserted into the plug slot 200 as shown in FIG. 6, the voltage of the first channel detecting electrode 225 and the voltage of the ground detecting electrode 245 can be reduced to a ground voltage VSS or a voltage approximately equal to the ground voltage VSS. Therefore, as shown at the first time point T1, the comparator CP can output a low level signal and the logic gate circuit OR can output an output signal OUT having a low level.

在插頭400未插入插頭槽200的情況下,輸出訊號OUT可如在第一時間點T1之前所示的處於高位凖。因此,第一電晶體TR1可將接地節點與麥克風偵測電極255連接,且麥克風偵測電極255的電壓可如在第一時間點T1之前所示的變為接地電壓VSS。若輸出訊號OUT如在第一時間點T1處所示的自高位凖轉變至低位凖,則可啟用致能訊號EN。因此,在第二時間點T2處,電晶體TR1可斷開且偏置電壓產生電路BG可輸出偏置電壓BIAS。因此,麥克風偵測電極255的電壓可自接地電壓VSS增大。In the case where the plug 400 is not inserted into the plug slot 200, the output signal OUT can be in the high position as shown before the first time point T1. Therefore, the first transistor TR1 can connect the ground node to the microphone detecting electrode 255, and the voltage of the microphone detecting electrode 255 can become the ground voltage VSS as shown before the first time point T1. If the output signal OUT transitions from the high level to the low level as shown at the first time point T1, the enable signal EN can be enabled. Therefore, at the second time point T2, the transistor TR1 can be turned off and the bias voltage generating circuit BG can output the bias voltage BIAS. Therefore, the voltage of the microphone detecting electrode 255 can be increased from the ground voltage VSS.

若麥克風偵測電極255的電壓在第二時間點T2處自接地電壓VSS增大,則此後,在第三時間點T3處,藉由第三極430連接至麥克風偵測電極255的接地偵測電極245的電壓亦可因電流路徑CP而增大。舉例而言,接地偵測電極245的電壓可增大至自麥克風偵測電極255供應的偏置電壓BIAS、藉由第二上拉電阻PUR2供應的電源電壓VDD或處於偏置電壓BIAS與電源電壓VDD之間的中間電壓。If the voltage of the microphone detecting electrode 255 increases from the ground voltage VSS at the second time point T2, then, at the third time point T3, the ground detecting by the third pole 430 is connected to the microphone detecting electrode 255. The voltage of the electrode 245 can also increase due to the current path CP. For example, the voltage of the ground detecting electrode 245 can be increased to the bias voltage BIAS supplied from the microphone detecting electrode 255, the power supply voltage VDD supplied by the second pull-up resistor PUR2, or the bias voltage BIAS and the power supply voltage. The intermediate voltage between VDD.

若接地偵測電極245的電壓增大,則邏輯閘電路OR的輸出訊號OUT可在第三時間點T3處自低位凖轉變至高位凖。若輸出訊號OUT轉變至高位凖,則第一電晶體TR1可被接通且偏置電壓產生電路BG可被禁能。因此,在第四時間點T4處,麥克風偵測電極255的電壓可減小至接地電壓VSS。If the voltage of the ground detecting electrode 245 is increased, the output signal OUT of the logic gate circuit OR can be changed from the low level 高 to the high level 在 at the third time point T3. If the output signal OUT transitions to the high level 凖, the first transistor TR1 can be turned on and the bias voltage generating circuit BG can be disabled. Therefore, at the fourth time point T4, the voltage of the microphone detecting electrode 255 can be reduced to the ground voltage VSS.

隨著麥克風偵測電極255的電壓減小至接地電壓VSS,在第五時間點T5處,接地偵測電極245的電壓亦可減小至接地電壓VSS。邏輯閘電路OR的輸出訊號OUT可在第五時間點T5處自高位凖轉變至低位凖。在第六時間點T6處,第一電晶體TR1可斷開且偏置電壓產生電路BG可輸出偏置電壓BIAS。因此,麥克風偵測電極255的電壓可在第六時間點T6處自接地電壓VSS增大至偏置電壓BIAS。As the voltage of the microphone detecting electrode 255 decreases to the ground voltage VSS, at the fifth time point T5, the voltage of the ground detecting electrode 245 can also be reduced to the ground voltage VSS. The output signal OUT of the logic gate circuit OR can be switched from the high level 低 to the low level 第五 at the fifth time point T5. At the sixth time point T6, the first transistor TR1 can be turned off and the bias voltage generating circuit BG can output the bias voltage BIAS. Therefore, the voltage of the microphone detecting electrode 255 can be increased from the ground voltage VSS to the bias voltage BIAS at the sixth time point T6.

隨著麥克風偵測電極255的電壓增大至偏置電壓BIAS,在第七時間點T7處,接地偵測電極245的電壓可增大。As the voltage of the microphone detecting electrode 255 increases to the bias voltage BIAS, at the seventh time point T7, the voltage of the ground detecting electrode 245 can be increased.

如圖7所示,在如圖6所示的接地偵測電極245與麥克風偵測電極255短路且接地電極240浮動的情況下,邏輯閘電路OR的輸出訊號OUT可在高位凖與低位凖之間週期性地轉變。儘管輸出訊號OUT週期性地轉變,然而第三極430的電壓可隨著接地偵測電極245或麥克風偵測電極255的變化而變化。As shown in FIG. 7, in the case where the ground detecting electrode 245 and the microphone detecting electrode 255 are short-circuited as shown in FIG. 6 and the ground electrode 240 is floating, the output signal OUT of the logic gate circuit OR can be in the high position and the low position. Change periodically. Although the output signal OUT periodically changes, the voltage of the third pole 430 may vary as the ground detecting electrode 245 or the microphone detecting electrode 255 changes.

個人播放單元可基於第一極410與第三極430之間的電壓差而播放第一通道的音訊訊號,並可基於第二極420與第三極430之間的電壓差而播放第二通道的音訊訊號。如圖7中所示,若第三極430的電壓週期性地變化,則可藉由個人播放單元而週期性地產生並聽到干擾雜訊。The personal playback unit can play the audio signal of the first channel based on the voltage difference between the first pole 410 and the third pole 430, and can play the second channel based on the voltage difference between the second pole 420 and the third pole 430. Audio signal. As shown in FIG. 7, if the voltage of the third pole 430 periodically changes, interference noise can be periodically generated and heard by the personal playback unit.

因此,例示性實施例可在偵測到插頭400的插入之後對接地偵測電極245施加接地電壓。Therefore, the exemplary embodiment can apply a ground voltage to the ground detecting electrode 245 after detecting the insertion of the plug 400.

圖8繪示圖4所示的插頭偵測器100的應用100b的電路圖。參照圖8,插頭偵測器100b可包括第一電阻R1、第二電阻R2、比較器CP、第一上拉電阻PUR1、邏輯閘電路OR、第二上拉電阻PUR2、第一電晶體TR1、訊號產生器SG、偏置電壓產生電路BG及第三電晶體TR3。與圖4所示的插頭偵測器100相比,插頭偵測器100b可更包括第三電晶體TR3。以下將不再贅述圖4所示的插頭偵測器100與圖8所示的插頭偵測器100b中的共同元件。FIG. 8 is a circuit diagram of an application 100b of the plug detector 100 shown in FIG. Referring to FIG. 8, the plug detector 100b may include a first resistor R1, a second resistor R2, a comparator CP, a first pull-up resistor PUR1, a logic gate circuit OR, a second pull-up resistor PUR2, and a first transistor TR1. The signal generator SG, the bias voltage generating circuit BG, and the third transistor TR3. Compared with the plug detector 100 shown in FIG. 4, the plug detector 100b may further include a third transistor TR3. The common elements in the plug detector 100 shown in FIG. 4 and the plug detector 100b shown in FIG. 8 will not be described below.

第三電晶體TR3可連接於接地偵測電極245與被供應接地電壓的接地節點之間,並可藉由偏置電壓BIAS來控制。若偏置電壓產生電路BG被致能(例如,第二電晶體TR2被接通)以輸出偏置電壓BIAS(其為藉由第二電晶體TR2、第三電晶體R3及第四電晶體R4對電源電壓VDD進行分壓而產生的正電壓),則第三電晶體TR3可被接通。隨後,所述接地節點可連接至接地偵測電極245。若偏置電壓產生電路BG被禁能(例如,第二電晶體被斷開)以輸出藉由第三電阻R3及第四電阻R4傳遞的接地電壓,則第三電晶體TR3可被斷開。隨後,所述接地節點可自接地偵測電極245隔離。The third transistor TR3 can be connected between the ground detecting electrode 245 and the ground node to which the ground voltage is supplied, and can be controlled by the bias voltage BIAS. If the bias voltage generating circuit BG is enabled (for example, the second transistor TR2 is turned on) to output the bias voltage BIAS (which is by the second transistor TR2, the third transistor R3, and the fourth transistor R4) The third transistor TR3 can be turned on when a positive voltage is generated by dividing the power supply voltage VDD. Subsequently, the ground node can be connected to the ground detecting electrode 245. If the bias voltage generating circuit BG is disabled (for example, the second transistor is turned off) to output the ground voltage transmitted through the third resistor R3 and the fourth resistor R4, the third transistor TR3 can be turned off. Subsequently, the ground node can be isolated from the ground detecting electrode 245.

圖9繪示一種在圖8所示的插頭偵測器100b中執行插頭插入的方法的流程圖。參照圖8及圖9,在步驟S210中,可將接地電壓供應至第一通道電極220、接地電極240及麥克風偵測電極255。步驟S210可以用與圖5中步驟S120相同的方式來執行。FIG. 9 is a flow chart showing a method of performing plug insertion in the plug detector 100b shown in FIG. Referring to FIGS. 8 and 9, in step S210, a ground voltage may be supplied to the first channel electrode 220, the ground electrode 240, and the microphone detecting electrode 255. Step S210 can be performed in the same manner as step S120 in Fig. 5.

在步驟S220中,可判斷邏輯閘電路OR的輸出訊號OUT是否處於低位凖。步驟S220可以用與圖5中步驟S220相同的方式來執行。In step S220, it can be determined whether the output signal OUT of the logic gate circuit OR is in the low position. Step S220 can be performed in the same manner as step S220 in FIG.

若邏輯閘電路OR的輸出訊號OUT處於高位凖,則可偵測不到插頭插入而可終止所述程序。若邏輯閘電路OR的輸出訊號OUT處於低位凖,則可偵測到插頭插入並可執行步驟S230。If the output signal OUT of the logic gate circuit OR is at the high level, the plug can be detected and the program can be terminated. If the output signal OUT of the logic gate circuit OR is in the low position, the plug insertion can be detected and step S230 can be performed.

在步驟S230中,由於偵測到插頭插入,因此可對麥克風偵測電極255施加偏置電壓BIAS,且可對接地偵測電極245施加接地電壓VSS。舉例而言,可對偏置電壓產生電路BG進行致能,以對麥克風偵測電極255施加偏置電壓BIAS。可藉由偏置電壓BIAS接通第三電晶體TR3,以將接地電壓VSS傳遞至接地偵測電極245。In step S230, since the plug insertion is detected, the bias voltage BIAS can be applied to the microphone detecting electrode 255, and the ground voltage VSS can be applied to the ground detecting electrode 245. For example, the bias voltage generating circuit BG can be enabled to apply a bias voltage BIAS to the microphone detecting electrode 255. The third transistor TR3 can be turned on by the bias voltage BIAS to transfer the ground voltage VSS to the ground detecting electrode 245.

在步驟S240中,可判斷麥克風偵測電極255的電壓是否低於偏置電壓BIAS。步驟S240可以用與圖5中步驟S140相同的方式來執行。In step S240, it can be determined whether the voltage of the microphone detecting electrode 255 is lower than the bias voltage BIAS. Step S240 can be performed in the same manner as step S140 in FIG.

若麥克風偵測電極255的電壓低於偏置電壓BIAS,則可偵測不到麥克風而可終止所述程序。若麥克風偵測電極255的電壓近似於偏置電壓BIAS,則可在步驟S250中偵測到麥克風。步驟S250可以用與圖5中步驟S150相同的方式來執行。If the voltage of the microphone detecting electrode 255 is lower than the bias voltage BIAS, the microphone can be detected and the program can be terminated. If the voltage of the microphone detecting electrode 255 is approximately the bias voltage BIAS, the microphone can be detected in step S250. Step S250 can be performed in the same manner as step S150 in Fig. 5.

圖10繪示在圖6所示連接狀態中圖8的插頭偵測器100b中所涉及的電壓變化的時序圖。參照圖6、圖8及圖10,在第一時間點T1處,若3極插頭400如圖6中所示的與插頭槽200耦接,則第一通道偵測電極225的電壓可自電源電壓VDD減小至接地電壓VSS。接地偵測電極245的電壓可自電源電壓VDD減小至接地電壓VSS。因此,邏輯閘電路OR的輸出訊號OUT可自高位凖轉變至低位凖。隨後,可偵測到插頭400的插入。FIG. 10 is a timing chart showing voltage changes involved in the plug detector 100b of FIG. 8 in the connected state shown in FIG. 6. Referring to FIG. 6 , FIG. 8 and FIG. 10 , at the first time point T1 , if the 3-pole plug 400 is coupled to the plug slot 200 as shown in FIG. 6 , the voltage of the first channel detecting electrode 225 can be self-powered. The voltage VDD is reduced to the ground voltage VSS. The voltage of the ground detecting electrode 245 can be reduced from the power supply voltage VDD to the ground voltage VSS. Therefore, the output signal OUT of the logic gate circuit OR can be changed from the high level to the low level. Subsequently, the insertion of the plug 400 can be detected.

在第二時間點T2處,第一電晶體TR1可斷開且偏置電壓產生電路BG可輸出偏置電壓BIAS。因此,麥克風偵測電極255的電壓可自接地電壓VSS增大至偏置電壓BIAS。另外,第三電晶體TR3可藉由偏置電壓BIAS而接通,且接地偵測電極245可連接至接地節點。因此,儘管麥克風偵測電極255的電壓增大至偏置電壓BIAS,接地偵測電極245的電壓仍可保持在接地電壓VSS。At the second time point T2, the first transistor TR1 may be turned off and the bias voltage generating circuit BG may output the bias voltage BIAS. Therefore, the voltage of the microphone detecting electrode 255 can be increased from the ground voltage VSS to the bias voltage BIAS. In addition, the third transistor TR3 can be turned on by the bias voltage BIAS, and the ground detecting electrode 245 can be connected to the ground node. Therefore, although the voltage of the microphone detecting electrode 255 is increased to the bias voltage BIAS, the voltage of the ground detecting electrode 245 can be maintained at the ground voltage VSS.

隨後,自第三時間點T3至第七時間點T7,接地偵測電極245的電壓可保持在接地電壓。因此,如以上結合圖7所述,可防止插頭400的第三極430的電壓發生變化,藉此防止雜訊。因此,可提高使用者方便性。Subsequently, from the third time point T3 to the seventh time point T7, the voltage of the ground detecting electrode 245 can be maintained at the ground voltage. Therefore, as described above in connection with FIG. 7, the voltage of the third pole 430 of the plug 400 can be prevented from changing, thereby preventing noise. Therefore, user convenience can be improved.

圖11繪示圖8所示的插頭偵測器100b的應用100c的電路圖。參照圖11,插頭偵測器100c可包括第一電阻R1、第二電阻R2、比較器CP、第一上拉電阻PUR1、邏輯閘電路OR、第二上拉電阻PUR2、第一電晶體TR1、訊號產生器SG、偏置電壓產生電路BG及第三電晶體TR3。與圖8所示的插頭偵測器100b相比,插頭偵測器100c可更包括脈波產生電路PG。第三電晶體TR3可藉由脈波產生電路PG的輸出脈波取代偏置電壓BIAS來控制。11 is a circuit diagram of an application 100c of the plug detector 100b shown in FIG. Referring to FIG. 11, the plug detector 100c may include a first resistor R1, a second resistor R2, a comparator CP, a first pull-up resistor PUR1, a logic gate circuit OR, a second pull-up resistor PUR2, and a first transistor TR1. The signal generator SG, the bias voltage generating circuit BG, and the third transistor TR3. The plug detector 100c may further include a pulse wave generating circuit PG as compared with the plug detector 100b shown in FIG. The third transistor TR3 can be controlled by the output pulse of the pulse wave generating circuit PG instead of the bias voltage BIAS.

參照圖11,脈波產生電路PG係建構為可因應致能訊號EN而輸出脈波訊號。舉例而言,脈波產生電路PG可輸出脈波訊號,此脈波訊號在致能訊號EN啟用時自低位凖轉變至高位凖,且在工作時間(duty time)之後自高位凖轉變至低位凖。舉例而言,工作時間可等於或長於用於偵測個人播放單元是否包括麥克風的時間。舉例而言,工作時間可為用於偵測麥克風的時間。Referring to Fig. 11, the pulse wave generating circuit PG is constructed to output a pulse wave signal in response to the enable signal EN. For example, the pulse wave generating circuit PG can output a pulse wave signal, which is converted from a low level to a high level when the enable signal EN is enabled, and transitions from a high level to a low level after a duty time. . For example, the working time may be equal to or longer than the time for detecting whether the personal playback unit includes a microphone. For example, the working time can be the time used to detect the microphone.

若脈波產生電路PG的輸出脈波自低位凖轉變至高位凖,則第三電晶體TR3可被接通。因此,與圖6中所示的連接狀態類似,接地偵測電極245可連接至接地節點,且可防止接地偵測電極245的電壓隨麥克風偵測電極255的電壓變化。若在對麥克風的偵測結束之後,脈波產生電路PG的輸出脈波自高位凖轉變至低位凖,則第三電晶體TR3可被斷開。隨後,接地偵測電極245可自接地節點隔離,而由連接至接地偵測電極245的第二上拉電阻PUR2對其作用。舉例而言,若插頭400與插頭槽200分離,則接地偵測電極245的電壓可藉由第二上拉電阻PUR2及電源節點而增大至電源電壓VDD。亦即,若第二上拉電阻PUR2對其作用,則接地偵測電極245可偵測到插頭400與插頭槽200分離。If the output pulse of the pulse wave generating circuit PG transitions from the lower level to the upper level, the third transistor TR3 can be turned on. Therefore, similar to the connection state shown in FIG. 6, the ground detecting electrode 245 can be connected to the ground node, and the voltage of the ground detecting electrode 245 can be prevented from changing with the voltage of the microphone detecting electrode 255. If the output pulse of the pulse wave generating circuit PG transitions from the upper level to the lower level after the detection of the microphone is completed, the third transistor TR3 can be turned off. Subsequently, the ground detecting electrode 245 can be isolated from the ground node and acted upon by the second pull-up resistor PUR2 connected to the ground detecting electrode 245. For example, if the plug 400 is separated from the plug slot 200, the voltage of the ground detecting electrode 245 can be increased to the power supply voltage VDD by the second pull-up resistor PUR2 and the power supply node. That is, if the second pull-up resistor PUR2 acts on it, the ground detecting electrode 245 can detect that the plug 400 is separated from the plug slot 200.

上述的例示性實施例是提供用以充分闡釋與3極插頭400及4極插頭300相關的技術概念。然而,例示性實施例並非僅限於所述的3極插頭400及4極插頭300,而是可被廣泛地應用於n極插頭(n是正整數)。The above exemplary embodiments are provided to fully explain the technical concept associated with the 3-pole plug 400 and the 4-pole plug 300. However, the exemplary embodiment is not limited to the 3-pole plug 400 and the 4-pole plug 300 described above, but can be widely applied to an n-pole plug (n is a positive integer).

根據各種例示性實施例,即使當插頭與插頭槽耦接或與所述插頭槽分離時接地偵測電極與麥克風偵測電極發生短路,仍可防止產生雜訊。According to various exemplary embodiments, even if the ground detecting electrode and the microphone detecting electrode are short-circuited when the plug is coupled to the plug slot or separated from the plug slot, noise generation can be prevented.

儘管已闡述了各種例示性實施例,然而對於熟習此項技術者將顯而易見,可作出各種變化及潤飾,而此並不背離本發明概念的精神及範圍。因此,應理解,上述例示性實施例並非限制性的,而是說明性的。While various exemplary embodiments have been described, it is apparent to those skilled in the art that various modifications and changes can be made without departing from the spirit and scope of the inventive concept. Therefore, it should be understood that the above illustrative embodiments are not limiting, but illustrative.

10‧‧‧多媒體裝置
11‧‧‧應用處理器
12‧‧‧隨機存取記憶體
13‧‧‧儲存裝置
14‧‧‧電力管理電路
15‧‧‧電源供應器
16‧‧‧視訊編解碼器
17‧‧‧顯示器
18‧‧‧照相機
19‧‧‧音訊編解碼器
20‧‧‧揚聲器
21‧‧‧麥克風
22‧‧‧數據機
23‧‧‧天線
100、100a、100b、100c‧‧‧插頭偵測器
200‧‧‧插頭槽
210‧‧‧主體
220‧‧‧第一通道電極
225‧‧‧第一通道偵測電極
230‧‧‧第二通道電極
240‧‧‧接地電極
245‧‧‧接地偵測電極
255‧‧‧麥克風偵測電極
300‧‧‧插頭
310‧‧‧第一極
315‧‧‧第一絕緣體
320‧‧‧第二極
325‧‧‧第二絕緣體
330‧‧‧第三極
335‧‧‧第三絕緣體
340‧‧‧第四極
400‧‧‧插頭
410‧‧‧第一極
415‧‧‧第一絕緣體
420‧‧‧第二極
425‧‧‧第二絕緣體
430‧‧‧第三極
BG‧‧‧偏置電壓產生電路
BIAS‧‧‧偏置電壓
CP‧‧‧比較器/電流路徑
CP2‧‧‧第二比較器
EN‧‧‧致能訊號
OR‧‧‧邏輯閘電路
OT‧‧‧輸出端
OUT‧‧‧輸出訊號
PG‧‧‧脈波產生電路
PUR1‧‧‧第一上拉電阻
PUR2‧‧‧第二上拉電阻
R1‧‧‧第一電阻
R2‧‧‧第二電阻
R3‧‧‧第三電阻
R4‧‧‧第四電阻
R5‧‧‧第五電阻
S110、S120、S130、S140、S150‧‧‧步驟
S210、S220、S230、S240、S250‧‧‧步驟
SG‧‧‧訊號產生器
T1‧‧‧第一時間點
T2‧‧‧第二時間點
T3‧‧‧第三時間點
T4‧‧‧第四時間點
T5‧‧‧第五時間點
T6‧‧‧第六時間點
T7‧‧‧第七時間點
TR1‧‧‧第一電晶體
TR2‧‧‧第二電晶體
TR3‧‧‧第三電晶體
V1‧‧‧第一電壓
VDD‧‧‧電源電壓
VSS‧‧‧接地電壓
VREF‧‧‧參考電壓
10‧‧‧Multimedia devices
11‧‧‧Application Processor
12‧‧‧ Random access memory
13‧‧‧Storage device
14‧‧‧Power Management Circuit
15‧‧‧Power supply
16‧‧‧Video codec
17‧‧‧Monitor
18‧‧‧ camera
19‧‧‧Audio codec
20‧‧‧Speakers
21‧‧‧ microphone
22‧‧‧Data machine
23‧‧‧Antenna
100, 100a, 100b, 100c‧‧‧ plug detector
200‧‧‧plug slot
210‧‧‧ Subject
220‧‧‧first channel electrode
225‧‧‧First channel detection electrode
230‧‧‧second channel electrode
240‧‧‧Ground electrode
245‧‧‧Grounding detection electrode
255‧‧‧Microphone detection electrode
300‧‧‧ plug
310‧‧‧ first pole
315‧‧‧First insulator
320‧‧‧second pole
325‧‧‧second insulator
330‧‧‧ third pole
335‧‧‧3rd insulator
340‧‧‧ fourth pole
400‧‧‧ plug
410‧‧‧ first pole
415‧‧‧First insulator
420‧‧‧second pole
425‧‧‧Second insulator
430‧‧‧ third pole
BG‧‧‧ bias voltage generating circuit
BIAS‧‧‧ bias voltage
CP‧‧‧ Comparator/Current Path
CP2‧‧‧Second comparator
EN‧‧‧Enable signal
OR‧‧‧ logic gate circuit
OT‧‧‧ output
OUT‧‧‧ output signal
PG‧‧‧ pulse wave generating circuit
PUR1‧‧‧First pull-up resistor
PUR2‧‧‧Second pull-up resistor
R1‧‧‧first resistance
R2‧‧‧second resistance
R3‧‧‧ third resistor
R4‧‧‧fourth resistor
R5‧‧‧ fifth resistor
S110, S120, S130, S140, S150‧‧ steps
S210, S220, S230, S240, S250‧‧ steps
SG‧‧‧Signal Generator
T1‧‧‧ first time
T2‧‧‧ second time
T3‧‧‧ third time
T4‧‧‧ fourth time
T5‧‧‧ fifth time point
T6‧‧‧ Sixth time
T7‧‧‧ seventh time
TR1‧‧‧First transistor
TR2‧‧‧second transistor
TR3‧‧‧ third transistor
V1‧‧‧ first voltage
VDD‧‧‧Power supply voltage
VSS‧‧‧ Grounding voltage
VREF‧‧‧reference voltage

藉由結合附圖閱讀以下說明,以上及其他目的及特徵將變得顯而易見,在附圖中:The above and other objects and features will become apparent from the following description taken in conjunction with the appended claims

圖1是說明根據例示性實施例的多媒體裝置的方塊圖。FIG. 1 is a block diagram illustrating a multimedia device in accordance with an exemplary embodiment.

圖2是根據例示性實施例所繪示的外部個人播放單元插入插頭槽的插頭的實例。2 is an illustration of a plug in which an external personal playback unit is inserted into a plug slot, according to an exemplary embodiment.

圖3是根據例示性實施例所繪示的外部個人播放單元插入插頭槽的插頭的實例。3 is an illustration of a plug of an external personal playback unit inserted into a plug slot, in accordance with an illustrative embodiment.

圖4是根據例示性實施例所繪示的插頭偵測器的電路圖。4 is a circuit diagram of a plug detector illustrated in accordance with an illustrative embodiment.

圖5是根據例示性實施例所繪示的偵測插頭是否插入插頭槽的方法流程圖。FIG. 5 is a flow chart of a method for detecting whether a plug is inserted into a plug slot according to an exemplary embodiment.

圖6是根據例示性實施例所繪示的插入插頭槽或與所述插頭槽分離的3極插頭(3-pole jack)的連接。6 is a connection of a plug slot or a 3-pole jack that is separate from the plug slot, in accordance with an exemplary embodiment.

圖7是根據例示性實施例所繪示的插頭偵測器中所涉及的電壓變化的時序圖。FIG. 7 is a timing diagram of voltage variations involved in a plug detector, in accordance with an illustrative embodiment.

圖8是根據例示性實施例所繪示的插頭偵測器的應用的電路圖。FIG. 8 is a circuit diagram of an application of a plug detector, in accordance with an illustrative embodiment.

圖9是根據例示性實施例所繪示的一種執行插頭插入的方法的流程圖。FIG. 9 is a flow chart of a method of performing plug insertion, according to an exemplary embodiment.

圖10是根據例示性實施例所繪示的插頭偵測器中所涉及的電壓變化的時序圖。FIG. 10 is a timing diagram of voltage variations involved in a plug detector, in accordance with an illustrative embodiment.

圖11是根據例示性實施例所繪示的插頭偵測器的應用的流程圖。11 is a flow chart of an application of a plug detector in accordance with an exemplary embodiment.

10‧‧‧多媒體裝置 10‧‧‧Multimedia devices

11‧‧‧應用處理器 11‧‧‧Application Processor

12‧‧‧隨機存取記憶體 12‧‧‧ Random access memory

13‧‧‧儲存裝置 13‧‧‧Storage device

14‧‧‧電力管理電路 14‧‧‧Power Management Circuit

15‧‧‧電源供應器 15‧‧‧Power supply

16‧‧‧視訊編解碼器 16‧‧‧Video codec

17‧‧‧顯示器 17‧‧‧Monitor

18‧‧‧照相機 18‧‧‧ camera

19‧‧‧音訊編解碼器 19‧‧‧Audio codec

20‧‧‧揚聲器 20‧‧‧Speakers

21‧‧‧麥克風 21‧‧‧ microphone

22‧‧‧數據機 22‧‧‧Data machine

23‧‧‧天線 23‧‧‧Antenna

100‧‧‧插頭偵測器 100‧‧‧ Plug detector

200‧‧‧插頭槽 200‧‧‧plug slot

OUT‧‧‧輸出訊號 OUT‧‧‧ output signal

Claims (20)

一種音訊裝置,包括: 音訊編解碼器電路,連接至第一通道電極、第二通道電極及麥克風偵測電極;以及 插頭偵測電路,連接至第一通道偵測電極、接地偵測電極及所述麥克風偵測電極, 其中因應於所述第一通道偵測電極的電壓及所述接地偵測電極的電壓對應於接地電壓,所述插頭偵測電路偵測插頭的插入,而施加所述接地電壓於所述接地偵測電極,並施加偏置電壓於所述麥克風偵測電極。An audio device includes: an audio codec circuit connected to the first channel electrode, the second channel electrode, and the microphone detecting electrode; and a plug detecting circuit connected to the first channel detecting electrode, the ground detecting electrode, and the The microphone detecting electrode, wherein the plug detecting circuit detects the insertion of the plug and applies the ground according to the voltage of the first channel detecting electrode and the voltage of the ground detecting electrode corresponding to the ground voltage A voltage is applied to the ground detecting electrode, and a bias voltage is applied to the microphone detecting electrode. 如申請專利範圍第1項所述的音訊裝置,更包括: 接地節點,被施加所述接地電壓;以及 電晶體,連接於所述接地偵測電極與所述接地節點之間,且用以因應於所述偏置電壓而運作。The audio device of claim 1, further comprising: a ground node to which the ground voltage is applied; and a transistor connected between the ground detecting electrode and the ground node, and configured to Operates at the bias voltage. 如申請專利範圍第2項所述的音訊裝置,其中所述插頭偵測電路包括所述電晶體。The audio device of claim 2, wherein the plug detecting circuit comprises the transistor. 如申請專利範圍第1項所述的音訊裝置,更包括: 接地節點,被施加所述接地電壓;以及 電晶體,連接於所述接地偵測電極與所述接地節點之間,並用以因應於脈波訊號而運作。The audio device of claim 1, further comprising: a ground node to which the ground voltage is applied; and a transistor connected between the ground detecting electrode and the ground node, and configured to The pulse signal works. 如申請專利範圍第4項所述的音訊裝置,更包括脈波產生電路,所述脈波產生電路用以因應於所述第一通道偵測電極的電壓及所述接地偵測電極的電壓對應於所述接地電壓而啟用所述脈波訊號,並在工作時間(duty time)之後停用所述脈波訊號。The audio device of claim 4, further comprising a pulse wave generating circuit, wherein the pulse wave generating circuit is configured to respond to a voltage of the first channel detecting electrode and a voltage of the ground detecting electrode The pulse signal is enabled at the ground voltage, and the pulse signal is deactivated after a duty time. 如申請專利範圍第4項所述的音訊裝置,其中所述插頭偵測電路包括所述電晶體。The audio device of claim 4, wherein the plug detecting circuit comprises the transistor. 如申請專利範圍第1項所述的音訊裝置,其中所述插頭偵測電路包括: 比較器,用以若所述第一通道偵測電極的第一通道電壓等於或高於第一電壓,則輸出高位凖,且若所述第一通道電壓低於所述第一電壓,則輸出低位凖;以及 第一上拉電阻,連接於所述第一通道偵測電極與被供應電源電壓的電源節點之間。The audio device of claim 1, wherein the plug detecting circuit comprises: a comparator, configured to: if the first channel voltage of the first channel detecting electrode is equal to or higher than the first voltage, Outputting a high level 凖, and outputting a low level 若 if the first channel voltage is lower than the first voltage; and a first pull-up resistor connected to the first channel detecting electrode and a power supply node to which a power supply voltage is supplied between. 如申請專利範圍第7項所述的音訊裝置,其中所述插頭偵測電路更包括: 邏輯閘電路,用以基於所述比較器的輸出及所述接地偵測電極的所述電壓而執行或運算;以及 第二上拉電阻,連接於所述接地偵測電極與所述電源節點之間。The audio device of claim 7, wherein the plug detecting circuit further comprises: a logic gate circuit for performing or based on the output of the comparator and the voltage of the ground detecting electrode And a second pull-up resistor connected between the ground detecting electrode and the power node. 如申請專利範圍第8項所述的音訊裝置,其中所述插頭偵測電路因應於所述邏輯閘電路的輸出變為低位凖而偵測所述插頭。The audio device of claim 8, wherein the plug detecting circuit detects the plug in response to the output of the logic gate circuit becoming a low level. 如申請專利範圍第8項所述的音訊裝置,其中所述插頭偵測電路更包括: 第一電晶體,用以因應於所述邏輯閘電路的輸出為高位凖而將所述麥克風偵測電極與接地節點連接,且因應於所述邏輯閘電路的所述輸出為低位凖而將所述麥克風偵測電極自所述接地節點隔離。The audio detecting device of claim 8, wherein the plug detecting circuit further comprises: a first transistor for arranging the microphone detecting electrode according to an output of the logic gate circuit being a high level Connected to the ground node and isolates the microphone detecting electrode from the ground node in response to the output of the logic gate circuit being low. 如申請專利範圍第8項所述的音訊裝置,其中所述插頭偵測電路更包括: 偏置電壓產生電路,用以因應於所述邏輯閘電路的輸出為低位凖而產生偏置電壓並將所述偏置電壓傳遞至所述麥克風偵測電極。The audio device of claim 8, wherein the plug detecting circuit further comprises: a bias voltage generating circuit configured to generate a bias voltage according to an output of the logic gate circuit being low and The bias voltage is delivered to the microphone detecting electrode. 如申請專利範圍第11項所述的音訊裝置,更包括: 第二電晶體,連接於所述接地偵測電極與所述接地節點之間,用以因應於所述偏置電壓而運作。The audio device of claim 11, further comprising: a second transistor connected between the ground detecting electrode and the ground node for operating in response to the bias voltage. 如申請專利範圍第11項所述的音訊裝置,更包括: 第二電晶體,連接於所述接地偵測電極與所述接地節點之間,並用以因應於脈波訊號而運作,所述脈波訊號是因應於所述邏輯閘電路的輸出為所述低位凖而產生。The audio device of claim 11, further comprising: a second transistor connected between the ground detecting electrode and the ground node, and configured to operate according to a pulse wave signal, wherein the pulse The wave signal is generated in response to the output of the logic gate circuit being the low level. 一種多媒體裝置,包括: 應用處理器; 隨機存取記憶體; 儲存裝置; 視訊編解碼器,用以藉由所述應用處理器的控制而處理視訊資料; 顯示器,用以藉由所述視訊編解碼器的控制而顯示視訊訊號; 插頭槽,供外部插頭插入; 音訊編解碼器,連接至所述插頭槽中的第一通道電極、第二通道電極及麥克風偵測電極,用以藉由所述應用處理器的控制而處理音訊資料;以及 插頭偵測電路,連接至所述插頭槽中的第一通道偵測電極、接地偵測電極及所述麥克風偵測電極, 其中因應於所述第一通道偵測電極的電壓及所述接地偵測電極的電壓對應於接地電壓,所述插頭偵測電路偵測所述外部插頭插入所述插頭槽中,而施加所述接地電壓於所述接地偵測電極,並施加偏置電壓於所述麥克風偵測電極。A multimedia device, comprising: an application processor; a random access memory; a storage device; a video codec for processing video data by control of the application processor; and a display for editing by the video The decoder controls the display of the video signal; the plug slot is for inserting the external plug; the audio codec is connected to the first channel electrode, the second channel electrode and the microphone detecting electrode in the plug slot for Processing the audio data by the control of the application processor; and the plug detecting circuit is connected to the first channel detecting electrode, the ground detecting electrode and the microphone detecting electrode in the plug slot, wherein the first The voltage of the one-channel detecting electrode and the voltage of the ground detecting electrode correspond to a ground voltage, and the plug detecting circuit detects that the external plug is inserted into the plug slot, and the ground voltage is applied to the ground The electrode is detected and a bias voltage is applied to the microphone detecting electrode. 如申請專利範圍第14項所述的多媒體裝置,其中所述音訊編解碼器及所述插頭偵測電路實作於一個半導體封裝中。The multimedia device of claim 14, wherein the audio codec and the plug detecting circuit are implemented in a semiconductor package. 如申請專利範圍第14項所述的多媒體裝置,其中所述多媒體裝置包括智慧型電話、智慧型平板電腦、智慧型電視、智慧型手錶及穿戴式裝置中的至少一者。The multimedia device of claim 14, wherein the multimedia device comprises at least one of a smart phone, a smart tablet, a smart TV, a smart watch, and a wearable device. 一種音訊裝置,包括: 邏輯閘電路,用以因應於插頭槽中的第一通道偵測電極的電壓及接地偵測電極的電壓為接地電壓而輸出第一位凖訊號,並因應於所述插頭槽中的所述第一通道偵測電極的所述電壓及所述接地偵測電極的所述電壓中的至少一者不是所述接地電壓而輸出第二位凖訊號; 電晶體,用以因應於所述邏輯閘電路輸出所述第一位凖訊號而將所述接地偵測電極連接至被供應所述接地電壓的接地節點;以及 偏置電壓產生器,用以因應於所述邏輯閘電路輸出所述第一位凖訊號而產生偏置電壓並將所述偏置電壓施加至麥克風偵測電極,並因應於所述邏輯閘電路輸出所述第二位凖訊號而將所述接地電壓施加至所述麥克風偵測電極。An audio device includes: a logic gate circuit for outputting a first signal according to a voltage of a first channel detecting electrode and a voltage of a ground detecting electrode in a plug slot, and corresponding to the plug At least one of the voltage of the first channel detecting electrode and the voltage of the ground detecting electrode in the slot is not the ground voltage and outputs a second bit signal; the transistor is configured to respond The logic gate circuit outputs the first bit signal to connect the ground detecting electrode to a ground node to which the ground voltage is supplied; and a bias voltage generator for responding to the logic gate circuit Outputting the first bit signal to generate a bias voltage and applying the bias voltage to the microphone detecting electrode, and applying the ground voltage according to the logic gate circuit outputting the second bit signal To the microphone detecting electrode. 如申請專利範圍第17項所述的音訊裝置,其中所述電晶體用以因應於所述偏置電壓而運作。The audio device of claim 17, wherein the transistor is operative to operate in response to the bias voltage. 如申請專利範圍第17項所述的音訊裝置,更包括脈波產生電路,所述脈波產生電路用以因應於所述邏輯閘電路的輸出輸出所述第一位凖訊號而產生脈波訊號。The audio device of claim 17, further comprising a pulse wave generating circuit, wherein the pulse wave generating circuit is configured to generate a pulse wave signal according to an output of the logic gate circuit outputting the first bit signal . 如申請專利範圍第17項所述的音訊裝置,其中所述插頭槽包括第一通道電極、第二通道電極及接地電極,且 所述音訊裝置更包括音訊編解碼器電路,所述音訊編解碼器電路用以經由所述第一通道電極、所述第二通道電極及所述接地電極而輸出音訊訊號,並經由所述麥克風偵測電極而接收音訊訊號。The audio device of claim 17, wherein the plug slot comprises a first channel electrode, a second channel electrode and a ground electrode, and the audio device further comprises an audio codec circuit, the audio codec The device circuit is configured to output an audio signal via the first channel electrode, the second channel electrode, and the ground electrode, and receive an audio signal via the microphone detecting electrode.
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