TW201715659A - Electronic components module, integrated circuit encapsulated component and lead frame for the same - Google Patents

Abstract

The present invention relates to an electronic components module with an integrated circuit encapsulated component and a circuit board. The integrated circuit encapsulated component is composed by a lead frame encapsulated with a chip mounted thereon. The integrated circuit encapsulated component has a central chip carrier and multiple lead pads formed around the central chip carrier. The central chip carrier has a recess formed on the bottom thereof. The circuit board and the integrated circuit encapsulated component are bound to each other by solder. Since the recess provides an extra space for the solder, the surrounding lead pads bear the force during the soldering process. Then the thickness of the solder on the lead pads governs the thickness of the solder between the circuit board and the integrated circuit encapsulated component. Further, the recess also provides the extra space for the blister formed during the soldering process so that the thickness of the solder is uniform. Therefore, the binding strength between the circuit board and the integrated circuit encapsulated component is further enhanced.

Description

Electronic component module, integrated circuit package component and lead frame thereof

The invention relates to an electronic component module, an integrated circuit package component and a lead frame thereof, in particular to the technical field of the lead frame.

Referring to FIG. 10 and FIG. 11 , the integrated circuit package component 40 of the prior art has a wafer holder 42 and a pin pad 43 disposed on the bottom surface of the package body 41 . The pin pad 43 is disposed on the wafer holder 42 . Around the circumference, the pin pads 43 are on the same plane as the bottom surface of the wafer holder 42.

Referring to FIG. 12 and FIG. 13, the prior art integrated circuit package component 40 is fixed to the circuit board 60 through the solder 50 and is electrically connected. However, in the prior art structure, the soldering process is likely to occur. The following problems: 1. As shown in Fig. 12, if the solder paste is unevenly distributed in the soldering process, the heights of the two sides are inconsistent, forming a so-called "warp board effect", and the two-side pad pads 43 are in contact with the solder 50. The area is not uniform, so that the connection between the integrated circuit package component 40 and the circuit board 60 is not good. 2. As shown in FIG. 13, since the flux in the solder paste is easily volatilized to generate the bubble 51, since the bubble 51 has a certain volume, it occupies a fixed space, so that the integrated circuit package member 40 generates one side of the bubble 51. The height of the circuit board 60 is raised, and the aforementioned "warp board effect" is generated.

In view of the above, the present invention is directed to the problem of uneven distribution of bubbles and solder generated when integrated circuit package components are bonded to a circuit board.

In order to achieve the above object, the present invention is to create a lead frame for an integrated circuit package component, which has a wafer holder and a plurality of pin pads, and the pin pads are spaced apart and arranged on the wafer carrier. At least two opposite edges of the seat, a recess is formed on the bottom surface of the wafer holder.

Further, the present invention is an integrated circuit package component, comprising: a package; a wafer holder disposed in a bottom surface of the package, the bottom surface of the wafer holder is provided with at least one groove; The plurality of pin pads are disposed on at least two opposite peripheral edges of the bottom surface of the package, and are disposed at intervals, and a bottom surface of each of the pin pads is exposed outside the package.

Still further, the present invention is directed to an electronic component module comprising: a circuit board having at least one pad group on a surface thereof, each pad group including a center pad and a plurality of pin pads; The pin pads are spaced apart and arranged on at least two opposite edges of the center pad; at least one of the foregoing integrated circuit package units is disposed on the circuit board, and each integrated circuit package component corresponds to the middle a pad set corresponding to a center pad of the pad set, each pin pad corresponding to one of the pad pads of the pad set, the wafer holder being disposed on a bottom surface of the package body a first solder is applied between the corresponding pin pad and the pin pad, and a second solder is coated between the corresponding wafer socket and the center pad, and the second solder is placed The wafer holder is in the recess.

The invention has the advantages that, by the arrangement of the grooves on the bottom surface of the wafer holder, in the soldering process, the groove provides additional space for accommodating the solder paste, so that between the integrated circuit package unit and the board The bearing point between the solder pads and the pin pads is used to form the bearing point of the solder, so that the bearing force around the wafer socket can be effectively averaged to maintain the same height on both sides, and the pins can be maintained. The contact area between the pads and the solder to avoid poor connection. Moreover, the groove on the bottom surface of the wafer holder provides a space for the bubble to be accommodated, so that the bubble generated in the soldering process will not affect the height of the overall solder, thereby making the overall solder height uniform.

The technical means adopted by the present invention for achieving the intended purpose of the invention are further explained below in conjunction with the drawings and the embodiments of the present invention.

Referring to FIG. 1 and FIG. 2, the integrated circuit package component 10 of the present invention is formed by arranging a wafer on a lead frame and packaged. The integrated circuit package component 10 includes a package body 11, a wafer holder 12, and A plurality of pin pads 13 are provided.

The wafer holder 12 is disposed on the bottom surface of the package body 11. The bottom surface of the wafer holder 12 is exposed outside the package body 11. The bottom surface of the wafer holder 12 is provided with at least one recess 121. In the technical field, the thickness of the common lead frame is 150 μm to 250 μm, and the depth of the groove 121 is not greater than the thickness of the lead frame, that is, the depth of the groove 121 is less than 150 μm, and the depth of the groove 121 will be related to the amount of solder paste. In one embodiment, the depth of the groove 121 is 20 μm to 150 μm, and in another embodiment, the depth of the groove 121 is 20 μm to 50 μm.

The wafer holder 12 can have a single recess 121 (shown in FIG. 1) or a plurality of recesses 121 as shown in FIGS. 3 through 5, and the plurality of recesses 121 can be arranged in a symmetrical or matrix arrangement. In the embodiment shown in FIG. 3, the grooves 121 are arranged in a 2*2 matrix; in the embodiment shown in FIG. 4, the grooves 121 are arranged in a 3*3 matrix; in the embodiment shown in FIG. The grooves 121 are arranged in a 3*2 matrix. The foregoing arrangement of the grooves 121 is merely exemplary and is not intended to limit the scope of the present invention.

The pin pads 13 are disposed at the periphery of the bottom surface of the package body 11. The pin pads 13 are spaced apart and arranged on the periphery of the wafer holder 12, in an embodiment (as shown in FIG. 1). The pin pads 13 are disposed on the periphery of the four sides of the package body 11; in another embodiment (as shown in FIG. 6), the pin pads 13 are disposed on opposite sides of the package body 11.

Referring to FIG. 7 , the electronic component module of the present invention comprises at least one of the foregoing integrated circuit package components 10 and a circuit board 20 , and the integrated circuit package component 10 is disposed on a top surface of the circuit board 20 .

The top surface of the circuit board 20 has at least one pad group, and one pad group corresponds to an integrated circuit package component 10. Each pad group includes a center pad 21 and a plurality of pin pads 22, the center The pad 21 corresponds to the wafer holder 12, and each of the pin pads 22 corresponds to one of the pin pads 13 of the integrated circuit package component 10.

Referring to FIG. 8, the integrated circuit package component 10 and the circuit board 20 are bonded through a soldering process, wherein the corresponding pin pads 13 and the pad pads 22, and corresponding wafer holders are provided. Solder 30 is applied between 12 and center pad 21, and solder 30 between wafer holder 12 and center pad 21 is received in recess 121 of wafer holder 12.

Based on the foregoing structure, the advantages of the present invention are as follows: 1. In the soldering process, even if the solder 30 located between the wafer holder 12 and the center pad 21 is unevenly distributed, since the groove 121 provides the filler solder 30 additionally Space, so that the solder 30 between the pin pad 13 and the pin pad 22 can be used as a support point, so that the height of the periphery of the wafer holder 12 relative to the circuit board 20 is maintained, thereby avoiding one side higher than the rest. The side phenomenon is such that the contact area between the solder 30 on each side and the pin pad 13 and the pin pad 22 is sufficient to maintain a stable combined area to improve the process yield. 2. Referring to FIG. 9, even though the bubble 31 is generated in the soldering process, the bubble 31 can be hidden in the extra space formed by the groove 121 due to the arrangement of the groove 121, so the thickness of the overall solder 30 is not caused. Therefore, the effect of maintaining the uniform height of the periphery of the wafer holder 12 is also achieved, so that the contact area of the solder 30 on each side with the pin pad 13 and the pin pad 22 is sufficient to maintain a stable combined area. The surface of the overall solder 30 is made flater to improve the process yield. 3. The inner wall surface of the recess 121 provides an additional contact surface, so that the contact area between the solder 30 and the wafer holder 12 is increased, thereby enhancing the bonding strength between the integrated circuit package component 10 and the circuit board 20.

The above is only the embodiment of the present invention, and is not intended to limit the scope of the present invention. The present invention has been disclosed by the embodiments, but is not intended to limit the invention, and any one of ordinary skill in the art, In the scope of the technical solutions of the present invention, equivalent modifications may be made to the equivalents of the embodiments of the present invention without departing from the technical scope of the present invention. Any simple modifications, equivalent changes and modifications made to the above embodiments are still within the scope of the technical solutions of the present invention.

10‧‧‧Integrated circuit package components
11‧‧‧Package
12‧‧‧ wafer holder
121‧‧‧ Groove
13‧‧‧Pushing pads
20‧‧‧ boards
21‧‧‧Center pad
22‧‧‧foot pads
30‧‧‧ Solder
31‧‧‧ bubbles
40‧‧‧Integrated circuit package components
41‧‧‧Package
42‧‧‧ wafer holder
43‧‧‧Pushing pads
50‧‧‧ Solder
51‧‧‧ bubbles
60‧‧‧ boards

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a bottom plan view showing a first embodiment of an integrated circuit package component of the present invention. Figure 2 is a side cross-sectional view showing a first embodiment of the integrated circuit package component of the present invention. Figure 3 is a bottom plan view showing a second embodiment of the integrated circuit package component of the present invention. Figure 4 is a bottom plan view showing a third embodiment of the integrated circuit package component of the present invention. Figure 5 is a bottom plan view showing a fourth embodiment of the integrated circuit package component of the present invention. Figure 6 is a bottom plan view showing a fifth embodiment of the integrated circuit package component of the present invention. Figure 7 is a side elevational cross-sectional view showing the components of the electronic component module of the present invention. Figure 8 is a side cross-sectional view of the electronic component module of the present invention. Figure 9 is a side cross-sectional view showing another embodiment of the electronic component module of the present invention. Figure 10 is a bottom plan view of a prior art integrated circuit package component. Figure 11 is a side cross-sectional view showing a prior art integrated circuit package component. Figure 12 is a side cross-sectional view showing an embodiment of an electronic component module of the prior art. Figure 13 is a side cross-sectional view showing another embodiment of the prior art electronic component module.

10‧‧‧Integrated circuit package components

11‧‧‧Package

12‧‧‧ wafer holder

121‧‧‧ Groove

13‧‧‧Pushing pads

Claims (18)

An electronic component module includes: a circuit board having at least one pad group on a surface thereof, each pad group including a center pad and a plurality of pin pads, wherein the pin pads are spaced apart Arranging on at least two opposite edges of the center pad; at least one integrated circuit package component disposed on the circuit board, and each integrated circuit package component corresponding to one of the pad sets, each integrated circuit package component Having a wafer holder, a plurality of pin pads, and a package, the wafer holder corresponding to a center pad of the pad group, each pin pad corresponding to one of the pad groups a pad holder, the wafer holder is disposed in a bottom surface of the package body, and a bottom surface of the wafer holder is provided with at least one groove, and the pin pad is disposed on at least two opposite circumferences of the bottom surface of the package body at intervals The bottom surface of the wafer holder and the bottom surface of each of the pin pads are exposed outside the package body, and the first solder is coated between the corresponding pin pads and the pin pads, and the corresponding wafer holders are a second solder is coated between the center pads, the second Tin accommodated in the recess of the wafer seat. The electronic component module of claim 1, wherein the groove of the wafer holder has a depth of less than 150 μm. The electronic component module of claim 1, wherein the groove of the wafer holder has a depth of 20 μm to 150 μm. The electronic component module according to any one of claims 1 to 3, wherein the pin pads are disposed around four circumferences of the center pad, and the pin pads are disposed around the four sides of the wafer holder Periphery. The electronic component module according to any one of claims 1 to 3, wherein a bottom surface of the wafer holder is provided with a single groove. The electronic component module of any one of claims 1 to 3, wherein the bottom surface of the wafer holder is provided with a plurality of grooves, the grooves being arranged symmetrically or in a matrix. An integrated circuit package component includes: a package; a wafer holder disposed in a bottom surface of the package, the bottom surface of the wafer holder is provided with at least one groove; and a plurality of pin pads are The bottom surface of the package body is disposed at an interval of at least two opposite edges, and the bottom surface of each of the pin pads is exposed outside the package. The integrated circuit package component of claim 7, wherein the groove of the wafer holder has a depth of less than 150 μm. The integrated circuit package component of claim 7, wherein the groove of the wafer holder has a depth of from 20 μm to 150 μm. The integrated circuit package component of any one of claims 7 to 9, wherein the pin pads are disposed around a circumference of four sides of the wafer holder. The integrated circuit package component of any one of claims 7 to 9, wherein the second surface of the wafer holder is provided with a single recess. The integrated circuit package component according to any one of claims 7 to 9, wherein the second surface of the wafer holder is provided with a plurality of grooves, the grooves being arranged symmetrically or in a matrix. A lead frame of an integrated circuit package component having a wafer holder and a plurality of pin pads, the pin pads being spaced apart and arranged on at least two opposite circumferences of the wafer holder, the wafer holder The bottom surface is provided with a groove. The lead frame of the integrated circuit package component of claim 13, wherein the groove of the wafer holder has a depth of less than 150 μm. The lead frame of the integrated circuit package component of claim 13, wherein the groove of the wafer holder has a depth of 20 μm to 150 μm. The lead frame of the integrated circuit package component of any one of claims 13 to 13, wherein the pin pad surrounds a periphery of four sides of the wafer holder. The lead frame of the integrated circuit package component according to any one of claims 13 to 15, wherein a bottom surface of the wafer holder is provided with a single groove. The lead frame of the integrated circuit package component according to any one of claims 13 to 15, wherein the bottom surface of the wafer holder is provided with a plurality of grooves, the grooves being arranged symmetrically or in a matrix.