TW201707176A - Bump structure of semiconductor device - Google Patents

Abstract

Disclose is a bump structure of semiconductor device. A bond pad and an auxiliary pad are disposed on a device body. An insulation layer is formed on the device body and has an auxiliary holeto expose the auxiliary pad. An UBM is formed on the insulation layer and connects the pad with the auxiliary pad. A slim bump has a bump portion on the bond pad and an extension portion. The extension portion is connected with the bump portion and located on the insulation layer. The length of the extension portion is not less than eighty percent of the length of the bump portion. And the extension portion covers the auxiliary pad and has a root. The root is located inside the auxiliary pad and planted into the auxiliary pad. Thereby, what effect is achieved is enhancing the bonding strength of the slim bump formed on the UBM to make the slim bump be not shifted.

Description

Bump structure of semiconductor device

The present invention relates to a semiconductor device, and more particularly to a bump structure of a semiconductor device.

For example, metal bumps such as gold bumps are fabricated on the pads of semiconductor devices such as integrated circuit chips for external electrical connection, and can be applied to COG (Chip On Glass) or thin film flip chip (COF, Chip On Film), micro-electronic products such as tape carrier package (TCP). The electrical signal is transmitted to the matching device via the bumps and the substrate leads on both sides of the integrated circuit chip, such as a liquid crystal display or a carrier thereof, and the high quality and high resolution required by the display are required for the wafer. The number of bumps is relatively increased. In addition, under the miniaturization requirements of other electronic products, the integrated circuit is more complicated and miniaturized, which will reduce the bump pitch.

The applicant's prior application, National Patent Publication No. 200845249, discloses a "wafer structure having interdigitated bumps bonded to a plurality of open windows", wherein the finger bumps are disposed on a wafer body. The wafer body has a plurality of pads and a surface protection layer having a plurality of openings for partially exposing each of the pads, which may be linear, parallel or matrix. The finger bumps are arranged on the wafer body, each of the finger bumps has a convex body and an extension portion, and the bottom cover area of the convex body In the corresponding pad, to cover the opening of the corresponding group, the bottom cover area of the extension portion is beyond the pad to maintain the strength of the micro-pitch bump bonding. The bottom footprint of the extension may span at least one trace. However, when the extension of the finger bump is designed to be too long, it may be skewed or offset due to external stress, so that the finger bumps are in contact with each other and short-circuited, so that the position of the extension portion cannot be correctly aligned in the effective joint. within the area. In particular, when the length of the extension portion is more than 80% of the same length of the bump body, the deflection of the bump extension portion is more serious.

In order to solve the above problems, the main object of the present invention is to provide a bump structure of a semiconductor device, which can enhance the effect of reinforcing the elongated bumps on the metal layer under the bumps, so that the elongated bumps are not skewed, thereby avoiding The short bumps of the elongated bumps are short-circuited, and the correct position of the elongated bumps is maintained.

The object of the present invention and solving the technical problems thereof are achieved by the following technical solutions. The present invention discloses a bump structure of a semiconductor device, comprising a device body, at least one first pad, at least one auxiliary pad, a first insulating layer, and at least one first under bump metal layer (UBM, Under Bump Metallurgy) And at least one elongated bump. The apparatus main system has a joint surface and a plurality of lines on the joint surface. The first pad is disposed on the joint surface. The auxiliary pad is disposed on the joint surface. The first insulating layer is formed on the bonding surface, and the first insulating layer has a first opening and an auxiliary hole for respectively exposing the first pad and the auxiliary pad. The first under bump metal layer is formed on the first insulating layer, and the first under bump metal layer is connected to the auxiliary via via the first opening The first pad and the auxiliary pad. The elongated bump is disposed on the first under bump metal layer, and the elongated bump has a bump portion and an extension portion, wherein the bump portion is located on the first pad, the extension The portion is connected to the bump portion and located on the first insulating layer, and the length of the extension portion of the elongated bump is not less than 80% of the length of the bump portion of the elongated bump, and the elongated bump The extension portion covers the auxiliary pad and has a portion that is located in the auxiliary hole to be implanted to the auxiliary pad. Thereby, the effect of reinforcing the elongated bumps on the metal layer under the first bumps can be achieved, so that the elongated bumps are not skewed, so that the short bumps of the elongated bumps are prevented from being short-circuited and maintained. The elongate bumps are joined in position for correctness.

The object of the present invention and solving the technical problems thereof can be further achieved by the following technical measures.

In the foregoing bump structure, the apparatus main system has a first side, the elongated protrusion may be adjacent to the first side, and the extension may be further away from the first side relative to the protrusion The elongate projection may be an elongated finger whose direction of extension is not limited by the first side.

In the foregoing bump structure, the auxiliary pad may be a separate pad smaller than the first pad, so the auxiliary pad is a dummy pad, and the auxiliary pad is not connected to the unsprung pad before the elongate bump is disposed. An integrated circuit component of the device body.

In the above bump structure, the lines can pass through the gap between the first pad and the auxiliary pad, so the lines can be used as a power/ground bus or a line connecting other pads. The portion of the first insulating layer between the first pad and the auxiliary pad is improved to be too heavy.

In the foregoing bump structure, the first insulating layer is on the first pad and The upper surface between the auxiliary pads may be formed with a recess such that the underlying metal layer of the first bump has a corresponding indentation, so that the underlying metal layer of the first bump is non-flat, which can enhance the first insulation. The bonding force of the layers.

In the foregoing bump structure, a second insulating layer may be further included. Formed between the bonding surface and the first insulating layer, covering the periphery of the first bonding pad, the lines and the periphery of the auxiliary pad, and the thickness of the second insulating layer may be smaller than the first insulating layer The thickness of the second insulating layer is easier to fill the first solder pad, the lines, and the bent interface between the auxiliary pads with respect to the first insulating layer.

In the foregoing bump structure, the elongated bumps are plural and convex Preferably, the block pitch is 27 microns or less, the elongated bumps are between 80 microns and 200 microns in length, and the elongated bumps are between 8 microns and 15 microns in width, the height of the elongated bumps being between 2 microns to 50 microns. Therefore, the elongated bumps can be arranged at a fine pitch on the main body of the device.

In the foregoing bump structure, at least one second pad may be further included, Less than one second under bump metal layer and at least one regular bump. The second bonding pad is disposed on the bonding surface, and the first insulating layer further has a second opening for exposing the second bonding pad. The second under bump metal layer is formed on the first insulating layer, and the second under bump metal layer is connected to the second pad via the second opening. The regular bump is convexly disposed on the second under bump metal layer. Thereby, the regular bump and the elongated bump have signal conduction functions, but the shapes and structures of the two are not in phase. with.

In the foregoing bump structure, the main system of the device has a relative The second side of the first side, the regular bump can be adjacent to the second side, so the density of the bumps on the two sides of the main body of the device can be adjusted according to requirements.

In the foregoing bump structure, the first opening of the first insulating layer The slot can be a slot extending in the same direction as the extension of the elongated bump, so that the stress from the extension is prevented from being caused by the first bump. Complete break at the hole.

In the foregoing bump structure, the width of the first opening is specifically introduced The length of the first opening is specifically between 10 and 80 microns at 3 to 10 microns, and the opening size of the auxiliary hole is specifically between 3 x 3 and 10 x 10 square microns.

By the above technical means, the present invention can achieve a breakthrough in conventional convexity The limitation of the distance between the blocks is to optimize the micro-pitch bumps of the semiconductor device, and the elongated bumps can be arranged at a fine pitch, and the extension of the elongated bumps is not skewed, so that the short bumps are prevented from being short-circuited by each other. The correctness of the joint position of the elongated bumps is also maintained, thereby avoiding the weakening of the bonding force of the elongated bumps on the external circuit board at the extension portion thereof.

100‧‧‧Bump structure of semiconductor devices

110‧‧‧Device body

111‧‧‧ joint surface

112‧‧‧ lines

113‧‧‧ first side

114‧‧‧Second side

121‧‧‧First pad

122‧‧‧Second pad

130‧‧‧Auxiliary pads

140‧‧‧First insulation

141‧‧‧ first opening

142‧‧‧Second opening

143‧‧‧Auxiliary hole

144‧‧‧ Groove

151‧‧‧First under bump metal layer

152‧‧‧second under bump metal layer

153‧‧ dent

160‧‧‧Slim bumps

161‧‧‧Bumps

162‧‧‧Extension

163‧‧‧ root

170‧‧‧Regular bumps

180‧‧‧Second insulation

1 is a partial schematic view showing a joint surface of a bump structure of a semiconductor device in accordance with a preferred embodiment of the present invention.

Figure 2: Joint angle of the bump structure according to a preferred embodiment of the present invention 隅 Zoom in on the schematic.

Figure 3 is a cross-sectional view of the bump structure at an elongated bump in accordance with a second embodiment of Figure 3-3 in accordance with a preferred embodiment of the present invention.

Figure 4 is a cross-sectional view of the bump structure at a regular bump in accordance with a preferred embodiment of the present invention.

The embodiments of the present invention will be described in detail below with reference to the accompanying drawings in which FIG. The components and combinations related to this case, the components shown in the figure are not drawn in proportion to the actual number, shape and size of the actual implementation. Some size ratios are proportional to other related sizes or have been exaggerated or simplified to provide clearer description of. The actual number, shape and size ratio of the implementation is an optional design, and the detailed component layout may be more complicated.

According to a preferred embodiment of the present invention, a bump structure 100 of a semiconductor device is illustrated in a partial view of the joint surface of FIG. 1 , an enlarged view of the joint surface angle of FIG. 2 , and a second diagram of FIG. 3 . -3 is a schematic cross-sectional view of the section line at the elongated bump and a schematic view of the section at the regular bump of FIG. A bump structure 100 of a semiconductor device includes a device body 110, at least one first pad 121, at least one auxiliary pad 130, a first insulating layer 140, at least one first under bump metal layer 151, and at least one elongated Bump 160.

As shown in Figures 1 through 4, the apparatus body 110 has a joint surface 111 and a plurality of lines 112 on the joint surface 111. The device body 110 is It is a wafer layer or wafer level package. The bonding surface 111 can be a wafer active surface or a package surface, and the bonding surface 111 can be formed with integrated circuit components such as memory, logic or IC driving components. The materials of the lines 112 are electrically conductive materials, and the lines 112 can be used as a power/ground bus or a line connecting other pads, and can belong to a part of the underlying metal layer of the bump. The device body 110 further has a first side 113 and a second side 114 opposite to the first side 113. The first side 113 can be used as an output signal side of the device body 110 and can be externally connected to a liquid crystal display or a panel driving device. The second side 114 can serve as an input signal side of the device body 110.

As shown in FIGS. 2 and 3, the first pad 121 is disposed on the joint On face 111. The first pad 121 can be a pad, such as an aluminum pad or a copper pad, and can serve as a external electrode for connecting the integrated circuit components. The first pad 121 is adjacent to the first side 113. The bump structure 100 can further include at least one second pad 122 (as shown in FIG. 4 ). The second pad 122 is also disposed on the bonding surface 111 but adjacent to the second side 114 .

As shown in FIGS. 2 and 3, the auxiliary pad 130 is disposed on the joint surface. 111 on. The auxiliary pad 130 can be a separate pad smaller than the first pad 121. Therefore, the auxiliary pad 130 is a dummy pad. The auxiliary pad 130 is not connected to the device before the elongated bump 160 is disposed. The integrated circuit component of the body 110. The auxiliary pad 130 can be a small aluminum pad or a copper pad adjacent to the corresponding first pad 121.

As shown in FIGS. 3 and 4, the first insulating layer 140 is formed on the interface The first insulating layer 140 has a first opening 141 and a first The auxiliary hole 143 is configured to respectively expose the first pad 121 and the auxiliary pad 130. The first insulating layer 140 is electrically insulating. The shape of the auxiliary hole 143 may be different from the shape of the first opening 141. The first insulating layer 140 can further have a second opening 142 for revealing the second pad 122.

As shown in FIG. 3, the first under bump metal layer 151 is formed on the The first under bump metal layer 151 is connected to the first pad 121 and the auxiliary pad 130 via the first opening 141 and the auxiliary hole 143 respectively. The first under bump metal layer 151 is patterned and has a shape corresponding to the bottom area of the elongated bump 160. The first under bump metal layer 151 is formed by sputtering, physical vapor deposition or chemical vapor deposition, and the material thereof may be titanium tungsten/gold (TiW/Au), titanium tungsten/copper/gold (TiW/Cu). /Au) or titanium/nickel/gold (Ti/Ni/Au). The first under bump metal layer 151 may be a layer or a buildup layer.

As shown in FIGS. 1 to 3, the elongated bumps 160 are convexly disposed on On the first under bump metal layer 151, the elongated bump 160 has a bump portion 161 and an extension portion 162. The bump portion 161 is located on the first pad 121, and the extension portion 162 is The bump portion 161 is connected and located on the first insulating layer 140. The elongated bumps 160 can be metal bumps such as gold, copper or other conductive metals. The elongated bump 160 can be used as a high-density output of a higher number of feet. The bottom cover area of the bump portion 161 is aligned with the first pad 121 and larger than the first opening 141. The extension 162 means that the finger bump extends beyond the other portion of the corresponding pad. Specifically, as shown in FIGS. 1 to 3, the elongated protrusion 160 is adjacent to the first side edge 113, and the extension portion 162 is further away from the first side edge relative to the protrusion portion 161. 113. Therefore, the elongated protrusion 160 can be an elongated finger shape, and the extending direction thereof is not limited by the first side edge 113. Therefore, the extension portion 162 can be formed over the bump structure 100 for forming an internal integrated circuit region. The bottom cover area of the extending portion 162 is beyond the first pad 121 so that the elongated bump 160 is protruded, so that the effective bonding area of the bump can be increased. The extending direction of the extending portion 162 and the first side edge 113 are perpendicular to each other. Therefore, the elongated bumps 160 can be arranged in parallel at a high density to achieve the effect of the bump fine pitch. The bump portion 161 and the extension portion 162 may have top surfaces of uniform height.

Moreover, the length of the extension 162 of the elongated bump 160 is not less than The length of the bump portion 161 of the elongated bump 160 is 80%, and the extension portion 162 of the elongated bump 160 covers the auxiliary pad 130 and has a portion 163. The root portion 163 is located in the auxiliary hole 143. To be implanted to the auxiliary pad 130. More desirably, the length of the extension 162 of the elongated bump 160 is not less than twice the length of the bump portion 161 of the elongated bump 160.

As shown in FIGS. 1 to 3, the elongated bumps 160 are plural, and The bump pitch is 27 microns or less, and the length of the elongated bump 160 is between 80 micrometers and 200 micrometers and is greater than the length of the first pad 121; the width of the elongated bumps 160 is between 8 micrometers and 15 micrometers. It should be smaller than the width of the first pad 121 and larger than the width of the first opening 141; the height of the elongated bump 160 is between 2 micrometers and 50 micrometers. Therefore, the elongated bumps 160 can be arranged on the device body 110 at a fine pitch. The ratio of the aspect ratio of the elongated bumps 160 may be between 5 and 25. The ratio of the aspect ratio of the elongated bumps may be 9 to 100, so that the shape of the elongated bumps 160 is laterally finger-shaped.

Therefore, the bump structure 100 of the semiconductor device of the present invention can be achieved The effect of the elongate protrusions 160 on the first under bump metal layer 151 is enhanced, so that the elongate bumps 160 are not skewed, so that the short bumps of the elongate bumps 160 are prevented from being short-circuited, and the The correctness of the engagement position of the elongated bumps 160. The bump structure 100 of the semiconductor device of the present invention can be applied to the LCM module, the COF device and the IC wafer bare.

As shown in Figures 3 and 4, preferably, the lines 112 are traversable. The gap between the first pad 121 and the auxiliary pad 130 can improve the portion of the first insulating layer 140 that is between the first pad 121 and the auxiliary pad 130.

As shown in FIGS. 3 and 4, the first insulating layer 140 is on the first pad The upper surface between the 121 and the auxiliary pad 130 may be formed with a recess 144 such that the first under bump metal layer 151 has a corresponding recess 153, so that the first under bump metal layer 151 is non-flat. The bonding force to the first insulating layer 140 can be enhanced. The bottom portion of the extending portion 162 of the elongated bump 160 is engageable in the recess 153, which can improve the crack resistance characteristic of the elongated bump 160 and disperse the sinking region of the top of the elongated bump 160 to enhance the slender shape. The bump 160 is joined to the strength. The width and depth of the groove 144 of the first insulating layer 140 can be controlled and adjusted by the position and thickness of the lines 112.

As further shown in Figures 3 and 4, the bump structure 100 can further comprise a second The insulating layer 180 is formed between the bonding surface 111 and the first insulating layer 140, and covers the periphery of the first pad 121, the lines 112 and the periphery of the auxiliary pad 130, and the second insulation The thickness of the layer 180 can be smaller than the first insulating layer 140 The thickness of the second insulating layer 180 is easier to fill the first solder pad 121, the curved line between the lines 112 and the auxiliary pad 130 with respect to the first insulating layer 140.

More specifically, the bump structure 100 may further include at least one second protrusion The lower metal layer 152 and the at least one regular bump 170. The second under bump metal layer 152 is patterned and has a shape corresponding to the bottom area of the regular bump 170. The second under bump metal layer 152 is formed on the first insulating layer 140 , and the second under bump metal layer 152 is connected to the second pad 122 via the second opening 142 . The regular bumps 170 are disposed on the second under bump metal layer 152 in a convex shape. Thereby, both the regular bump 170 and the elongated bump 160 have a signal conducting function, but the shapes and structures of the two are different. The second under bump metal layer 152 is formed in the same manner as the first under bump metal layer 151. The second under bump metal layer 152 and the first under bump metal layer 151 should be different in shape. The opening of the second opening 142 is smaller than the bottom area of the regular bump 170. The regular bumps 170 can be metal bumps such as gold, copper or other conductive metals. The regular bump 170 can be used as an input to the lower number of feet.

The regular bump 170 can be adjacent to the device as shown in Figures 1 and 4. The second side edge 114 of the main body 110, so that the arrangement density of the bumps on the two sides of the main body 110 can be adjusted and changed according to requirements.

Preferably, as shown in FIGS. 3 and 4, the first insulating layer 140 The first opening 141 can be a slot hole, and the extending direction of the slot hole can be the same as the extending direction of the extending portion 162 of the elongated protrusion 160, thereby preventing stress from the extending portion 162. The elongated bump 160 is completely complete at the first opening 141 fracture. The "slot hole" means that the width of the first opening 141 is less than 30% of the length of the first opening 141. Generally, the aspect ratio of the first opening 141 is much larger than the first pad 121. Aspect ratio. The width of the first opening 141 is specifically between 3 and 10 micrometers, and the length of the first opening 141 is specifically between 10 and 80 micrometers, and the opening size of the auxiliary hole 143 is specifically between 3. The shape of the auxiliary hole 143 may be different from the shape of the first opening 141, and the pattern combination of the two may be in an "i" shape.

Therefore, the present invention discloses a bump structure of a semiconductor device, which can In order to achieve the breakthrough of the distance between the conventional bumps, the number of single-sided bumps can be increased to achieve the optimization of the micro-pitch bumps of the semiconductor device, and the elongated bumps can be arranged at a fine pitch, and the extension of the elongated bumps does not The skewing avoids short-circuiting of the elongated bumps and maintains the correctness of the joint position of the elongated bumps, thereby avoiding the weakening of the bonding force of the elongated bumps on the external circuit board at the extension portions thereof.

What has been disclosed above is only the preferred embodiment of the present invention, of course not The scope of the invention is defined by the scope of the invention, and the equivalents of the invention are intended to be included within the scope of the invention.

100‧‧‧Bump structure of semiconductor devices

110‧‧‧Device body

111‧‧‧ joint surface

112‧‧‧ lines

113‧‧‧ first side

121‧‧‧First pad

130‧‧‧Auxiliary pads

140‧‧‧First insulation

141‧‧‧ first opening

143‧‧‧Auxiliary hole

144‧‧‧ Groove

151‧‧‧First under bump metal layer

153‧‧ dent

160‧‧‧Slim bumps

161‧‧‧Bumps

162‧‧‧Extension

163‧‧‧ root

180‧‧‧Second insulation

Claims (11)

A bump structure of a semiconductor device, comprising: a device body having a bonding surface and a plurality of lines on the bonding surface; at least one first bonding pad disposed on the bonding surface; at least one auxiliary pad a first insulating layer is formed on the bonding surface, and the first insulating layer has a first opening and an auxiliary hole for respectively exposing the first bonding a pad and the auxiliary pad; at least one first under bump metal layer is formed on the first insulating layer, and the first under bump metal layer is respectively connected to the auxiliary hole via the first opening and the auxiliary hole a solder pad and the auxiliary pad; and at least one elongated bump is disposed on the first under bump metal layer, the elongated bump has a bump portion and an extension portion, wherein the bump portion has a bump portion The portion is located on the first bonding pad, the extending portion is connected to the bump portion and located on the first insulating layer, and the length of the extending portion of the elongated bump is not less than the length of the protruding portion of the elongated bump Eighty percent, and the extension of the elongated bump is covered The auxiliary pad and having a root portion, the root system of the auxiliary hole is located, to plant connected to the auxiliary pad. The bump structure of the semiconductor device of claim 1, wherein the device main system has a first side, the elongated bump is adjacent to the first side, and the extension is relative to the The bump portion is further away from the first side. The bump structure of the semiconductor device of claim 1, wherein the auxiliary pad is a separate pad having a size smaller than the first pad. The bump structure of the semiconductor device of claim 1, wherein the lines pass through a gap between the first pad and the auxiliary pad. The bump structure of the semiconductor device of claim 4, wherein the first insulating layer is formed with a groove on the upper surface between the first pad and the auxiliary pad to make the first protrusion The underlying metal layer has corresponding indentations. The bump structure of the semiconductor device of claim 1, further comprising a second insulating layer formed between the bonding surface and the first insulating layer and covering the periphery of the first bonding pad, The lines and the periphery of the auxiliary pad, and the thickness of the second insulating layer is less than the thickness of the first insulating layer. The bump structure of the semiconductor device according to any one of claims 1 to 6, wherein the elongated bumps are plural, and the bump pitch is 27 micrometers or less, and the length of the elongated bumps is The elongated bumps have a width between 8 microns and 15 microns and the elongate bumps have a height between 2 microns and 50 microns. The bump structure of the semiconductor device of claim 1, further comprising: at least one second bonding pad disposed on the bonding surface, the first insulating layer further having a second opening, The second solder pad is exposed; at least one second under bump metal layer is formed on the first insulating layer, and the second under bump metal layer is connected to the second solder via the second opening a pad; and at least one regular bump is disposed on the metal layer of the second bump. The bump structure of the semiconductor device of claim 8, wherein the device main system further has a second side opposite to the first side, the regular bump being adjacent to the second side . The bump structure of the semiconductor device of claim 1, wherein the first opening of the first insulating layer is a slot hole, and the extending direction of the slot hole is coupled to the elongated bump The extension direction of the extension is the same. The bump structure of the semiconductor device of claim 10, wherein the first opening has a width of 3 to 10 μm, and the first opening has a length of 10 to 80 μm. The opening size of the auxiliary holes is between 3 x 3 and 10 x 10 square microns.