TW201705239A - Methods for forming metal electrodes on silicon surfaces of opposite polarity - Google Patents

Methods for forming metal electrodes on silicon surfaces of opposite polarity Download PDF

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TW201705239A
TW201705239A TW105117532A TW105117532A TW201705239A TW 201705239 A TW201705239 A TW 201705239A TW 105117532 A TW105117532 A TW 105117532A TW 105117532 A TW105117532 A TW 105117532A TW 201705239 A TW201705239 A TW 201705239A
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layer
region
substrate
metal
plating
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理查 魯塞爾
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愛美科公司
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells

Abstract

A method is provided for concurrently forming a first metal electrode on an n-type region of a silicon substrate and a second metal electrode on a p-type region of the silicon substrate. The method comprises providing a silicon substrate comprising an n-type region and a p-type region, wherein the n-type region is exposed at a first substrate surface in a first area and wherein the p-type region is exposed at a second substrate surface in a second area; depositing an initial Ni layer on the substrate simultaneously in the first area and in the second area by performing a Ni immersion plating process; and depositing a further metal layer on the initial Ni layer in the first area and in the second area by performing an electroless metal plating process or by performing an immersion metal plating process.

Description

一種在矽的相反極性表面上形成金屬電極的方法 Method for forming a metal electrode on a reverse polarity surface of tantalum

本發明係關於半導體處理之領域。更具體言之,本發明係關於用於並行地或甚至同時在一矽基板之n型區域及p型區域上形成金屬電極之基於鍍覆之方法。此外,本發明係關於用於製造光伏打電池(諸如雙面光伏打電池)之方法,其中金屬電極藉由鍍覆並行地或甚至同時形成於n型矽區域及p型矽區域上,且因此獲得光伏打電池。 This invention relates to the field of semiconductor processing. More specifically, the present invention relates to a plating-based method for forming metal electrodes on n-type regions and p-type regions of a germanium substrate in parallel or even simultaneously. Furthermore, the present invention relates to a method for manufacturing a photovoltaic cell, such as a double-sided photovoltaic cell, wherein the metal electrode is formed on the n-type germanium region and the p-type germanium region in parallel by plating or even simultaneously, and thus Get a photovoltaic battery.

光伏打產業之兩個重要目的係改良光伏打電池及模組效率並降低電池及模組製作成本。旨在改良光伏打電池及模組效率之一可能途徑係使用雙面光伏打電池。旨在降低電池及模組製作成本之一可能途徑係使用較便宜金屬化材料作為基於銀(Ag)膏之傳統金屬化方法之一替代物。 Two important objectives of the photovoltaic industry are to improve photovoltaic cell and module efficiency and reduce battery and module manufacturing costs. One of the possible ways to improve the efficiency of photovoltaic cells and modules is to use double-sided photovoltaic cells. One possible way to reduce the cost of battery and module fabrication is to use less expensive metallized materials as an alternative to traditional metallization methods based on silver (Ag) paste.

用於形成矽光伏打電池之金屬電極的基於Ag膏之金屬化之一已知替代物係基於Ni/Cu之金屬化。在此方法中,使用一薄鎳(Ni)層以將一低接觸電阻提供至低摻雜矽區域,作為主導體(銅(Cu))之一擴散障壁且作為用於形成Cu層之一晶種層。使用Cu層以提供一良好導電性及(因此)金屬電極之一低電阻。一典型程序流程包括:將一介電層(例如,一抗反射塗層)提供於整個矽表面上方;局部地移除該介電層,藉此在欲提供金屬接觸件之位置處暴露下伏矽表面;及藉由金屬 鍍覆在經暴露矽區域處提供金屬接觸件。用於沈積此Ni/Cu堆疊之常見方法係光誘導鍍覆、電鍍及場誘導鍍覆。此等方法之一缺點係其等需要矽基板之電接觸且其等需要一外部電流或電壓源及/或受控制照明。為沈積Ni層,可使用「無電鍍覆」。例如,在無電鍍覆中,可使用自催化化學鍍覆技術以例如藉由使用一水溶液中無需施加一外部電力之化學反應來沈積一鎳或鎳合金層。然而,一無電鍍覆程序之一缺點係其歸因於非均勻成核及Ni優先鍍覆於最具導電性區域上之傾向而導致一不良厚度均勻性。亦為將Cu層沈積於Ni晶種層之頂部上,可使用無電鍍覆。然而,無電Cu鍍覆係極慢的(例如,比電鍍慢十倍),且需要更多浴更新,從而導致廢料之產生增加。 One of the known alternatives to Ag-based metallization for forming metal electrodes for tantalum photovoltaic cells is based on Ni/Cu metallization. In this method, a thin nickel (Ni) layer is used to provide a low contact resistance to the low doped germanium region as a diffusion barrier of the main conductor (copper (Cu)) and as a crystal for forming the Cu layer. Layer. The Cu layer is used to provide a good electrical conductivity and, therefore, a low resistance of one of the metal electrodes. A typical process flow includes: providing a dielectric layer (eg, an anti-reflective coating) over the entire surface of the crucible; locally removing the dielectric layer to expose the underlying portion where the metal contact is to be provided矽 surface; and by metal The plating provides a metal contact at the exposed crucible region. Common methods for depositing this Ni/Cu stack are photoinduced plating, electroplating, and field induced plating. One of the disadvantages of such methods is that they require electrical contact with the substrate and they require an external current or voltage source and/or controlled illumination. To deposit the Ni layer, "electroless plating" can be used. For example, in electroless plating, an autocatalytic electroless plating technique can be used to deposit a nickel or nickel alloy layer, for example, by using a chemical reaction in an aqueous solution without applying an external power. However, one of the disadvantages of an electroless plating process is its poor thickness uniformity due to the tendency of non-uniform nucleation and Ni preferential plating on the most conductive regions. Also for depositing a Cu layer on top of the Ni seed layer, electroless plating can be used. However, electroless Cu plating is extremely slow (eg, ten times slower than plating) and requires more bath renewals, resulting in increased waste generation.

由Jiun-Hua Guo等人在Solar Energy Materials & Solar Cells 86(2005年)第485至498頁之「Metallization improvement on fabrication of interdigitated backside and double sided buried contact solar cells」中描述用於基於鍍覆表面之浸漬氯化鈀活化將一鎳層成核於磷及硼擴散接觸區域兩者上之一程序。然而,此方法需要用於表面活化之一額外步驟。此外,使用鈀導致製作成本增加。使用此方法,亦可難以避免虛鍍覆(spurious plating)或假鍍覆(ghost plating)。 It is described in "Metallization improvement on fabrication of interdigitated backside and double sided buried contact solar cells" by Jiun-Hua Guo et al., Solar Energy Materials & Solar Cells 86 (2005), pp. 485-498. Impregnation of palladium chloride activates a process in which a nickel layer is nucleated on both the phosphorus and boron diffusion contact regions. However, this method requires an additional step for surface activation. In addition, the use of palladium leads to an increase in manufacturing costs. With this method, it is also difficult to avoid spurious plating or ghost plating.

本發明之實施例之一目的係提供用於並行地在一矽基板之n型區域及p型區域上形成金屬電極之良好且有效的方法。 It is an object of embodiments of the present invention to provide a good and efficient method for forming metal electrodes on an n-type region and a p-type region of a germanium substrate in parallel.

上述目的係藉由根據本發明之一方法而完成。 The above object is achieved by a method according to the invention.

本發明之實施例之一優點係提供一種用於藉由執行一鍍覆程序並行地(例如,同時)在一矽基板之n型區域及p型區域上形成金屬電極(諸如以形成具有一良好厚度均勻性之金屬電極)的方法。 An advantage of an embodiment of the present invention is to provide a metal electrode (such as to form a good one) on a n-type region and a p-type region of a germanium substrate in parallel (for example, simultaneously) by performing a plating process. Method of thickness uniformity of metal electrodes).

本發明之實施例之一優點係提供一種用於藉由執行一鍍覆程序並行地(例如,同時)在一矽基板之n型區域及p型區域上形成金屬電極 的方法,其中金屬電極可無銅(Cu)。 An advantage of an embodiment of the present invention is to provide a metal electrode for forming a metal electrode on an n-type region and a p-type region of a germanium substrate in parallel (for example, simultaneously) by performing a plating process. The method wherein the metal electrode is free of copper (Cu).

本發明之實施例之一優點係提供一種用於藉由執行一鍍覆程序並行地(例如,同時)在一矽基板之n型區域及p型區域上形成金屬電極的方法,其中相比於用於形成金屬電極之已知方法,可降低成本。 An advantage of an embodiment of the present invention is to provide a method for forming a metal electrode on an n-type region and a p-type region of a germanium substrate in parallel (for example, simultaneously) by performing a plating process, wherein Known methods for forming metal electrodes can reduce costs.

本發明之實施例之一優點係提供一種用於藉由執行一鍍覆程序並行地(例如,同時)在一矽基板之n型區域及p型區域上形成金屬電極而無需在該鍍覆程序期間將一電接觸件或一實體接觸件提供至該基板及/或無需在該鍍覆程序期間提供受控制照明的方法。 An advantage of an embodiment of the present invention is to provide a method for forming a metal electrode on an n-type region and a p-type region of a germanium substrate in parallel (for example, simultaneously) by performing a plating process without the need for the plating process. An electrical contact or a physical contact is provided to the substrate during the process and/or a method of providing controlled illumination during the plating process is not required.

在一第一態樣中,本發明之實施例係關於一種用於並行地(例如,同時)在一矽基板之一n型區域上形成一第一金屬電極且在該矽基板之一p型區域上形成一第二金屬電極的方法。此方法包括提供包括一矽基板之一基板,該矽基板包括一n型區域及一p型區域,其中該n型區域暴露於一基板表面處之一第一區域中,且其中該p型區域曝露於一基板表面處之一第二區域中。該方法進一步包括:藉由執行一鎳(Ni)浸漬鍍覆程序而將一初始鎳(Ni)層同時沈積於該基板表面上之該第一區域及該第二區域中;及藉由執行一無電金屬鍍覆程序或藉由執行一浸漬金屬鍍覆程序或兩者之一組合而將一進一步金屬層沈積於該第一區域及該第二區域中之該初始鎳(Ni)層上。 In a first aspect, embodiments of the present invention are directed to a method for forming a first metal electrode on one of n-type regions of a germanium substrate in parallel (eg, simultaneously) and p-type one of the germanium substrates A method of forming a second metal electrode on a region. The method includes providing a substrate including a substrate including an n-type region and a p-type region, wherein the n-type region is exposed to a first region at a substrate surface, and wherein the p-type region Exposure to a second region at the surface of a substrate. The method further includes: simultaneously depositing an initial nickel (Ni) layer on the first region and the second region on the surface of the substrate by performing a nickel (Ni) immersion plating process; and by performing a A further metal layer is deposited on the initial nickel (Ni) layer in the first region and the second region by an electroless metal plating process or by performing an immersion metal plating process or a combination of the two.

在根據本發明之實施例之一方法中,沈積該進一步金屬層之該步驟可包括將該進一步金屬層同時沈積於該第一區域及該第二區域中之該初始鎳(Ni)層上。 In a method according to an embodiment of the present invention, the step of depositing the further metal layer may include simultaneously depositing the further metal layer on the initial nickel (Ni) layer in the first region and the second region.

在根據本發明之實施例之一方法中,沈積該進一步金屬層可包括藉由執行一無電鎳鍍覆程序而沈積一進一步鎳層。 In one method in accordance with an embodiment of the present invention, depositing the further metal layer can include depositing a further layer of nickel by performing an electroless nickel plating process.

在根據本發明之實施例之一方法中,沈積該進一步金屬層之該步驟可分別包括以下步驟之一序列:將一進一步金屬層沈積於該第一區域中之該初始鎳層上;藉由執行一鎳浸漬鍍覆程序而將一進一步鎳 層沈積於該第二區域中;及將該進一步金屬層沈積於該第一區域及該第二區域中之該進一步鎳層上。 In a method according to an embodiment of the present invention, the step of depositing the further metal layer may comprise a sequence of one of the following steps: depositing a further metal layer on the initial nickel layer in the first region; Perform a nickel immersion plating process and a further nickel Depositing a layer in the second region; and depositing the further metal layer on the further nickel layer in the first region and the second region.

在根據本發明之實施例之一方法中,沈積該進一步金屬層之該步驟可包括以下步驟之序列:藉由執行一無電鎳鍍覆程序而將一第一進一鎳層沈積於該第一區域中之該初始鎳層上;藉由執行一鎳浸漬鍍覆程序而將一第二進一步鎳層沈積於該第二區域中;及藉由執行一無電鎳鍍覆程序而將一第三進一步鎳層沈積於該第一區域中之該第一進一步鎳層上及該第二區域中之該第二進一步鎳層上。此外,在此方法中,沈積該初始鎳層之該步驟可具有在15秒至60秒之範圍中(例如40秒至50秒,例如30秒)之一程序步驟持續時間。 In a method according to an embodiment of the present invention, the step of depositing the further metal layer may comprise the sequence of: depositing a first nickel layer into the first region by performing an electroless nickel plating process Depositing a second further nickel layer in the second region by performing a nickel immersion plating process; and performing a third electroless nickel plating process to perform a third further nickel A layer is deposited on the first further nickel layer in the first region and on the second further nickel layer in the second region. Moreover, in this method, the step of depositing the initial nickel layer can have a program step duration in the range of 15 seconds to 60 seconds (e.g., 40 seconds to 50 seconds, such as 30 seconds).

在根據本發明之實施例之一方法中,該初始Ni層可例如具有在4奈米與2微米之間的範圍中之一厚度,但本發明之實施例不限於此。 In a method according to an embodiment of the present invention, the initial Ni layer may have, for example, a thickness in a range between 4 nm and 2 μm, but embodiments of the invention are not limited thereto.

在根據本發明之實施例之一方法中,將該進一步金屬層沈積於該初始Ni層上可例如包括藉由執行一無電Ni鍍覆程序而沈積一進一步Ni層或藉由執行一無電Ag鍍覆程序或一浸漬Ag鍍覆程序而沈積一Ag層。 In a method according to an embodiment of the present invention, depositing the further metal layer on the initial Ni layer may include, for example, depositing a further Ni layer by performing an electroless Ni plating process or performing an electroless Ag plating An Ag layer is deposited by a coating process or an immersion Ag plating process.

在根據本發明之實施例之一方法中,可將該第一區域及該第二區域定位於相同基板側處,例如相同基板表面處。在根據本發明之實施例之一方法中,可將該第一區域及該第二區域定位於該基板之相對側(例如,相對表面)處。 In a method according to an embodiment of the invention, the first region and the second region may be positioned at the same substrate side, such as at the same substrate surface. In one method according to an embodiment of the invention, the first region and the second region can be positioned at opposite sides (eg, opposite surfaces) of the substrate.

在根據本發明之實施例之一方法中(其中將該進一步金屬層沈積於該初始Ni層上包括沈積一進一步Ni層),可在該進一步Ni層上提供一可焊接罩蓋層。該可焊接罩蓋層可例如係(例如)具有在150nm與350nm之間的範圍中之一厚度的一薄銀(Ag)層,但本發明之實施例不限於此。可例如藉由執行一Ag浸漬鍍覆程序而將該薄Ag層沈積於該進一步Ni層之頂部上。 In a method according to an embodiment of the present invention, wherein depositing the further metal layer on the initial Ni layer comprises depositing a further Ni layer, a solderable cap layer may be provided on the further Ni layer. The solderable cap layer may, for example, be, for example, a thin silver (Ag) layer having a thickness in a range between 150 nm and 350 nm, although embodiments of the invention are not limited thereto. The thin Ag layer can be deposited on top of the further Ni layer, for example by performing an Ag dip coating process.

提供在該Ni層上之此一薄Ag層之一優點係其可實質上增大該第一金屬電極及該第二金屬電極之導電性。作為一薄Ag層之一替代物,該可焊接罩蓋層可例如係一薄Sn層或一有機罩蓋層。 One of the advantages of providing such a thin Ag layer on the Ni layer is that it substantially increases the conductivity of the first metal electrode and the second metal electrode. As an alternative to a thin Ag layer, the solderable cap layer can be, for example, a thin Sn layer or an organic cap layer.

一種根據本發明之實施例之方法可進一步包括:在已沈積該初始Ni層之後或在已沈積該進一步金屬層之後,(舉例而言)諸如在250℃至400℃之範圍中之一溫度下執行一退火或燒結步驟,藉此減小金屬-矽接觸電阻。 A method according to an embodiment of the present invention may further include, after the initial Ni layer has been deposited or after the further metal layer has been deposited, for example, at a temperature in the range of 250 ° C to 400 ° C An annealing or sintering step is performed whereby the metal-helium contact resistance is reduced.

在根據本發明之實施例之一方法中,提供該基板可包括:提供包括一n型區域及一p型區域之一矽基板;在該矽基板之至少一個表面上提供一介電層;及從該基板之該第一區域及該第二區域中移除該介電層,藉此在該第一區域及該第二區域中暴露該矽基板之一表面。 In a method according to an embodiment of the present invention, the providing the substrate may include: providing a substrate including an n-type region and a p-type region; providing a dielectric layer on at least one surface of the germanium substrate; The dielectric layer is removed from the first region and the second region of the substrate, thereby exposing one surface of the germanium substrate in the first region and the second region.

可在光伏打電池(舉例而言諸如雙面光伏打電池或背部接觸光伏打電池)之一製造程序中有利地使用根據本發明之實施例之用於並行地(例如,同時)在一矽基板之一n型區域上形成一第一金屬電極且在該矽基板之一p型區域上形成一第二金屬電極之一方法。例如,本發明之實施例亦可係關於一種用於製造光伏打電池(舉例而言諸如雙面光伏打電池或背部接觸光伏打電池)之製造方法,其中此製造方法包括根據本發明之第一態樣之實施例並行地在一矽基板之一n型區域上形成一第一金屬電極且在該矽基板之一p型區域上形成一第二金屬電極的一步驟。例如,此製造方法可包括:提供待製造之一光伏打電池之一矽基板;及應用並行地在該矽基板之一n型區域及一p型區域上分別形成第一金屬電極及第二金屬電極的此步驟。 It is advantageous to use in parallel to (eg, simultaneously) a substrate in accordance with an embodiment of the present invention in a manufacturing process of a photovoltaic cell, such as, for example, a double-sided photovoltaic cell or a back-contact photovoltaic cell. A method of forming a first metal electrode on one of the n-type regions and forming a second metal electrode on one of the p-type regions of the germanium substrate. For example, embodiments of the present invention may also be directed to a method of fabricating a photovoltaic cell, such as, for example, a double-sided photovoltaic cell or a back-contact photovoltaic cell, wherein the method of fabrication includes the first in accordance with the present invention The embodiment of the invention in parallel forms a first metal electrode on one of the n-type regions of the germanium substrate and a second metal electrode on one of the p-type regions of the germanium substrate. For example, the manufacturing method may include: providing one of the photovoltaic cells of the photovoltaic cell to be fabricated; and applying the first metal electrode and the second metal respectively on one of the n-type region and the p-type region of the germanium substrate This step of the electrode.

根據本發明之實施例之一方法之一優點係其允許並行地在相反極性之表面上(例如,同時在一矽基板之p摻雜區域之一表面上及在n摻雜區域之一表面上)形成具有一良好厚度均勻性之金屬電極。例如,使用如此項技術中已知之其他鍍覆方法(諸如光誘導鍍覆或場誘 導鍍覆),不可並行地或同時在n型矽區域及p型矽區域上直接沈積一金屬。例如,光誘導鍍覆僅可用於金屬化n型區域且不可用於金屬化p型區域,而場誘導鍍覆僅可用於金屬化p型區域且不可用於金屬化n型區域。 An advantage of one of the methods according to an embodiment of the present invention is that it allows parallelism on surfaces of opposite polarities (e.g., simultaneously on one of the p-doped regions of a germanium substrate and on one of the n-doped regions) A metal electrode having a good thickness uniformity is formed. For example, using other plating methods known in the art (such as light induced plating or field temptation) Guide plating), it is not possible to deposit a metal directly on the n-type germanium region and the p-type germanium region in parallel or simultaneously. For example, photoinduced plating can only be used to metallize n-type regions and not for metallization of p-type regions, while field-induced plating can only be used to metallize p-type regions and not for metallization of n-type regions.

根據本發明之實施例之一方法之一優點係藉由使用用於形成該初始Ni層之一浸漬鍍覆程序,可獲得具有一良好厚度均勻性之該第一區域及該第二區域之一完全覆蓋。藉由憑藉無電鍍覆或浸漬鍍覆沈積一進一步金屬層而加厚該初始Ni層之步驟實質上獨立於下伏於該初始Ni層之該矽基板表面之極性。 An advantage of one of the methods according to an embodiment of the present invention is that one of the first region and the second region having a good thickness uniformity can be obtained by using an immersion plating process for forming the initial Ni layer. Full coverage. The step of thickening the initial Ni layer by depositing a further metal layer by electroless plating or immersion plating is substantially independent of the polarity of the surface of the germanium substrate underlying the initial Ni layer.

根據本發明之實施例之一方法可有利地用於將金屬電極(例如,金屬指狀物)提供至無匯流條光伏打電池。可在完成電池製造程序之後藉由將複數個電導線焊接至金屬電極而使此等無匯流條光伏打電池進一步接觸及/或互連。此等電導線取代一習知光伏打電池之匯流條且經提供以用於從該電池之金屬電極收集一電流。在電池處理之後(例如,在一模組製造程序期間)提供該複數個電導線,舉例而言諸如10個至50個金屬電線。 A method in accordance with an embodiment of the present invention can be advantageously used to provide metal electrodes (e.g., metal fingers) to a busbarless photovoltaic cell. These bus-free photovoltaic cells can be further contacted and/or interconnected by soldering a plurality of electrical leads to the metal electrodes after completion of the battery manufacturing process. These electrical wires replace the bus bars of a conventional photovoltaic cell and are provided for collecting a current from the metal electrode of the cell. The plurality of electrical leads are provided after battery processing (e.g., during a module manufacturing process), such as, for example, 10 to 50 metal wires.

例如,本發明之實施例亦可係關於一種製造一無匯流條光伏打電池之製造方法,其中此製造方法包括根據本發明之第一態樣之實施例並行地在一矽基板之一n型區域上形成一第一金屬電極且在該矽基板之一p型區域上形成一第二金屬電極(諸如)以形成該無匯流條光伏打電池之金屬指狀物的一步驟。 For example, embodiments of the present invention may also be directed to a method of fabricating a bus barless photovoltaic cell, wherein the method of fabrication includes paralleling one of the n-type substrates in accordance with an embodiment of the first aspect of the present invention. Forming a first metal electrode on the region and forming a second metal electrode (such as) on one of the p-type regions of the germanium substrate to form a metal finger of the bus barless photovoltaic cell.

此等無匯流條光伏打電池之一優點係相比於通常具有三個至五個匯流條之「標準」或習知光伏打電池,金屬電極之導電性可更低。因此,具有低於Ag或Cu之一導電性之金屬(諸如Ni)可用於形成無匯流條電池之電極,而無顯著增大金屬化圖案之電阻之一風險。一額外優點係Ni係比Ag或Cu更便宜之一材料。在較佳實施例中,例如藉由浸 漬Ag鍍覆而在該Ni層之頂部上提供一薄Ag層,以使金屬電線能夠焊接至金屬電極且進一步改良金屬電極之導電性。此Ag層之厚度可例如在150nm與350nm之間的範圍中,諸如約250nm。 One advantage of such a bus bar photovoltaic cell is that the conductivity of the metal electrode can be lower compared to a "standard" or conventional photovoltaic cell that typically has three to five bus bars. Therefore, a metal having a conductivity lower than that of Ag or Cu such as Ni can be used to form an electrode of a busbar-free battery without significantly increasing the risk of the resistance of the metallization pattern. An additional advantage is that Ni is one of the materials that is less expensive than Ag or Cu. In a preferred embodiment, for example by dipping Ag plating is applied to provide a thin Ag layer on top of the Ni layer to enable the metal wire to be soldered to the metal electrode and further improve the conductivity of the metal electrode. The thickness of this Ag layer can be, for example, in the range between 150 nm and 350 nm, such as about 250 nm.

替代地,對於此等無匯流條光伏打電池,可使用具有一良好導電性之一金屬(諸如Ag)以形成電極,例如以在一初始Ni層上形成該進一步金屬層,相比於通常具有三個至五個匯流條之「標準」光伏打電池所需之一厚度,該等無匯流條光伏打電池具有一減小的厚度。此一減小的厚度之一優點係其導致一成本降低。 Alternatively, for such a bus bar photovoltaic cell, one of the metals having a good conductivity, such as Ag, may be used to form the electrode, for example to form the further metal layer on an initial Ni layer, as compared to conventional One of the thicknesses required for the "standard" photovoltaic cells of three to five bus bars, the busbarless photovoltaic cells have a reduced thickness. One of the advantages of this reduced thickness is that it results in a cost reduction.

根據本發明之實施例之一方法之一優點係金屬電極可無Cu。已知在具有Ni/Cu電極之光伏打電池中,存在Cu穿透Ni層至下伏矽中之一風險,此可導致裝置降級及電池效率之一降低。無Cu金屬電極之一優點係避免歸因於Cu擴散至下伏矽中而使電池降級之風險,從而導致光伏打電池之一改良的長期可靠性。使用無Cu電極亦可導致一成本降低。 An advantage of one of the methods according to one embodiment of the invention is that the metal electrode can be free of Cu. It is known that in a photovoltaic cell having a Ni/Cu electrode, there is a risk that Cu penetrates into the underlying layer from the Ni layer, which may result in degradation of the device and a decrease in battery efficiency. One of the advantages of the Cu-free metal electrode is to avoid the risk of degradation of the battery due to the diffusion of Cu into the underlying crucible, resulting in improved long-term reliability of one of the photovoltaic cells. The use of a Cu-free electrode can also result in a cost reduction.

根據本發明之實施例之一方法之一優點係可提供金屬電極而無需在鍍覆程序期間將一電接觸件或一實體接觸件提供至該基板且無需在鍍覆程序期間提供受控制照明。 One advantage of one of the methods in accordance with an embodiment of the present invention is that a metal electrode can be provided without the need to provide an electrical contact or a physical contact to the substrate during the plating process and without providing controlled illumination during the plating process.

根據本發明之實施例之一方法之一優點係可在無假鍍覆(例如未將一金屬沈積於該矽表面上之非所要位置處)之情況下提供金屬電極。 One advantage of one of the methods in accordance with an embodiment of the present invention is that the metal electrode can be provided without false plating (e.g., where a metal is not deposited at an undesirable location on the surface of the crucible).

根據本發明之實施例之一方法可有利地用於將金屬電極提供至雙面光伏打電池或背部接觸光伏打電池,但本發明之實施例不限於此。 A method according to an embodiment of the present invention may be advantageously used to provide a metal electrode to a double-sided photovoltaic cell or a back-contact photovoltaic cell, but embodiments of the invention are not limited thereto.

根據本發明之實施例之一方法之一優點係相比於「標準」光伏打電池,可減小光伏打電池遮蔽或屏蔽損耗,此係因為習知匯流條可由可實質上窄於該等匯流條之導電線取代。遮蔽損耗之此減小導致電 池效率之一增大。 One of the advantages of one of the methods according to an embodiment of the present invention is that the photovoltaic cell shielding or shielding loss can be reduced compared to a "standard" photovoltaic cell, since the conventional bus bar can be substantially narrower than the confluence Replace the conductive line of the strip. This reduction in shadow loss results in electricity One of the pool efficiencies increases.

根據本發明之實施例之一方法之一優點係其允許以具有小佔據面積之一相對便宜工具分批處理大數目個晶圓。 One advantage of one of the methods in accordance with an embodiment of the present invention is that it allows a large number of wafers to be processed in batches with relatively inexpensive tools having one of the small footprints.

上文中已描述各個發明態樣之某些目的及優點。當然,應瞭解,根據本發明之任何特定實施例未必可達成所有此等目的或優點。因此,例如,熟習此項技術者將認知,可以達成或最佳化如本文中所教示之一個優點或優點群組而未必達成如本文中所教示或所建議之其他目的或優點的一方式體現或實行本發明。此外,應瞭解,本發明內容僅係一實例且並非旨在限制本發明之範疇。可藉由在結合隨附圖式閱讀時參考以下詳細描述而最佳地理解本發明(關於操作組織及方法兩者)以及其特徵及優點。 Certain objects and advantages of various aspects of the invention have been described above. Of course, it is to be understood that not all such objects or advantages may be achieved in accordance with any particular embodiment of the invention. Thus, for example, those skilled in the art will recognize that a <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; Or the invention is practiced. In addition, it should be understood that the present invention is not intended to limit the scope of the invention. The present invention (with respect to both operational organization and methods), as well as features and advantages thereof, may be best understood by referring to the following detailed description when read in the claims.

在隨附的獨立技術方案及附屬技術方案中闡述本發明之特定態樣及較佳態樣。來自附屬技術方案之特徵視情況可與獨立技術方案之特徵及其他附屬技術方案之特徵組合且不僅僅如技術方案中所明確陳述。 Particular aspects and preferred aspects of the invention are set forth in the accompanying independent technical solutions and the accompanying claims. The features from the subsidiary technical solutions may be combined with the features of the independent technical solutions and the features of other subsidiary technical solutions, and not only as explicitly stated in the technical solutions.

本發明之此等及其他態樣將從後文中所述之實施例顯而易見並參考後文中所述之(若干)實施例進行闡明。 These and other aspects of the invention will be apparent from and elucidated with reference to the <RTIgt;

1‧‧‧第一區域 1‧‧‧First area

2‧‧‧第二區域 2‧‧‧Second area

10‧‧‧矽基板 10‧‧‧矽 substrate

11‧‧‧n型區域 11‧‧‧n type area

12‧‧‧p型區域 12‧‧‧p-type area

13‧‧‧介電層 13‧‧‧Dielectric layer

20‧‧‧基板 20‧‧‧Substrate

21‧‧‧基板表面 21‧‧‧ substrate surface

22‧‧‧基板表面 22‧‧‧Substrate surface

31‧‧‧第一金屬電極 31‧‧‧First metal electrode

32‧‧‧第二金屬電極 32‧‧‧Second metal electrode

33‧‧‧初始鎳Ni層 33‧‧‧Initial Nickel Ni Layer

34‧‧‧進一步金屬層/進一步Ni層 34‧‧‧ Further metal layer/further Ni layer

100‧‧‧方法 100‧‧‧ method

101‧‧‧步驟 101‧‧‧Steps

102‧‧‧步驟 102‧‧‧Steps

103‧‧‧步驟 103‧‧‧Steps

200‧‧‧程序 200‧‧‧ procedure

201‧‧‧步驟 201‧‧‧Steps

202‧‧‧步驟 202‧‧‧Steps

203‧‧‧步驟 203‧‧‧Steps

204‧‧‧步驟 204‧‧‧Steps

205‧‧‧步驟 205‧‧‧Steps

206‧‧‧步驟 206‧‧‧Steps

401‧‧‧步驟 401‧‧‧ steps

402‧‧‧步驟 402‧‧‧Steps

403‧‧‧步驟 403‧‧‧Steps

圖1示意地展示根據本發明之實施例之用於並行地在一矽基板之n型區域之一表面及p型區域之一表面上形成金屬電極的一例示性方法之程序步驟。 1 is a schematic illustration of the procedural steps of an exemplary method for forming metal electrodes on one surface of one of the n-type regions and one of the p-type regions of a germanium substrate in parallel, in accordance with an embodiment of the present invention.

圖2示意地展示根據本發明之實施例之用於製造一雙面光伏打電池之一例示性製造程序之程序步驟,其中使用一基於鍍覆之金屬化方法而提供該電池之前側及該電池之後側處之金屬電極。 2 is a schematic diagram showing the procedural steps of an exemplary manufacturing process for fabricating a double-sided photovoltaic cell in accordance with an embodiment of the present invention, wherein a front side of the cell and the battery are provided using a metallization process based on plating Metal electrode at the back side.

圖3展示根據p型矽區域及n型矽區域上之一初始浸漬鍍覆Ni層厚度而變化的藉由無電鍍覆提供於該初始Ni層上的Ni層之經量測厚度之 一第一實例,以用於繪示根據本發明之實施例之一方法之特徵及態樣。 3 shows the measured thickness of the Ni layer provided on the initial Ni layer by electroless plating, which varies according to the thickness of the initial immersion plating Ni layer on one of the p-type germanium region and the n-type germanium region. A first example for illustrating features and aspects of a method in accordance with an embodiment of the present invention.

圖4展示根據p型矽區域及n型矽區域上之一初始浸漬鍍覆Ni層厚度而變化的藉由無電鍍覆提供於該初始Ni層上的Ni層之經量測厚度之一第二實例,以用於繪示根據本發明之實施例之一方法之特徵及態樣。 4 shows one of the measured thicknesses of the Ni layer provided on the initial Ni layer by electroless plating, which varies according to the thickness of the initial immersion plating Ni layer on one of the p-type germanium region and the n-type germanium region. Examples for illustrating features and aspects of a method in accordance with an embodiment of the present invention.

圖5展示根據浸漬Ni鍍覆浴中之NH4F濃度而變化的藉由根據本發明之實施例之一方法提供於n型區域上的金屬電極之焊接垂片黏著性量測之結果。 Figure 5 shows the results of solder tab adhesion measurements of metal electrodes provided on an n-type region by a method in accordance with one embodiment of the present invention, varying from the concentration of NH 4 F in the immersion Ni plating bath.

圖6展示根據浸漬Ni鍍覆浴中之NH4F濃度而變化的藉由根據本發明之實施例之一方法提供於p型區域上的金屬電極之焊接垂片黏著性量測之結果。 Figure 6 shows the results of solder tab adhesion measurements of metal electrodes provided on a p-type region by a method according to one embodiment of the present invention, varying from the concentration of NH 4 F in the immersion Ni plating bath.

圖7示意地展示具有暴露於一第一基板表面處之一第一區域中之一n型區域及暴露於一第二基板表面處之一第二區域中之一p型區域(該第一區域及該第二區域經定位於該基板之一相對側處)的一基板之一截面之一實例,以繪示本發明之實施例之特徵及性質。 Figure 7 shows schematically a p-type region having one of the n-type regions exposed in a first region at a first substrate surface and one of the second regions exposed at a second substrate surface (the first region And an example of a cross-section of a substrate of the second region positioned at an opposite side of the substrate to illustrate features and properties of embodiments of the present invention.

圖8示意地展示具有暴露於一第一基板表面處之一第一區域中之一n型區域及暴露於之一第二基板表面處之一第二區域中之一p型區域(該第一區域及該第二區域經定位於該基板之一相同側處)的一基板之一截面之一實例,以繪示本發明之實施例之特徵及性質。 Figure 8 is a schematic illustration of one p-type region having one of the first regions in a first region exposed to a first substrate surface and one of the second regions exposed to one of the second substrate surfaces (the first An example of a cross section of a substrate of the region and the second region positioned at the same side of the substrate to illustrate features and properties of embodiments of the present invention.

圖9示意地展示在藉由根據本發明之實施例之一方法形成一第一金屬電極及一第二金屬電極之後的圖7之結構。 Figure 9 is a schematic illustration of the structure of Figure 7 after forming a first metal electrode and a second metal electrode by a method in accordance with an embodiment of the present invention.

圖10示意地展示在藉由根據本發明之實施例之一方法形成一第一金屬電極及一第二金屬電極之後的圖8之結構。 Figure 10 is a schematic illustration of the structure of Figure 8 after forming a first metal electrode and a second metal electrode by a method in accordance with an embodiment of the present invention.

圖11繪示根據本發明之實施例之另一例示性方法。 11 illustrates another exemplary method in accordance with an embodiment of the present invention.

在申請專利範圍中之任何參考符號不應被解釋為限制本發明之 範疇。 Any reference signs in the patent application should not be construed as limiting the invention. category.

在不同圖式中,相同參考符號指代相同或類似元件。 In the different figures, the same reference symbols refer to the same or similar elements.

圖式僅係示意性且非限制性。在圖式中,出於闡釋性目的可放大且不按比例繪製一些元件之大小。 The drawings are merely illustrative and not limiting. In the drawings, the size of some elements may be exaggerated and not to scale.

將參考特定實施例且參考某些圖式描述本發明,但本發明不限於此且僅受申請專利範圍限制。所述圖式係僅示意性的且非限制性的。在圖式中,出於繪示目的可放大且不按比例繪製一些元件之大小。尺寸及相對尺寸不對應於本發明之實踐之實際減小程度。 The invention will be described with reference to a particular embodiment and with reference to certain drawings, but the invention is not limited thereto The drawings are only schematic and are non-limiting. In the drawings, the size of some elements may be exaggerated and not drawn to scale. The dimensions and relative dimensions do not correspond to the actual degree of reduction of the practice of the invention.

此外,在描述及申請專利範圍中之術語第一、第二及類似者用於區分類似元件且未必用於描述在時間、空間、排序或以任何其他方式之一序列。應了解,如此使用之術語在適當境況下可互換且本文中所述之本發明之實施例能夠以除本文中所述或所繪示以外之其他序列操作。 In addition, the terms first, second, and the like are used in the context of the description and the scope of the claims, and are not intended to be used to describe a sequence in time, space, order, or in any other manner. It is understood that the terms so used are interchangeable under the appropriate circumstances and the embodiments of the invention described herein are capable of operation in other sequences than those described or illustrated herein.

此外,在描述及申請專利範圍中之術語頂部、底部、上方、下方及類似者用於描述目的且未必用於描述相對位置。應了解,如此使用之術語在適當境況下可互換且本文中所述之本發明之實施例能夠以除本文中所述或所繪示以外之其他定向操作。 Moreover, the terms top, bottom, over, under, and the like in the description and claims are for the purpose of description and are not necessarily used to describe the relative position. It is understood that the terms so used are interchangeable under the appropriate circumstances and the embodiments of the invention described herein are capable of operation in other aspects than those described or illustrated herein.

應注意,在申請專利範圍中使用之術語「包括」不應被解釋為限於此後所列之含義;其不排除其他元件或步驟。因此,術語「包括」應被解釋為指定如所提及之經陳述特徵、整數、步驟或組件之存在,但不排除存在或添加一或多個其他特徵、整數、步驟或組件或其等之群組。因此,表達「一裝置包括構件A及B」之範疇不應限於僅由組件A及B組成之裝置。此意謂關於本發明,該裝置之相關組件僅係A及B。 It should be noted that the term "comprising", used in the context of the claims, is not to be construed as limited. Thus, the term "comprise" or "an" Group. Therefore, the scope of expressing "a device including components A and B" should not be limited to devices consisting only of components A and B. This means that with respect to the invention, the relevant components of the device are only A and B.

貫穿本說明書對「一項實施例」或「一實施例」之引用意謂結 合該實施例所述之一特定特徵、結構或特性包含於本發明之至少一項實施例中。因此,在貫穿本說明書之各處出現片語「在一項實施例中」或「在一實施例中」未必全部指代相同實施例,但可能指代相同實施例。此外,如一般技術者從本發明將明白,可在一或多項實施例中以任何合適方式組合特定特徵、結構或特性。 Reference throughout the specification to "an embodiment" or "an embodiment" means a knot A particular feature, structure, or characteristic described in connection with the embodiments is included in at least one embodiment of the invention. The appearances of the phrase "in an embodiment" or "in an embodiment" are not necessarily all referring to the same embodiment, but may refer to the same embodiment. In addition, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

類似地,應瞭解,在本發明之例示性實施例之描述中,為簡化本發明及協助理解各個發明態樣之一或多者,有時將本發明之各個特徵集合在本發明之一單一實施例、圖或描述中。然而,本發明之此方法不應被解釋為反映以下意向:本發明需要多於每一請求項中明確敘述之特徵。而是,如以下申請專利範圍反映,發明態樣在於少於一單一前述所揭示實施例之全部特徵。因此,繼實施方式後之申請專利範圍明確併入此實施方式中,其中每一請求項獨立作為本發明之一單獨實施例。 Similarly, in the description of the exemplary embodiments of the present invention, in order to simplify the present invention and to assist in understanding one or more of the various aspects of the present invention, various features of the present invention are sometimes combined in a single In the examples, figures or description. However, this method of the invention should not be construed as reflecting the following intent: the invention requires more features than those explicitly recited in each claim. Rather, as the following claims reflect, the invention is characterized by a less than a single feature of the single disclosed embodiments. Therefore, the scope of the patent application following the embodiments is explicitly incorporated into this embodiment, each of which is independently a separate embodiment of the invention.

此外,雖然本文中所述之一些實施例包含一些但並非其他實施例中所包含之其他特徵,但不同實施例之特徵之組合旨在落於本發明之範疇內且形成不同實施例,如此項技術者將理解。例如,在以下申請專利範圍中,可以任何組合使用任何所主張實施例。 In addition, although some of the embodiments described herein include some but not other features included in other embodiments, combinations of features of different embodiments are intended to fall within the scope of the invention and form different embodiments. The technician will understand. For example, in the scope of the following claims, any of the claimed embodiments can be used in any combination.

在本文中所提供之描述中,闡述眾多具體細節以便提供本發明及如何可在特定實施例中實踐本發明之一徹底理解。然而,應了解,可在無此等具體細節之情況下實踐本發明之實施例。在其他例項中,未詳細展示熟知方法、結構及技術以免模糊對此描述之一理解。 In the description provided herein, numerous specific details are set forth in the description However, it is understood that the embodiments of the invention may be practiced without the specific details. In other instances, well-known methods, structures, and techniques are not shown in detail to avoid obscuring the understanding of the description.

在下文中所提供之實施方式之內容脈絡中,一光伏打電池或一光伏打模組之前表面或前側係經調適用於定向成朝向一光源且因此用於接收照明之表面或側。在雙面光伏打電池或模組之情況中,兩個表面經調適以接收照射光。在此情況中,前表面或前側係經調適用於接收光或照明之最大部分之表面或側。一光伏打電池或一光伏打模組之 背表面、後表面、背側或後側係與前表面或前側相對的表面或側。 In the context of the embodiments provided below, a front surface or front side of a photovoltaic cell or a photovoltaic module is adapted to be oriented toward a source and thus for receiving a surface or side of illumination. In the case of a double-sided photovoltaic cell or module, the two surfaces are adapted to receive illumination. In this case, the front or front side is adapted to receive the surface or side of the largest portion of the light or illumination. a photovoltaic cell or a photovoltaic module The back surface, the back surface, the back side or the back side is a surface or side opposite the front surface or the front side.

在下文中所提供之實施方式之內容脈絡中,一匯流條係用於從提供於一光伏打電池之一表面上之複數個金屬接觸件或金屬電極收集一電流(例如,在照明下產生之一電流)的導電帶。一匯流條經提供用於與一外部電導線直接電連接。一匯流條通常從電池上之較細或較窄金屬接觸件(亦稱為金屬指狀物)收集電流。此等較細或較窄金屬接觸件從電池收集一電流並將該電流遞送至匯流條;其等通常並非經提供用於直接電連接至一外部電導線。 In the context of the embodiments provided below, a bus bar is used to collect a current from a plurality of metal contacts or metal electrodes provided on one surface of a photovoltaic cell (eg, one under illumination) Conductive strip of current). A bus bar is provided for direct electrical connection to an external electrical conductor. A bus bar typically collects current from thinner or narrower metal contacts (also known as metal fingers) on the battery. These thinner or narrower metal contacts collect a current from the battery and deliver the current to the bus bar; these are typically not provided for direct electrical connection to an external electrical conductor.

在下文中所提供之實施方式之內容脈絡中,一無匯流條光伏打電池係不具有匯流條之一光伏打電池。一無匯流條光伏打電池通常在該電池之一表面上包括複數個金屬接觸件或金屬電極,但在電池製造之後,該電池不包括用於從該複數個金屬接觸件收集電流之一導電元件。在完成電池處理之後,例如在模組製造期間,將導電元件(舉例而言,諸如導電線)焊接至該複數個金屬接觸件。此等導電元件經提供用於從該複數個金屬電極收集一電流且其等可取代習知匯流條。 In the context of the embodiments provided below, a busbarless photovoltaic cell does not have a photovoltaic cell. A busbarless photovoltaic cell typically includes a plurality of metal contacts or metal electrodes on one surface of the cell, but after the cell is fabricated, the cell does not include a conductive element for collecting current from the plurality of metal contacts. . After the battery processing is completed, for example, during module fabrication, a conductive element, such as, for example, a conductive wire, is soldered to the plurality of metal contacts. The conductive elements are provided for collecting a current from the plurality of metal electrodes and the like can replace the conventional bus bars.

本發明提供一種用於並行地(例如,同時)在具有一良好均勻性之一矽基板上之一n型區域(或若干n型區域)之一表面及一p型區域(或若干p型區域)之一表面上形成金屬電極的方法。在本發明之尤其有利實施例中,此等金屬電極可無銅(Cu)。此外,該方法可基於一鍍覆程序,其中在鍍覆期間無需電接觸或實體接觸至該矽基板,且其中在鍍覆期間無需受控制照明。該方法可與高容量分批處理相容。 The present invention provides a surface and a p-type region (or a plurality of p-type regions) for one of n-type regions (or a plurality of n-type regions) on a substrate having a good uniformity in parallel (for example, simultaneously) A method of forming a metal electrode on one of the surfaces. In a particularly advantageous embodiment of the invention, the metal electrodes may be free of copper (Cu). Moreover, the method can be based on a plating procedure in which no electrical or physical contact is required to the germanium substrate during plating, and wherein no controlled illumination is required during plating. This method is compatible with high volume batch processing.

在一第一態樣中,本發明之實施例提供一種並行地(舉例而言,諸如同時)在一n型矽區域(或若干n型矽區域)之一表面上之一第一區域中(或若干第一區域中)形成一第一金屬電極(或複數個第一金屬電極)且在一p型矽區域(或若干p型矽區域)之一表面上之一第二區域(或若干第二區域)中形成一第二金屬電極(或複數個第二金屬電極)之方法。 In a first aspect, embodiments of the present invention provide a first region in a surface of one of an n-type germanium region (or a plurality of n-type germanium regions) in parallel (for example, such as simultaneously) ( Or a plurality of first regions forming a first metal electrode (or a plurality of first metal electrodes) and a second region (or a plurality of regions) on a surface of one of the p-type germanium regions (or the plurality of p-type germanium regions) A method of forming a second metal electrode (or a plurality of second metal electrodes) in the second region).

圖1示意地繪示根據本發明之實施例之一方法100之程序步驟。該方法包括提供101包括一矽基板之一基板。此矽基板具有暴露於一第一基板表面處之一第一區域中之一n型區域及暴露於一第二基板表面處之一第二區域中之一p型區域。 FIG. 1 schematically illustrates the steps of a method 100 in accordance with an embodiment of the present invention. The method includes providing 101 a substrate comprising a substrate. The germanium substrate has an n-type region exposed in a first region at a surface of the first substrate and a p-type region in a second region exposed at a surface of the second substrate.

圖7及圖8中示意地展示可在本發明之實施例中使用之基板20之實例。圖7展示包括一矽基板10之一基板20之一截面之一實例,該矽基板10具有暴露於一基板表面21處之一第一區域1中之一n型區域11,該矽基板10進一步包括暴露於一基板表面22處之一第二區域2中之一p型區域12。在圖7中所展示之實例中,第一區域1及第二區域2經定位於矽基板10之相對側或相對表面21及22處。圖8展示包括一矽基板10之一基板20之一截面之一實例,該矽基板10具有暴露於一基板表面21處之一第一區域1中之一n型區域11,該矽基板10進一步包括暴露於一基板表面21處之一第二區域2中之一p型區域12。在圖8中所展示之實例中,第一區域1及第二區域2經定位於矽基板10之一相同側或相同表面21處。 An example of a substrate 20 that can be used in embodiments of the present invention is schematically illustrated in Figures 7 and 8. 7 shows an example of a cross section of a substrate 20 including a substrate 10 having an n-type region 11 exposed in a first region 1 at a substrate surface 21, the ruthenium substrate 10 further A p-type region 12 is disclosed that is exposed to one of the second regions 2 at a substrate surface 22. In the example shown in FIG. 7, the first region 1 and the second region 2 are positioned at opposite sides or opposite surfaces 21 and 22 of the ruthenium substrate 10. 8 shows an example of a cross section of a substrate 20 including a substrate 10 having an n-type region 11 exposed in a first region 1 at a substrate surface 21, the ruthenium substrate 10 further A p-type region 12 of one of the second regions 2 exposed at a substrate surface 21 is included. In the example shown in FIG. 8, the first region 1 and the second region 2 are positioned on the same side or the same surface 21 of one of the ruthenium substrates 10.

在其中未暴露n型區域11及p型區域12之區域中,一層13(諸如一介電層)可存在於基板表面21、22上。圖7及圖8展示一單一n型區域及一單一p型區域。然而,本發明之實施例不限於此。在本發明之實施例中,該矽基板可包括在其上同時或並行地形成金屬電極之複數個p型區域及/或複數個n型區域。 In a region where the n-type region 11 and the p-type region 12 are not exposed, a layer 13 such as a dielectric layer may be present on the substrate surfaces 21, 22. Figures 7 and 8 show a single n-type region and a single p-type region. However, embodiments of the invention are not limited thereto. In an embodiment of the invention, the germanium substrate may comprise a plurality of p-type regions and/or a plurality of n-type regions on which metal electrodes are formed simultaneously or in parallel.

圖9及圖10展示如藉由根據本發明之實施例之一方法提供之可在第一區域1中形成一第一金屬電極31且在第二區域2中形成一第二金屬電極32之後獲得之分別對應於圖7及圖8中所繪示之例示性基板的例示性結構。在所展示之實例中,根據本發明之實施例,第一金屬電極31及第二金屬電極32包括藉由Ni浸漬鍍覆形成之一初始Ni層33及該初始Ni層33之頂部上之一進一步金屬層34之一堆疊。 9 and 10 show that a first metal electrode 31 can be formed in the first region 1 and a second metal electrode 32 can be formed in the second region 2, as provided by one of the embodiments of the present invention. The respective structures correspond to the exemplary structures of the exemplary substrates illustrated in FIGS. 7 and 8. In the illustrated example, according to an embodiment of the present invention, the first metal electrode 31 and the second metal electrode 32 include one of an initial Ni layer 33 and a top portion of the initial Ni layer 33 formed by Ni immersion plating. One of the further metal layers 34 is stacked.

在圖1中所繪示之方法中,藉由一浸漬鍍覆程序(其亦稱為伽凡尼置換(galvanic displacement)鍍覆程序)而將一初始鎳(Ni)層33同時沈積102於基板表面或(若干)基板表面上之第一區域1及第二區域2中。然後,藉由將一進一步金屬層34沈積103於初始Ni層33上而加厚初始Ni層33。特定言之,在根據本發明之實施例之一方法中,沈積103該進一步金屬層之步驟可包括將該進一步金屬層同時沈積於該第一區域及該第二區域中之初始Ni層上。 In the method illustrated in FIG. 1, an initial nickel (Ni) layer 33 is simultaneously deposited 102 on the substrate by an immersion plating process (also referred to as a galvanic displacement plating process). The first region 1 and the second region 2 on the surface or surface(s) of the substrate. Then, the initial Ni layer 33 is thickened by depositing 103 a further metal layer 34 on the initial Ni layer 33. In particular, in one method in accordance with an embodiment of the present invention, the step of depositing the further metal layer may include simultaneously depositing the further metal layer on the initial Ni layer in the first region and the second region.

然而,在根據本發明之實施例之另一方法中,沈積103該進一步金屬層之步驟可在複數個步驟中執行,其中至少一第一此步驟旨在將該進一步金屬層主要沈積於該第一區域中之初始Ni層上,且至少一第二此步驟旨在將該進一步金屬層主要沈積於該第二區域中之初始Ni層上。例如,沈積103該進一步金屬層之步驟可包括將該進一步金屬層沈積於該第一區域中之初始鎳層上,(例如)而未將任何進一步金屬沈積於該第二區域中,(例如)而未將該進一步金屬之任何顯著或實質量沈積於該第二區域中。此後接著可例如藉由執行一鎳浸漬鍍覆程序(例如藉由重複類似於或相同於應用於沈積該初始鎳層之一鎳鍍覆程序)而將一進一步鎳層沈積於該第二區域中,且接著將該進一步金屬層沈積於該第一區域中及該第二區域中之初始鎳層及/或進一步鎳層上。 However, in another method in accordance with an embodiment of the present invention, the step of depositing the further metal layer may be performed in a plurality of steps, wherein at least one of the first steps is directed to depositing the further metal layer primarily in the first On the initial Ni layer in a region, and at least a second such step is directed to depositing the further metal layer primarily on the initial Ni layer in the second region. For example, the step of depositing the further metal layer can include depositing the further metal layer on the initial nickel layer in the first region, for example, without depositing any further metal in the second region, for example No significant or substantial mass of the further metal is deposited in the second region. Thereafter, a further nickel layer can be deposited in the second region, for example, by performing a nickel immersion plating process (eg, by repeating a nickel plating procedure similar to or the same as applied to depositing the initial nickel layer). And subsequently depositing the further metal layer on the initial nickel layer and/or the further nickel layer in the first region and in the second region.

沈積103進一步金屬層34(例如,一進一步Ni層或一銀(Ag)層)可藉由執行一無電金屬鍍覆程序(例如,一無電Ni鍍覆程序或一無電Ag鍍覆程序)而完成。 Depositing further metal layer 34 (eg, a further Ni layer or a silver (Ag) layer) can be accomplished by performing an electroless metal plating process (eg, an electroless Ni plating process or an electroless Ag plating process) .

在其他實施例中,沈積103進一步金屬層34(例如,Ag層)可藉由執行一浸漬金屬鍍覆程序(例如,一浸漬Ag鍍覆程序)而完成。 In other embodiments, depositing 103 further metal layer 34 (eg, an Ag layer) can be accomplished by performing an immersion metal plating process (eg, an immersion Ag plating process).

在其他實施例中,沈積103進一步金屬層34(例如,鎳層或銀層)可藉由執行至少一個無電金屬鍍覆程序及至少一個浸漬鍍覆程序而完 成。 In other embodiments, depositing a further metal layer 34 (eg, a nickel layer or a silver layer) may be performed by performing at least one electroless metal plating process and at least one immersion plating process. to make.

在其中進一步金屬層34係一進一步Ni層之實施例中,該進一步Ni層34可覆蓋有一額外層(諸如一薄浸漬鍍覆Ag或Sn層或一有機罩蓋層),例如以改良可焊接性。用例如具有在150nm與350nm之間的範圍中之一厚度的一薄浸漬鍍覆Ag層覆蓋進一步Ni層34之一優點係其導致第一金屬電極及第二金屬電極之一增大的導電性。在其中進一步金屬層34係一Ag層之實施例中,無需提供一額外層以改良可焊接性或改良第一金屬電極及第二金屬電極之導電性。 In embodiments in which the further metal layer 34 is a further Ni layer, the further Ni layer 34 may be covered with an additional layer (such as a thin dip-plated Ag or Sn layer or an organic cap layer), for example to improve solderability. Sex. One of the advantages of covering the further Ni layer 34 with, for example, a thin immersion-plated Ag layer having a thickness in a range between 150 nm and 350 nm is that it results in increased conductivity of one of the first metal electrode and the second metal electrode. . In the embodiment in which the further metal layer 34 is an Ag layer, it is not necessary to provide an additional layer to improve solderability or to improve the conductivity of the first metal electrode and the second metal electrode.

根據本發明之實施例之一方法可有利地用於將金屬電極提供至無匯流條光伏打電池,其中在電池製造之後將多個導電線連接至(例如,焊接至)金屬電極。 A method in accordance with an embodiment of the present invention can be advantageously used to provide a metal electrode to a busbarless photovoltaic cell wherein a plurality of electrically conductive wires are connected (e.g., soldered) to the metal electrode after fabrication of the cell.

因此,本發明之實施例可係關於一種用於製造一無匯流條光伏打電池之製造方法,其中此製造方法包括根據本發明之實施例在一矽基板之一n型區域上形成一第一金屬電極且在該矽基板之一p型區域上形成一第二金屬電極(舉例而言,諸如)以形成該無匯流條光伏打電池之金屬指狀物的一步驟。 Accordingly, embodiments of the present invention may be directed to a method of fabricating a busbarless photovoltaic cell, wherein the method of fabricating includes forming a first on an n-type region of a germanium substrate in accordance with an embodiment of the present invention. A metal electrode and a second metal electrode (for example, such as) formed on one of the p-type regions of the germanium substrate to form a metal finger of the bus barless photovoltaic cell.

使用此方法,金屬電極(例如,金屬指狀物)之所需導電性可低於通常具有三個至五個匯流條之傳統光伏打電池中之導電性。因此,具有低於Ag或Cu之一導電性之金屬(諸如Ni)可用於形成金屬電極而無增大電池之串聯電阻之一風險且無降低電池之填充因數之一風險。 Using this method, the desired conductivity of a metal electrode (e.g., metal fingers) can be lower than that of a conventional photovoltaic cell typically having three to five bus bars. Therefore, a metal having a conductivity lower than that of Ag or Cu, such as Ni, can be used to form the metal electrode without increasing the risk of one of the series resistances of the battery without risking a decrease in the fill factor of the battery.

在根據本發明之實施例之一方法中,首先可藉由一浸漬Ni鍍覆或伽凡尼置換鍍覆而沈積102一初始Ni層33,參見例如圖1中之步驟102。例如,此初始Ni層33可係一薄且均勻的初始Ni層。此非接觸鍍覆方法允許在經暴露n型矽表面及p型矽表面上同時鍍覆。鍍覆程序可進行直至鍍覆所有經暴露矽,即,直至所有經暴露矽表面覆蓋有一Ni層。該程序可係自我限制的。因此,藉由鍍覆例如足以完全覆蓋兩個 表面極性之一足夠時間(舉例而言,諸如2分鐘至10分鐘),可將一均勻初始Ni層沈積於n型表面及p型表面兩者上,其中該層完全覆蓋經暴露表面。 In one method in accordance with an embodiment of the present invention, an initial Ni layer 33 may first be deposited 102 by a dip Ni plating or a Galvani displacement plating, see for example step 102 in FIG. For example, the initial Ni layer 33 can be a thin and uniform initial Ni layer. This non-contact plating method allows simultaneous plating on the exposed n-type tantalum surface and the p-type tantalum surface. The plating procedure can be performed until all of the exposed defects are plated, i.e., until all of the exposed tantalum surface is covered with a Ni layer. This program can be self-limiting. Therefore, by plating, for example, it is enough to completely cover two One of the surface polarities is sufficient time (for example, such as 2 minutes to 10 minutes) to deposit a uniform initial Ni layer on both the n-type surface and the p-type surface, wherein the layer completely covers the exposed surface.

然而,在本發明之一方法中,藉由初始Ni層部分覆蓋經暴露表面可足以允許後續良好金屬鍍覆與一良好金屬層厚度均勻性。例如在第一區域及第二區域之至少一者中之初始Ni層之厚度通常可在5奈米與2微米之間的範圍中,但本發明之實施例不限於此。接著,藉由憑藉一金屬鍍覆程序(例如,一無電鍍覆程序或一浸漬鍍覆程序)將一進一步金屬層34沈積103於初始Ni層33上而加厚該初始層33,例如參見圖1中之103。 However, in one method of the invention, partially covering the exposed surface by the initial Ni layer may be sufficient to allow for subsequent good metal plating and a good metal layer thickness uniformity. For example, the thickness of the initial Ni layer in at least one of the first region and the second region may generally be in a range between 5 nm and 2 μm, but embodiments of the invention are not limited thereto. Next, the initial layer 33 is thickened by depositing a further metal layer 34 on the initial Ni layer 33 by means of a metal plating process (for example, an electroless plating process or an immersion plating process), for example, see FIG. 103 of 1.

例如,可藉由無電Ni鍍覆而將一進一步Ni層沈積於初始Ni層上,直至獲得在例如0.2微米與8微米之間的範圍中之一厚度,但本發明不限於此。無電鍍覆速率通常可為約0.2微米/分鐘。初始Ni層33具有一晶種層之功能以用於無電Ni鍍覆。無電鍍覆速率實質上獨立於下伏於初始Ni層之矽之極性(n型或p型)。因此,可獲得一良好厚度均勻性。 For example, a further Ni layer may be deposited on the initial Ni layer by electroless Ni plating until a thickness in a range between, for example, 0.2 μm and 8 μm is obtained, but the invention is not limited thereto. The electroless plating rate can typically be about 0.2 microns per minute. The initial Ni layer 33 has a function as a seed layer for electroless Ni plating. The electroless plating rate is substantially independent of the polarity (n-type or p-type) underlying the initial Ni layer. Therefore, a good thickness uniformity can be obtained.

如上文中所提及,在本發明之一方法中,藉由初始Ni層部分覆蓋經暴露表面可足以允許後續良好金屬鍍覆與一良好金屬層厚度均勻性。例如,在根據本發明之實施例之一方法中,當初始Ni層在第一區域及第二區域之至少一者上已達到足以允許隨後在沈積103進一步金屬層中進行良好金屬鍍覆(舉例而言,諸如足以在沈積103進一步金屬層之後獲得一良好金屬層厚度均勻性)之一覆蓋範圍、均勻性及/或厚度時,可結束(例如,終止)初始Ni層之沈積102。例如,當初始Ni層在第一區域及第二區域之至少一者上達到此覆蓋範圍、均勻性及/或厚度時但在其超過此覆蓋範圍、均勻性及/或厚度位準至歸因於初始Ni層之一進一步增大厚度而獲得接觸電阻之一不利增大的程度之前, 可結束初始Ni層之沈積102。 As mentioned above, in one method of the invention, partial coverage of the exposed surface by the initial Ni layer may be sufficient to allow for subsequent good metal plating and a good metal layer thickness uniformity. For example, in one method according to an embodiment of the present invention, when the initial Ni layer is at least one of the first region and the second region, it is sufficient to allow subsequent good metal plating in the further metal layer of the deposition 103 (for example) In the case of a coverage, uniformity, and/or thickness, such as sufficient to obtain a good metal layer thickness uniformity after deposition of a further metal layer, the deposition 102 of the initial Ni layer may be terminated (eg, terminated). For example, when the initial Ni layer reaches this coverage, uniformity, and/or thickness on at least one of the first region and the second region but exceeds this coverage, uniformity, and/or thickness level to attribution Before the thickness of one of the initial Ni layers is further increased to obtain an unfavorable increase in contact resistance, The deposition 102 of the initial Ni layer can be terminated.

因此,熟習此項技術者可執行初始Ni層之一沈積102使得初始Ni層不過厚(如將不利地增大接觸電阻)且不過薄(如將提供不足以充分實行沈積103進一步金屬層之下一步驟之一初始Ni層,例如不足夠使得在其中進一步金屬層沈積係關於一無電Ni鍍覆程序之一實施例中將不出現無電Ni鍍覆或僅出現不良無電Ni鍍覆)。調諧初始Ni層之沈積102以獲得鑑於進一步金屬層沈積係足夠且鑑於一可能的不利接觸電阻增大不過量之一厚度係完全在熟習此項技術者之能力範圍內,例如可藉由初始Ni層之沈積102之一程序持續時間之簡單實驗最佳化而達成。 Thus, those skilled in the art can perform a deposition 102 of one of the initial Ni layers such that the initial Ni layer is not too thick (as would undesirably increase the contact resistance) and is not too thin (as would be insufficient to fully perform deposition 103 under further metal layers) One of the first steps of the initial Ni layer, for example, is insufficient for further metal layer deposition therein. In one embodiment of an electroless Ni plating process, no electroless Ni plating or only poor electroless Ni plating will occur. Tuning the deposition of the initial Ni layer 102 to obtain sufficient thickness in view of further metal layer deposition and in view of a possible unfavorable contact resistance is not within the capabilities of those skilled in the art, such as by initial Ni A simple experimental optimization of the duration of one of the depositions 102 of the layer is achieved.

此外,當初始Ni層僅在第一區域上(例如,在第一區域上)已達到足以允許後續良好金屬鍍覆但鑑於隱含接觸電阻不過量(而未必足以允許在第二區域上進行良好金屬鍍覆)之一覆蓋範圍、均勻性及/或厚度時,可結束(例如,終止)沈積102初始Ni層之步驟。例如,初始Ni層沈積102於第一區域1中(其中暴露n型區域11)之速率可高於初始Ni層沈積102於第二區域2中(其中暴露p型區域12)之速率,使得可在第二區域2上達到一足夠但不過量的初始層厚度之一特定選擇之前在第一區域1上達到相同足夠但不過量的初始層厚度。 Furthermore, when the initial Ni layer is only on the first region (eg, on the first region) has been sufficient to allow subsequent good metal plating but in view of the implied contact resistance is not excessive (and not necessarily sufficient to allow good on the second region) The step of depositing 102 the initial Ni layer may be terminated (eg, terminated) upon coverage, uniformity, and/or thickness of one of the metal platings. For example, the rate at which the initial Ni layer deposition 102 is in the first region 1 (where the n-type region 11 is exposed) may be higher than the rate at which the initial Ni layer deposition 102 is in the second region 2 (where the p-type region 12 is exposed), such that An adequate but not excessive initial layer thickness is achieved on the first region 1 before a specific selection of a sufficient but not excessive initial layer thickness is reached on the second region 2.

例如,可實行沈積102初始Ni層之步驟達在10秒至1.5分鐘之範圍中,較佳在15秒至45秒之範圍中(諸如約30秒)之一程序步驟持續時間,例如達30秒之一程序步驟持續時間。雖然將初始鎳層33同時沈積102於基板表面上之第一區域1及第二區域2中,但可在此步驟期間主要鍍覆第一區域1,即,經暴露n型區域。例如,在此沈積102期間,可在第二區域2(即,經暴露p型區域)上沈積僅相對少量鎳。 For example, the step of depositing 102 the initial Ni layer may be performed in the range of 10 seconds to 1.5 minutes, preferably in the range of 15 seconds to 45 seconds (such as about 30 seconds), for example, up to 30 seconds. One of the program steps lasts. Although the initial nickel layer 33 is simultaneously deposited 102 in the first region 1 and the second region 2 on the surface of the substrate, the first region 1 may be mainly plated during this step, that is, the exposed n-type region. For example, during this deposition 102, only a relatively small amount of nickel may be deposited on the second region 2 (ie, the exposed p-type region).

接著,可將一進一步金屬層34沈積401於第一區域1中之初始Ni層33上,如圖11中所繪示。例如,第一區域1中之初始Ni層上一進一步金屬層之此沈積401可包括一無電或浸漬鍍覆程序,諸如一無電Ni 鍍覆步驟。例如,可應用一無電Ni鍍覆達在1分鐘至3分鐘之範圍中(例如2分鐘)之一程序步驟持續時間。在將進一步金屬層沈積401於第一區域中之初始Ni層上(例如,一第一無電Ni鍍覆程序(例如約2分鐘之一第一無電Ni鍍覆程序))之後,第一區域可完全覆蓋有鎳,例如經暴露n型區域可歸因於初始Ni層在n型材料上形成一良好晶種層而被完全覆蓋,但第二區域可僅部分覆蓋有鎳,或可歸因於初始Ni層在p型材料上形成一不足晶種層而未被鎳覆蓋至任何實質程度。 Next, a further metal layer 34 can be deposited 401 on the initial Ni layer 33 in the first region 1, as depicted in FIG. For example, the deposition 401 of a further metal layer on the initial Ni layer in the first region 1 may comprise an electroless or immersion plating process, such as an electroless Ni Plating step. For example, an electroless Ni plating can be applied for one of the program step durations in the range of 1 minute to 3 minutes (for example, 2 minutes). After depositing a further metal layer 401 on the initial Ni layer in the first region (eg, a first electroless Ni plating process (eg, one of the first electroless Ni plating processes of about 2 minutes), the first region may Fully covered with nickel, for example, the exposed n-type region may be completely covered by the initial Ni layer forming a good seed layer on the n-type material, but the second region may only be partially covered with nickel, or attributable to The initial Ni layer forms an under-plated layer on the p-type material without being covered by nickel to any substantial extent.

接著,可藉由浸漬鍍覆(例如,藉由應用相同於或類似於用於沈積102初始Ni層之一程序步驟)而將一進一步Ni層沈積402於第二區域2中。例如,可實行沈積402進一步Ni層之步驟達在45秒至3分鐘之範圍中,較佳在60秒至120秒之範圍中(諸如約90秒)之一程序步驟持續時間,例如具有90秒之一程序步驟持續時間。雖然在此步驟中將進一步鎳層沈積402於基板表面上之第二區域2中,但未將進一步Ni沈積402於第一區域1中。例如,不可將實質或顯著量之鎳沈積402於第一區域1中,此係因為在將進一步金屬層沈積401於第一區域中之初始Ni層上之後,無矽或可忽略量之矽將保持暴露於第一區域中。 Next, a further Ni layer can be deposited 402 in the second region 2 by immersion plating (e.g., by applying the same or similar procedure for depositing one of the initial Ni layers). For example, the step of depositing 402 further Ni layers may be performed in the range of 45 seconds to 3 minutes, preferably in the range of 60 seconds to 120 seconds (such as about 90 seconds), for example, 90 seconds. One of the program steps lasts. Although a further nickel layer is deposited 402 in the second region 2 on the surface of the substrate in this step, no further Ni is deposited 402 in the first region 1. For example, a substantial or significant amount of nickel may not be deposited 402 in the first region 1 because after the further metal layer is deposited 401 on the initial Ni layer in the first region, no or negligible amount will be Keep exposed to the first area.

接著,可例如藉由相同於或類似於用於將一進一步金屬層沈積401於第一區域中之初始Ni層上之一程序步驟(例如,一無電Ni鍍覆程序步驟)而將該進一步金屬層沈積403於第二區域中之進一步Ni層上。在第二區域中之進一步Ni層上之進一步金屬層之此沈積403可例如具有4分鐘至15分鐘之範圍中(例如在5分鐘至12分鐘之範圍中)之一程序步驟持續時間。熟習此項技術者應瞭解,即使將進一步金屬層沈積403於第二區域中之進一步Ni層上,此不排除亦藉由相同程序步驟將更多金屬沈積於第一區域中,因此亦將進一步金屬層進一步生長於第一區域中。熟習此項技術者應瞭解,即使將進一步金屬層沈積403於第二區域中之進一步Ni層上,此不排除亦藉由相同程序步驟將進一步金 屬層沈積於第二區域中之初始Ni層上。 Next, the further metal can be, for example, by the same or similar to a process step (eg, an electroless Ni plating process step) on depositing a further metal layer on the initial Ni layer in the first region (eg, an electroless Ni plating process step) A layer is deposited 403 on the further Ni layer in the second region. This deposition 403 of the further metal layer on the further Ni layer in the second region may, for example, have one of the program step durations in the range of 4 minutes to 15 minutes (e.g., in the range of 5 minutes to 12 minutes). Those skilled in the art will appreciate that even if a further metal layer is deposited 403 on a further Ni layer in the second region, this does not preclude the deposition of more metal in the first region by the same procedure steps, and thus will further The metal layer is further grown in the first region. Those skilled in the art will appreciate that even if a further metal layer is deposited 403 on a further Ni layer in the second region, this does not preclude further gold by the same procedure steps. The genus layer is deposited on the initial Ni layer in the second region.

根據本發明之實施例之此方法之一優點係解除耦合分別藉由以下者沈積之鎳量:將初始Ni層沈積102於第一區域中之n型材料上之初始鍍覆步驟;及將一進一步Ni層沈積402於第二區域中之p型材料上之隨後鍍覆步驟。歸因於此解除耦合,獲得用於最佳化程序之一額外自由度,例如各步驟之程序持續時間可用作一單獨最佳化參數。因此,可藉由常規最佳化而更容易地滿足由設計考量造成之特定約束,例如強加於接觸電阻之一上限。 An advantage of this method in accordance with an embodiment of the present invention is to decouple the amount of nickel deposited by each of: an initial plating step of depositing an initial Ni layer on the n-type material in the first region; and A further Ni layer deposits 402 a subsequent plating step on the p-type material in the second region. Due to this decoupling, an additional degree of freedom for one of the optimization procedures is obtained, for example the program duration of each step can be used as a separate optimization parameter. Therefore, the specific constraints caused by design considerations can be more easily met by conventional optimization, such as imposed on an upper limit of the contact resistance.

在本發明之實施例中,可在初始Ni層33上提供另一金屬(舉例而言,諸如銀(Ag)),而非無電鍍覆Ni以加厚初始Ni層。可例如藉由無電鍍覆或藉由浸漬鍍覆提供Ag層。提供Ag層作為進一步金屬層34之一優點係相比於其中提供一進一步Ni層之一程序,其導致金屬電極之一更低電阻。相比於Ni,使用Ag可具有一更高成本之缺點。然而,當該方法用於提供無匯流條光伏打電池之金屬電極時,相比於具有例如三個至五個匯流條之「典型」光伏打電池,可減小Ag層厚度及(因此)Ag材料量(及(因此)成本)。 In an embodiment of the invention, another metal (such as, for example, silver (Ag)) may be provided on the initial Ni layer 33 instead of electroless Ni to thicken the initial Ni layer. The Ag layer can be provided, for example, by electroless plating or by immersion plating. The advantage of providing an Ag layer as one of the further metal layers 34 is compared to a procedure in which a further Ni layer is provided which results in a lower resistance of one of the metal electrodes. The use of Ag can have a higher cost disadvantage than Ni. However, when the method is used to provide a metal electrode without a bus bar photovoltaic cell, the Ag layer thickness and (and therefore) Ag can be reduced compared to a "typical" photovoltaic cell having, for example, three to five bus bars. The amount of material (and (and therefore the cost)).

在本發明之實施例中(例如,其中進一步金屬層34係一Ni層,其例如在一單一程序步驟中同時提供於第一區域及第二區域兩者中之初始Ni層上或在多個步驟中提供於第一區域及第二區域中(如上文中所述)),該方法可進一步包括在已執行無電Ni鍍覆程序之後,將一銅(Cu)層沈積於進一步金屬層上,例如沈積於一進一步Ni層上。沈積該銅層可例如藉由一無電銅鍍覆程序而完成。此可導致金屬電極之厚度之一進一步增大及其等導電性之一增大。此等實施例可有利地用於提供包含匯流條之金屬電極,例如用於具有有限數目個匯流條(舉例而言,諸如三個至五個匯流條)之電池,但本發明之實施例不限於此。 In an embodiment of the invention (eg, wherein the further metal layer 34 is a Ni layer, for example, provided on the initial Ni layer in both the first region and the second region or in multiples in a single program step Provided in the first region and the second region (as described above), the method may further comprise depositing a layer of copper (Cu) on the further metal layer after the electroless Ni plating process has been performed, for example Deposited on a further Ni layer. Depositing the copper layer can be accomplished, for example, by an electroless copper plating process. This can result in a further increase in the thickness of the metal electrode and an increase in one of its electrical conductivity. Such embodiments may be advantageously used to provide a metal electrode comprising a bus bar, such as for a battery having a limited number of bus bars (for example, three to five bus bars), although embodiments of the invention do not Limited to this.

在本發明之實施例中,例如在製造無匯流條光伏打電池之內容 脈絡中,第一金屬電極及/或第二金屬電極可由從基板或電池之一個邊緣延伸至基板或電池之一相對邊緣的複數個連續平行金屬線或金屬指狀物組成。然而,本發明之實施例不限於此。在本發明之實施例中,第一金屬電極及/或第二金屬電極可例如亦由中斷線構成。在本發明之實施例中,第一金屬電極及/或第二金屬電極可具有不同於一指狀物組態之一組態,即,不同於由複數個實質上平行金屬線組成之一組態。例如,第一金屬電極及/或第二金屬電極可由沿不同的非平行方向延伸之複數個金屬特徵構成。 In an embodiment of the invention, for example, in the manufacture of a bus without a bus bar photovoltaic cell In the vein, the first metal electrode and/or the second metal electrode may be composed of a plurality of continuous parallel metal wires or metal fingers extending from one edge of the substrate or the battery to the opposite edge of the substrate or the battery. However, embodiments of the invention are not limited thereto. In an embodiment of the invention, the first metal electrode and/or the second metal electrode may, for example, also consist of an interrupt line. In an embodiment of the invention, the first metal electrode and/or the second metal electrode may have a configuration different from that of a finger configuration, that is, different from a group consisting of a plurality of substantially parallel metal lines state. For example, the first metal electrode and/or the second metal electrode may be composed of a plurality of metal features extending in different non-parallel directions.

圖2示意地展示用於一雙面光伏打電池之一製造程序200之一實例之程序步驟,其中使用根據本發明之實施例之一基於鍍覆之金屬化方法100而提供該電池之前側處及該電池之後側處之金屬電極,如上文中所述。對於雙面電池,n型矽晶圓通常可用作例如具有在3Ohm.cm與5Ohm.cm之間的範圍中之一電阻率的一矽基板10。然而,本發明之實施例不限於此,且具有另一電阻率之晶圓及/或p型晶圓可用作一矽基板。在鋸切損壞移除之後,可使用已知技術紋理化基板之前表面及後表面,如圖2中之步驟201所展示。例如可在使用一n型基板時藉由硼擴散或在使用一p型基板時藉由磷擴散而在基板之一表面處形成202一射極區域。視需要,例如可在使用一n型基板時藉由磷擴散或在使用一p型基板時藉由硼擴散而在基板之相對表面處提供203一高/低接面。然而,本發明之實施例不限於此且其他方法可用於形成摻雜區域,舉例而言,諸如離子植入、APCVD或PECVD。該射極區域可形成於基板之後表面處且該高/低接面可形成於前表面處,或反之亦然,該射極區域可形成於前表面處且該高/低接面可形成於後表面處。 2 schematically illustrates the procedural steps of an example of a fabrication process 200 for a double-sided photovoltaic cell in which the front side of the cell is provided using a plating-based metallization method 100 in accordance with one embodiment of the present invention. And the metal electrode at the back side of the cell, as described above. For a double-sided battery, an n-type germanium wafer is generally used as, for example, a germanium substrate 10 having a resistivity in a range between 3 Ohm.cm and 5Ohm.cm. However, embodiments of the present invention are not limited thereto, and a wafer having another resistivity and/or a p-type wafer may be used as a single substrate. After sawing damage removal, the front and back surfaces of the substrate can be textured using known techniques, as shown by step 201 in FIG. For example, an emitter region can be formed at one surface of the substrate by diffusion of boron when using an n-type substrate or by diffusion of phosphorus when a p-type substrate is used. If desired, for example, a high/low junction may be provided at the opposite surface of the substrate by diffusion of phosphorus when using an n-type substrate or by diffusion of boron when a p-type substrate is used. However, embodiments of the invention are not limited thereto and other methods may be used to form doped regions, such as, for example, ion implantation, APCVD, or PECVD. The emitter region may be formed at a rear surface of the substrate and the high/low junction may be formed at the front surface, or vice versa, the emitter region may be formed at the front surface and the high/low junction may be formed at At the back surface.

可藉由提供204一介電層(舉例而言,諸如一PECVD SiNx層)或藉由提供一介電堆疊而使前表面及後表面兩者鈍化。該介電堆疊可例如 包括SiO2層(例如,一熱生長SiO2層)及藉由PECVD(電漿增強型化學氣相沈積)沈積之SiNx層,但本發明之實施例不限於此。例如,可使用AlOx層而非SiO2層,舉例而言,諸如藉由ALD(原子層沈積)、PEVCD、APCVD(大氣壓化學氣相沈積)、印刷或濺鍍沈積之AlOx層。例如,可使用另一介電層或一層堆疊(例如,包括藉由PECVD沈積之經沈積SiOx層或SiOxNy層)而非SiNx層。可在前表面及後表面處使用一相同堆疊或一不同堆疊。介電堆疊亦可用作一抗反射塗層。在提供介電層或介電層堆疊之後,可例如藉由雷射剝蝕或藉由光微影圖案化205矽基板之前側及後側處之介電層或介電層堆疊兩者,但本發明之實施例不限於此。介電層或介電層堆疊之圖案化可包括局部移除例如第一區域1及第二區域2中之介電層或堆疊,即,使用對應於所要金屬化圖案之一圖案而在介電層或堆疊中形成開口以暴露下伏矽。在本發明之實施例中,金屬化圖案較佳可係一無匯流條圖案。 Both the front and back surfaces may be passivated by providing 204 a dielectric layer (such as, for example, a PECVD SiN x layer) or by providing a dielectric stack. The dielectric stack may, for example, comprise a SiO 2 layer (eg, a thermally grown SiO 2 layer) and a SiN x layer deposited by PECVD (plasma enhanced chemical vapor deposition), although embodiments of the invention are not limited thereto. For example, AlO x layer may be used instead of the SiO 2 layer, for example, such as by ALD (atomic layer deposition), PEVCD, APCVD (atmospheric pressure chemical vapor deposition), sputtering, or printing of AlO x layer deposition plating. For example, another dielectric layer or a stack of layers (eg, including a deposited SiO x layer or SiO x N y layer deposited by PECVD) may be used instead of a SiN x layer. An identical stack or a different stack can be used at the front and back surfaces. The dielectric stack can also be used as an anti-reflective coating. After providing the dielectric layer or the dielectric layer stack, the dielectric layer or the dielectric layer stack at the front side and the back side of the substrate may be patterned by, for example, laser ablation or by photolithography, but Embodiments of the invention are not limited thereto. Patterning of the dielectric layer or dielectric layer stack may include partial removal of dielectric layers or stacks, for example, in the first region 1 and the second region 2, ie, using a pattern corresponding to one of the desired metallization patterns An opening is formed in the layer or stack to expose the underlying raft. In an embodiment of the invention, the metallization pattern is preferably a bus bar free pattern.

在本發明之實施例中,可使用一選擇性摻雜程序,其中對應於金屬化圖案之位置處之摻雜濃度高於其他位置處之摻雜濃度,例如高於先前提供的射極區域及高/低接面之摻雜濃度。n型側處之選擇性摻雜可例如包括提供一摻雜劑源(例如,一旋塗摻雜劑或一噴塗摻雜劑),接著進行雷射摻雜及退火以用於損壞移除及摻雜劑驅入。雷射摻雜步驟導致開口根據金屬化圖案形成於介電堆疊中且導致開口位置處之一選擇性摻雜。p型側處之選擇性摻雜可例如包括提供AlOx層(其可係如上文所述使介電層堆疊鈍化之部分)作為摻雜劑源,接著進行雷射摻雜及退火以用於損壞移除及摻雜劑驅入。然而,本發明之實施例不限於此且可使用其他選擇性摻雜方法。可在用於提供金屬電極之鍍覆步驟之後執行用於損壞移除及摻雜劑驅入之一退火步驟。有利的是,接著可額外地組合該退火步驟與金屬退火(燒結步驟)以減小金屬-矽接觸電阻。然而,本發明之實施例不限於此,且亦可在形成金屬電 極之前完成用於損壞移除及摻雜劑驅入之退火步驟。 In an embodiment of the invention, a selective doping process may be used in which the doping concentration at the location corresponding to the metallization pattern is higher than the doping concentration at other locations, such as above the previously provided emitter region and Doping concentration of high/low junction. Selective doping at the n-type side can, for example, include providing a dopant source (eg, a spin-on dopant or a spray dopant) followed by laser doping and annealing for damage removal and The dopant is driven in. The laser doping step causes the openings to be formed in the dielectric stack according to the metallization pattern and result in selective doping at one of the opening locations. The selective doping at the p-type side may, for example, comprise providing an AlO x layer (which may be part of passivating the dielectric layer stack as described above) as a dopant source, followed by laser doping and annealing for Damage removal and dopant drive in. However, embodiments of the invention are not limited thereto and other selective doping methods may be used. An annealing step for damage removal and dopant drive can be performed after the plating step for providing the metal electrode. Advantageously, the annealing step and metal annealing (sintering step) can then be additionally combined to reduce the metal-helium contact resistance. However, embodiments of the invention are not limited thereto, and the annealing step for damage removal and dopant drive-in can also be completed prior to forming the metal electrode.

在如圖2中所展示之步驟206處,執行根據本發明之實施例之一方法100的一基於鍍覆之金屬化程序,例如圖1中所展示之步驟102及103。 At step 206, as shown in FIG. 2, a plating-based metallization process, such as steps 102 and 103 shown in FIG. 1, of method 100 in accordance with one embodiment of the present invention is performed.

下文中提供繪示其中使用根據本發明之實施例之一方法以在一雙面光伏打電池上提供金屬接觸件之實驗的實例。此等實例經提供以繪示本發明之實施例之特徵及優點,且協助熟習此項技術者減少本發明之實踐。然而,此等實例不應被解釋為以任何方式限制本發明。對於此等實驗,使用具有3Ohm.cm至5Ohm.cm之一電阻率之n型晶圓。在鋸切損壞移除之後,紋理化基板之前表面及後表面。在前側處,藉由硼擴散形成一90歐姆/平方p型區域(射極區域)。在後側處,一磷擴散經完成以產生一120歐姆/平方高/低接面。藉由提供由熱生長SiO2層及藉由PECVD沈積之SiNx層組成的一介電堆疊而使前表面及後表面兩者鈍化。在介電層堆疊中製成開口,即,根據在前側及後側兩者處包括三個匯流條及隔開1.5mm之複數個平行指狀物的一光伏打電池接觸圖案,局部移除介電層堆疊。藉由ps UV雷射剝蝕完成介電層堆疊之局部移除。 An example of an experiment in which a metal contact is provided on a double-sided photovoltaic cell using a method in accordance with an embodiment of the present invention is provided below. The examples are provided to illustrate the features and advantages of the embodiments of the present invention and to assist those skilled in the art to practice the invention. However, such examples are not to be construed as limiting the invention in any way. For these experiments, an n-type wafer having a resistivity of from 3 Ohm.cm to 5 Ohm.cm was used. After the sawing damage is removed, the front and back surfaces of the substrate are textured. At the front side, a 90 ohm/square p-type region (emitter region) is formed by boron diffusion. At the back side, a phosphorus diffusion is completed to produce a 120 ohm/square height/low junction. Both the front surface and the back surface are passivated by providing a dielectric stack consisting of a thermally grown SiO 2 layer and a SiN x layer deposited by PECVD. Forming an opening in the dielectric layer stack, that is, according to a photovoltaic cell contact pattern including three bus bars and a plurality of parallel fingers separated by 1.5 mm at both the front side and the rear side, the partial removal medium is partially removed The electrical layer is stacked. Partial removal of the dielectric layer stack is accomplished by ps UV laser ablation.

然後,執行根據本發明之實施例之一方法的一基於鍍覆之金屬化程序。在鍍覆之前,在一8:1 H2SO4:H2O2溶液中在80℃下清洗樣本達45秒,以從待鍍覆表面移除任何有機物。此後,進行沖洗,在一2%HF溶液中從待鍍覆之表面移除氧化物達90秒,且進行沖洗。 A plating-based metallization process in accordance with one of the embodiments of the present invention is then performed. Prior to plating, the samples were washed in an 8:1 H 2 SO 4 :H 2 O 2 solution at 80 ° C for 45 seconds to remove any organics from the surface to be plated. Thereafter, a rinse was performed, and the oxide was removed from the surface to be plated in a 2% HF solution for 90 seconds, and rinsed.

藉由執行一浸漬鍍覆程序而將一初始Ni層沈積於經暴露矽基板表面上。浸漬Ni(i-Ni)浴含有DI水、NH4F及氨基磺酸鎳Ni(SO3NH2)2。使用在5質量%與15質量%之間的範圍中之NH4F濃度。對於Ni(SO3NH2)2,使用在0.1M與0.3M之間的範圍中之不同濃度。鍍覆浴之pH藉由添加NH4OH而調整至在7與9.5之間的範圍中之不同pH 值。在80℃下執行具有在2.5分鐘與15分鐘之間的範圍中之不同持續時間之浸漬Ni鍍覆。在放置於一熱板上之一玻璃燒杯中提供i-Ni浴。藉由一熱電偶量測鍍覆溶液之溫度且將溶液溫度控制於+/- 2℃內。由一攪拌器以200rpm提供溶液攪拌。未施加受控制外部照明,即,僅存在實驗室背景光。 An initial Ni layer is deposited on the exposed ruthenium substrate surface by performing an immersion plating process. The impregnated Ni (i-Ni) bath contains DI water, NH 4 F, and nickel sulfamate Ni(SO 3 NH 2 ) 2 . The NH 4 F concentration in the range between 5 mass% and 15 mass% was used. For Ni(SO 3 NH 2 ) 2 , different concentrations in the range between 0.1 M and 0.3 M were used. The pH of the plating bath was adjusted to a different pH in the range between 7 and 9.5 by the addition of NH 4 OH. Impregnated Ni plating with different durations in the range between 2.5 minutes and 15 minutes was performed at 80 °C. An i-Ni bath was provided in a glass beaker placed on a hot plate. The temperature of the plating solution was measured by a thermocouple and the temperature of the solution was controlled within +/- 2 °C. The solution was stirred by a stirrer at 200 rpm. No controlled external illumination is applied, ie, only laboratory background light is present.

然後,在去離子(DI)水中沖洗樣本且藉由執行一無電Ni鍍覆程序而加厚初始Ni層,以藉此沈積一進一步Ni層。在82℃下,將一市售鍍覆溶液用於無電Ni(E-Ni)鍍覆浴。E-Ni浴之pH係4.8,且E-Ni鍍覆時間係在10分鐘與15分鐘之間的範圍中。 The sample was then rinsed in deionized (DI) water and the initial Ni layer was thickened by performing an electroless Ni plating procedure to thereby deposit a further Ni layer. A commercially available plating solution was applied to an electroless Ni (E-Ni) plating bath at 82 °C. The pH of the E-Ni bath was 4.8, and the E-Ni plating time was in the range between 10 minutes and 15 minutes.

在DI水中沖洗之後,藉由使用一市售程序之浸漬Ag鍍覆而將一薄Ag層提供於進一步Ni層之頂部上。此程序使用兩種浴:首先在38℃下使用一預清洗浴(預i-Ag浴)達30s;且接著在52℃下使用一沈積浴(i-Ag浴)達60s。在DI水中沖洗樣本且用N2乾燥之後,在一帶式爐中、在一氮氣氛中(O2濃度<10ppm)、在250℃與400℃之間的範圍中之一溫度下燒結(退火)接觸件達4分鐘。 After rinsing in DI water, a thin Ag layer was provided on top of the further Ni layer by dipping Ag plating using a commercially available procedure. This procedure used two baths: first using a pre-cleaning bath (pre-i-Ag bath) at 38 ° C for 30 s; and then using a deposition bath (i-Ag bath) at 52 ° C for 60 s. After rinsing the sample in DI water and drying with N 2 , sintering (annealing) in a belt furnace in a nitrogen atmosphere (O 2 concentration <10 ppm) at a temperature between 250 ° C and 400 ° C Contact for 4 minutes.

藉由XRF(X射線螢光)量測經沈積層厚度。 The thickness of the deposited layer was measured by XRF (X-ray fluorescence).

下文中之表展示藉由針對不同i-Ni鍍覆浴及程序條件進行浸漬鍍覆而形成之初始Ni層33之經量測厚度。在n型區域及p型區域兩者上量測厚度。結果展示對於廣泛範圍之程序條件,在n型區域及p型區域兩者上達成同時鍍覆。程序條件影響層厚度及n型區域上之厚度與p型區域上之厚度之間的比率。n型區域上之i-Ni層厚度大於p型區域上之i-Ni層厚度。 The table below shows the measured thickness of the initial Ni layer 33 formed by immersion plating for different i-Ni plating baths and program conditions. The thickness is measured on both the n-type region and the p-type region. The results demonstrate simultaneous plating on both the n-type region and the p-type region for a wide range of procedural conditions. The program conditions affect the layer thickness and the ratio between the thickness on the n-type region and the thickness on the p-type region. The thickness of the i-Ni layer on the n-type region is greater than the thickness of the i-Ni layer on the p-type region.

藉由執行如上文中所述之一無電Ni(E-Ni)鍍覆程序而加厚提供於p型區域及n型區域上之初始Ni層(如上文中之表中報告),藉此將一進一步Ni層34沈積於初始Ni層33上。E-Ni鍍覆時間係10分鐘。圖3展示根據初始i-Ni層厚度d i-Ni (以微米計)而變化的提供於初始i-Ni層(如上文中之表中報告)之頂部上之進一步Ni層之經量測厚度dE-Ni(以微米計)。在圖3中,實心圓31對應於形成於n型區域上之Ni層且實心三角形對應於p型區域上之Ni層。從此等例示性結果,可見進一步Ni層(即,藉由無電鍍覆提供於初始Ni層上之Ni層)之厚度可實質上獨立於下伏初始Ni層之厚度,且其可實質上獨立於下伏於初始Ni層(即使針對極薄初始Ni層)之摻雜矽區域之極性。 The initial Ni layer provided on the p-type region and the n-type region is thickened by performing an electroless Ni (E-Ni) plating process as described above (as reported in the table above), thereby further The Ni layer 34 is deposited on the initial Ni layer 33. The E-Ni plating time is 10 minutes. Figure 3 shows the measured thickness d of a further Ni layer provided on top of the initial i-Ni layer (as reported in the table above), varying according to the initial i-Ni layer thickness d i-Ni (in microns) E-Ni (in microns). In FIG. 3, the solid circle 31 corresponds to the Ni layer formed on the n-type region and the solid triangle corresponds to the Ni layer on the p-type region. From these exemplary results, it can be seen that the thickness of the further Ni layer (i.e., the Ni layer provided by electroless plating on the initial Ni layer) can be substantially independent of the thickness of the underlying initial Ni layer, and it can be substantially independent of The polarity of the doped germanium region underlying the initial Ni layer (even for very thin initial Ni layers).

然而,歸因於當相比於在p型區域上之沈積時在n型區域上形成初始Ni層i-Ni時之一沈積速率更快(如由上文中之表中所呈現之資訊證實),對於i-Ni沈積之尤其短程序持續時間(例如小於或等於5分鐘),可在p型區域上之經沈積i-Ni層厚度與n型區域上之經沈積i-Ni層厚度之間引起一大的相對差。因此,對於此等短程序持續時間,進一步Ni層E-Ni不可形成或良好地形成在p型區域中(如由圖3中所繪製之資料點33展示),而對於相同處理步驟,進一步Ni層E-Ni充分地形成在n型區域中。然而,如上文中所述,用於形成初始Ni層i-Ni之短程序持續時間可較佳獲得一尤其低接觸電阻。亦如上文中所述,在根據本發明之實施例之一方法中,沈積進一步金屬層之步驟可包括用來例如藉由以下步驟容易地組合歸因於一尤其薄初始Ni層之一良好接觸電阻與該初始Ni層上方進一步金屬層之一良好鍍覆之複數個子步驟:首先在n 型區域中之初始Ni層上形成一進一步金屬層;接著藉由一第二浸漬Ni鍍覆步驟而使初始Ni層在p型區域上延伸;及接著在p型區域中形成一進一步金屬層。 However, it is attributed to a faster deposition rate when the initial Ni layer i-Ni is formed on the n-type region compared to deposition on the p-type region (as confirmed by the information presented in the table above) For particularly short program durations of i-Ni deposition (eg, less than or equal to 5 minutes), between the thickness of the deposited i-Ni layer on the p-type region and the thickness of the deposited i-Ni layer on the n-type region Cause a big relative difference. Therefore, for these short program durations, further Ni layer E-Ni is not formed or well formed in the p-type region (as shown by data point 33 plotted in Figure 3), and for the same processing step, further Ni The layer E-Ni is sufficiently formed in the n-type region. However, as described above, a short program duration for forming the initial Ni layer i-Ni may preferably result in a particularly low contact resistance. As also described above, in one method in accordance with an embodiment of the present invention, the step of depositing a further metal layer can include easily combining the good contact resistance attributed to one of the particularly thin initial Ni layers, for example by the following steps. a plurality of sub-steps of well plating one of the further metal layers above the initial Ni layer: first forming a further metal layer on the initial Ni layer in the n-type region; and then initializing by a second immersion Ni plating step The Ni layer extends over the p-type region; and then a further metal layer is formed in the p-type region.

另一實例係關於一實驗:其中首先藉由使用具有10質量%NH4F及0.1M Ni(SO3NH2)2(具有不同pH值)之一鍍覆溶液進行浸漬Ni鍍覆達10分鐘而提供一初始Ni層,且接著執行一無電Ni鍍覆程序達15分鐘,藉此將一進一步Ni層沈積於該初始Ni層上。圖4展示根據下伏初始Ni層厚度d i-Ni 而變化的針對形成於n型區域(實心圓31)及p型區域(實心三角形32)上之Ni層的進一步Ni層之經量測厚度d E-Ni 。可見進一步Ni層之厚度d E-Ni 實質上獨立於下伏初始Ni層之厚度,且其實質上獨立於下伏於初始Ni層之摻雜矽區域之極性。 Another example relates to an experiment in which first, Ni plating is performed by using a plating solution having 10% by mass of NH 4 F and 0.1 M of Ni(SO 3 NH 2 ) 2 (having different pH values) for 10 minutes. An initial Ni layer was provided, and then an electroless Ni plating process was performed for 15 minutes, thereby depositing a further Ni layer on the initial Ni layer. 4 shows the measured thickness of a further Ni layer for a Ni layer formed on an n-type region (filled circle 31) and a p-type region (solid triangle 32), which varies according to the underlying initial Ni layer thickness d i-Ni d E-Ni . It can be seen that the thickness d E-Ni of the further Ni layer is substantially independent of the thickness of the underlying initial Ni layer, and is substantially independent of the polarity of the doped germanium region underlying the initial Ni layer.

在另一實例中,執行其中在缺乏光之情況下藉由浸漬鍍覆而在n型區域及p型區域上沈積一初始Ni層之一實驗。在鍍覆之前,在80℃下,在一8:1 H2SO4:H2O2溶液中清洗樣本達45秒,以從待鍍覆表面移除任何有機物。此後進行沖洗,在一2%HF溶液中從待鍍覆表面移除氧化物達90秒,且進行沖洗。浸漬Ni(i-Ni)浴含有DI水、7.5質量%NH4F及0.1M氨基磺酸鎳Ni(SO3NH2)2。鍍覆浴之pH藉由添加NH4OH而調整至8.0之一pH值。在80℃下執行浸漬Ni鍍覆達10分鐘。在放置於一熱板上之一玻璃燒杯中提供i-Ni浴。藉由一熱電偶量測鍍覆溶液之溫度且將溶液溫度控制於+/- 2℃內。由一攪拌器以200rpm提供溶液攪拌。在浸漬鍍覆期間,關閉實驗室燈且使用一黑布覆蓋該玻璃燒杯。 In another example, an experiment in which an initial Ni layer is deposited on an n-type region and a p-type region by immersion plating in the absence of light is performed. Prior to plating at 80 ℃, in a 8: washing the sample of 45 seconds a solution of H 2 O 2 to remove any organics from the surface to be coated: 1 H 2 SO 4. Thereafter, rinsing was carried out, and the oxide was removed from the surface to be plated in a 2% HF solution for 90 seconds, and rinsed. The impregnated Ni (i-Ni) bath contained DI water, 7.5% by mass of NH 4 F, and 0.1 M of nickel sulfamate Ni(SO 3 NH 2 ) 2 . The pH of the plating bath was adjusted to a pH of 8.0 by the addition of NH 4 OH. Immersion Ni plating was performed at 80 ° C for 10 minutes. An i-Ni bath was provided in a glass beaker placed on a hot plate. The temperature of the plating solution was measured by a thermocouple and the temperature of the solution was controlled within +/- 2 °C. The solution was stirred by a stirrer at 200 rpm. During immersion plating, the laboratory lamp was turned off and the glass beaker was covered with a black cloth.

下文中之下表展示在缺乏光之情況下藉由浸漬鍍覆而形成在不同位置處(在p型區域及n型區域兩者上)的Ni之經量測厚度。結果展示亦在缺乏光之情況下,於兩個基板極性上達成同時鍍覆。n型區域上之層厚度大於p型區域上之層厚度。 The following table shows the measured thickness of Ni formed at different locations (both on the p-type region and the n-type region) by immersion plating in the absence of light. The results show that simultaneous plating is achieved on the polarity of the two substrates in the absence of light. The layer thickness on the n-type region is greater than the layer thickness on the p-type region.

此外,匯流條之間的電阻(Rbb)用來評估線導電性。一4點探針型電阻量測係在匯流條之間完成,經量測電阻被視為與兩個匯流條之間的指狀物之平均線導電性(Ohm/cm)成比例。 In addition, the resistance between the bus bars (R bb) is used to evaluate the conductive line. A 4-point probe type resistance measurement system is completed between the bus bars, and the measured resistance is considered to be proportional to the average line conductivity (Ohm/cm) of the fingers between the two bus bars.

基於計算及實驗資料,已觀察到當使用根據本發明之實施例之一金屬化程序時可在一合理程序時間內獲得足夠線導電性。計算經完成以估計獲得包括一無匯流條指狀物圖案之一光伏打電池之一良好填充因數所需的指狀物導電性,其中指狀物藉由焊接至指狀物之三十八個電線而連接且取代匯流條(「智慧電線(smart wire)」技術)。已知具有三個匯流條之當前高填充因數標準n-PERT電池具有約25m.Ohm之一Rbb。計算用來自藉由38個電線連接之指狀物獲得相同於此一n-PERT電池中之I2R歐姆功率損耗的Ni鍍覆指狀物之所需指狀物導電性。對於該指狀物導電性,計算出在三匯流條電池上量測之Rbb將為約4Ohm。如上文所述般製成光伏打電池,該等電池具有使用根據本發明之實施例之一方法提供之複數個指狀物且具有用來實現線導電性量測之三個匯流條。使用以下程序序列:H2SO4:H2O2清洗達45s;在2%HF中氧化物蝕刻達90s;在具有10質量%NH4F、0.1M Ni(SO3NH2)2及8.5之一pH值的一鍍覆浴中浸漬Ni鍍覆10分鐘;15分鐘無電Ni鍍覆;30s預i-Ag清洗;60s i-Ag鍍覆。下文中之下表中展示四個電池之經量測Rbb值。電池1經燒結;電池2、3及4未經燒結。在電池1上,藉由X射線螢光量測金屬電極之厚度。在n型區域上,Ni厚度係2.9微米,且在p型區域上,Ni厚度係2.3微米。Ni層在n型區域上被一310nm厚i-Ag層覆蓋且在p型區域上被一294nm厚i-Ag層覆蓋。 Based on calculations and experimental data, it has been observed that sufficient line conductivity can be obtained in a reasonable program time when using a metallization procedure in accordance with an embodiment of the present invention. The calculation is performed to estimate the finger conductivity required to obtain a good fill factor for one of the photovoltaic cells including a bus barless finger pattern, wherein the fingers are soldered to thirty eight of the fingers Wires are connected and replace bus bars ("smart wire" technology). It is known that a current high fill factor standard n-PERT battery with three bus bars has a R bb of about 25 m. Ohm. The desired finger conductivity of the Ni plated fingers from the I 2 R ohm power loss in this n-PERT cell was obtained with fingers from 38 wires connected. For the conductivity of the fingers, it is calculated that the R bb measured on the three-bar battery will be about 4 Ohms. Photovoltaic cells are fabricated as described above, having cells having a plurality of fingers provided in accordance with one of the embodiments of the present invention and having three bus bars for achieving wire conductivity measurements. The following sequence of procedures was used: H 2 SO 4 :H 2 O 2 cleaning for 45 s; oxide etching in 2% HF for 90 s; with 10% by mass of NH 4 F, 0.1 M Ni(SO 3 NH 2 ) 2 and 8.5 One of the pH values of a plating bath was immersed in Ni plating for 10 minutes; 15 minutes without electro-Ni plating; 30 s pre-i-Ag cleaning; 60 s i-Ag plating. The measured R bb values for the four batteries are shown in the table below. Battery 1 was sintered; batteries 2, 3 and 4 were not sintered. On the battery 1, the thickness of the metal electrode was measured by X-ray fluorescence. On the n-type region, the Ni thickness is 2.9 μm, and on the p-type region, the Ni thickness is 2.3 μm. The Ni layer is covered by a 310 nm thick i-Ag layer on the n-type region and covered by a 294 nm thick i-Ag layer on the p-type region.

在上文中所呈現之此表中,#1及#2指代兩個不同量測:一第一匯流條與一第二匯流條之間的一第一量測;及該第二匯流條與一第三匯流條之間的一第二量測。結果繪示對於所有電池,在n型區域及p型區域兩者上獲得明顯小於4Ohm(經評估值,如上文中所述)之Rbb值。因此,可推斷足夠線導電性可經達成以使用短處理時間與智慧電線連接技術整合。在此等實驗中,指狀物之良好導電性可與Ni層(在此等實例中,具有2.3微米至2.9微米之一厚度)之頂部上的i-Ag層(其係約300nm厚)之存在密切相關。 In the table presented above, #1 and #2 refer to two different measurements: a first measurement between a first bus bar and a second bus bar; and the second bus bar and A second measurement between the third bus bars. The results show that for all cells, R bb values of significantly less than 4 Ohm (evaluated values, as described above) were obtained on both the n-type region and the p-type region. Therefore, it can be inferred that sufficient line conductivity can be achieved to integrate with smart wire connection technology using short processing times. In such experiments, the good conductivity of the fingers can be compared to the i-Ag layer (which is about 300 nm thick) on top of the Ni layer (in these examples, having a thickness of one of 2.3 microns to 2.9 microns). There is a close correlation.

基於光學顯微鏡影像且基於鍍覆電極之SEM影像,在p型區域或n型區域上皆未觀察到假鍍覆。 No false plating was observed on either the p-type region or the n-type region based on the optical microscope image and based on the SEM image of the plated electrode.

藉由焊接垂片黏著性量測金屬電極之黏著性,其中在325℃下將一焊接垂片焊接至該等電極且以45°角拉除該焊接垂片,記錄移除該垂片所需之最大力F max 。針對表1中所報告之樣本,圖5中繪示針對n型區域之焊接垂片黏著性結果且圖6中繪示針對p型區域之焊接垂片黏著性結果。圖5及圖6展示移除該垂片所需之最大力F max (以牛頓計),例如表示焊接黏著性、根據i-Ni浴中之NH4F濃度[NH4F]而變化之最大力F max 。此等結果表明NH4F濃度與黏著強度之間的一關聯。2.4牛頓之一最大力將被視為對應於適於匯流條及垂片焊接之一良好黏著性。在完成的實驗中,此係針對具有5質量%NH4F之鍍覆溶液但非針對具有10質量%NH4F或15質量%NH4F之鍍覆溶液而獲得。然而,智慧電線技術之一成功整合所需之黏著性可小於傳統匯流條及垂片焊接所需之黏著性。 The adhesion of the metal electrode was measured by solder tab adhesion, wherein a solder tab was soldered to the electrodes at 325 ° C and the solder tab was pulled at an angle of 45° to record the need to remove the tab The maximum force F max . For the samples reported in Table 1, the results of the solder tab adhesion for the n-type region are depicted in Figure 5 and the solder tab adhesion results for the p-type region are depicted in Figure 6. FIG 5 and FIG 6 shows removal of the tab of the desired maximum force F max (in Newton), for example, represents a welding adhesion, varies between the maximum [NH 4 F] The 4 F i-Ni bath concentration of NH Force F max . These results indicate a correlation between NH 4 F concentration and adhesion strength. 2.4 One of the maximum forces of Newton will be considered to correspond to one of the good adhesions suitable for bus bar and tab welding. In the completed experiment, this was obtained for a plating solution having 5% by mass of NH 4 F but not for a plating solution having 10% by mass of NH 4 F or 15% by mass of NH 4 F. However, the adhesiveness required for successful integration of one of the smart wire technologies can be less than that required for conventional bus bar and tab welding.

在另一實例中,執行其中藉由一第一浸漬鍍覆主要在n型區域上沈積一初始Ni層之一實驗。在鍍覆之前,清洗樣本以從待鍍覆表面移除任何有機物,接著進行DI水沖洗,在一2%HF溶液中從待鍍覆表面移除氧化物達90秒,並進行DI水沖洗。浸漬Ni(i-Ni)浴含有DI水、30質量%NH4F及0.1M氨基磺酸鎳Ni(SO3NH2)2。將鍍覆浴之pH調整至8.5之一pH值。在60℃下、在由一磁性攪拌器以200rpm提供之溶液攪拌下執行此浸漬Ni鍍覆達30秒。在黑暗中執行此浸漬Ni鍍覆,如上文中關於一先前實例所論述。接著,用DI水沖洗樣本,且在82℃下使用用於無電Ni鍍覆之一市售溶液(Macdermid Ultraplanar,pH 4.8)執行2分鐘無電Ni鍍覆之一程序步驟。在下一步驟中,在再次DI沖洗樣本之後,在類似於先前浸漬Ni鍍覆步驟之條件下(例如,再次在60℃下、在黑暗中且在藉由一磁性攪拌器以200rpm進行之溶液攪拌下)執行一進一步浸漬Ni鍍覆達90秒。此浸漬Ni鍍覆步驟中使用之浸漬Ni浴亦具有相同於先前浸漬Ni鍍覆步驟中之組合物。在再次DI沖洗樣本之後,在82℃下執行一進一步無電Ni鍍覆達12分鐘(Macdermid Ultraplanar,pH 4.8)。 In another example, an experiment in which one of the initial Ni layers is deposited primarily on the n-type region by a first immersion plating is performed. Prior to plating, the sample was washed to remove any organics from the surface to be plated, followed by DI water rinse, oxide removal from the surface to be plated in a 2% HF solution for 90 seconds, and DI water rinse. The impregnated Ni (i-Ni) bath contained DI water, 30% by mass of NH 4 F, and 0.1 M of nickel sulfamate Ni(SO 3 NH 2 ) 2 . The pH of the plating bath was adjusted to a pH of 8.5. This immersion Ni plating was performed at 60 ° C for 30 seconds while stirring with a solution provided by a magnetic stirrer at 200 rpm. This immersion Ni plating is performed in the dark as discussed above with respect to a prior example. Next, the sample was rinsed with DI water, and one of the procedure steps of electroless Ni plating for 2 minutes was performed at 82 ° C using a commercially available solution (Macdermid Ultraplanar, pH 4.8) for electroless Ni plating. In the next step, after the DI rinse sample again, under conditions similar to the previous immersion Ni plating step (for example, again at 60 ° C in the dark and at a 200 rpm stirring by a magnetic stirrer) B) Perform a further impregnation of Ni plating for 90 seconds. The impregnated Ni bath used in this immersion Ni plating step also has the same composition as in the previous immersion Ni plating step. After further DI rinsing of the sample, a further electroless Ni plating was performed at 82 ° C for 12 minutes (Macdermid Ultraplanar, pH 4.8).

如上文中所述,藉由以複數個步驟沈積進一步金屬層(例如,結合沈積初始Ni層之一短步驟(諸如在此實例中,30秒初始浸漬鍍覆步驟))之此分割,獲得不過厚諸如以實質上增大接觸電阻但足以實現在下一步驟中進行一良好無電Ni鍍覆之一初始Ni層。由於在浸漬Ni鍍覆中Ni沈積於n型材料上之速率高於Ni沈積於p型材料上之速率,故浸漬鍍覆及無電Ni鍍覆之第一步驟(具體言之)達成n型材料表面上之一良好鍍覆,而浸漬鍍覆及無電Ni鍍覆之以下步驟完成用來達成p型材料上之一良好鍍覆之程序,如上文中已論述。 As described above, by dividing the further metal layer in a plurality of steps (eg, in combination with a short step of depositing one of the initial Ni layers (such as in this example, a 30 second initial immersion plating step)), the thickness is not too thick. An initial Ni layer such as to substantially increase the contact resistance but sufficient to effect a good electroless Ni plating in the next step. Since the rate of Ni deposition on the n-type material in the Ni-plated immersion is higher than the rate at which Ni is deposited on the p-type material, the first step (specifically) of the immersion plating and the electroless Ni plating reaches the n-type material. One of the surfaces is well plated, and the following steps of immersion plating and electroless Ni plating complete the procedure for achieving a good plating on the p-type material, as discussed above.

在此實例中,藉由如下之下一步驟進一步延伸交替浸漬鍍覆及無電鍍覆之此多步驟方法:在再次DI沖洗樣本之後使用一市售溶液 (MacDermid Helios Silver IM 448)進行一預i-Ag沈積步驟達60s;及進行90s之i-Ag沈積步驟(MacDermid Helios Silver IM 448)。 In this example, the multi-step process of alternating immersion plating and electroless plating is further extended by the following step: using a commercially available solution after rinsing the sample again with DI (MacDermid Helios Silver IM 448) was subjected to a pre-i-Ag deposition step for 60 s; and a 90 s i-Ag deposition step (MacDermid Helios Silver IM 448).

前述描述詳述本發明之某些實施例。然而,將明白,無論前文如何以文字詳述,本發明仍可以諸多方式實踐。應注意,在描述本發明之某些特徵或態樣時使用特定術語應被視為暗示該術語在本文中被重新定義為限於包含與該術語相關聯的本發明之特徵或態樣之任何特定特性。 The foregoing description details certain embodiments of the invention. However, it will be appreciated that the present invention may be practiced in many ways, no matter how detailed the text is. It should be noted that the use of a particular term in the description of certain features or aspects of the invention is to be construed as an implied that the term is re-restricted herein to be limited to any particular feature or feature of the invention. characteristic.

雖然本發明之上文實施方式以及發明內容已專注於一種用於形成接觸電極之方法,但本發明亦係關於一種包括使用根據如上文所述之任何實施例之一方法獲得的金屬電極之裝置,例如一光伏打電池。 Although the above embodiments and the summary of the invention have focused on a method for forming a contact electrode, the invention is also directed to a device comprising a metal electrode obtained using a method according to any of the embodiments described above. For example, a photovoltaic battery.

雖然上文實施方式已展示、描述及指出如應用於各項實施例之本發明之新穎特徵,但應瞭解,熟習此項技術者可在不背離本發明之情況下對所繪示裝置或程序之形式及細節作出各種省略、替換及改變。 While the above-described embodiments have shown, described and illustrated the novel features of the present invention as applied to the various embodiments, it will be understood by those skilled in the art Various forms, details and details are omitted, substituted and changed.

100‧‧‧方法 100‧‧‧ method

101‧‧‧步驟 101‧‧‧Steps

102‧‧‧步驟 102‧‧‧Steps

103‧‧‧步驟 103‧‧‧Steps

Claims (10)

一種用於並行地在一矽基板(10)之一n型區域(11)上形成一第一金屬電極(31)且在該矽基板(10)之一p型區域(12)上形成一第二金屬電極(32)的方法(100),該方法包括:提供(101)包括一矽基板(10)之一基板(20),該矽基板(10)包括一n型區域(11)及一p型區域(12),其中該n型區域(11)暴露於該矽基板(10)之一表面(21、22)處之一第一區域(1)中,且其中該p型區域(12)暴露於該矽基板之一表面(21、22)處之一第二區域(2)中;藉由執行一鎳浸漬鍍覆程序而將一初始鎳層(33)同時沈積(102)於該基板表面(21、22)上之該第一區域(1)及該第二區域(2)中;及藉由執行一無電金屬鍍覆程序或藉由執行一浸漬金屬鍍覆程序而將一進一步金屬層(34)沈積(103)於該第一區域(1)及該第二區域(2)中之該初始Ni層(33)上。 A method for forming a first metal electrode (31) on one of the n-type regions (11) of a substrate (10) in parallel and forming a first on a p-type region (12) of the germanium substrate (10) The method (100) of a two-metal electrode (32), the method comprising: providing (101) a substrate (20) comprising a substrate (10), the substrate (10) comprising an n-type region (11) and a a p-type region (12), wherein the n-type region (11) is exposed to one of the first regions (1) at one of the surfaces (21, 22) of the germanium substrate (10), and wherein the p-type region (12) Exposing to a second region (2) at one of the surfaces (21, 22) of the germanium substrate; simultaneously depositing (102) an initial nickel layer (33) by performing a nickel dip plating process And in the first region (1) and the second region (2) on the substrate surface (21, 22); and further by performing an electroless metal plating process or by performing an immersion metal plating process A metal layer (34) is deposited (103) on the initial Ni layer (33) in the first region (1) and the second region (2). 如請求項1之方法(100),其中沈積(103)該進一步金屬層(34)包括:藉由執行一無電鎳鍍覆程序而沈積一進一步鎳層。 The method (100) of claim 1, wherein depositing (103) the further metal layer (34) comprises: depositing a further nickel layer by performing an electroless nickel plating process. 如請求項1之方法(100),其中該進一步金屬層(34)之該沈積(103)包括以下步驟之序列:將一進一步金屬層沈積(401)於該第一區域(1)中之該初始鎳層(33)上;藉由執行一鎳浸漬鍍覆程序而將一進一步鎳層沈積(402)於該第二區域(2)中;及將該進一步金屬層沈積於該第一區域(1)及該第二區域(2)中之該進一步鎳層上。 The method (100) of claim 1, wherein the depositing (103) of the further metal layer (34) comprises the sequence of: depositing (401) a further metal layer in the first region (1) Depositing a further nickel layer (402) in the second region (2) by performing a nickel immersion plating process; and depositing the further metal layer on the first region ( 1) and the further nickel layer in the second region (2). 如請求項3之方法(100),其中該進一步金屬層(34)之該沈積(103)包括以下步驟之序列:藉由執行一無電鎳鍍覆程序而將一第一進一步鎳層沈積(401)於該第一區域(1)中之該初始鎳層(33)上; 藉由執行一鎳浸漬鍍覆程序而將一第二進一步鎳層沈積(402)於該第二區域(2)中;及藉由執行一無電鎳鍍覆程序而將一第三進一步鎳層沈積於該第一區域(1)中之該第一進一步鎳層上及該第二區域(2)中之該第二進一步鎳層上。 The method (100) of claim 3, wherein the depositing (103) of the further metal layer (34) comprises the sequence of: depositing a first further nickel layer by performing an electroless nickel plating process (401) ) on the initial nickel layer (33) in the first region (1); Depositing a second further nickel layer (402) in the second region (2) by performing a nickel immersion plating process; and depositing a third further nickel layer by performing an electroless nickel plating process And on the second further nickel layer in the first region (1) and on the second further nickel layer in the second region (2). 如請求項2或請求項4之方法(100),其進一步包括將一可焊接罩蓋層提供於該進一步鎳層上,其中提供該可焊接罩蓋層包括:藉由執行一銀浸漬鍍覆程序而提供一銀層;或藉由執行一錫鍍覆程序而提供一錫層;或提供一有機罩蓋層。 The method (100) of claim 2 or claim 4, further comprising providing a solderable cap layer on the further nickel layer, wherein providing the solderable cap layer comprises: performing a silver immersion plating A silver layer is provided by the program; or a tin layer is provided by performing a tin plating process; or an organic cap layer is provided. 如請求項1之方法(100),其中沈積(103)該進一步金屬層(34)包括:藉由執行一無電銀鍍覆程序或藉由執行一浸漬銀鍍覆程序而沈積一銀層。 The method (100) of claim 1, wherein depositing (103) the further metal layer (34) comprises depositing a silver layer by performing a electroless silver plating process or by performing a immersion silver plating process. 如請求項1至4或6中任一項之方法(100),其中提供(101)該基板(20)包括:提供包括該n型區域(11)及該p型區域(12)之一矽基板(10);在該矽基板(10)之至少一個表面(21、22)上提供一介電層(13);及從該基板之該第一區域(1)及該第二區域(2)中移除該介電層。 The method (100) of any one of claims 1 to 4, wherein the providing (101) the substrate (20) comprises providing one of the n-type region (11) and the p-type region (12). a substrate (10); a dielectric layer (13) is provided on at least one surface (21, 22) of the germanium substrate (10); and the first region (1) and the second region (2) from the substrate The dielectric layer is removed. 如請求項1至4或6中任一項之方法(100),其進一步包括在250℃與400℃之間的範圍中之一溫度下執行一燒結步驟。 The method (100) of any one of claims 1 to 4 or 6, further comprising performing a sintering step at a temperature in a range between 250 ° C and 400 ° C. 一種用於製造一雙面光伏打電池之方法(200),該方法包括:如請求項1至4或6中任一項並行地在一矽基板(10)之一n型區域(11)上形成一第一金屬電極(31)且在該矽基板(10)之一p型區域(12)上形成一第二金屬電極(32)。 A method (200) for manufacturing a double-sided photovoltaic cell, the method comprising: in parallel with any one of claims 1 to 4 or 6 on an n-type region (11) of a substrate (10) A first metal electrode (31) is formed and a second metal electrode (32) is formed on one of the p-type regions (12) of the germanium substrate (10). 一種用於製造一背部接觸光伏打電池之方法,該方法包括:如請求項1至4或6中任一項並行地或同時在一矽基板(10)之一n型 區域(11)上形成一第一金屬電極(31)且在該矽基板(10)之一p型區域(12)上形成一第二金屬電極(32)。 A method for manufacturing a back contact photovoltaic cell, the method comprising: n-type one of the substrate (10) in parallel or simultaneously as claimed in any one of claims 1 to 4 or 6 A first metal electrode (31) is formed on the region (11) and a second metal electrode (32) is formed on one of the p-type regions (12) of the germanium substrate (10).
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