TW201703407A - Boost converter for reducing inductor current and driving method thereof - Google Patents

Abstract

A boost converter for reducing inductor current and a driving method thereof are provided. The boost converter has an inductor, a PMOS transistor, a NMOS transistor, two diodes, two capacitors, and a control unit. The control unit has a control circuit, a soft-start circuit, and a detecting circuit. The inductor current of the boost converter can be reduced by the soft-start circuit.

Description

Boost converter for reducing inductor current and driving method thereof

The present invention relates to a boost converter and a driving method thereof, and more particularly to a boost converter for reducing an inductor current and a driving method thereof.

In the current technology, many battery-powered systems, uninterruptible power systems (UPS), or solar power systems require boost converters, and continuous power systems and solar power systems require higher voltage conversion. Compared to the converter. There are a variety of boost converters for increasing the voltage conversion ratio of higher voltage conversion ratios, among which boost converters are widely used, and positive/negative high potential voltages in many applications are The boost converter goes to get it.

Referring to FIG. 1 , a boost converter includes a power supply V _DD , a control circuit 11 , a detection circuit 12 , a P-type power transistor 13 , an N-type power transistor 14 , and an inductor . The control circuit 11 outputs a driving signal V _GDRP , V _GDRN to the gate of the P-type power transistor 13 and the gate of the N-type power transistor 14 , and utilizes the charge and discharge characteristics of the inductor 14 . And converting a low potential voltage V _P to a positive high potential voltage.

However, when the boost converter is just started, the power supply V _DD is extracted with a large inductor current I _L . At this time, when the voltage V _{P is} less than V _DD -V _D2 , the inductor current I _L The current peak value will gradually increase upward (see Figure 2). In a specific application, the power supply V _{DD is} a battery. When the current peak of the inductor current I _L is too large, the battery is used for a long time. The current I _{L is} more susceptible to damage to the battery and results in a reduced life of the battery.

Therefore, it is necessary to improve the boost converter of the prior art to solve The boost converter of the prior art is more susceptible to damage to the battery and causes a problem of reduced lifetime of the battery.

The main object of the present invention is to provide a boost for reducing the inductor current. The converter uses a soft-start circuit design to produce a smaller inductor current.

Another object of the present invention is to provide a boost for reducing inductor current The driving method of the converter uses the P-type power transistor and the gate of the N-type power transistor to receive a square wave with a small duty cycle in the first soft start mode, and a large duty cycle in the second soft start mode. Square wave, thereby avoiding damage to the power supply and extending the service life.

To achieve the above object, the present invention provides a method for reducing the rise of the inductor current. The voltage converter comprises a P-type power transistor, an inductor, an N-type power transistor, two diodes, two capacitors and a control unit; the P-type power transistor comprises a gate, a drain and a source electrically connected to a power source; one end of the inductor is electrically connected to the drain of the P-type power transistor; the N-type power transistor includes a gate, a drain, and a source. The drain is electrically connected to the other end of the inductor; one end of the diodes is electrically connected to the drain of the P-type power transistor and the drain of the N-type power transistor; the capacitors are electrically connected The other end of the diodes, and the The two capacitors are respectively used to generate a first load voltage and a second load voltage. The control unit includes a control circuit, a soft start circuit and a detection circuit. The control circuit is electrically connected to the P-type power transistor. a gate and a gate of the N-type power transistor for respectively outputting: a first driving signal to drive the P-type power transistor; and a second driving signal to drive the N-type power transistor, The soft start circuit is electrically connected to the control circuit; the detection circuit is electrically connected to the control circuit and the other end of the diodes, wherein the soft start circuit is used to make the control circuit in a first soft start mode and Switching between a second soft start mode, wherein a duty cycle of the first and second drive signals in the first soft start mode is smaller than a duty cycle of the first and second drive signals in the second soft start mode .

In an embodiment of the invention, the detecting circuit has: a first comparator, The first load voltage is compared to generate a first detection voltage; and a second comparator is configured to compare the second load voltage and generate a second detection voltage.

In an embodiment of the invention, the control circuit has a waveform generation group The waveform generating component is configured to receive the first detection voltage and the second detection voltage, and output the first and second driving signals in the second soft start mode, respectively.

In an embodiment of the invention, the waveform generating component has: a sawtooth wave a sawtooth wave comparator electrically connected to the sawtooth wave generator; and an exchange control logic for receiving the signal of the sawtooth wave comparator and the first detection voltage and the second detection voltage, respectively And outputting the first and second driving signals in the second soft start mode.

In an embodiment of the invention, the soft start circuit has a first selection a second selector, a clock generator and a counting component; the first selector is electrically connected to the gate of the P-type power transistor, and configured to receive the first driving in the second soft start mode News The second selector is electrically connected to the gate of the N-type power transistor and configured to receive the second driving signal in the second soft start mode; the clock generator is configured to generate the first soft start The first and second driving signals are transmitted to the first selector and the second selector respectively; the counting component is configured to count a time to generate a soft start signal and respectively transmit to the first selector and Second selector.

In an embodiment of the invention, the counting component has a counter and a positive The counter is electrically connected to the clock generator for calculating and determining the number of clocks generated by the clock generator, and the flip-flop is electrically connected to the counter for generating the soft start signal.

To achieve the above object, the present invention provides a method for reducing the rise of the inductor current. The driving method of the voltage converter comprises a starting step, a first soft starting step, a second soft starting step and a switching step; the starting step is for turning on a power source to make a P-type power transistor and an N-type The first soft start step is configured to generate, by using a clock generator, a first driving signal and a second driving signal in the first soft start mode in a first soft start mode, and respectively Transmitting to a gate of the P-type power transistor and a gate of an N-type power transistor by a first selector and a second selector; the second soft start step is used for a second soft start In the mode, a soft start signal is respectively transmitted to the first selector and the second selector by using a counting component; the switching step is selected by the first selector and the second selector to generate a waveform generating component. The first and second driving signals in the second soft start mode are respectively transmitted to the gate of the P-type power transistor and the gate of the N-type power transistor, wherein the first in the first soft start mode And the second drive signal For the period is less than the first and the second driving signal duty cycle of the second time soft-start mode.

In an embodiment of the present invention, after the switching step, the method further includes a detection a step of receiving a first load voltage and a second load voltage by using a detecting circuit, and comparing the first load voltage and the second load voltage with a reference voltage, thereby determining whether to turn off the P-type power transistor and N-type power transistor.

As described above, the P-type power transistor is designed by the design of the soft start circuit And the gate of the N-type power transistor receives a square wave with a small duty cycle in the first soft start mode, and receives a square wave with a large duty cycle in the second soft start mode, thereby further enabling the P-type power The time during which the crystal and the N-type power transistor are turned on and off is matched, wherein the peak current of the inductor current in the first soft start mode is depressed, and a smaller injection current can be generated, thereby preventing the power supply from being damaged. And extend the service life.

100‧‧‧Boost Converter

11‧‧‧Control circuit

12‧‧‧Detection circuit

13‧‧‧P type power transistor

14‧‧‧N type power transistor

15‧‧‧Inductance

2‧‧‧P type power transistor

3‧‧‧Inductance

4‧‧‧N type power transistor

51, 52‧‧‧ diodes

61, 62‧‧‧ capacitor

7‧‧‧Control unit

71‧‧‧Control circuit

711‧‧‧ Waveform generating components

712‧‧‧Sawtooth generator

713‧‧‧Sawtooth Wave Comparator

714‧‧‧Exchange Control Logic

72‧‧‧Soft start circuit

721‧‧‧First selector

722‧‧‧Second selector

723‧‧‧ Counting components

724‧‧‧ Clock Generator

725‧‧‧ counter

726‧‧‧Factor

73‧‧‧Detection circuit

731‧‧‧First comparator

732‧‧‧First comparator

733‧‧Amplifier

V _DD ‧‧‧ power supply

V _P ‧‧‧First load voltage

V _N ‧‧‧second load voltage

V _GDRP ‧‧‧First drive signal

V _{GDRN ‧‧‧second} drive signal

V _POK ‧‧‧First detection voltage

V _NOK ‧‧‧Second detection voltage

V _REF ‧‧‧First reference voltage

V _CTRL ‧‧‧second reference voltage

V _D2 ‧‧‧ voltage

I _L ‧‧‧Inductor current

S201‧‧‧ Startup steps

S202‧‧‧First soft start procedure

S203‧‧‧Second soft start procedure

S204‧‧‧Switching steps

S205‧‧‧Detection steps

1 is a circuit diagram of a conventional boost converter; FIG. 2 is a comparison diagram of voltages and currents of respective components of a boost converter according to the prior art; and FIGS. 3 to 5 are diagrams for use according to the present invention. A circuit diagram of a preferred embodiment of a boost converter for reducing inductor current; and FIG. 6 is a comparison of voltages and currents of various components of a boost converter for reducing inductor current in accordance with the present invention. Figure 7 and Figure 7 are flow diagrams of a preferred embodiment of a method of driving a boost converter for reducing inductor current in accordance with the present invention.

The above and other objects, features and advantages of the present invention will become more <RTIgt; Furthermore, the directional terms mentioned in the present invention, such as upper, lower, top, bottom, front, rear, left, right, inner, outer, side, surrounding, central, horizontal, horizontal, vertical, longitudinal, axial, Radial, uppermost or lowermost, etc., only refer to the direction of the additional schema. Therefore, the directional terminology used is for the purpose of illustration and understanding of the invention.

Referring to FIG. 3, which is a preferred embodiment of the boost converter for reducing inductor current, the boost converter 100 includes a P-type power transistor 2, an inductor 3, and a N. The power transistor 4, the two diodes 51, 52, the two capacitors 61, 62 and a control unit 7 will be described in detail below for the detailed construction, assembly relationship and operation principle of each component.

Referring to FIG. 4, the P-type power transistor 2 is a P-type MOS field-effect transistor (PMOS), and the P-type power transistor 2 includes a gate, a drain, and a source. The source is electrically connected to a power source V _DD .

Referring to FIG. 3, one end of the inductor 3 is electrically connected to the drain of the P-type power transistor 2, and the N-type power transistor 4 includes a gate, a drain, and a source. The drain is electrically connected to the other end of the inductor 3.

Referring to FIG. 3 , one end of one of the diodes 51 is electrically connected to the drain of the P-type power transistor 2 , and one end of the other diode 52 is electrically connected to the anode of the N-type power transistor 4 . pole.

Referring to FIG. 3 , one of the capacitors 61 is electrically connected to the other end of the diode 51 , and the other capacitor 62 is electrically connected to the other end of the diode 52 , and the two capacitors 61 and 62 are grounded. Therefore, when the diode 52 is turned on, the capacitor 62 generates a first load voltage V _P ; when the diode 51 is turned on, the capacitor 61 generates a second load voltage V _N .

Continuing to refer to FIG. 3, the control unit 7 includes a control circuit 71, a soft start circuit 72, and a detection circuit 73. The control circuit 71 is electrically connected to the gate of the P-type power transistor 2, respectively. The gate of the N-type power transistor 4, and the control circuit 71 is configured to respectively output a first driving signal V _GDRP and a second driving signal V _GDRN , wherein the first driving signal V _GDRP is used to drive the P The power driving transistor 2, the second driving signal V _GDRN is used to drive the N-type power transistor 4; and the soft start circuit 72 is electrically connected to the control circuit 71; the detecting circuit 73 is electrically connected to the The control circuit 71 and the other ends of the diodes 51, 52.

It should be noted that the soft start circuit 72 is configured to switch the control circuit 71 between a first soft start mode and a second soft start mode, wherein the first drive signal V in the first soft start mode The duty cycle of the _GDRP and the second driving signal V _GDRN is smaller than the duty cycle of the first driving signal V _GDRP and the second driving signal V _GDRN in the second soft start mode. As shown in FIG. 6, in the first soft start mode, the duty cycles of the first driving signal V _GDRP and the second driving signal V _GDRN are small and match.

As shown in FIG. 3 and FIG. 4, the detecting circuit 73 has a first comparator 731 and a second comparator 732. The first comparator 731 is configured to combine the first load voltage V _P with a first The reference voltage V _REF is compared to generate a first detection voltage V _POK , and the second comparator 732 is configured to compare the second load voltage V _N with the first reference voltage V _REF through an amplifier 733, and A second detection voltage V _{NOK is} generated.

As shown in FIG. 3 and FIG. 5, the control circuit 71 has a waveform generating component 711 for receiving the first detection voltage V _POK and the second detection voltage V _NOK , and outputting the signals respectively. The first driving signal V _GDRP and the second driving signal V _{GDRN in} the second soft start mode. The waveform generating component 711 has a sawtooth wave generator 712, a sawtooth wave comparator 713, and an exchange control logic 714. The sawtooth wave comparator 713 is electrically connected to the sawtooth wave generator 712, and the sawtooth wave is The sawtooth wave of the generator 712 is compared with a second reference voltage V _CTRL for receiving the signal output by the sawtooth wave comparator 713 and the first detection voltage V _POK and the second detection voltage V _{The NOK} further outputs the first driving signal V _GDRP and the second driving signal V _{GDRN in} the second soft start mode.

Continuing with reference to FIGS. 3 and 5, the soft start circuit 72 has a first selector 721, a second selector 722, a counting component 723, and a clock generator 724; the first selector 721 is electrically connected. The gate of the P-type power transistor 2 is configured to receive the first driving signal V _GDRP in the second soft start mode; the second selector 722 is electrically connected to the gate of the N-type power transistor 4, And receiving the second driving signal V _GDRN in the second soft start mode; the clock generator 723 is configured to generate the first driving signal V _GDRP and the second driving in the first soft start mode The signal V _{GDRN is} further transmitted to the first selector 721 and the second selector 722 respectively; the counting component 724 is configured to count a time to generate a soft start signal and respectively transmit to the first selector 721 and the second selection 722.

Referring to Figures 3 and 5, the counting component 723 has a counter 725 and a flip-flop 726, wherein the counter 725 is electrically connected to the clock generator 723 for calculating the number of clocks generated by the clock generator 723 and determining, the flip-flop 726 is electrically connected to the counter 725, The result of the determination of the counter 725 is received, and the soft start signal is generated.

According to the above configuration, the first selector 721 and the second selector 722 initially transmit the first driving signal V _GDRP and the second driving signal V _GDRN in the second soft start mode generated by the clock generator 724 respectively. Transmitted to the gate of the P-type power transistor 2 and the gate of the N-type power transistor 4, and the counting component 723 of the soft-start circuit 72 counts the clock period generated by the clock generator 724; When the counting component 723 counts the generated clock cycle of the clock generator 724 to reach a predetermined target, the soft start signal is generated and transmitted to the first selector 721 and the second selector 722, the first selector 721 After receiving the soft start signal, the second selector 722 selects the first driving signal V _GDRP and the second driving signal V _GDRN generated by the waveform generating component 711 in the second soft start mode, respectively, to the The gate of the P-type power transistor 2 and the gate of the N-type power transistor 4. The working periods of the first driving signal V _GDRP and the second driving signal V _GDRN in the first soft start mode are small and matched, and the P-type power transistor 2 and the N-type power transistor 4 can be reduced in turn-on and The time error of closing, and thus avoiding most of the inductor current I _L biased towards positive or negative boost.

As described above, the present invention enables the gates of the P-type power transistor 2 and the N-type power transistor 4 to receive a square wave having a small duty cycle in the first soft start mode by the design of the soft start circuit 72. Receiving a square wave with a large duty cycle in the second soft start mode, thereby matching the time when the P-type power transistor 2 and the N-type power transistor 4 are turned on and off, wherein the inductor current I _{L is} in the The peak current in the first soft start mode is depressed, and a smaller injection current I _L can be generated, thereby avoiding damage to the power supply V _DD and prolonging the service life.

Please refer to FIG. 7 and cooperate with the third, fourth, and fifth figures to reduce the present invention. A preferred embodiment of the driving method of the inductor current boost converter is driven by the preferred embodiment of the boost converter for reducing the inductor current, the driving method comprising a starting step S201, a first A soft start step S202, a second soft start step S203, a switch step S204, and a detecting step S205.

Referring to FIG. 7, in the starting step S201, a power source V _{DD is} turned on, and a P-type power transistor 2 and an N-type power transistor 4 of a boost converter 100 are turned on; When the boost converter 100 is started, the diode 52 of the boost converter 100 is turned on and generates a voltage V _D2 such that the load voltage V _P of the capacitor 62 of the boost converter 100 is V _DD -V _{D2 .} .

Referring to FIG. 7, in the first soft start step S202, a control circuit 71 that controls the boost converter 100 generates the first one in a first soft start mode, that is, by using a clock generator 724. The first driving signal V _GDRP and the second driving signal V _GDRN are respectively transmitted from a first selector 721 and a second selector 722 to a gate of the P-type power transistor 2 and A gate of an N-type power transistor 4. In this embodiment, when the count of the counting component 723 of a soft start circuit 72 of the boost converter 100 does not reach the predetermined target, the first selector 721 and the second selector 722 will continue with the first soft start. The first driving signal V _GDRP and the second driving signal V _{GDRN of the mode} are respectively output to the gate of the P-type power transistor 2 and the gate of the N-type power transistor 4 .

It should be noted that the first driving signal V _GDRP and the second driving signal V _{GDRN in} the first soft start mode generate a clock by using a clock generator 723 when the voltage level of the signal is high. The P-type power transistor 2 and the N-type power transistor 4 are simultaneously turned on to charge the inductor 3; when the voltage level of the signal is low, the P-type power transistor 2 and the N-type power The crystal 4 is simultaneously turned off, and the inductor 3 discharges the two capacitors 61 and 62 to complete a one-cycle boosting operation, and then performs a plurality of cycles of boosting operation to make the first load voltage V _P exceed V _DD - V _D2 .

Referring to FIG. 7, in the second soft start step S203, the meter is utilized. The number component 723 transmits a soft start signal to the first selector 721 and the second selector, respectively. 722, the control circuit 71 is controlled in a second soft start mode. In this embodiment, the clock generator 724 also outputs the clock to the counting component 723. After the signal has passed a plurality of cycles, the counting component 723 counts the clock cycle of the signal to reach the predetermined target. That is, the soft start signal is generated and transmitted to the first selector 721 and the second selector 722.

Referring to FIG. 7, in the switching step S204, after the first selector 721 and the second selector 722 receive the soft start signal, the second soft start generated by the waveform generating component 711 is selected. The first driving signal V _GDRP and the second driving signal V _GDRN are respectively transmitted to the gate of the P-type power transistor 2 and the gate of the N-type power transistor 4, wherein the first soft start mode is _V GDRP first driving signal when the second driving signal and the duty cycle is less than _V GDRN when the soft-start mode of the second driving signal _V GDRP first and second duty cycle of the driving signal _V GDRN.

Referring to FIG. 7 , in the detecting step S205 , a detecting circuit 73 receives a first load voltage V _P and a second load voltage V _N , and causes the first load voltage V _P and a second load voltage V _N is compared with a first reference voltage V _REF, thus determining whether to turn off power transistor 2 P-type and N-type power transistor 4. In this embodiment, when the P-type power transistor 2 is turned on and the N-type power transistor 4 is turned off, the inductor 3 discharges the capacitor 62, and the first load voltage V _P rises to complete a boosting action; When the P-type power transistor 2 is turned off and the N-type power transistor 4 is turned on, the inductor 3 discharges the capacitor 61, and the second load voltage V _N falls to complete a negative boosting operation, and the first load voltage V is to be completed. _{When the P} and the second load voltage V _N reach the target voltage, the detecting circuit 73 turns off the P-type power transistor 2 and the N-type power transistor 4.

As described above, the present invention enables the gates of the P-type power transistor 2 and the N-type power transistor 4 to receive a square wave having a small duty cycle in the first soft start mode by the design of the soft start circuit 72. Receiving a square wave with a large duty cycle in the second soft start mode, thereby matching the time when the P-type power transistor 2 and the N-type power transistor 4 are turned on and off, wherein the inductor current I _{L is} in the The peak current in the first soft start mode is depressed, and a smaller injection current I _L can be generated, thereby avoiding damage to the power supply V _DD and prolonging the service life.

The present invention has been disclosed in its preferred embodiments, and is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application.

100‧‧‧Boost Converter

2‧‧‧P type power transistor

3‧‧‧Inductance

4‧‧‧N type power transistor

51, 52‧‧‧ diodes

61, 62‧‧‧ capacitor

7‧‧‧Control unit

71‧‧‧Control circuit

72‧‧‧Soft start circuit

73‧‧‧Detection circuit

V _DD ‧‧‧ power supply

V _P ‧‧‧First load voltage

V _N ‧‧‧second load voltage

V _GDRP ‧‧‧First drive signal

V _{GDRN ‧‧‧second} drive signal

V _D2 ‧‧‧ voltage

I _L ‧‧‧Inductor current

Claims (8)

A boost converter for reducing an inductor current, comprising: a P-type power transistor comprising a gate, a drain and a source, the source being electrically connected to a power source; and an inductor having an electrical end Connecting a drain of the P-type power transistor; an N-type power transistor comprising a gate, a drain and a source, the drain is electrically connected to the other end of the inductor; two diodes, the One end of the diode is electrically connected to the drain of the P-type power transistor and the drain of the N-type power transistor; the second capacitor is electrically connected to the other end of the diode, and the two capacitors are respectively connected Each of the control unit includes a control circuit electrically connected to the gate of the P-type power transistor and the gate of the N-type power transistor, respectively. For respectively outputting: a first driving signal to drive the P-type power transistor; and a second driving signal to drive the N-type power transistor; a soft start circuit electrically connecting the control circuit; a detection circuit electrically connected to the control circuit and the diodes The other end; wherein the soft-start circuit for causing the control circuit is switched between a first mode and a second soft start soft-start mode, wherein when the first of the soft-start mode The duty cycles of the first and second driving signals are less than the duty cycles of the first and second driving signals in the second soft start mode. The boost converter for reducing the inductor current according to the first aspect of the patent application, wherein the detecting circuit has: a first comparator for comparing the first load voltage and generating a first detecting voltage; And a second comparator for comparing the second load voltage and generating a second detection voltage. According to the second aspect of the patent application, the boost converter for reducing the inductor current, wherein the control circuit has a waveform generating component, the waveform generating component is configured to receive the first detecting voltage and the second detecting voltage, and The first and second driving signals in the second soft start mode are respectively output. a boost converter for reducing an inductor current according to claim 3, wherein the waveform generating component has: a sawtooth generator; a sawtooth comparator electrically connected to the sawtooth generator; and an exchange The control logic is configured to receive the signal of the sawtooth wave comparator, the first detection voltage and the second detection voltage, and output the first and second driving signals in the second soft start mode, respectively. A boost converter for reducing an inductor current according to claim 3, wherein the soft start circuit has: a first selector electrically connected to a gate of the P-type power transistor and configured to receive a first driving signal in the second soft start mode; a second selector electrically connected to the gate of the N-type power transistor and configured to receive the second driving signal in the second soft start mode; a clock generator for generating first and second driving signals in the first soft start mode, and transmitting to the first selector and the second selector respectively; and a counting component for counting time A soft start signal is generated and transmitted to the first selector and the second selector, respectively. According to claim 5, the boost converter for reducing the inductor current, wherein the counting component has: a counter electrically connected to the clock generator for calculating the number of clock pulses generated by the clock generator And determining; and a flip-flop, electrically connecting the counter to generate the soft start signal. A driving method for a boost converter for reducing an inductor current, comprising the steps of: a starting step for turning on a power source to turn on a P-type power transistor and an N-type power transistor; and a first soft start step The first driving signal and the second driving signal of the first soft start mode are generated by a clock generator in a first soft start mode, and are respectively selected by a first selector and a second selection. The device transmits to a gate of the P-type power transistor and a gate of an N-type power transistor. a second soft start step for transmitting a soft start signal to the first selector and the second selector by a counting component in a second soft start mode; and a switching step, via the first The selector and the second selector select to transmit the first and second driving signals generated by the waveform generating component in the second soft start mode to the gate of the P-type power transistor and the N-type power a gate of the crystal, wherein the first and second driving signals are in the first soft start mode The duty cycle is less than the duty cycle of the first and second driving signals in the second soft start mode. The driving method of the boost converter for reducing the inductor current according to the seventh aspect of the patent application, wherein after the switching step, the method further includes a detecting step of receiving a first load voltage and a detecting circuit by using a detecting circuit The second load voltage compares the first load voltage and the second load voltage with a reference voltage, thereby determining whether to close the P-type power transistor and the N-type power transistor.