TW201624445A - Method for adjusting terminal impedance - Google Patents

Method for adjusting terminal impedance Download PDF

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Publication number
TW201624445A
TW201624445A TW103145468A TW103145468A TW201624445A TW 201624445 A TW201624445 A TW 201624445A TW 103145468 A TW103145468 A TW 103145468A TW 103145468 A TW103145468 A TW 103145468A TW 201624445 A TW201624445 A TW 201624445A
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Taiwan
Prior art keywords
time
differential signal
impedance
terminal
terminal impedance
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TW103145468A
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Chinese (zh)
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謝詠裕
陳昀至
何彥樓
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中華映管股份有限公司
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Priority to TW103145468A priority Critical patent/TW201624445A/en
Priority to CN201510098977.6A priority patent/CN105991106B/en
Publication of TW201624445A publication Critical patent/TW201624445A/en

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Abstract

A method for adjusting terminal impedance is provided, which is adapted for adjusting a terminal impedance of a differential signal receiver, and the adjusting method comprises the following steps. A current value of a differential signal flowing though the terminal impedance is detected by a current detecting circuit. Characteristic points of the differential signals are determined by a micro controller according to the current value of the differential signal. A distortion status of the differential signal is determined by the micro controller according to the characteristic points. An impedance value of the terminal impedance is adjusted by the micro controller according to the distortion status of the differential signal.

Description

終端阻抗調整方法 Terminal impedance adjustment method

本發明是有關於一種阻抗調整方法,且特別是有關於一種差分訊號接收器的終端阻抗調整方法。 The present invention relates to an impedance adjustment method, and more particularly to a terminal impedance adjustment method for a differential signal receiver.

近年來,由於面板解析度的提昇,因此為因應於高解析度面板大量的資料傳輸需求,則面板驅動器的傳輸介面必須採用高速資料傳輸介面。然而,高速訊號資料傳輸介面容易受到走線阻抗及訊號走線佈局方法的干擾。以差分訊號接收器而言,高速訊號資料傳輸介面對於走線的等效阻抗及終端阻抗的阻抗匹配要求相當嚴格。 In recent years, due to the increase in panel resolution, in response to the large amount of data transmission requirements of high-resolution panels, the transmission interface of panel drivers must use a high-speed data transmission interface. However, the high-speed signal data transmission interface is susceptible to interference from the trace impedance and signal routing methods. For the differential signal receiver, the high-speed signal data transmission interface has strict requirements on the impedance matching of the trace and the impedance matching of the terminal impedance.

雖然走線的等效阻抗可藉由走線佈局方式及印刷電路板的製程參數來控制,進而達到阻抗匹配要,但走線的等效阻抗仍可能受諸如導體膜厚公差、基材模厚公差、接合(bonding)接觸阻抗等不可力抗之因素影響,而造成等效阻抗偏移及不連續性,進而導致訊號失真,且造成顯示器顯示影像錯誤。因此,如何有效改善訊號失真現象則成為訊號傳輸介面的重要課題。 Although the equivalent impedance of the trace can be controlled by the trace layout and the process parameters of the printed circuit board to achieve impedance matching, the equivalent impedance of the trace may still be affected by, for example, conductor film thickness tolerance, substrate thickness. Tolerance, bonding contact resistance, etc. are not affected by the factors, resulting in equivalent impedance offset and discontinuity, which in turn causes signal distortion and causes the display to display image errors. Therefore, how to effectively improve signal distortion becomes an important issue in the signal transmission interface.

本發明提供一種終端阻抗調整方法,其依據流經終端阻抗的訊號電流值判斷訊號失真狀態,並依據失真狀態調整終端阻抗,以改善訊號失真現象。 The invention provides a terminal impedance adjustment method for determining a signal distortion state according to a signal current value flowing through a terminal impedance, and adjusting a terminal impedance according to a distortion state to improve signal distortion.

本發明的終端阻抗調整方法,適用於調整差分訊號接收器的終端阻抗,終端阻抗調整方法包括下列步驟。透過電流偵測電路偵測流經終端阻抗的差分訊號的電流值。透過微控制器依據差分訊號的電流值判斷差分訊號的多個特徵點,依據這些特徵點判斷差分訊號的失真狀態,且依據差分訊號的失真狀態調整終端阻抗的阻抗值。 The terminal impedance adjustment method of the present invention is suitable for adjusting the terminal impedance of the differential signal receiver, and the terminal impedance adjustment method comprises the following steps. The current value of the differential signal flowing through the terminal impedance is detected by the current detecting circuit. The plurality of feature points of the differential signal are determined by the microcontroller according to the current value of the differential signal, and the distortion state of the differential signal is determined according to the feature points, and the impedance value of the terminal impedance is adjusted according to the distortion state of the differential signal.

基於上述,本發明實施例的終端阻抗調整方法,其依據流經終端阻抗的差分訊號的電流值判斷差分訊號的失真狀態,並藉以調整終端阻抗。藉此,可確保其訊號完整性,進而改善訊號失真而導致顯示器畫面錯誤的現象。 Based on the above, the terminal impedance adjustment method according to the embodiment of the present invention determines the distortion state of the differential signal according to the current value of the differential signal flowing through the terminal impedance, and thereby adjusts the terminal impedance. In this way, the signal integrity can be ensured, thereby improving signal distortion and causing display screen errors.

為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。 The above described features and advantages of the invention will be apparent from the following description.

10‧‧‧傳輸介面 10‧‧‧Transport interface

100‧‧‧差分訊號接收器 100‧‧‧Differential Signal Receiver

110‧‧‧放大器 110‧‧‧Amplifier

130‧‧‧訊號改善電路 130‧‧‧Signal improvement circuit

131、133‧‧‧電流偵測電路 131, 133‧‧‧ current detection circuit

135‧‧‧微控制器 135‧‧‧Microcontroller

137‧‧‧開關控制器電路 137‧‧‧Switch controller circuit

150‧‧‧傳輸線端 150‧‧‧Transmission line end

S310~S370、S510~S590、S605~S690‧‧‧步驟 S310~S370, S510~S590, S605~S690‧‧‧ steps

a~h‧‧‧特徵點 a~h‧‧‧ feature points

C‧‧‧電容 C‧‧‧ capacitor

DSI+、DSI-‧‧‧差分訊號 DSI+, DSI-‧‧ ‧ differential signal

Ip1、Ip21‧‧‧電流 Ip1, Ip21‧‧‧ current

Rs、Rs1、Rs2‧‧‧傳輸導線阻抗 Rs, Rs1, Rs2‧‧‧ transmission line impedance

Rp、Rp1、Rp2‧‧‧終端阻抗 Rp, Rp1, Rp2‧‧‧ terminal impedance

SW1、SW2‧‧‧開關控制訊號 SW1, SW2‧‧‧ switch control signal

tf、tflat、tr‧‧‧時間臨界值 t f , t flat , t r ‧‧‧ time threshold

Vswing‧‧‧擺盪電壓 V swing ‧‧‧Swing voltage

V+、V-‧‧‧電壓 V+, V-‧‧‧ voltage

圖1為依據本發明一實施例的傳輸介面的電路示意圖。 1 is a circuit diagram of a transmission interface in accordance with an embodiment of the present invention.

圖2為依據本發明一實施例的訊號改善電路的細部電路示意 圖。 2 is a schematic diagram showing a detailed circuit of a signal improving circuit according to an embodiment of the invention. Figure.

圖3是依照本發明實施例說明終端阻抗調整方法之流程圖。 FIG. 3 is a flow chart illustrating a method for adjusting a terminal impedance according to an embodiment of the invention.

圖4是差分訊號的數位電流訊號波形之範例。 4 is an example of a digital current signal waveform of a differential signal.

圖5為初始階段進行阻抗匹配之流程圖。 Figure 5 is a flow chart for impedance matching in the initial stage.

圖6為週期性進行阻抗匹配之流程圖。 Figure 6 is a flow chart for periodically performing impedance matching.

圖1為依據本發明一實施例的傳輸介面的電路示意圖。請參照圖1,在本實施例中,傳輸介面10包括差分訊號接收器100及傳輸線端150。差分訊號接收器100例如包括比較器110及具有終端阻抗Rp的訊號改善電路130。本發明實施例的差分訊號接收器100可應用於例如是液晶顯示器(liquid crystal display;LCD)、有機發光顯示器(organic light emitting display;OLED)等類型顯示器的驅動電路控制器、控制晶片或控制電路,但本發明實施例不以此為限。 1 is a circuit diagram of a transmission interface in accordance with an embodiment of the present invention. Referring to FIG. 1 , in the embodiment, the transmission interface 10 includes a differential signal receiver 100 and a transmission line end 150 . The differential signal receiver 100 includes, for example, a comparator 110 and a signal improving circuit 130 having a terminal impedance Rp. The differential signal receiver 100 of the embodiment of the present invention can be applied to a driving circuit controller, a control chip or a control circuit of a display such as a liquid crystal display (LCD), an organic light emitting display (OLED) or the like. However, the embodiments of the present invention are not limited thereto.

在本實施例中,差分訊號DSI+、DSI-由系統端(host)(例如,中央處理器(Central Processing Unit;CPU)、微處理器等)發送後,分別經過傳輸線端150的傳輸導線傳送至差分訊號接收器100,其中傳輸線端150的傳輸導線會形成等效阻抗Rs1、Rs2。當差分訊號DSI+、DSI-傳送至訊號改善電路130的終端阻抗Rp的兩端時,會在終端阻抗Rp兩端分別形成電壓V+及V-以形成電壓差,並透過比較器110的輸出端提供對應的資料訊號SDD。 In this embodiment, the differential signals DSI+, DSI- are transmitted by a system (for example, a central processing unit (CPU), a microprocessor, etc.), and then transmitted to the transmission line of the transmission line end 150 to the transmission line. The differential signal receiver 100, wherein the transmission lines of the transmission line ends 150 form equivalent impedances Rs1, Rs2. When the differential signals DSI+, DSI- are transmitted to both ends of the terminal impedance Rp of the signal improving circuit 130, voltages V+ and V- are respectively formed across the terminal impedance Rp to form a voltage difference, and are provided through the output of the comparator 110. Corresponding data signal SDD.

圖2為依據本發明一實施例的訊號改善電路130的細部電路示意圖。請參照圖1及圖2,其中相同或相似元件使用相同或相似標號。在本實施例中,訊號改善電路130例如包括終端阻抗Rp1、Rp2、電流偵測電路131、133、微控制器135及開關控制器電路137。其中,相互串聯的終端阻抗Rp1、Rp2即等效成終端阻抗Rp(即,Rp=Rp1+Rp2)。終端阻抗Rp1接收差動訊號DSI+的電流Ip1。終端阻抗Rp2接收差動訊號DSI-的電流Ip2。電流偵測電路131耦接終端阻抗Rp1,以量測電流Ip1,並且電流偵測電路133耦接終端阻抗Rp2,以量測電流Ip2。終端阻抗Rp1、Rp2例如是可變電阻器,微控制器135可依據電流Ip1及Ip2判斷差分訊號DSI+、DSI-的失真狀態,再依據差分訊號DSI+、DSI-的失真狀態控制開關控制器電路137的提供對應的開關控制訊號SW1、SW2,以調整終端阻抗Rp1、Rp2的阻抗值。 FIG. 2 is a detailed circuit diagram of the signal improving circuit 130 according to an embodiment of the invention. Please refer to FIG. 1 and FIG. 2, wherein the same or similar elements are given the same or similar reference numerals. In the present embodiment, the signal improving circuit 130 includes, for example, terminal impedances Rp1, Rp2, current detecting circuits 131, 133, a microcontroller 135, and a switch controller circuit 137. Among them, the terminal impedances Rp1 and Rp2 connected in series are equivalent to the terminal impedance Rp (that is, Rp=Rp1+Rp2). The terminal impedance Rp1 receives the current Ip1 of the differential signal DSI+. The terminal impedance Rp2 receives the current Ip2 of the differential signal DSI-. The current detecting circuit 131 is coupled to the terminal impedance Rp1 to measure the current Ip1, and the current detecting circuit 133 is coupled to the terminal impedance Rp2 to measure the current Ip2. The terminal impedances Rp1 and Rp2 are, for example, variable resistors. The microcontroller 135 can determine the distortion states of the differential signals DSI+ and DSI- according to the currents Ip1 and Ip2, and then control the switch controller circuit 137 according to the distortion states of the differential signals DSI+ and DSI-. The corresponding switch control signals SW1 and SW2 are provided to adjust the impedance values of the terminal impedances Rp1 and Rp2.

在本發明的一實施例中,終端阻抗Rp1、Rp2可以由電晶體所形成,而電流偵測電路131、133可以包括電流鏡(current mirror)以分別複製流經終端阻抗Rp1、Rp2的電流Ip1、Ip2,但在其他實施例中,電流偵測電路131、133可以包括其他可偵測電流Ip1、Ip2之元件或電路。 In an embodiment of the invention, the terminal impedances Rp1, Rp2 may be formed by a transistor, and the current detecting circuits 131, 133 may include a current mirror to respectively replicate the current Ip1 flowing through the terminal impedances Rp1, Rp2. Ip2, but in other embodiments, the current detecting circuits 131, 133 may include other components or circuits that can detect the currents Ip1, Ip2.

圖3是依照本發明實施例說明終端阻抗調整方法之流程圖。請參照圖3,本實施例的操作方法可應用於圖1的傳輸介面10及圖2的訊號改善電路130。下文中,將搭傳輸介面10及訊號改善電路130中的各項元件或模組說明本發明實施例所述之終端 阻抗調整方法。本方法的各個流程可依照實施情形而隨之調整,且並不僅限於此。 FIG. 3 is a flow chart illustrating a method for adjusting a terminal impedance according to an embodiment of the invention. Referring to FIG. 3, the operation method of this embodiment can be applied to the transmission interface 10 of FIG. 1 and the signal improvement circuit 130 of FIG. Hereinafter, the components or modules in the transmission interface 10 and the signal improvement circuit 130 are described in the terminal of the embodiment of the present invention. Impedance adjustment method. The various processes of the method can be adjusted accordingly according to the implementation situation, and are not limited thereto.

在步驟S310中,透過電流偵測電路131、133分別偵測流經終端阻抗Rp1、Rp2的差分訊號DSI+、DSI-的電流值(例如,電流Ip1、Ip2的電流值)。電流偵測電路131、133偵測電流值的方法可參照前述圖2中電流偵測電路131、133的詳細說明,於此不再贅述。在一些實施例中,電流Ip1、Ip2更可經由類比至數位轉換器(analog-to-digital converter;ADC)(未繪示)將類比電流值轉換成數位電流值,再透過數位電流暫存器(未繪示)將數位電流傳送至微控制器135。 In step S310, the permeation current detecting circuits 131 and 133 respectively detect current values (for example, current values of the currents Ip1 and Ip2) of the differential signals DSI+ and DSI− flowing through the terminal impedances Rp1 and Rp2. For the method of detecting the current value by the current detecting circuits 131 and 133, refer to the detailed description of the current detecting circuits 131 and 133 in FIG. 2, and details are not described herein again. In some embodiments, the currents Ip1, Ip2 can further convert the analog current value into a digital current value via an analog-to-digital converter (ADC) (not shown), and then pass through the digital current register. The digital current is transmitted to the microcontroller 135 (not shown).

在步驟S330中,透過微控制器135依據差分訊號DSI+、DSI-的電流值判斷差分訊號DSI+、DSI-的特徵點。具體而言,微控制器135可依據步驟S310所取得的差分訊號DSI+、DSI-的電流值而取得差分訊號DSI+、DSI-的訊號強度及訊號波形之外型樣貌,微控制器135便可依據訊號波形來判斷差分訊號DSI+、DSI-的特徵點。 In step S330, the micro-controller 135 determines the feature points of the differential signals DSI+ and DSI- based on the current values of the differential signals DSI+ and DSI-. Specifically, the microcontroller 135 can obtain the signal strengths of the differential signals DSI+ and DSI- and the appearance of the signal waveform according to the current values of the differential signals DSI+ and DSI- obtained in step S310, and the microcontroller 135 can The feature points of the differential signals DSI+ and DSI- are determined based on the signal waveform.

在本發明的一實施例中,差分訊號DSI+、DSI-的特徵點特徵點例如是差分訊號DSI+、DSI-的波形轉折點。舉例而言,圖4是差分訊號DSI+、DSI-的數位電流訊號波形之範例。微控制器135透過判斷數位電流值來決定特徵點a~h。當微控制器135依據數位電流值判斷差分訊號DSI+產生遞減性之變化時,微控制器135將此波形轉折點定義為特徵點a。當差分訊號DSI+由遞減性 之變化轉為平緩時,微控制器135將此波形轉折點定義為特徵點d。當差分訊號DSI+產生遞增性之變化時,微控制器135將此波形轉折點定義為特徵點f。當差分訊號DSI+產生由遞增性之變化轉為平緩時,微控制器135將此波形轉折點定義為特徵點g。依此類推,微控制器135亦可判斷出差分訊號DSI-在訊號波形上的特徵點b、c、e、h。 In an embodiment of the invention, the feature point feature points of the differential signals DSI+, DSI- are, for example, waveform inflection points of the differential signals DSI+, DSI-. For example, FIG. 4 is an example of a digital current signal waveform of the differential signals DSI+, DSI-. The microcontroller 135 determines the feature points a to h by judging the digital current value. When the microcontroller 135 determines the change in the decrement of the differential signal DSI+ based on the digital current value, the microcontroller 135 defines this waveform turning point as the feature point a. When the differential signal DSI+ is decremental When the change is gradual, the microcontroller 135 defines this waveform turning point as the feature point d. When the differential signal DSI+ produces an incremental change, the microcontroller 135 defines this waveform turning point as the feature point f. When the differential signal DSI+ generation changes from a progressive change to a gradual change, the microcontroller 135 defines this waveform turning point as the feature point g. By analogy, the microcontroller 135 can also determine the feature points b, c, e, h of the differential signal DSI - on the signal waveform.

接著,在步驟S350中,透過微控制器135依據這些特徵點判斷差分訊號DSI+、DSI-的失真狀態。在一實施例中,微控制器135依據這些特徵點計算差分訊號DSI+、DSI-的擺盪電壓、下降暫態時間、準位保持時間及上升暫態時間,且依據擺盪電壓、下降暫態時間、準位保持時間及上升暫態時間判斷失真狀態。 Next, in step S350, the micro-controller 135 determines the distortion states of the differential signals DSI+ and DSI- based on the feature points. In an embodiment, the microcontroller 135 calculates the swing voltage, the falling transient time, the level hold time, and the rising transient time of the differential signals DSI+, DSI- according to the feature points, and according to the swing voltage, the falling transient time, The level retention time and the rising transient time determine the distortion state.

在此實施例中,微控制器135透過時脈計數器(未繪示)計數這些特徵點中時序上相鄰的特徵點的時間差以取得下降暫態時間、準位保持時間及上升暫態時間。 In this embodiment, the microcontroller 135 counts the time difference of the temporally adjacent feature points among the feature points through a clock counter (not shown) to obtain the falling transient time, the level holding time, and the rising transient time.

以圖4為範例進行說明,當微控制器135定義特徵點a時,時脈計數器開始累加時脈計數值。每經過一個時脈(例如,經過3微秒(μs)、500毫秒(ms)等),時脈計數器便會將時脈計數值加一,直到微控制器135判斷出下一個特徵點(即特徵點d)。當微控制器135判斷出特徵點d時,時脈計數器便不再累積時脈計數值,並將此時脈計數值作為自特徵點a至特徵點d所經過的時間差tad(tad=td-ta)。依此類推,時脈計數器便可分別取得時序上相鄰的特徵點的時間差tdf(tdf=tf-td)、tfg(tfg=tg-tf)、tbc(tbc=tc-tb)、 tce(tce=te-tc)及teh(teh=th-te)。接著,微處理器135可將數位時間差tad、tdf、tfg、tbc、tce及teh與時脈操作頻率(例如,200百萬赫茲(MHz)、500MHz等)操作時間進行轉換後以得到類比時間表示值。例如,時間差tad對應的計數值為3,且時脈操作頻率為500MHz,則時間差tad的類比時間表示值為6μs。 4 is used as an example. When the microcontroller 135 defines the feature point a, the clock counter starts to accumulate the clock count value. Each time a clock passes (for example, after 3 microseconds (μs), 500 milliseconds (ms), etc.), the clock counter increments the clock count by one until the microcontroller 135 determines the next feature point (ie Feature point d). When the microcontroller 135 determines the feature point d, the clock counter no longer accumulates the clock count value, and uses the current pulse count value as the time difference t ad from the feature point a to the feature point d (t ad = t d -t a ). By analogy, the clock counter can obtain the time difference t df (t df =t f -t d ), t fg (t fg =t g -t f ), t bc (t ) of the feature points adjacent to each other in time series. Bc = t c - t b ), t ce (t ce = t e - t c ) and t eh (t eh = t h - t e ). Next, the microprocessor 135 can convert the digital time differences t ad , t df , t fg , t bc , t ce , and t eh with the clock operating frequency (eg, 200 megahertz (MHz), 500 MHz, etc.) operating time. Then to get the analog time to represent the value. For example, the time difference t ad corresponds to a count value of 3, and the clock operation frequency is 500 MHz, and the analog time of the time difference t ad represents a value of 6 μs.

之後,微控制器135便能將例如數位時間差tad、teh的類比時間表示值作為下降暫態時間,數位時間差tce、tdf的類比時間表示值作為準位保持時間,以及數位時間差tbc、tfg的類比時間表示值作為上升暫態時間。在其他實施例中,微控制器135亦可直接將數位時間差tad、teh作為下降暫態時間,數位時間差tce、tdf作為準位保持時間,以及數位時間差tbc、tfg作為上升暫態時間。 Thereafter, the microcontroller 135 can use, for example, the analog time representation values of the digital time differences t ad , t eh as the falling transient time, the analog time representation values of the digital time differences t ce , t df as the level holding time, and the digital time difference t The analog time of bc and t fg represents the value as the rising transient time. In other embodiments, the micro-controller 135 or directly to the digital time difference t ad, t eh as fall transient time, the number of bit time difference t ce, the holding time t df as the level, and the number of bit time difference t bc, t fg as increased Transient time.

此外,微控制器135計算這些特徵點中相同時間點的特徵點的電壓差以取得擺盪電壓。以圖4為範例進行說明,特徵點c、d為相同時間點的特徵點,微控制器135先計算特徵點c、d的電流值Ic、Id,再依據特徵點c、d的電流值Ic、Id及終端阻抗Rp1、Rp2的阻抗值推算各特徵點的電壓,藉以取得擺盪電壓Vswing。例如,電壓差Vcd=|Vd-Vc|。微控制器135可選擇這些電壓差Vcd來作為擺盪電壓Vswing。依此類推,微控制器135可計算出電壓差Vab、Vef及Vgh。在其他實施例中,微控制器135亦可選擇這些電壓差Vcd、Vab、Vef及Vgh其中之一、電壓差Vcd、Vab、Vef及Vgh的平均值或電壓差Vcd、Vab、Vef及Vgh的加權平均值來作為擺盪電壓Vswing,且不以此為限。 Further, the microcontroller 135 calculates the voltage difference of the feature points at the same time point among the feature points to obtain the wobble voltage. Taking FIG. 4 as an example, the feature points c and d are feature points at the same time point, and the microcontroller 135 first calculates the current values I c and I d of the feature points c and d, and then according to the currents of the feature points c and d. The impedance values of the values I c and I d and the terminal impedances Rp1 and Rp2 are used to estimate the voltage of each characteristic point, thereby obtaining the wobble voltage V swing . For example, the voltage difference V cd =|V d -V c |. The microcontroller 135 can select these voltage differences V cd as the wobble voltage V swing . By analogy, the microcontroller 135 can calculate the voltage differences V ab , V ef , and V gh . In other embodiments, the microcontroller 135 can choose these voltage difference V cd, V ab, V ef and V gh one wherein the voltage difference V cd, V ab, V ef and V gh average value or a voltage difference The weighted average of V cd , V ab , V ef , and V gh is taken as the swing voltage V swing , and is not limited thereto.

在計算出擺盪電壓、下降暫態時間、準位保持時間及上升暫態時間後,微控制器135比較擺盪電壓Vswing與電壓臨界值Vthreshold,比較下降暫態時間、準位保持時間及上升暫態時間與對應的時間臨界值tf、tflat及tr。當擺盪電壓Vswing等於電壓臨界值Vthreshold且下降暫態時間(如tad)大致等於時間臨界值tf、準位保持時間(如tdf)大致等於時間臨界值tflat以及上升暫態時間(如tfg)大致等於時間臨界值tr時,微控制器135判斷差分訊號DSI+、DSI-的失真狀態為無失真狀態。當擺盪電壓Vswing小於電壓臨界值Vthreshold、下降暫態時間(如tad)小於時間臨界值tf以及上升暫態時間(如tfg)小於這些時間臨界值tr時,微控制器135判斷差分訊號DSI+、DSI-的失真狀態為訊號衰減狀態。而當擺盪電壓Vswing大於電壓臨界值Vthreshold、下降暫態時間(如tad)大於時間臨界值tf及上升暫態時間(如tfg)大於時間臨界值tr時,微控制器135判斷差分訊號DSI+、DSI-的失真狀態為訊號放大狀態。 The calculated voltage swing down transient time, hold time and the level after the rise time of the transient, the micro-controller 135 comparing the voltage swing V swing threshold voltage V threshold, comparing transient fall time, hold time and increased level Transient time and corresponding time thresholds t f , t flat and t r . When the swing voltage V swing is equal to the voltage threshold V threshold and the falling transient time (eg, t ad ) is approximately equal to the time threshold t f , the level hold time (eg, t df ) is approximately equal to the time threshold t flat and the rising transient time (e.g., t fg ) is substantially equal to the time threshold value t r , and the microcontroller 135 determines that the distortion states of the differential signals DSI+, DSI- are in a distortion-free state. When the wobble voltage V swing is less than the voltage threshold V threshold , the descent transient time (eg, t ad ) is less than the time threshold t f , and the rising transient time (eg, t fg ) is less than the time threshold t r , the microcontroller 135 It is judged that the distortion state of the differential signals DSI+ and DSI- is the signal attenuation state. When the swing voltage V swing is greater than the voltage threshold V threshold , the falling transient time (eg, t ad ) is greater than the time threshold t f , and the rising transient time (eg, t fg ) is greater than the time threshold t r , the microcontroller 135 It is judged that the distortion state of the differential signals DSI+ and DSI- is the signal amplification state.

需說明的是,前述電壓臨界值Vthreshold及時間臨界值tf、tflat及tr可以是預先設定或依據實際應用之需求進行變更。此外,微控制器135可對於差分訊號接收器100訊號波形失真耐受度,而定義電壓臨界值Vthreshold及時間臨界值tf、tflat及trIt should be noted that the threshold voltage V threshold and the time threshold t f, t flat and t r may be set in advance or according to the requirement of practical application changes. In addition, the microcontroller 135 can define a voltage threshold V threshold and time thresholds t f , t flat , and t r for the differential signal receiver 100 signal waveform distortion tolerance.

舉例而言,以圖4為範例,假設以電壓差Vcd作為擺盪電壓Vswing,則擺盪電壓Vswing會大致等於電壓臨界值Vthreshold,且時間差tad、teh會大致等於時間臨界值tf,時間差tce、tdf會大致等於時間臨界值tflat,以及時間差tbc、tfg會大致時間臨界值等於tr。 微控制器135便可判斷失真狀態為無失真狀態。 For example, taking FIG. 4 as an example, assuming that the voltage difference V cd is used as the wobble voltage V swing , the wobble voltage V swing will be approximately equal to the voltage threshold V threshold , and the time differences t ad , t eh will be approximately equal to the time threshold t f , the time difference t ce , t df will be approximately equal to the time threshold t flat , and the time difference t bc , t fg will be approximately the time threshold equal to t r . The microcontroller 135 can determine that the distortion state is a distortion free state.

接著,在步驟S370中,透過微控制器135依據差分訊號的失真狀態調整終端阻抗的阻抗值。在本實施例中,當失真狀態為無失真狀態時,不調整終端阻抗的阻抗值。當失真狀態為訊號衰減狀態時,調高終端阻抗的阻抗值。當失真狀態為訊號放大狀態時,調低終端阻抗的阻抗值。 Next, in step S370, the impedance value of the terminal impedance is adjusted by the microcontroller 135 according to the distortion state of the differential signal. In the present embodiment, when the distortion state is the distortionless state, the impedance value of the terminal impedance is not adjusted. When the distortion state is the signal attenuation state, the impedance value of the terminal impedance is increased. When the distortion state is the signal amplification state, the impedance value of the terminal impedance is lowered.

具體而言,當失真狀態為無失真狀態時,微控制器135便判斷終端阻抗Rp1、Rp2與傳輸導線阻抗Rs1、Rs2匹配,則無須調整終端阻抗Rp1、Rp2的阻抗值。當失真狀態為訊號衰減狀態時,微控制器135便判斷終端阻抗Rp1、Rp2小於傳輸導線阻抗Rs1、Rs2,則需要調高終端阻抗Rp1、Rp2的阻抗值,以使終端阻抗Rp1、Rp2等於(或近似於)傳輸導線阻抗Rs1、Rs2。並且,當失真狀態為訊號放大狀態時,微控制器135便判斷終端阻抗Rp1、Rp2大於傳輸導線阻抗Rs1、Rs2,則需要調低終端阻抗Rp1、Rp2的阻抗值,以使終端阻抗Rp1、Rp2等於(或近似於)傳輸導線阻抗Rs1、Rs2。 Specifically, when the distortion state is the distortionless state, the microcontroller 135 determines that the terminal impedances Rp1, Rp2 match the transmission line impedances Rs1, Rs2, and does not need to adjust the impedance values of the terminal impedances Rp1, Rp2. When the distortion state is the signal attenuation state, the microcontroller 135 determines that the terminal impedances Rp1 and Rp2 are smaller than the transmission line impedances Rs1 and Rs2, and the impedance values of the terminal impedances Rp1 and Rp2 need to be increased to make the terminal impedances Rp1 and Rp2 equal ( Or similar to the transmission line resistances Rs1, Rs2. Moreover, when the distortion state is the signal amplification state, the microcontroller 135 determines that the terminal impedances Rp1 and Rp2 are greater than the transmission line impedances Rs1 and Rs2, and the impedance values of the terminal impedances Rp1 and Rp2 need to be lowered to make the terminal impedances Rp1 and Rp2. Equal to (or approximate to) the transmission line impedances Rs1, Rs2.

在本發明的一實施例中,微控制器135可依據時間差tad、tdf、tfg及電壓差Vcd各階段之數據值與其所對應的臨界值進行比較運算,經過微控制器135運算後可得到開關步值(step value)。此開關步值即為圖2的開關控制電路137中開關控制訊號SW1、SW2。微控制器135透過開關控制訊號SW1、SW2控制終端阻抗Rp1、Rp2的阻抗值,藉以調整控制差分訊號接收器100的訊號波 形,使其達成tad≒tf、tdf≒tflat、tfg≒tr及Vcd≒Vthreshold。例如,開關控制訊號SW1具有開關步值為SW11、SW12、SW13、SW14、SW15,其分別對應到不同大小終端阻抗Rp1的阻抗值。 In an embodiment of the invention, the microcontroller 135 can perform a comparison operation on the data values of the respective stages of the time differences t ad , t df , t fg and the voltage difference V cd and the corresponding threshold values, and is operated by the microcontroller 135. The step value can be obtained later. This switch step value is the switch control signals SW1, SW2 in the switch control circuit 137 of FIG. The microcontroller 135 controls the impedance values of the terminal impedances Rp1 and Rp2 through the switch control signals SW1 and SW2, thereby adjusting and controlling the signal waveform of the differential signal receiver 100 to achieve t ad ≒t f , t df ≒t flat , t fg ≒t r and V cd ≒V threshold . For example, the switch control signal SW1 has switch step values SW1 1 , SW1 2 , SW1 3 , SW1 4 , SW1 5 , which respectively correspond to impedance values of different magnitude terminal impedances Rp1.

此外,本發明之終端阻抗Rp1、Rp2的調整流程具有兩種模式設定。在一實施例中,當差分訊號接收器100進行初始化時,電流偵測電路131、133偵測流經終端阻抗Rp1、Rp2的差分訊號DSI+、DSI-的電流值Ip1、Ip2。當差分訊號接收器100完成初始化時,控制電流偵測電路131、133停止偵測流經終端阻抗的該差分訊號的電流值。換言之,在差分訊號接收器100的例如是開機之初始狀態自動進行阻抗匹配調整,以依據調整後之終端阻抗Rp1、Rp2的阻抗值來接收差分訊號DSI+、DSI-。 Further, the adjustment flow of the terminal impedances Rp1, Rp2 of the present invention has two mode settings. In one embodiment, when the differential signal receiver 100 is initialized, the current detecting circuits 131, 133 detect the current values Ip1, Ip2 of the differential signals DSI+, DSI- flowing through the terminal impedances Rp1, Rp2. When the differential signal receiver 100 completes initialization, the control current detecting circuits 131, 133 stop detecting the current value of the differential signal flowing through the terminal impedance. In other words, the impedance matching adjustment is automatically performed in the initial state of the differential signal receiver 100, for example, in the power-on state, to receive the differential signals DSI+, DSI- according to the impedance values of the adjusted terminal impedances Rp1, Rp2.

舉例而言,圖5為初始階段進行阻抗匹配之流程圖。請參照圖1及圖5,當差分訊號接收器100啟動後,透過電流偵測電路131、133取得電流Ip1、Ip2(步驟S510),並且透過微控制器135進行運算以取得電流Ip1、Ip2的訊號強度及訊號波形樣貌(步驟S530),以取得例如是圖4的時間差tad、tdf、tfg及電壓差Vcd。接著,透過微控制器135將時間差tad、tdf、tfg及電壓差Vcd與時間臨界值tf、tflat及tr及電壓臨界值Vthreshold比對相等與否(步驟S550)。若大致相等,則無須再調整終端阻抗Rp1、Rp2的阻抗值,接著步驟會回到S510,以等待下一次偵測電流的時間,例如差分訊號接收器100進行初始化或下一個偵測週期。若不相等,則透過微控制器135且依據比對結果運算產生開關控制訊號SW1、SW2 之開關步值(步驟S570)。最後,透過開關控制電路137且依據開關控制訊號SW1、SW2之開關步值進行終端阻抗Rp1、Rp2的阻抗值之調整(步驟S590)。 For example, Figure 5 is a flow chart for impedance matching in the initial stage. Referring to FIG. 1 and FIG. 5, after the differential signal receiver 100 is activated, the currents Ip1 and Ip2 are obtained by the current detecting circuits 131 and 133 (step S510), and the operations are performed by the microcontroller 135 to obtain the currents Ip1 and Ip2. The signal strength and the signal waveform appearance (step S530) are taken to obtain, for example, the time differences t ad , t df , t fg and the voltage difference V cd of FIG. 4 . Next, the time difference t ad , t df , t fg and the voltage difference V cd are compared with the time thresholds t f , t flat and t r and the voltage threshold V threshold by the microcontroller 135 (step S550). If they are substantially equal, it is not necessary to adjust the impedance values of the terminal impedances Rp1 and Rp2, and then the process returns to S510 to wait for the next detection current time, for example, the differential signal receiver 100 performs initialization or the next detection cycle. If they are not equal, the switching step values of the switch control signals SW1, SW2 are generated by the microcontroller 135 and calculated based on the comparison result (step S570). Finally, the impedance values of the terminal impedances Rp1 and Rp2 are adjusted by the switch control circuit 137 and according to the switching step values of the switch control signals SW1 and SW2 (step S590).

在另一實施例中,可在每一個偵測週期中,透過電流偵測電路131、133執行一次偵測流經終端阻抗Rp1、Rp2的差分訊號DSI+、DSI-的電流值Ip1、Ip2。換言之,本發明實施例可在訊號傳輸過程中週期性地進行阻抗匹配調整,以持續維持訊號之完整性,此週期性可以以畫框(frame)為單位。 In another embodiment, during each detection period, the current detecting circuits 131 and 133 are configured to detect the current values Ip1 and Ip2 of the differential signals DSI+ and DSI- flowing through the terminal impedances Rp1 and Rp2. In other words, the embodiment of the present invention can periodically perform impedance matching adjustment during signal transmission to continuously maintain the integrity of the signal, and the periodicity can be in units of frames.

舉例而言,圖6為週期性進行阻抗匹配之流程圖。請參照圖1及圖6,透過微控制器135設定電流偵測電路131、133的偵測週期(例如,2個畫框、5個畫框等)(步驟S605),此功能包含了差分訊號接收器100經啟動後即進行阻抗匹配控制外,亦可透過設定偵測週期而持續進行電流偵測。而步驟S610~S690可敘述可參照圖5中步驟S510~S590的相關說明,於此不再贅述。透過週期性控制模式,除了可改善走線佈局方式或印刷電路板的製程參數的影響,亦可改善諸如導體膜厚公差、基材膜厚公差、接合(bonding)接觸阻抗、溫升造成阻抗漂移等其他不可力抗之因素所造成訊號失真。 For example, FIG. 6 is a flow chart for performing impedance matching periodically. Referring to FIG. 1 and FIG. 6, the detection period of the current detecting circuits 131 and 133 (for example, two picture frames, five picture frames, etc.) is set by the microcontroller 135 (step S605), and the function includes the differential signal. The receiver 100 performs impedance matching control after being activated, and can also perform current detection by setting the detection period. Steps S610 to S690 can be described with reference to steps S510 to S590 in FIG. 5, and details are not described herein again. Through the periodic control mode, in addition to improving the layout of the traces or the influence of the process parameters of the printed circuit board, it can also improve resistance such as conductor film thickness tolerance, substrate film thickness tolerance, bonding contact impedance, and temperature rise. Signal distortion caused by other factors that cannot be resisted.

綜上所述,本發明實施例的終端阻抗調整方法,其分析差分訊號流經終端阻抗的電流值,以判斷差分訊號的特徵點,並藉以判斷差分訊號的失真狀態。並且,若判斷出差分訊號為放大失真或衰減失真等失真狀態,則透過使其訊號波形達到對應臨界 值的運算來調整終端阻抗的阻抗值。藉此,可改善高速訊號資料傳輸介面因走線等因素之特性阻抗不連續或不匹配,所造成的訊號失真而導致顯示器畫面錯誤的現象。此外,本發明實施例更提出兩種調整流程模式,藉以在接收器差分訊號初始階段或訊號傳輸過程中進行自動特性阻抗匹配調整。 In summary, the terminal impedance adjustment method of the embodiment of the present invention analyzes the current value of the differential signal flowing through the terminal impedance to determine the feature point of the differential signal, and thereby determines the distortion state of the differential signal. Moreover, if it is determined that the differential signal is a distortion state such as amplification distortion or attenuation distortion, the signal waveform is brought to a corresponding limit. The value is calculated to adjust the impedance value of the terminal impedance. Thereby, the phenomenon that the characteristic impedance of the high-speed signal data transmission interface is discontinuous or mismatched due to factors such as the wiring, and the signal distortion caused by the distortion of the display screen can be improved. In addition, the embodiment of the present invention further proposes two adjustment flow modes, so as to perform automatic characteristic impedance matching adjustment in the initial stage of the receiver differential signal or signal transmission.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

S310~S370‧‧‧步驟 S310~S370‧‧‧Steps

Claims (8)

一種終端阻抗調整方法,適用於調整一差分訊號接收器的一終端阻抗,該終端阻抗調整方法包括:透過一電流偵測電路偵測流經該終端阻抗的一差分訊號的一電流值;透過一微控制器依據該差分訊號的該電流值判斷該差分訊號的多個特徵點;透過該微控制器依據該些特徵點判斷該差分訊號的一失真狀態;透過該微控制器依據該差分訊號的該失真狀態調整該終端阻抗的一阻抗值。 A terminal impedance adjustment method is adapted to adjust a terminal impedance of a differential signal receiver, the terminal impedance adjustment method comprising: detecting, by a current detecting circuit, a current value of a differential signal flowing through the impedance of the terminal; The microcontroller determines a plurality of feature points of the differential signal according to the current value of the differential signal; and the microcontroller determines a distortion state of the differential signal according to the feature points; and the microcontroller controls the differential signal according to the differential signal The distortion state adjusts an impedance value of the terminal impedance. 如申請專利範圍第1項所述的終端阻抗調整方法,其中透過該微控制器依據該些特徵點判斷該差分訊號的該失真狀態的步驟包括:依據該些特徵點計算該差分訊號的一擺盪電壓、一下降暫態時間、一準位保持時間及一上升暫態時間;以及依據該擺盪電壓、該下降暫態時間、該準位保持時間及該上升暫態時間判斷該失真狀態。 The terminal impedance adjustment method of claim 1, wherein the step of determining, by the microcontroller, the distortion state of the differential signal according to the feature points comprises: calculating a swing of the differential signal according to the feature points a voltage, a falling transient time, a level holding time, and a rising transient time; and determining the distortion state according to the swing voltage, the falling transient time, the level holding time, and the rising transient time. 如申請專利範圍第2項所述的終端阻抗調整方法,其中透過該微控制器依據該些特徵點計算該差分訊號的該擺盪電壓、該下降暫態時間、該準位保持時間及該上升暫態時間的步驟更包括:透過一時脈計數器計數該些特徵點中時序上相鄰的特徵點的 時間差以取得該下降暫態時間、該準位保持時間及該上升暫態時間;以及透過該微控制器計算該些特徵點中相同時間點的特徵點的電壓差以取得該擺盪電壓。 The terminal impedance adjustment method according to claim 2, wherein the swing voltage, the falling transient time, the level holding time, and the rising time of the differential signal are calculated by the microcontroller according to the feature points. The step of the state time further includes: counting, by using a clock counter, the temporally adjacent feature points of the feature points The time difference is obtained to obtain the falling transient time, the level holding time, and the rising transient time; and calculating, by the microcontroller, a voltage difference of the feature points of the feature points at the same time point to obtain the swing voltage. 如申請專利範圍第2項所述的終端阻抗調整方法,其中透過該微控制器依據該擺盪電壓、該下降暫態時間、該準位保持時間及該上升暫態時間判斷該失真狀態更包括:比較該擺盪電壓與一電壓臨界值,比較該下降暫態時間、該準位保持時間及該上升暫態時間與多個時間臨界值;當該擺盪電壓等於該電壓臨界值且該下降暫態時間、該準位保持時間及該上升暫態時間等於該些時間臨界值時,該失真狀態為一無失真狀態;當該擺盪電壓小於該電壓臨界值且該下降暫態時間及該上升暫態時間小於該些時間臨界值時,該失真狀態為一訊號衰減狀態;以及當該擺盪電壓大於該電壓臨界值且該下降暫態時間及該上升暫態時間大於該些時間臨界值時,該失真狀態為一訊號放大狀態。 The terminal impedance adjustment method of claim 2, wherein the determining, by the microcontroller, the distortion state according to the swing voltage, the falling transient time, the level holding time, and the rising transient time further comprises: Comparing the swing voltage with a voltage threshold, comparing the falling transient time, the level holding time, and the rising transient time with a plurality of time thresholds; when the swing voltage is equal to the voltage threshold and the falling transient time When the level retention time and the rising transient time are equal to the time thresholds, the distortion state is a distortion-free state; when the swing voltage is less than the voltage threshold and the falling transient time and the rising transient time When the time threshold is less than the time threshold, the distortion state is a signal attenuation state; and when the swing voltage is greater than the voltage threshold and the falling transient time and the rising transient time are greater than the time thresholds, the distortion state Amplify the status for a signal. 如申請專利範圍第4項所述的終端阻抗調整方法,其中透過該微控制器依據該差分訊號的該失真狀態調整該終端阻抗的阻抗值步驟更包括:當該失真狀態為該無失真狀態時,不調整該終端阻抗的該阻抗值; 當該失真狀態為該訊號衰減狀態時,調高該終端阻抗的該阻抗值;以及當該失真狀態為該訊號放大狀態時,調低該終端阻抗的該阻抗值。 The terminal impedance adjustment method of claim 4, wherein the step of adjusting the impedance value of the terminal impedance according to the distortion state of the differential signal by the microcontroller further comprises: when the distortion state is the distortion-free state , the impedance value of the terminal impedance is not adjusted; When the distortion state is the signal attenuation state, the impedance value of the terminal impedance is raised; and when the distortion state is the signal amplification state, the impedance value of the terminal impedance is lowered. 如申請專利範圍第1項所述的終端阻抗調整方法,更包括:當該差分訊號接收器進行一初始化時,透過該電流偵測電路偵測流經該終端阻抗的該差分訊號的該電流值;以及當該差分訊號接收器完成該初始化時,控制該電流偵測電路停止偵測流經該終端阻抗的該差分訊號的該電流值。 The terminal impedance adjustment method of claim 1, further comprising: detecting, by the current detecting circuit, the current value of the differential signal flowing through the terminal impedance when the differential signal receiver performs an initialization And when the differential signal receiver completes the initialization, controlling the current detecting circuit to stop detecting the current value of the differential signal flowing through the impedance of the terminal. 如申請專利範圍第2項所述的終端阻抗調整方法,其中更包括:在每一偵測週期中,透過該電流偵測電路執行一次偵測流經該終端阻抗的該差分訊號的該電流值。 The terminal impedance adjustment method of claim 2, further comprising: performing, during each detection period, detecting the current value of the differential signal flowing through the impedance of the terminal through the current detecting circuit. . 如申請專利範圍第1項所述的終端阻抗調整方法,其中該些特徵點分別為該差分訊號的一波形轉折點。 The terminal impedance adjustment method according to claim 1, wherein the feature points are respectively a waveform turning point of the differential signal.
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