TW201611519A - Integrated circuit - Google Patents

Abstract

An integrated circuit is provided. The integrated circuit includes a pad, a core circuit, an impedance matching component, a first switch and a second switch. The pad is configured to transmit a communication signal. The communication terminal of the core circuit is coupled to the pad, and the power terminal of the core circuit is coupled to a system voltage rail. The first terminal of the impedance matching component is coupled to the pad. The first terminal of the first switch is coupled to the system voltage rail, and the second terminal of the first switch is coupled to the second end of the impedance matching component. The first terminal of the second switch is coupled to the control terminal of the first switch, and the second terminal of the second switch is coupled to the second terminal of the impedance matching component.

Description

Integrated circuit

The present invention relates to an integrated circuit, and more particularly to an integrated circuit capable of preventing signal voltage from being poured to a system voltage rail.

With the advancement of technology, the integrated circuit process technology has also continued to improve. As is known to those skilled in the art of integrated circuits, various electronic circuits can be integrated/formed onto the wafer. In order to enable the wafer to communicate (e.g., bias the power) to other circuits/chips externally, a pad is placed on the wafer.

For example, Figure 1 is a block diagram illustrating an electronic system having a plurality of integrated circuits. The integrated circuit 50 includes a core circuit 51, a termination impedance element 53, and a pad Tx0. The communication end of the core circuit 51 can output a data signal to the communication channel 10 via the pad Tx0. The first end and the second end of the terminal impedance element 53 are respectively coupled to the system voltage rail VCC and the pad Tx0. The integrated circuit 50 can perform impedance matching on the transmitting end of the communication channel 10 by the terminal impedance element 53. The integrated circuit 100 includes a termination impedance element 105, a core circuit 110, and a pad Rx0. The communication terminal of the core circuit 110 can receive the data signal from the communication channel 10 via the pad Rx0. Terminal impedance component The first end and the second end of the 105 are respectively coupled to the system voltage rail TVCC and the pad Rx0. The integrated circuit 100 can perform impedance matching on the receiving end of the communication channel 10 by the terminal impedance element 105.

FIG. 2 is a schematic diagram illustrating a backflow path in which the integrated circuit 100 of FIG. 1 generates a signal voltage to the system voltage rail. Referring to FIG. 2, the communication end of the core circuit 110 and the first end of the termination impedance element 105 are coupled to the pad Rx0. The first end and the second end of the switch P1 are respectively coupled to the system voltage rail TVCC and the second end of the terminal impedance element 105. In the normal mode of operation, based on the conductive state of switch P1, termination impedance element 105 can selectively provide a resistance value to pad Rx0. Therefore, the integrated circuit 100 can perform impedance matching on the receiving end of the communication channel 10 by the terminal impedance element 105.

When the integrated circuit 100 enters the power-off mode (power saving mode), the voltage source (not shown) stops supplying power to the system voltage rail TVCC of the integrated circuit 100 to save power consumption of the core circuit 110. However, during the power-off mode of the integrated circuit 100, the integrated circuit 50 may transmit a signal to the other integrated circuits (not shown) by using the communication channel 10, so that the pad Rx0 of the integrated circuit 100 exhibits a voltage signal. During the power-off mode of the integrated circuit 100, the control signal ZB of the switch P1 may be in an indeterminate state (for example, a floating state) or a grounded state, so that the switch P1 cannot be completely turned off (the switch is assumed here) P1 is a P-type metal oxide semiconductor transistor). Therefore, when a voltage signal of a high level (for example, 3.3V) appears at the voltage level of the pad Rx0, the voltage signal is inverted to the system voltage rail TVCC via the terminal impedance element 105 and the switch P1. The current backflow path is As indicated by the arrows in Figure 2. Reversing the voltage signal to the system voltage rail TVCC may cause the core circuit 110 to malfunction.

FIG. 3 is a schematic diagram showing another pouring path in which the integrated circuit 100 of FIG. 1 generates a signal voltage to the system voltage rail. It is assumed here that the switch P1 is a P-channel Metal Oxide Semiconductor (PMOS) transistor, so that the junction between the second end (drain) of the switch P1 and the body (bulk) forms a parasitic Diode D. The base of switch P1 is coupled to system voltage rail TVCC. During the power-off mode of the integrated circuit 100, when a voltage level of a high level (for example, 3.3V) occurs at the voltage level of the pad Rx0, the voltage signal passes through the terminal impedance element 105 and the parasitic two of the switch P1. The body D is inverted to the system voltage rail TVCC. The backflow path is as indicated by the arrow in FIG. Therefore, the above-mentioned voltage signal backflow phenomenon causes the voltage of the system voltage rail TVCC to be increased, causing the core circuit 110 to malfunction.

The present invention provides an integrated circuit to prevent the communication signal of the pad from being poured to the system voltage rail.

An integrated circuit of the present invention includes a pad, a core circuit, a termination impedance element, a first switch, and a second switch. The pad is used to transmit a communication signal. The communication end of the core circuit is coupled to the pad, and the power end of the core circuit is coupled to the system voltage track. The first end of the termination impedance element is coupled to the pad. The first end of the first switch is coupled to the system voltage rail. The second end of the first switch is coupled to the terminal impedance component The second end. The first end of the second switch is coupled to the control end of the first switch. The second end of the second switch is coupled to the second end of the termination impedance element.

In an embodiment of the invention, the control unit further includes a third switch. The first end of the third switch receives the control signal, and the second end of the third switch is coupled to the control end of the first switch.

In an embodiment of the invention, when the second switch is turned on, the third switch is turned off. When the third switch is turned on, the second switch is turned off.

In an embodiment of the invention, the control circuit further includes a base switching circuit. The first end and the second end of the base switch circuit are respectively coupled to the base of the first switch and the system voltage trajectory.

In an embodiment of the invention, the control circuit further includes a fourth switch, a fifth switch, and a sixth switch. The first end and the second end of the fourth switch are respectively coupled to the base of the first switch and the system voltage trajectory. The first end of the fifth switch is coupled to the base of the first switch. The second end of the fifth switch is coupled to the control end of the fourth switch. The first end of the sixth switch is coupled to the ground voltage trajectory. The second end of the sixth switch is coupled to the control end of the fourth switch.

In an embodiment of the invention, when the fifth switch is turned on, the sixth switch is turned off. When the sixth switch is turned on, the fifth switch is turned off.

In an embodiment of the invention, the integrated circuit further includes an electrostatic discharge (ESD) protection circuit. The ESD protection circuit is coupled to the pad.

In an embodiment of the invention, the electrostatic discharge protection circuit includes The first diode, the second diode, and a voltage clamp circuit. The anode of the first diode is connected to the pad. The cathode of the second diode is connected to the pad. The anode of the second diode is connected to the ground voltage rail. The first end of the clamp circuit is coupled to the cathode of the first diode. The second end of the clamp circuit is connected to the ground voltage rail.

In an embodiment of the invention, the integrated circuit further includes a current limiting resistor. The current limiting resistor is disposed in an electrical path between the first end of the termination impedance element and the communication end of the core circuit.

In summary, the embodiment of the present invention provides an integrated circuit. The control end of the first switch is coupled to the second end of the termination impedance element during the time when the system voltage rail is powered off. Therefore, when the communication pad has a communication signal, the first switch can prevent the communication signal of the pad from being poured to the system voltage trajectory.

The above described features and advantages of the invention will be apparent from the following description.

10‧‧‧Communication channel

50, 100, 400, 500, 600, 700‧‧‧ ‧ integrated circuits

51, 110‧‧‧ core circuits

53, 105‧‧‧Terminal impedance components

120‧‧‧Electrostatic discharge protection circuit

125‧‧‧Clamp circuit

130_1, 130_2, 130_3‧‧‧ control circuit

640‧‧‧Body switch circuit

710‧‧‧ Current limiting resistor

D‧‧‧ Parasitic diode

D1‧‧‧First Diode

D2‧‧‧ second diode

DIO‧‧‧electrostatic discharge track

ENB_BFP‧‧‧Control signal

GND‧‧‧Ground voltage trajectory

N1‧‧‧ third switch

N2‧‧‧ sixth switch

P1‧‧‧ first switch

P2‧‧‧ second switch

P3‧‧‧fourth switch

P4‧‧‧ fifth switch

R1‧‧‧Terminal impedance components

Rx0, Tx0‧‧‧ solder pads

Vb‧‧‧ node

VCC‧‧‧ system voltage trajectory

TVCC‧‧‧ system voltage trajectory

ZB‧‧‧ control signal

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a block diagram showing an electronic system having a plurality of integrated circuits.

FIG. 2 is a schematic diagram showing the backflow path of the integrated circuit of FIG. 1 for signal voltage reversal to the system voltage rail.

FIG. 3 is a schematic diagram showing another pouring path in which the integrated circuit of FIG. 1 generates a signal voltage to the system voltage trajectory.

4 is a diagram of preventing a power source current from being poured in accordance with a first embodiment of the present invention Schematic diagram of the integrated circuit.

Figure 5 is a schematic illustration of a control circuit for preventing supply current backflow in accordance with a second embodiment of the present invention.

Figure 6 is a schematic diagram of a control circuit for preventing supply current from being reversed in accordance with a third embodiment of the present invention.

Figure 7 is a schematic illustration of a control circuit for preventing supply current backflow in accordance with a fourth embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION Reference will now be made in detail to the exemplary embodiments embodiments In addition, wherever possible, the elements and/

4 is a schematic diagram of an integrated circuit for preventing power supply current from being poured in accordance with a first embodiment of the present invention. Referring to FIG. 4, the integrated circuit 400 includes a pad Rx0, a core circuit 110, and one or more control circuits (such as the control circuits 130_1, 130_2, 130_3 shown in FIG. 4). The power terminal of the core circuit is coupled to the system voltage rail TVCC. When the integrated circuit 400 is operating in the normal operating mode, a system voltage source (not shown) can be powered to the power supply terminal of the core circuit via the system voltage rail TVCC. When the integrated circuit 400 enters the power-off mode (power saving mode), the system voltage source (not shown) stops supplying power to the system voltage rail TVCC to save power consumption of the core circuit 110.

The communication end of the core circuit 110 is coupled to the pad Rx0. Pad Rx0 is used Transmit communication signals. For example, but not limited to, the communication end of the core circuit 110 can receive the communication signal from the external communication channel via the pad Rx0, and/or output the communication signal of the core circuit 110 to the external communication via the pad Rx0. aisle.

In the present embodiment, based on the clarity and simplicity, FIG. 4 only shows the control circuits 130_1, 130_2, 130_3. However, in other embodiments, the number of control circuits is not limited thereto. The control circuit 130_1 will be exemplified below. The other control circuits 130_2, 130_3 can be analogized with reference to the relevant description of the control circuit 130_1.

The control circuit 130_1 includes a termination impedance element R1, a first switch P1, and a second switch P2. The first end of the terminal impedance element R1 is coupled to the pad Rx0. It is assumed here that the first switch P1 and the second switch P2 are both P-channel Metal Oxide Semiconductor (PMOS) transistors, but are not limited thereto in other embodiments. A first end (eg, a source terminal) of the first switch P1 is coupled to the system voltage rail TVCC. The second end of the first switch P1 (eg, the 汲 terminal) is coupled to the second end of the termination impedance element R1. The first end (eg, the source terminal) of the second switch P2 is coupled to the control end (eg, the gate terminal) of the first switch P1. The second end of the second switch P2 (eg, the 汲 terminal) is coupled to the second end of the termination impedance element R1. The control terminal (eg, the gate terminal) of the second switch P2 is configured to receive the control signal ENB_BFP. The control signal ENB_BFP can be any signal responsive to the system voltage rail TVCC voltage. For example, but not limited to, in some embodiments, the system voltage rail TVCC can be coupled to the control terminal of the second switch P2 to provide the control signal ENB_BFP.

In normal operation mode, the control signal ENB_BFP can make the second switch P2 remains turned off. The control signal ZB can control the conduction state of the first switch P1 such that the termination impedance element 105 of the control circuit 130_1, 130_2, 130_3 can selectively provide a resistance value to the pad Rx0. Therefore, the integrated circuit 400 can adjust the terminal impedance values of the control circuits 130_1, 130_2, 130_3 by the control signal ZB to perform impedance matching on the external communication channel connected to the pad Rx0.

When the integrated circuit 400 enters the power-off mode and stops supplying power to the system voltage rail TVCC, the first switch P1 and the second switch P2 can prevent the communication signal of the pad Rx0 from being poured to the system voltage rail TVCC. More specifically, in the case that the power is turned off, the second control signal ENB_BFP is at a low level (for example, 0V), so the second switch P2 in FIG. 4 is turned on. When the communication signal of the pad Rx0 is poured to the terminal impedance element R1, the high voltage level of the pad Rx0 (for example, 3.3V) is transmitted to the control end of the first switch P1 via the second switch P2, and will be A switch P1 is turned off. The first switch P1 that is turned off prevents the communication signal of the pad Rx0 from being poured to the system voltage rail TVCC.

Figure 5 is a schematic illustration of a control circuit for preventing supply current backflow in accordance with a second embodiment of the present invention. Referring to FIG. 5, the integrated circuit 500 includes a pad Rx0, a core circuit 110, and one or more control circuits (such as the control circuits 130_1, 130_2, 130_3 shown in FIG. 5). The other control circuits 130_2, 130_3 can be analogized with reference to the relevant description of the control circuit 130_1. The control circuit 130_1 of the integrated circuit 500 includes a termination impedance element R1, a first switch P1, a second switch P2, and a third switch N1. The integrated circuit 500, the control circuit 130_1, the terminal impedance element R1, the first switch P1 and the second switch P2 shown in FIG. 5 can refer to the integrated circuit shown in FIG. 400, the control circuit 130_1, the terminal impedance element R1, the first switch P1 and the second switch P2 are similarly described, and therefore will not be described again.

It is assumed here that the third switch N1 is an N-channel Metal Oxide Semiconductor (NMOS) transistor, but is not limited thereto in other embodiments. In this embodiment, the first end (eg, the source terminal) of the third switch N1 can receive the control signal ZB provided by the front stage circuit (not shown). The second end of the third switch N1 (eg, the 汲 terminal) is coupled to the control end of the first switch P1. The control terminal (eg, the gate) of the third switch N1 is controlled by the control signal ENB_BFP. The control signal ENB_BFP can be any signal responsive to the system voltage rail TVCC voltage. For example, but not limited to, in some embodiments, the system voltage rail TVCC can be coupled to the control terminal of the second switch P2 and the control terminal of the third switch N1 to provide the control signal ENB_BFP. When the second switch P2 is turned on, the third switch N1 is turned off. When the third switch N1 is turned on, the second switch P2 is turned off.

More specifically, in the normal mode of operation, the control signal ENB_BFP can keep the second switch P2 off and the third switch N1 on. The control signal ZB can control the conduction state of the first switch P1. Therefore, the integrated circuit 500 can adjust the terminal impedance values of the control circuits 130_1, 130_2, 130_3 by the control signal ZB to perform impedance matching on the external communication channel connected to the pad Rx0.

When the integrated circuit 500 enters the power-off mode and stops supplying power to the system voltage rail TVCC, the low-level (eg, 0V) control signal ENB_BFP can keep the second switch P2 turned on, and keep the third switch N1 off. Broken. When the communication signal of the pad Rx0 is poured to the terminal impedance element R1, the high voltage of the pad Rx0 The bit (for example, 3.3V) is transmitted to the control terminal of the first switch P1 via the second switch P2, thereby turning off the first switch P1. Therefore, the first switch P1 and the second switch P2 can prevent the communication signal of the pad Rx0 from being inverted to the system voltage trajectory TVCC. In addition, the turned off third switch N1 can prevent the communication signal of the pad Rx0 from being poured to the front stage circuit (not shown) that provides the control signal ZB.

Figure 6 is a schematic diagram of a control circuit for preventing supply current from being reversed in accordance with a third embodiment of the present invention. Referring to FIG. 6, the integrated circuit 600 includes a pad Rx0, a core circuit 110, and one or more control circuits (such as the control circuit 130_1 shown in FIG. 6). Other control circuits can be analogized with reference to the control circuit 130_1. The control circuit 130_1 of the integrated circuit 600 includes a termination impedance element R1, a first switch P1, and a second switch P2. The integrated circuit 600, the control circuit 130_1, the terminal impedance element R1, the first switch P1 and the second switch P2 shown in FIG. 6 can refer to the integrated circuit 400, the control circuit 130_1, the terminal impedance element R1, and the first switch shown in FIG. The description of P1 and the second switch P2 is analogous, so it will not be described again.

In the embodiment shown in FIG. 6, the integrated circuit 600 further includes a base switching circuit 640. The first end of the base switch circuit 640 is coupled to the base of the first switch P1, and the second end of the base switch circuit 640 is coupled to the system voltage rail TVCC. When the integrated circuit 600 is operating in the normal operation mode, the base switching circuit 640 is turned on, and thus the system voltage of the system voltage rail TVCC can be transmitted to the base of the first switch P1. When the integrated circuit 600 is operated in the power-off mode (power saving mode), the base switching circuit 640 is turned off, so the base switching circuit 640 can prevent the communication signal of the pad Rx0 from being poured back to the system voltage trajectory via the base of the switch P1. TVCC.

In the embodiment shown in FIG. 6, the base switch circuit 640 includes a fourth switch P3, a fifth switch P4, and a sixth switch N2. It is assumed here that the fourth switch P3 and the fifth switch P4 are both PMOS transistors, and the sixth switch N2 is an NMOS transistor, but is not limited thereto in other embodiments. The first end (eg, the source) of the fourth switch P3 is coupled to the node Vb, and the node Vb is coupled to the base of the first switch P1. The second end (eg, the drain) of the fourth switch P3 is coupled to the system voltage rail TVCC. The base of the fourth switch P3 is coupled to the node Vb. The first end (eg, the source) of the fifth switch P4 is coupled to the base of the first switch P1. The second end (eg, the drain) of the fifth switch P4 is coupled to the control end (eg, the gate) of the fourth switch P3. The base of the fifth switch P4 is coupled to the node Vb. The first end (eg, the source) of the sixth switch N2 is coupled to the ground voltage rail GND. The second end (eg, the drain) of the sixth switch N2 is coupled to the control end (eg, the gate) of the fourth switch P3.

The control terminal (e.g., the gate) of the fifth switch P4 and the control terminal (e.g., the gate) of the sixth switch N2 are controlled by the control signal ENB_BFP. The control signal ENB_BFP can be any signal responsive to the system voltage rail TVCC voltage. For example, but not limited to, in some embodiments, the system voltage rail TVCC can be coupled to the control terminal of the fifth switch P4 and the control terminal of the sixth switch N2 to provide the control signal ENB_BFP. When the fifth switch P4 is turned on, the sixth switch N2 is turned off. When the sixth switch N2 is turned on, the fifth switch P4 is turned off.

In the normal operation mode, the control signal ENB_BFP can keep the fifth switch P4 off, and keep the fourth switch P3 and the sixth switch N2 turned on. Therefore, the system voltage of the system voltage rail TVCC can be via the fourth switch P3 and the node Vb. The substrate is transferred to the base of the first switch P1, the base of the second switch P2, the base of the fourth switch P3, and the base of the fifth switch P4.

When the integrated circuit 600 enters the power-off mode and stops supplying power to the system voltage rail TVCC, the low-level (for example, 0V) control signal ENB_BFP can keep the fifth switch P4 turned on, and keep the sixth switch N2 off. Broken. When the communication signal of the pad Rx0 is poured to the terminal impedance element R1, the high voltage level of the pad Rx0 (for example, 3.3V) is transmitted to the fourth switch P3 via the base of the first switch P1 and the fifth switch P4. The control terminal further turns off the fourth switch P3. Therefore, the fourth switch P3 can prevent the communication signal of the pad Rx0 from being poured into the system voltage rail TVCC via the base of the first switch P1.

Figure 7 is a schematic illustration of a control circuit for preventing supply current backflow in accordance with a fourth embodiment of the present invention. Referring to FIG. 7, the integrated circuit 700 includes a pad Rx0, a core circuit 110, an electrostatic discharge (ESD) protection circuit 120, a current limiting resistor, and one or more control circuits (such as the control circuit 130_1 shown in FIG. 7, 130_2 and 130_3). The control circuit 130_1 of the integrated circuit 700 includes a termination impedance element R1, a first switch P1, and a second switch P2. The other control circuits 130_2 and 130_3 can be analogized with reference to the related description of the control circuit 130_1. The integrated circuit 700, the control circuit 130_1, the terminal impedance element R1, the first switch P1 and the second switch P2 shown in FIG. 7 can refer to the integrated circuit 400, the control circuit 130_1, the terminal impedance element R1, and the first switch shown in FIG. The description of P1 and the second switch P2 is analogous, so it will not be described again.

The current limiting resistor 710 is disposed at the first end of the terminal impedance element R1 to the core In the electrical path between the communication ends of the road 110. The current limiting resistor 710 can block/limit the electrostatic discharge current from flowing into the core circuit 110 via the pad Rx0. The ESD protection circuit 120 is coupled to the pad Rx0. When an electrostatic discharge occurs, the electrostatic discharge protection circuit 120 provides an electrostatic discharge current path from the pad Rx0 to the ground voltage rail GND, thereby preventing the electrostatic discharge current of the pad Rx0 from striking the core circuit 110 to cause internal damage.

In the present embodiment, the ESD protection circuit 120 includes a first diode D1, a second diode D2, and a voltage clamp circuit 125. Clamp circuit 125 may also be referred to as an ESD clamp circuit. The first end of the clamp circuit 125 is connected to the cathode of the first diode D1. The second end of the clamp circuit 125 is connected to the ground voltage rail GND. When a positive electrostatic discharge pulse occurs in the pad Rx0, the positive pulse will be introduced to the ground voltage rail GND via the first diode D1 and the clamp circuit 125. When a negative electrostatic discharge pulse occurs in the pad Rx0, the negative pulse will be introduced to the ground voltage rail GND via the second diode D2. This embodiment does not limit the implementation of the first diode D1, the second diode D2, and the clamp circuit 125. For example, but not limited to, the first diode D1, the second diode D2, and the clamp circuit 125 may be a well-known electrostatic discharge diode and a known electrostatic discharge clamp circuit, and thus will not be described again.

It should be noted that when the integrated circuit 700 enters the power-off mode and stops supplying power to the system voltage rail TVCC, in order to prevent the communication signal of the pad Rx0 from being inverted to the system voltage rail TVCC via the first diode D1, the figure The cathode of the first diode D1 shown in FIG. 7 is not coupled to the system voltage rail TVCC, but is coupled to a single The electrostatic discharge rail DIO. This electrostatic discharge track DIO is not used during normal operation of the integrated circuit 700 (e.g., not used to communicate communication signals or system power). When a positive electrostatic discharge pulse occurs in the pad Rx0, the positive pulse will be introduced into the ground voltage rail GND via the first diode D1, the electrostatic discharge rail DIO, and the clamp circuit 125.

In summary, the present embodiment provides an integrated circuit that has an electrostatic protection function and can prevent the communication signal of the pad Rx0 from being poured to the system voltage rail TVCC. When the integrated circuit 700 enters the power-off mode and stops supplying power to the system voltage rail TVCC, the low-level (for example, 0V) control signal ENB_BFP can keep the second switch P2 turned on. When the communication signal of the pad Rx0 is poured to the terminal impedance element R1, the high voltage level of the pad Rx0 (for example, 3.3V) is transmitted to the control of the first switch P1 via the terminal impedance element R1 and the second switch P2. The terminal, in turn, turns off the first switch P1. On the other hand, the cathode of the first diode D1 is not coupled to the system voltage rail TVCC. Therefore, the integrated circuit 700 can prevent the communication signal of the pad Rx0 from being poured to the system voltage rail TVCC, and the protection function of the ESD protection circuit 120 can still operate normally.

The present invention has been disclosed in the above embodiments, but it is not intended to limit the disclosure, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the disclosure. The scope of protection of this disclosure is subject to the definition of the scope of the patent application.

110‧‧‧ core circuit

130_1, 130_2, 130_3‧‧‧ control circuit

400‧‧‧ integrated circuit

ENB_BFP‧‧‧Control signal

P1‧‧‧ first switch

P2‧‧‧ second switch

R1‧‧‧Terminal impedance components

Rx0‧‧‧ solder pad

TVCC‧‧‧ system voltage trajectory

ZB‧‧‧ control signal

Claims (9)

An integrated circuit includes: a pad for transmitting a communication signal; a core circuit having a communication end coupled to the pad, a power terminal of the core circuit coupled to a system voltage track; a first impedance end of the first switch is coupled to the system voltage rail, and a second end of the first switch is coupled to the terminal impedance a second end of the component; and a second switch, a first end of which is coupled to a control end of the first switch, and a second end of the second switch is coupled to a second end of the terminal impedance component end. The integrated circuit of claim 1, wherein the control circuit further comprises: a third switch, wherein a first end is configured to receive a control signal, and a second end of the third switch is coupled to The control end of the first switch. The integrated circuit of claim 2, wherein the third switch is turned off when the second switch is turned on, and turned off when the third switch is turned on. The integrated circuit of claim 1, wherein the control circuit further comprises: a base switching circuit, wherein a first end and a second end are respectively coupled to a base of the first switch and the system Voltage trajectory. The integrated circuit according to claim 4, wherein the base switch The circuit includes: a fourth switch, a first end and a second end are respectively coupled to a base of the first switch and the system voltage track; a fifth switch, a first end of which is coupled to the a second end of the fifth switch, the second end of the fifth switch is coupled to the control end of the fourth switch; and a sixth switch, the first end of which is coupled to a ground voltage trajectory, the sixth A second end of the switch is coupled to the control end of the fourth switch. The integrated circuit of claim 5, wherein the sixth switch is turned off when the fifth switch is turned on; and the fifth switch is turned off when the sixth switch is turned on. The integrated circuit of claim 1, further comprising: an electrostatic discharge protection circuit coupled to the pad. The integrated circuit of claim 7, wherein the electrostatic discharge protection circuit comprises: a first diode, an anode of the first diode is connected to the pad; a second diode, a cathode of the second diode is connected to the pad, an anode of the second diode is connected to a ground voltage track; and a clamping circuit, a first end of the clamping circuit is connected to the first A cathode of the diode, a second end of the clamping circuit is connected to the ground voltage rail. The integrated circuit of claim 1, further comprising: a current limiting resistor disposed in the electrical path between the first end of the terminal impedance element and the communication end of the core circuit.