TW201606947A - Electric connection structure between front and back surfaces of chip and manufacturing method thereof - Google Patents
Electric connection structure between front and back surfaces of chip and manufacturing method thereof Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
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Description
本發明係有關一種晶片之正、背面間電性連接結構及其製造方法,尤指一種利用一軟性電路板由一晶片之正面彎曲延伸並繞過該晶片一側邊緣而黏著貼覆在該晶片之背面,以使晶片正面上所設各晶墊(die pad)能藉由該軟性電路板之電路連通而移位至晶片之背面供可電性連結並安裝在一印刷電路板上,藉以使該晶片正面上所設之作用區能配合該印刷電路板而達成作用區之使用功能。 The present invention relates to a positive and negative electrical connection structure of a wafer and a manufacturing method thereof, and more particularly to a method of bending and extending from a front side of a wafer by a flexible circuit board and adhering to one side of the wafer to adhere to the wafer. a back surface of the wafer so that the die pads provided on the front surface of the wafer can be electrically connected to the back surface of the wafer by the circuit of the flexible circuit board to be electrically connected and mounted on a printed circuit board, thereby The active area provided on the front side of the wafer can cooperate with the printed circuit board to achieve the function of using the active area.
利用表面黏著技術(SMT)將一晶片以覆晶(flip-chip)方式電性連結並安裝在一印刷電路板(PCB)上,乃為目前晶片常見的使用組態及習知技術,此時該晶片之正面上所設之多個晶墊(die pad)即面對該印刷電路板(PCB)且能對應電性連接於該印刷電路板表面上所設電路層之各預設接點上。 Using a surface mount technology (SMT) to electrically connect a wafer in a flip-chip manner and mount it on a printed circuit board (PCB) is a common configuration and conventional technique for current wafers. A plurality of die pads disposed on the front surface of the chip face the printed circuit board (PCB) and are electrically connected to respective preset contacts of the circuit layer disposed on the surface of the printed circuit board. .
但當一晶片之正面上除了多個晶墊(die pad)之外,還設有其他作用區(active area)時,即無法以覆晶(flip-chip)方式電性連接並安裝在一印刷電路板(PCB)上。在此以一指紋辨識晶片如圖2所示之晶片10為例說明但非用以限制本發明,該晶片10之正面11上設有多個晶墊(die pad)110及一作用區(active area)111如指紋辨識感應作用區(sensor active area), 該感應作用區111係用以對外感應一指紋影像(如將手指按壓在作用區111表面上)並轉換成電子訊號,再透過該些晶墊(die pad)110將電子訊號傳輸至所電性連接之印刷電路板供進行辨識功能或相關作業。由於該作用區111如指紋辨識感應作用區是對外感應,故該作用區111之表面須朝向該印刷電路板之相對側,否則會被該印刷電路板遮住,因此該晶片10之正面11上的多個晶墊(die pad)110無法以覆晶(flip-chip)方式電性連接並安裝在印刷電路板(PCB)上。 However, when a positive area is provided on the front side of a wafer in addition to a plurality of die pads, it cannot be electrically connected and mounted in a flip-chip manner. On the circuit board (PCB). Here, a fingerprint identification wafer such as the wafer 10 shown in FIG. 2 is taken as an example, but is not intended to limit the present invention. The front surface 11 of the wafer 10 is provided with a plurality of die pads 110 and an active area (active). Area) 111 such as a fingerprint active area (sensor active area), The sensing area 111 is configured to externally sense a fingerprint image (such as pressing a finger on the surface of the active area 111) and convert it into an electronic signal, and then transmit the electronic signal to the electrical property through the die pad 110. Connected printed circuit boards for identification or related work. Since the active area 111, such as the fingerprint recognition sensing area, is externally sensed, the surface of the active area 111 must face the opposite side of the printed circuit board, otherwise it will be hidden by the printed circuit board, so that the front side of the wafer 10 is 11 A plurality of die pads 110 are not electrically connected and mounted on a printed circuit board (PCB) in a flip-chip manner.
雖然,該晶片10之正面11上多個晶墊(die pad)110與印刷電路板(PCB)之間可採用其他接合方式來進行電性連結,如採用導線連結(wire bond)方式,但所使用之導線是從晶墊(die pad)110表面呈弧狀拉引至位於該晶片10之背面12處之印刷電路板(PCB),因此導線之最高點相對會高出該晶片10之正面11或其上之晶墊(die pad)110一段距離,又該些導線(wire)外圍一般會再施作一絕緣外護層用以蓋住並保護該些導線(wire),以致該些導線(wire)或其外護層相對於該作用區(active area)111之感應面之間的落差加大,以圖1為例說明,該落差就像是圖1中第二表面22與該作用區111之感應面(如晶片10之正面11)之間的落差,但實際落差會比圖1中所示之50μm大,造成作用區111之表面與周遭表面之間的落差及不平整,相對影響該作用區111如指紋辨識感應作用區之感應功能及使用效果。另,如在晶片10之封裝中在正面11及背面12之間安排電性導通用導通孔,此類導通孔之設計常見於晶片封裝及相關先前技術中,但製程相對麻煩且複雜,不符合成本效益。 Although a plurality of bonding pads 110 and a printed circuit board (PCB) on the front surface 11 of the wafer 10 may be electrically connected by other bonding methods, such as a wire bond method, The wire used is drawn from the surface of the die pad 110 to the printed circuit board (PCB) at the back side 12 of the wafer 10, so that the highest point of the wire is relatively higher than the front side of the wafer 10. Or a pad of the die pad 110 at a distance, and the periphery of the wire is generally applied as an insulating outer cover to cover and protect the wires so that the wires (the wires) The difference between the wire or its outer sheath relative to the sensing surface of the active area 111 is increased, as illustrated by FIG. 1 , which is like the second surface 22 in FIG. 1 and the active area. The difference between the sensing surface of 111 (such as the front side 11 of the wafer 10), but the actual drop will be larger than 50 μm as shown in Fig. 1, causing the difference and unevenness between the surface of the active area 111 and the surrounding surface, and the relative influence. The action area 111, for example, identifies the sensing function and the use effect of the sensing area. In addition, as in the package of the wafer 10, electrical conductive vias are arranged between the front side 11 and the back side 12. The design of such via holes is common in chip packaging and related prior art, but the process is relatively cumbersome and complicated, and does not conform to Cost-effectiveness.
由上可知,對一正面上同時設有多個晶墊(die pad)及其他 作用區(active area)如指紋辨識晶片之指紋辨識感應作用區(sensor active area)之晶片而言,本領域之先前技術的結構及/或製程實難以符合實際使用時之需求,因此在本相關領域中,仍存在進一步改進之需要性。 As can be seen from the above, a plurality of die pads and others are simultaneously provided on one front side. In the case of an active area such as a chip for fingerprint identification of a sensor active area, the structure and/or process of the prior art in the prior art is difficult to meet the requirements of actual use, and therefore There is still a need for further improvement in the field.
本發明主要目的乃在於提供一種晶片之正、背面間電性連接結構及其製造方法,其係利用一軟性電路板由一晶片之正面彎曲延伸並繞過該晶片一側邊緣而黏著貼覆在該晶片之背面,以使晶片正面上所設各晶墊(die pad)能藉由該軟性電路板之電路連通而移位至晶片之背面供可電性連接並安裝在一印刷電路板上,藉以使該晶片正面上所設之作用區能配合該印刷電路板而達成作用區之使用功能。 The main object of the present invention is to provide a positive and negative electrical connection structure of a wafer and a manufacturing method thereof, which are formed by bending a front surface of a wafer by a flexible circuit board and sticking around one side edge of the wafer. The back surface of the wafer is such that the die pads provided on the front surface of the wafer can be electrically connected to the back surface of the wafer by the circuit of the flexible circuit board for electrical connection and mounting on a printed circuit board. Therefore, the active area provided on the front surface of the wafer can cooperate with the printed circuit board to achieve the function of using the active area.
為達成上述目的,本發明之晶片之正、背面間電性連接結構係包含一晶片及一軟性電路板(FPC,Flexible Printed Circuit),該晶片之正面上設有多個晶墊(die pad)及至少一作用區(active area)如指紋辨識感應作用區(sensor active area);該軟性電路板具有一第一表面及一第二表面,該第一表面上設有多個第一連接墊供分別對應於該晶片正面上所設之各晶墊(die pad);該第二表面上設有多個第二連接墊供分別與第一表面上各第一連接墊對應電性連接,又該些第二連接墊係用以與一相配合使用之印刷電路板上所預設之連接電路之各外露接點對應連接,以使該晶片能藉該軟性電路板所設該些第二連接墊而安裝在一印刷電路板上並達成電性連接。 In order to achieve the above object, the positive and negative electrical connection structure of the wafer of the present invention comprises a wafer and a flexible printed circuit (FPC), and a plurality of die pads are disposed on the front surface of the wafer. And at least one active area, such as a fingerprint active area; the flexible circuit board has a first surface and a second surface, and the first surface is provided with a plurality of first connection pads for Corresponding to each of the die pads disposed on the front surface of the wafer; the second surface is provided with a plurality of second connection pads for electrically connecting with the first connection pads on the first surface, respectively. The second connection pads are respectively connected to the exposed contacts of the connection circuit preset on the printed circuit board used together, so that the chip can be provided with the second connection pads by the flexible circuit board. It is mounted on a printed circuit board and electrically connected.
為達成上述目的,本發明之晶片之正、背面間電性連接結構之製造方法係包含下列步驟: In order to achieve the above object, the manufacturing method of the electrical connection structure between the front and the back of the wafer of the present invention comprises the following steps:
步驟1:提供一晶片,該晶片之正面上設有多個晶墊(die pad) 及至少一作用區(active area)。 Step 1: providing a wafer having a plurality of die pads on the front side of the wafer And at least one active area.
步驟2:提供一軟性電路板,該軟性電路板具有一第一表面及一第二表面,該第一表面上設有多個第一連接墊供分別對應於該些晶墊(die pad),該第二表面上設有多個第二連接墊供能藉由軟性電路板之電路設計而分別與第一表面上各第一連接墊對應電性連接,又該些第二連接墊係用以與一印刷電路板上所預設之連接線路之各外露接點對應連接。 Step 2: providing a flexible circuit board having a first surface and a second surface, the first surface being provided with a plurality of first connection pads for respectively corresponding to the die pads The second surface is provided with a plurality of second connection pads respectively electrically connected to the first connection pads on the first surface by the circuit design of the flexible circuit board, and the second connection pads are used for Correspondingly connected to the exposed contacts of the connection line preset on a printed circuit board.
步驟3:將該軟性電路板之第一表面上所設各第一連接墊對應電性連接在該晶片正面之各晶墊上。 Step 3: Correspondingly, each of the first connection pads disposed on the first surface of the flexible circuit board is electrically connected to each of the crystal pads on the front surface of the chip.
步驟4:使該軟性電路板彎曲延伸並繞過該晶片一側邊緣以黏著貼覆在該晶片之背面上,藉此使該軟性電路板之第二表面上所設之各第二連接墊能面對向外,供可藉後續作業以電性連接並安裝在一相配合印刷電路板上,以使該晶片之正面上所設之作用區能配合該印刷電路板使用而達成作用區之使用功能。 Step 4: bending and extending the flexible circuit board and bypassing one side edge of the wafer to adhere to the back surface of the wafer, thereby enabling each of the second connection pads disposed on the second surface of the flexible circuit board Facing outward, the electrical connection can be electrically connected and mounted on a phase-matched printed circuit board so that the active area provided on the front side of the wafer can be used in conjunction with the printed circuit board to achieve the use of the active area. Features.
在本發明一實施例中,其中該作用區(active area)係為一指紋辨識感應作用區(sensor active area),且該感應作用區之上面進一步設置一高透光度介質層,用以保護該感應作用區。 In an embodiment of the invention, the active area is a sensor active area, and a high transmittance medium layer is further disposed on the sensing area for protection. The sensing area.
在本發明一實施例中,其中該感應作用區(sensor active area)上所設置之高透光度介質層,其高度係與該軟性電路板在各第一連接墊對應電性連接在該晶片正面之各晶墊上之後的高度齊平,即與該軟性電路板之頂面(第二表面)形成同一高度。 In an embodiment of the present invention, the high transmittance dielectric layer disposed on the sensor active area is electrically connected to the flexible circuit board in each of the first connection pads. The height after the pads on the front side is flush, that is, the same height as the top surface (second surface) of the flexible circuit board.
10‧‧‧晶片 10‧‧‧ wafer
11‧‧‧正面 11‧‧‧ positive
12‧‧‧背面 12‧‧‧ Back
110‧‧‧晶墊 110‧‧‧ crystal pad
111‧‧‧作用區 111‧‧‧Action area
20‧‧‧軟性電路板 20‧‧‧Soft circuit board
21‧‧‧第一表面 21‧‧‧ first surface
210‧‧‧第一連接墊 210‧‧‧First connection pad
22‧‧‧第二表面 22‧‧‧ second surface
220‧‧‧第二連接墊 220‧‧‧Second connection pad
30‧‧‧化學鎳金層(ENIG) 30‧‧‧Chemical Nickel Gold (ENIG)
40‧‧‧黏膠層 40‧‧‧Adhesive layer
50‧‧‧高透光度介質層 50‧‧‧High transmittance dielectric layer
第1圖係本發明晶片之正、背面間電性連接結構一實施例之剖視示意圖。 BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic cross-sectional view showing an embodiment of an electrical connection structure between a front side and a back side of a wafer of the present invention.
第2圖係本發明之晶片一實施例之上視示意圖。 Figure 2 is a top plan view of an embodiment of the wafer of the present invention.
第3A~3E圖係本發明晶片之正、背面間電性連接結構之製造方法之流程示意圖。 3A to 3E are schematic flow charts showing a method of manufacturing the electrical connection structure between the front and the back of the wafer of the present invention.
第4圖係第1圖中本發明晶片之正面上所設感應作用區之上面設置一高透光度之介質層之剖視示意圖。 Fig. 4 is a cross-sectional view showing a dielectric layer of high transmittance provided on the front surface of the sensing region provided on the front surface of the wafer of the present invention in Fig. 1.
第5圖係第4圖中該高透光度介質層之高度與該軟性電路板之高度齊平之剖視示意圖。 Figure 5 is a cross-sectional view showing the height of the high transmittance dielectric layer in flush with the height of the flexible circuit board in Fig. 4.
為使本發明更加明確詳實,茲列舉較佳實施例並配合下列圖示,將本發明之結構及其技術特徵詳述如後:參考圖1,本發明之晶片之正、背面間電性連接結構係包含一晶片10及一軟性電路板(FPC,Flexible Printed Circuit)20,該晶片10可為一指紋辨識晶片而該作用區(active area)可為一指紋辨識感應作用區(sensor active area)但非用以限制本發明。該晶片10之正面11上設有多個晶墊(die pad)110及至少一作用區(sensor activearea)111(如指紋辨識感應作用區)如圖2所示。在圖2中,該晶片10之正面11上設有四個晶墊(die pad)110並排列成一排但非用以限制本發明,因此在圖1中只顯示一晶墊(die pad)110但非用以限制本發明。又以圖2之晶片10為例說明,該晶片10係一指紋辨識晶片,該作用區111為一指紋辨識感應作用區(sensor active area),其佔有該晶片10之正面11上較大面積,其係用以對外感應一指紋影像如將手指按壓在該作用區111之表面上,並轉換成電子訊號,再透過該些晶墊(die pad)110 以將電子訊號傳輸至所連結之印刷電路板(圖未示)供進行辨識功能相關作業。 In order to make the present invention more clear and detailed, the preferred embodiment and the following drawings are used to describe the structure and technical features of the present invention as follows: Referring to FIG. 1, the positive and negative electrical connections of the wafer of the present invention are described. The structure includes a wafer 10 and a flexible printed circuit (FPC) 20. The wafer 10 can be a fingerprint identification chip and the active area can be a sensor active area (sensor active area). However, it is not intended to limit the invention. The front surface 11 of the wafer 10 is provided with a plurality of die pads 110 and at least one sensor active area 111 (such as a fingerprint identification sensing area) as shown in FIG. In FIG. 2, four sides of the wafer 10 are provided with four die pads 110 and arranged in a row, but are not intended to limit the present invention. Therefore, only one die pad 110 is shown in FIG. However, it is not intended to limit the invention. Taking the wafer 10 of FIG. 2 as an example, the wafer 10 is a fingerprint identification chip, and the active area 111 is a fingerprint active area, which occupies a large area on the front surface 11 of the wafer 10. It is used to externally sense a fingerprint image, such as pressing a finger on the surface of the active area 111, converting it into an electronic signal, and then transmitting the die pad 110. The electronic signal is transmitted to the connected printed circuit board (not shown) for identification function related work.
再以圖2之晶片10及軟性電路板20為例說明,但圖2所示之尺寸及比例並非用以限制本發明,該軟性電路板20可設計形成一長矩形軟性電路板,並依使用需要而具有預定之電路設計,其具有一第一表面21及一第二表面22;該軟性電路板20之一部分是落在該晶片10之正面11上,再由該晶片10之正面11彎曲並延伸繞過該晶片10一側邊緣而延伸至並黏著貼覆在該晶片10之背面12上,其中該軟性電路板20得蓋住該晶片10之背面12的全部如圖1所示,但非用以限制本發明,也就是,該軟性電路板20亦可視設計需要而蓋住該晶片10之背面12的一部分(圖未示)。該第一表面21上設有多個第一連接墊210供分別對應於該晶片10之正面11上所設之多個晶墊(die pad)110;該第二表面22上設有多個第二連接墊220供藉由軟性電路板20之電路而分別與該第一表面21上所設之各第一連接墊210對應連接,至於該多個第二連接墊220與該多個第一連接墊210之間的對應連接關係,乃是建立在該軟性電路板20之電路設計上,對本發明而言乃是利用現有之電路板線路設計技術可達成者,故在此不再贅述。 The wafer 10 and the flexible circuit board 20 of FIG. 2 are taken as an example, but the dimensions and proportions shown in FIG. 2 are not intended to limit the present invention. The flexible circuit board 20 can be designed to form a long rectangular flexible circuit board and used. There is a predetermined circuit design having a first surface 21 and a second surface 22; a portion of the flexible circuit board 20 is dropped on the front surface 11 of the wafer 10, and is bent by the front surface 11 of the wafer 10 and Extending around one edge of the wafer 10 and extending and adhering to the back surface 12 of the wafer 10, wherein the flexible circuit board 20 covers the back surface 12 of the wafer 10 as shown in FIG. To limit the invention, that is, the flexible circuit board 20 also covers a portion of the back surface 12 of the wafer 10 (not shown) as needed for design. The first surface 21 is provided with a plurality of first connection pads 210 for respectively corresponding to a plurality of die pads 110 disposed on the front surface 11 of the wafer 10; the second surface 22 is provided with a plurality of The two connection pads 220 are respectively connected to the first connection pads 210 disposed on the first surface 21 by the circuit of the flexible circuit board 20, and the plurality of second connection pads 220 are connected to the plurality of first connections The corresponding connection relationship between the pads 210 is based on the circuit design of the flexible circuit board 20. For the present invention, it can be achieved by using the existing circuit board circuit design technology, and therefore will not be described herein.
以圖2之晶片10及軟性電路板20為例說明,該第一表面21上所設之多個第一連接墊210與該第二表面22上所設之多個第二連接墊220係分開一段距離而分別位在靠近該長矩形軟性電路板20之長度向二相對端處但非用以限制本發明,如此可使該軟性電路板20之一部分落在該晶片10之正面11上,並使該軟性電路板20能由該晶片10之正面11彎曲並繞過該晶片10一側邊緣而延伸至該晶片10之背面12以使其第二表面22能黏著貼覆在該背 面12上。該多個第二連接墊220係用以與一相配合使用之印刷電路板(圖未示)上所預設之連接電路之各外露接點對應連接如圖1中箭頭A所示,該多個第二連接墊220即是依箭頭A所示方向對應連接至一印刷電路板(圖未示)上所預設之連接線路之各外露接點上,以使該晶片10能藉該軟性電路板20所設之該些第二連接墊220而安裝在一印刷電路板上(圖未示)並達成電性連接。至於該印刷電路板之設計或所採用之對應連接工法如覆晶方式,在本發明中視為習知技術,故不另再說明。 Taking the wafer 10 and the flexible circuit board 20 of FIG. 2 as an example, the plurality of first connection pads 210 disposed on the first surface 21 are separated from the plurality of second connection pads 220 disposed on the second surface 22. A distance is located near the opposite ends of the long rectangular flexible circuit board 20, but is not intended to limit the present invention, so that one portion of the flexible circuit board 20 can be dropped on the front surface 11 of the wafer 10, and The flexible circuit board 20 can be bent from the front side 11 of the wafer 10 and bypassed the side edge of the wafer 10 to extend to the back side 12 of the wafer 10 such that the second surface 22 can be adhesively attached to the back On the face 12. The plurality of second connection pads 220 are connected to the exposed contacts of the connection circuit preset on a printed circuit board (not shown) for use in conjunction with the arrow A in FIG. The second connection pads 220 are respectively connected to the exposed contacts of the connection lines preset on a printed circuit board (not shown) in the direction indicated by the arrow A, so that the wafer 10 can borrow the flexible circuit. The second connection pads 220 disposed on the board 20 are mounted on a printed circuit board (not shown) and electrically connected. As for the design of the printed circuit board or the corresponding connection method such as flip chip method, it is regarded as a conventional technique in the present invention, and therefore will not be further described.
此外,以圖2所示結構為例說明,在該軟性電路板20之第一表面21上所設之多個第一連接墊210與該晶片10之正面11上所設之多個晶墊(die pad)110對應連接之前,各晶墊(die pad)110之表面上可先設一化學鎳金層(ENIG,electroless nickel/immersion gold)30,但非用以限制本發明;該化學鎳金層(ENIG)30得防止各晶墊(die pad)110氧化,並可增進該第一連接墊210與晶墊(die pad)110之間的焊結連接效率。 In addition, taking the structure shown in FIG. 2 as an example, a plurality of first connection pads 210 disposed on the first surface 21 of the flexible circuit board 20 and a plurality of crystal pads disposed on the front surface 11 of the wafer 10 ( Before the die pad 110 is connected, an electroless nickel/immersion gold (ENIG) 30 may be disposed on the surface of each die pad 110, but is not intended to limit the present invention; the chemical nickel gold The layer (ENIG) 30 prevents oxidation of the die pad 110 and improves the solder joint connection efficiency between the first connection pad 210 and the die pad 110.
此外,以圖2所示結構為例說明,在該軟性電路板20之第一表面21上可預設一黏膠層40如雙面背膠但非用以限制本發明,以使該軟性電路板20由該晶片10之正面11彎曲繞過該晶片10一側邊緣而延伸至該晶片10之背面12時,該軟性電路板20之第一表面21即能藉該黏膠層40而黏著貼覆在該背面12上。 In addition, taking the structure shown in FIG. 2 as an example, an adhesive layer 40 such as a double-sided adhesive can be preset on the first surface 21 of the flexible circuit board 20, but is not used to limit the present invention, so that the flexible circuit When the front surface 11 of the wafer 10 is bent around the edge of the wafer 10 and extends to the back surface 12 of the wafer 10, the first surface 21 of the flexible circuit board 20 can be adhered by the adhesive layer 40. Covered on the back side 12.
本發明之晶片之正、背面間電性連接結構之製造方法包含下列步驟: The method for manufacturing the electrical connection structure between the front and the back of the wafer of the present invention comprises the following steps:
步驟1:提供一晶片10如圖3A所示,該晶片10之正面11上設有多個晶墊(die pad)110及至少一作用區(active area)111;又各晶墊110 可預設一化學鎳金層(ENIG,electroless nickel/immersion gold)30如圖3B所示。 Step 1: providing a wafer 10 as shown in FIG. 3A, the front surface 11 of the wafer 10 is provided with a plurality of die pads 110 and at least one active area 111; and each of the crystal pads 110 An electroless nickel/immersion gold (ENIG) 30 may be preset as shown in FIG. 3B.
步驟2:提供一軟性電路板20如圖3C所示,該軟性電路板20具有一第一表面21及一第二表面22,該第一表面21上設有多個第一連接墊210供分別對應於該些晶墊(die pad)110,該第二表面22上設有多個第二連接墊220供可藉軟性電路板20之電路而分別與第一表面21上各第一連接墊210對應連接,又該些第二連接墊220係用以與一配合使用之印刷電路板上所預設之連接電路之各外露接點對應連接;其中,該軟性電路板20之第二表面22上可預貼一雙面背膠層40如圖3D所示。 Step 2: providing a flexible circuit board 20 as shown in FIG. 3C, the flexible circuit board 20 has a first surface 21 and a second surface 22, and the first surface 21 is provided with a plurality of first connection pads 210 for respectively Corresponding to the die pads 110, the second surface 22 is provided with a plurality of second connection pads 220 for respectively connecting the first connection pads 210 on the first surface 21 by the circuit of the flexible circuit board 20. Correspondingly, the second connection pads 220 are connected to the exposed contacts of the connection circuit preset on the printed circuit board for use; wherein the second surface 22 of the flexible circuit board 20 is A double-sided adhesive layer 40 can be pre-applied as shown in Fig. 3D.
步驟3:將該軟性電路板20之第一表面21上所設各第一連接墊210對應電性連接在該晶片10之正面11上之各晶墊110或其化學鎳金層(ENIG)30上如圖3C、3D所示。 Step 3: Correspondingly, each of the first connection pads 210 disposed on the first surface 21 of the flexible circuit board 20 is electrically connected to each of the crystal pads 110 on the front surface 11 of the wafer 10 or an electroless nickel gold layer (ENIG) 30 thereof. This is shown in Figures 3C and 3D.
步驟4:如圖3E所示,使該軟性電路板20彎曲並繞過該晶片10一側邊緣以延伸至該晶片10之背面12上並黏著貼覆(如利用該黏膠層40)在該背面12上;藉此,使該軟性電路板20之第二表面22上所設各第二連接墊220能面向外(如圖1中箭頭A所示),供可藉後續作業以電性連接並安裝在一相配合印刷電路板(圖未示)上,以使該晶片10之正面11上所設之作用區111能配合該印刷電路板使用而達成該晶片10之使用功能如指紋辨識晶片之指紋辨識功能。 Step 4: As shown in FIG. 3E, the flexible circuit board 20 is bent and bypassed on one side edge of the wafer 10 to extend onto the back surface 12 of the wafer 10 and adhered (eg, using the adhesive layer 40). The second connecting pad 220 disposed on the second surface 22 of the flexible circuit board 20 can face outward (as indicated by an arrow A in FIG. 1) for electrical connection by subsequent operations. And mounted on a phase-matched printed circuit board (not shown) such that the active area 111 provided on the front side 11 of the wafer 10 can be used in conjunction with the printed circuit board to achieve the function of the wafer 10, such as a fingerprint identification wafer. Fingerprint identification function.
此外,如圖4所示,該作用區111之表面上進一步設置一高透光度介質層50,用以保護該作用區111且不影響其使用功能;如圖4所示,該高透光度介質層50係設置在該晶片10之正面11上,用以全面遮護該作用區 111但露出各晶墊(die pad)110及/或各晶墊(die pad)110上所設之化學鎳金層(ENIG)30。 In addition, as shown in FIG. 4, a surface of the active area 111 is further provided with a high transmittance dielectric layer 50 for protecting the active area 111 without affecting its function; as shown in FIG. The dielectric layer 50 is disposed on the front surface 11 of the wafer 10 for comprehensively shielding the active area 111, but each of the die pad 110 and/or the chemical nickel gold layer (ENIG) 30 provided on each of the die pads 110 is exposed.
此外,在圖4中該感應作用區111上所設置之高透光度介質層50的高度進一步與該軟性電路板20落在該晶片10之正面11上的高度(即圖4、5中該軟性電路板20之第二表面22的表面)齊平如圖5所示,以使該晶片10之正面11形成同一平面,藉以符合該晶片10如指紋辨識晶片在實際應用上之組裝需要。 In addition, the height of the high transmittance dielectric layer 50 disposed on the inductive active region 111 in FIG. 4 is further the height of the flexible circuit board 20 falling on the front surface 11 of the wafer 10 (ie, in FIGS. 4 and 5). The surface of the second surface 22 of the flexible circuit board 20 is flush as shown in FIG. 5 such that the front side 11 of the wafer 10 is formed in the same plane, thereby conforming to the assembly requirements of the wafer 10 such as a fingerprint identification wafer in practical applications.
以上所述僅為本發明的優選實施例,對本發明而言僅是說明性的,而非限制性的;本領域普通技術人員理解,在本發明權利要求所限定的精神和範圍內可對其進行許多改變,修改,甚至等效變更,但都將落入本發明的保護範圍內。 The above is only the preferred embodiments of the present invention, and is intended to be illustrative, and not restrictive, and it is understood by those of ordinary skill in the art that Many changes, modifications, and even equivalents may be made without departing from the scope of the invention.
10‧‧‧晶片 10‧‧‧ wafer
11‧‧‧正面 11‧‧‧ positive
12‧‧‧背面 12‧‧‧ Back
110‧‧‧晶墊 110‧‧‧ crystal pad
111‧‧‧作用區 111‧‧‧Action area
20‧‧‧軟性電路板 20‧‧‧Soft circuit board
21‧‧‧第一表面 21‧‧‧ first surface
210‧‧‧第一連接墊 210‧‧‧First connection pad
22‧‧‧第二表面 22‧‧‧ second surface
220‧‧‧第二連接墊 220‧‧‧Second connection pad
30‧‧‧化學鎳金層(ENIG,electroless nickel/immersion gold) 30‧‧‧Chemical nickel/immersion gold (ENIG)
40‧‧‧黏膠層 40‧‧‧Adhesive layer
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Cited By (4)
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TWI623887B (en) * | 2017-04-21 | 2018-05-11 | 致伸科技股份有限公司 | Fingerprint recognition module |
CN108733996A (en) * | 2017-04-21 | 2018-11-02 | 致伸科技股份有限公司 | Fingerprint identification module |
CN111863719A (en) * | 2020-07-28 | 2020-10-30 | 南通通富微电子有限公司 | Chip interconnection method |
CN111863717A (en) * | 2020-07-28 | 2020-10-30 | 南通通富微电子有限公司 | Chip interconnection method |
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TWM327540U (en) * | 2007-08-16 | 2008-02-21 | Int Semiconductor Tech Ltd | Package structure for touch-and-slide flat type fingerprint recognizer and substrate for the same |
TW201034137A (en) * | 2009-03-03 | 2010-09-16 | Kinsus Interconnect Tech Corp | Flip chip package structure |
US9030440B2 (en) * | 2012-05-18 | 2015-05-12 | Apple Inc. | Capacitive sensor packaging |
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TWI623887B (en) * | 2017-04-21 | 2018-05-11 | 致伸科技股份有限公司 | Fingerprint recognition module |
CN108733996A (en) * | 2017-04-21 | 2018-11-02 | 致伸科技股份有限公司 | Fingerprint identification module |
CN108733996B (en) * | 2017-04-21 | 2021-11-02 | 致伸科技股份有限公司 | Fingerprint identification module |
CN111863719A (en) * | 2020-07-28 | 2020-10-30 | 南通通富微电子有限公司 | Chip interconnection method |
CN111863717A (en) * | 2020-07-28 | 2020-10-30 | 南通通富微电子有限公司 | Chip interconnection method |
CN111863717B (en) * | 2020-07-28 | 2022-07-15 | 南通通富微电子有限公司 | Chip interconnection method |
CN111863719B (en) * | 2020-07-28 | 2022-07-19 | 南通通富微电子有限公司 | Chip interconnection method |
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