TW201601289A - Ferromagnetic memory device and its magnetic memory chip - Google Patents

Abstract

The patent discloses a memory device and its application to the memory modules. Its memory module contains numbers of metal-oxide-semiconductor (MOS) transistor, which includes a gate region, source region, drain region, a channel and a gate oxide layer. One end of the channel connects to source region and the other end connects to drain region. The gate oxide layer is to isolate gate region, source region, and drain region. A thin magnetic layer is located on the top of gate region. A magnetic coil surround on the MOS transistor. A thin magnetic film is installed on the MOS transistor to achieve small volume, compact layout, and low process cost. The magnetic thin-film on the MOS transistor is magnetized and stored the magnetic energy. Using the property of mobility variation with applying magnetic field, it shows that the memory storage of 1 and 0 on the magnetic MOS transistor is determined by the magnetic thin-film with and without magnetization, respectively. The innovative and nonvolatile read/write memory chip is developed by new memory devices.

Description

Ferromagnetic memory module and memory chip using the same

The invention relates to a memory module and a memory device using the same, in particular to a memory device for changing the threshold voltage value of the metal oxide half field effect transistor to achieve storage and reading efficiency.

For example, the Republic of China Patent No. 166082 "Hall Effect Semiconductor Memory Cell" includes: a sensor, a pair of bipolar transistors, a magnetic patch, wherein the sensor is a semiconductor Hall made of a germanium substrate. a pair of bipolar transistors are coupled to the sensor, and the magnetic patch is formed on the 矽 line, and the magnetic patch is located in a hole between the two write lines, when the recording is performed, The driving current flows through the drain region, the channel, and the source region of the sensor, and the current flowing direction intersects the inversion layer of the sensor to generate a Hall voltage, and generates a local portion. The magnetic field and the magnetic line, the magnetic line is perpendicular to the driving current and the Hall voltage, and the local magnetic field can achieve the polarity of the magnetic patch in a desired direction, and the second write line can be used for the recording current to flow in. In order to magnetize the magnetic patch, the magnetic patch can store binary data of the Hall voltage.

When reading, the multi-gate element of the sensor is grounded so that the channel below it generates an inverted layer, so that the driving current flows in the channel, so that each base region induces the Hall voltage and its polarity. The polarity of the Hall voltage depends on the polarity of the magnetic patch to convert the data stored in the magnetic patch into a voltage, which is sensed by a pair of bipolar transistors. The voltage that appears on the two write lines is decoded by the row decoder associated with the row and column, and the information stored by the magnetic patch can be read.

The "Hall Effect Semiconductor Memory Cell" can achieve the functions of writing and reading. However, since the sensor of the "Hall Effect Semiconductor Memory Cell" needs to be used with a pair of bipolar transistors, the "Hall Effect Semiconductor Memory Cell" has a large volume, complicated connection lines, and increased manufacturing cost.

In view of this, the ferromagnetic memory system of the present invention is a standard complementary metal oxide semi-transistor (CMOS) standard process for fabricating a gold oxide half field effect transistor as a substrate array element having a gate, a source, and a drain. And the gold-oxygen half-field effect transistor is plated with a ferromagnetic material; two-layer loop coils of the X-axis and the Y-axis are arranged on the component, and the magnetization of the ferromagnetic material on the component is the magnetization of the forward current or The same is the degaussing effect of the reverse. In order to realize a practical ferromagnetic memory chip, a multiplexer (MUX) can be used as a site for writing and selected as a component address. In addition, two sets of multiplexers are also used for reading, which are connected to the drain and gate of the X-axis and Y-axis of the gold-oxygen half-field effect transistor, and the sources are all connected together for output.

The main object of the present invention is to provide a memory module comprising: a MOS field effect transistor, the MOS field effect transistor having a gate, a source region, a drain region, a channel, and a gate a pole insulating layer, one end of the channel is connected to the source region, and the other end of the channel is connected to the drain region, the gate insulating layer separates the gate from the source region and the drain region; a magnetic conductive film layer, The magnetic conductive film layer is fixed on the gate; a coil set, the coil set ring is arranged around the outer periphery of the gold oxide half field effect transistor; By fixing the magnetic conductive film layer on the gate of the metal oxide half field effect transistor, the crucible can achieve the purpose of small volume, simplified circuit, and low process cost, and at the same time, the magnetic permeability of the magnetic conductive film layer can be utilized. Magnetization or degaussing is performed to change the critical voltage value of the gold-oxygen half-field effect transistor, thereby achieving the functions of storage and reading.

Another main object of the present invention is to provide a memory device comprising: a plurality of MOS field-effect transistors, each of the MOS field-effect transistors having a gate, a source region, a drain region, a channel, and a gate insulating layer, one end of the channel is connected to the source region, and the other end of the channel is connected to the drain region, the gate insulating layer separates the gate from the source region and the drain region; a plurality of magnetic conductive a film layer, each of the magnetic conductive film layers is respectively fixed on the gate of each of the gold oxide half field effect transistors, and at least one magnetic conductive material is disposed above the magnetic conductive film layer; a plurality of coil groups, each coil group a ring is disposed around the outer periphery of the MOS field and connected to an adjacent coil group; wherein the plurality of coil groups supply current for power supply to generate an external magnetic field pair to address the MOS field effect transistor The magnetic conductive film layer is magnetized and demagnetized to change the threshold voltage of the gold oxide half field effect transistor.

1‧‧‧Gold oxygen half-field effect transistor

11‧‧‧ gate

12‧‧‧ source area

13‧‧‧Bungee Area

14‧‧‧ passage

15‧‧‧ gate insulation

16‧‧‧Magnetic film layer

161‧‧‧ Magnetically conductive structural materials

2‧‧‧ coil group

21‧‧‧First coil

22‧‧‧second coil

4‧‧‧First power supply

5‧‧‧second power supply

I1‧‧‧First current

I2‧‧‧second current

The first figure is a side cross-sectional view of the present invention.

The second figure is a top view of the first figure.

The third figure is a schematic view of the coil set of the present invention.

The fourth figure is a schematic diagram of the magnetization action of the present invention.

The fifth figure is a schematic view of the present invention arranged in an array.

In order to make it easier for the examiner to understand the other features and advantages of the present invention and the effects achieved thereby, the present invention will be described in detail with reference to the accompanying drawings: refer to the first figure, the second figure and the As shown in the three figures, the present invention provides a memory module comprising: a MOS field effect transistor 1 having a gate 11, a source region 12, and a drain region. 13. A channel 14 and a gate insulating layer 15, one end of the channel 14 is connected to the source region 12, and the channel 14 is further connected to the drain region 13, the gate insulating layer 15 is connected to the gate 11 and the source The polar region 12 is spaced apart from the drain region 13.

a magnetic conductive film layer 16 is fixed on the gate 11, and at least one magnetic conductive material 161 is disposed above the magnetic conductive film layer 16, and the magnetic conductive film layer 16 can be iron. A magnetic thin film layer such as a nickel iron metal oxide.

a coil assembly 2, the coil assembly 2 is disposed around the outer periphery of the MOSFET, and the coil assembly 2 includes at least a first coil 21 and at least a second coil 22, wherein the first coil 21 is looped The first coil 21 can be a conductive material, such as a metal material, and the first coil 21 has a Word line, and the second coil 22 surrounds the first coil 21, And the second coil 22 can be a conductive material, such as a metal material, to have good conductivity, and the second coil 22 has a Bit Line, and the first coil 21 and the second coil 22 can form two layers. As shown in the third and fourth figures, the toroidal coil group 2 is electrically connected to the first power source 4 and the second power source 5, respectively.

Referring to the first figure, the magnetic conductive film layer 16 is fixed on the gate 11 of the gold-oxygen half-effect transistor 1, so that the volume can be reduced, the circuit is simplified, and the process cost is reduced.

The invention mainly adopts a magnetic material applied to a CMOS component, that is, the magnetic conductive film layer 16 is combined with a CMOS transistor to form a memory module having magnetic conductive characteristics, and can be magnetized or demagnetized to achieve storage and reading. Or 0 bit data function; the main principle is that the magnetic conductive film layer is a ferromagnetic material, and then the magnetic field is magnetized to change the carrier mobility and the threshold voltage. To achieve the storage function, the structure is as shown in the third figure. We add the applied magnetic field B _applied to magnetize the magnetic material in such a manner that the first coil 21 and the second coil 22 form a double coil. When the Bit Line of the second coil 22 and the Word Line of the first coil 21 are both 1, the applied magnetic field is the largest and the magnetization is the strongest, in this way as a memory storage function and addressing method. When reading, the power supply current is applied in the reverse half of the power supply, so as to distinguish whether there is magnetization, and the data is judged as 1 or 0.

Referring to the fourth figure, when the first coil 21 and the second coil 22 of the coil assembly 2 are electrically connected to the first power source 4 and the second power source 5, respectively, the first current of the first power source 4 can be made. I1 flows through the first coil 21, and the second current I2 of the second power source 5 can flow through the second coil 22, so that the first coil 21 of the coil group 2 and the second coil 22 can generate a forward current together. And applying a magnetic field to enhance the strength of the applied magnetic field, please refer to the first figure. At this time, the magnetic conductive film layer 16 is disposed on the gate 11 of the MOS field 1 to make the external addition. The magnetic field can magnetize the magnetic conductive film layer 16 and cause the magnetic conductive structure material 161 on the magnetic conductive thin film layer 16 to have a polarity, for example, the north magnetic direction of the magnetic conductive structural material 161 is upward, and the south magnetic direction is downward. The threshold voltage of the MOS field 1 can be changed, and the magnetic thin film layer 16 can store the binary data of the threshold voltage of the MOS field 1, such as "1". Or "0", thus Reach storage efficiency.

When the first coil 21 is electrically connected to a reverse power source, and the second coil 22 is electrically connected to a reverse power source (not shown), so that the first current I1 flowing through the first coil 21 is opposite in direction, and the direction of the second current I2 flowing through the second coil 22 is opposite, so that The first coil 21 and the second coil 22 can generate a reverse current and a reverse magnetic field, and the polarities of the magnetic conductive structural material 161 on the magnetic conductive film layer 16 can be reversed, for example, the magnetic polarity of the south pole of the magnetic conductive structural material 161 is upward. The magnetic direction of the north pole is downward, so that the carrier mobility of the channel 14 of the MOS field 1 can be changed, and the magnetic conductive film layer 16 can be demagnetized, and the magnetic conductive film layer 16 can be made. The stored data can be converted into a voltage, and the voltage can be read, that is, the voltage data storing "1" or "0" can be read, thereby achieving the reading efficiency.

Please refer to the fifth figure and cooperate with the second figure and the third figure, the present invention can also provide A memory device comprising a plurality of gold oxide half field effect transistors 1 and a plurality of coil groups 2, at least one magnetic conductive film layer 16 is fixed on the gate 11 of each of the gold oxide half field effect transistors 1, and each coil The group 2 ring is disposed around the outer periphery of a MOS field transistor 1 and is connected to the adjacent coil group 2, that is, the first coil 21 of each coil group 2 can be respectively connected to the first coil 21 which is laterally or longitudinally adjacent. Connected to form a plurality of horizontal or longitudinal first coil strips. And the second coils 22 of each coil group 2 are respectively connected to the second coil 22 which is longitudinally or laterally adjacent to form a plurality of longitudinal or transverse second coil strips, and each of the first coil strips and each The second coil strips are arranged at an angle, and the plurality of first coil strips and the plurality of second coil strips are arranged in an array or in a matrix, and the first coil strip passing through each strip is connected to the multiplexer of the first power source 4 And (MUX), the current of a first power source 4 can be respectively flown into each of the first coils via the multiplexer, so that each of the first coils generates a first applied magnetic field, and each of the first coils a multiplexer that connects a reverse power supply to reverse Current, and the multiplexer of the reverse power source can be connected to the gate 11 (not shown) of each of the MOSFETs, and the second coil of each strip is connected to the second power source 5 a device (MUX), such that a current of a second power source 5 can flow into each of the second coil strips via the multiplexer, and each second coil strip generates a second applied magnetic field, and each second The coil strip is connected to a reverse power supply multiplexer (not shown) to generate a reverse current, and the reverse power supply multiplexer can be connected to each of the MOSFETs 12 of the MOSFET 1 and The source 13 of each MOS field 1 is all connected together for output; therefore, if the magnetic permeable film layer 16 on a certain MOS field 1 in the array is addressed and magnetized, The current of the first power source 4 and the current of the second power source 5 respectively flow into the first coil 21 and the second coil 22 around the outer periphery of the metal oxide half field effect transistor 1 to be magnetized, and the first coil 21 and the first coil 21 can be made. The two coils 22 together generate a forward current and an applied magnetic field, so that the gold oxide half field effect transistor 1 can be The magnetic conductive film layer 16 performs address magnetization, and can change the threshold voltage value of the gold oxide half field effect transistor 1 so that the magnetic conductive film layer 16 can store the two positions of the threshold voltage of the gold oxide half field effect transistor 1. Metadata, in order to achieve storage efficiency.

a magnetically permeable film on a gold oxide half field effect transistor 1 that is to be magnetized in the array When the layer 16 performs the address degaussing, the current of the reverse power source flows into the first coil 21 around the outer periphery of the gold-oxygen half-effect transistor 1 to be demagnetized, and the current of the reverse power source flows into the gold oxide to be degaussed. The second coil 22 outside the half field effect transistor 1 generates a reverse current and a reverse magnetic field, and the polarity of the magnetic conductive film layer 16 on the magnetized gold oxide half field effect transistor 1 can be changed. The magnetic conductive film layer 16 on the gold oxide half field effect transistor 1 is demagnetized, and the data stored in the magnetic conductive film layer 16 can be converted into a voltage, and the voltage is read to achieve the reading efficiency.

Therefore, the present invention is fixed to the gold oxide half field effect transistor by the magnetic conductive film layer. On the gate, the crucible can achieve the purpose of small volume, simplified circuit, and reduced process cost, and the magnetic permeability of the magnetic permeability film layer and the carrier mobility of the channel of the MOS field-effect transistor will follow the magnetic property. The characteristic of the change can be magnetized or demagnetized, and the threshold voltage value of the gold-oxygen half-field effect transistor can be changed, thereby achieving the functions of storage and reading.

When reading, connect all the X-axis gates to the X-axis multiplexer (Not shown), the X-axis gate power is supplied from an external power source via a switch to the multiplexer. The other Y-axis is connected to a vertical axis and is connected to a Y-axis multiplexer (not shown), which is supplied with power from the outside to the multiplexer to provide the selected Y-axis. Finally, all or a group of sources are connected together to read the voltage data of "1" or "0" by the amplifier input and comparator (not shown).

1‧‧‧Gold oxygen half-field effect transistor

11‧‧‧ gate

12‧‧‧ source area

13‧‧‧Bungee Area

14‧‧‧ passage

15‧‧‧ gate insulation

16‧‧‧Magnetic film layer

Claims (10)

A memory module comprising: a MOS field effect transistor, the MOS field device having a gate region, a source region, a drain region, a channel and a gate insulating layer, the channel One end is connected to the source region, and the other end of the channel is connected to the drain region, the gate insulating layer separates the gate from the source region and the drain region; a magnetic conductive film layer, the magnetic conductive film layer is fixed Provided on the gate, and at least one magnetic conductive material is disposed above the magnetic conductive film layer; a coil set, the coil set ring is disposed around the outer portion of the metal oxide half field effect transistor; wherein the coil set is powered The current is circulated to generate an applied magnetic field to magnetize and demagnetize the magnetic conductive film layer, and the threshold voltage value of the gold oxide half field effect transistor is changed. The memory module of claim 1, wherein the magnetic conductive film layer is a ferromagnetic structural material. The memory module of claim 1, wherein the coil set includes at least one first coil and at least one second coil, the first coil loop is disposed around the outer periphery of the MOS field, Two coils surround the first coil and are at an angle to each other. The memory module of claim 3, wherein the first coil and the second coil are electrically conductive materials. A memory device comprising: a plurality of gold oxide half field effect transistors, each of the gold oxide half field effect transistors having a gate, a source region, a drain region, a channel and a gate insulating layer, the channel One end is connected to the source region, and the other end of the channel is connected to the drain region, and the gate insulating layer connects the gate and the source region and the drain region Separating; a plurality of magnetic conductive film layers, each of which is respectively fixed on the gate of each of the metal oxide half field effect transistors; a plurality of coil groups, each of which is disposed on the gold oxide half field effect The outer periphery of the crystal is connected to an adjacent coil group; wherein the plurality of coil groups supply current to the power source, respectively flowing in the same direction or in the opposite direction to generate an external magnetic field pair to address the gold oxide half field effect transistor The magnetic conductive film layer is magnetized and demagnetized to change the threshold voltage of the gold oxide half field effect transistor. The memory device of claim 5, wherein each of the coil sets includes at least one first coil and at least one second coil, the first coil loop being disposed around the outer periphery of the MOS field-effect transistor, the first The two coils surround the first coil and are at an angle to each other. The memory device of claim 6, wherein the first coil of each coil group is respectively connected to a horizontally or longitudinally adjacent first coil, and a plurality of horizontal or longitudinal first coil strips are formed. And the second coil of each coil group is respectively connected to the second coil which is longitudinally or laterally adjacent to form a plurality of longitudinal or transverse second coil strips. The memory device of claim 7, wherein each of the first coil strips is arranged at an angle to each of the second coil strips. The memory device of claim 6, wherein the first coil and the second coil are electrically conductive materials. The memory device according to item 5 of the patent application is arranged in a matrix in a vertical and horizontal direction.