TW201543897A - Sensing devices - Google Patents

Abstract

A sensing device is provided. The sensing device includes a plurality of pixel groups and a readout circuit. The pixel groups are arranged on a plurality of rows and a plurality of columns to form a pixel array. The pixel groups comprise a first pixel group and a second pixel group which are arranged on the different rows and the same column. The readout circuit is coupled to the pixel groups. When the first pixel group is triggered to perform a readout operation to generate a first sensing signal, the second pixel group performs a coupling operation to generate a reference signal. The readout circuit performs a subtraction operation based on the first sensing signal and the reference signal to generate a first readout data corresponding to the readout operation of the first pixel group.

Description

Sensing device

The present invention relates to a sensing device, and more particularly to a sensing device having low voltage source noise.

In general, voltage source noise is a major problem in complementary metal-oxide-semiconductor (CMOS) image sensors. In particular, when the CMOS image sensor is operated in a low light environment, voltage source noise may have a poor influence on the sensing quality. Various approaches have been proposed to reduce the impact of voltage source noise. In one of these modes, the noise is filtered from the voltage source line using a low pass filter. However, when an on-chip RC filter is used, high frequency noise is less likely to be filtered out. The off-chip RC filter will increase the cost of the CMOS image sensor if an off-chip RC filter is used instead of the on-wafer RC filter for the CMOS image sensor. In another approach, a regulator is used to generate a pure voltage source with low noise. However, high frequency noise is also less likely to be filtered out. Therefore, the voltage source will still contain some high frequency noise components.

Accordingly, it is desirable to provide a sensing device that produces a readout signal with low voltage source noise or no voltage source noise, thereby improving sensing quality.

The present invention provides a sensing device that includes a plurality of pixel groups and a readout circuit. These pixel groups are arranged in a plurality of columns and a plurality of rows to form A pixel array. The first pixel group and the second pixel group are included in the pixel group, and the first pixel group and the second pixel group are arranged in two different columns and the same row. The readout circuit couples these pixel groups. When the first pixel group is triggered to perform a read operation to generate a first sensing signal, the second pixel group is triggered to perform a coupling operation to generate a reference signal. The readout circuit performs a subtraction operation according to the first sensing signal and the reference signal to generate a first readout data corresponding to the read operation of the first pixel group.

The present invention further provides a sensing device comprising a plurality of pixel groups, a plurality of bit line groups, a complex sample maintaining circuit, a complex multiplexer circuit, a complex analog-to-digital converter circuit, and a processing circuit. These pixel groups are arranged in a plurality of columns and a plurality of rows to form a pixel array. Each of the bit line groups is coupled to a plurality of pixel groups arranged on the same row, and one of the bit line groups includes two bit lines. Each sample-and-hold circuit is coupled to a plurality of pixel groups disposed on the same row through a corresponding group of bit lines, and each sample-and-hold circuit includes two sample-and-hold units coupled to the same bit line group The two-dimensional line in the group. Each multiplexer circuit is coupled to one of the plurality of sample-and-hold circuits. Each analog-to-digital converter is coupled to one of the above complex multiplexer circuits. Each multiplexer circuit simultaneously couples two sample-and-hold units in the same sample-and-hold circuit to the same analog-to-digital converter circuit. The processing circuit is coupled to an analog digital converter. For two pixel groups configured in two different columns and the same row in the pixel group, the processing circuit is based on two signals on the two-dimensional line in the corresponding bit line group. The read data of one of the two pixel groups is generated.

1‧‧‧Sensing device

10‧‧‧ pixel array

11‧‧‧ pixel driver

12‧‧‧Readout circuit

20‧‧‧Transfer switch

21‧‧‧Reset switch

23, 24‧‧‧ output transistor

40...42‧‧‧ switch

43, 44‧‧‧ capacitors

45...48‧‧‧ switch

50‧‧‧Transfer switch

100, 100 _1,1 , 100 _2,1 ‧‧‧ pixel groups

210‧‧‧Sampling maintenance circuit

210A, 210B‧‧‧Sampling maintenance unit

211‧‧‧Multiplexer Circuit (MUX)

212‧‧‧ Analog Digital Converter Circuit (A/D)

213‧‧‧Processing Circuit

ADC‧‧‧ analog-to-digital conversion operation

AS‧‧‧ start signal

BLA, BLB‧‧‧ bit line

BLG1...BLGn‧‧‧ bit line group

C1...Cn‧‧‧

CDS‧‧‧ related subsampling operations

CP _1,1 ‧‧‧Transition period

DOUT _1,1 ‧‧‧Reading information

FN‧‧‧Floating node

R1...Rm‧‧‧ column

RD _2,1 ‧‧‧References

RP _1,1 ‧‧‧Reading period

RS _2,1 ‧‧‧ reference signal

RS' _2,1 ‧‧‧Sampling reference signal

RSA _2,1 , RSB _2,1 ‧‧‧ signals

RST‧‧‧Reset signal

Pcds‧‧‧Enable period

PD, PD50‧‧‧Photosensitive diode

PLSA‧‧‧ Pulse

S40, S41‧‧‧ control signals

SD _1,1 ‧‧‧Sensing data

SS _1,1 ‧‧‧Sensing signal

SS' _1,1 ‧‧‧Sampling signal

SS50 _1,1 ‧‧‧Sensing signal

SSA _1,1 , SSB _1,1 ‧‧‧ signals

TSA, TSA', TSB, TSB'‧‧‧ trigger signal

VDD‧‧‧voltage source

Figure 1 shows a sensing device in accordance with an embodiment of the present invention.

Figure 2 shows a sensing device in accordance with another embodiment of the present invention.

The third graph is a timing chart showing the main signals in the sensing device of Fig. 2.

Figure 4 shows a sensing device in accordance with yet another embodiment of the present invention.

5A and 5B are diagrams showing a sensing device according to still another embodiment of the present invention.

The above described objects, features and advantages of the present invention will become more apparent from the description of the appended claims.

Figure 1 is a diagram showing a sensing device in accordance with an embodiment of the present invention. Referring to FIG. 1, the sensing device 1 includes a pixel array 10, a pixel driver 11, and a readout circuit 12. As shown in Fig. 1, there are a plurality of pixel groups 100 arranged in a plurality of columns R1-Rm and a plurality of rows C1-Cn. In this embodiment, m is an even number. These pixel groups 100 are applied with a voltage source VDD. The plurality of pixel groups 100 arranged in the same row are connected to the readout circuit 12 through a one-bit group BLG. In this embodiment, each of the bit line groups BLG1-BLGn includes two bit lines BLA and BLB. In the plurality of pixel groups 100 arranged on the same row, some pixel groups 100 are coupled to the bit line BLA of the corresponding bit line group BLG, and other pixel groups 100 are coupled to the corresponding bits. The bit line BLB of the line group BLG. For example, in the same row, pixel groups 100 arranged in odd columns (eg, columns R1, R3, R5, ...) are coupled to bit line BLA, and are arranged in even columns (eg, columns R2, R4, R6... The pixel group 100 is coupled to the bit line BLB. The pixel driver 11 is used to trigger the pixel group 100 to perform respective operations, such as a read operation or a coupling operation. For example, for the same row, when the pixel driver 11 triggers a pixel group 100 coupled to the bit line BLA to perform a read operation, the pixel The driver 11 simultaneously triggers a pixel group 100 coupled to the bit line BLB to perform a coupling operation. In one embodiment, the pixel group 100 performing the coupling operation is configured in a column (eg, column R2) adjacent to the column (eg, column R1) in which the pixel group 100 performing the read operation is located. In another embodiment, the pixel group 100 performing the coupling operation is configured in a row (eg, column R4 or R6) that is separate from the column (eg, column R1) in which the pixel group 100 performing the read operation is located.

Hereinafter, the pixel group 100 _1,1 disposed in the column R1 and the row C1, and the pixel group 100 _2,1 disposed in the column R2 (adjacent to the column R2) and the line C1 will be described as an example. When the pixel driver 11 triggers the pixel group 100 _1,1 to perform the fetch operation, the pixel group 100 _{1,1 is} based on the light detection of a specific photodiode in the pixel group 100 _1,1 . A sensing signal SS _{1,1 is} generated. At the same time, the pixel driver 11 triggers the pixel group 100 _{2, 1} to perform the coupling operation. _2,1-pixel group 100 will not be any sensing signal according to any one photosensitive diode in the pixel group 100 _2,1, however, this time-based pixel group 100 according _2,1 Videos the voltage on a pixel group within the floating point _2,1 100 generates the reference signal RS _2,1. The readout circuit 12 receives the sensed signal SS _1,1 from the pixel group 100 _1,1 through the bit line BLA of the bit line group BLG1 and receives it through the bit line BLB of the bit line group BLG1. The reference signal RS _{1,1 of the} pixel group 100 _2,1 . The read circuit 12 then performs a subtraction operation based on the sense signal SS _1,1 and the reference signal RS _2,1 to generate read data for the read operation of the corresponding pixel group 100 _1,1 . This readout data represents the amount of light detected by the particular photodiode in the pixel group 100 _1,1 .

As described above, the sensing signal SS _1,1 is generated based on the light detection of the particular _photodiode in the pixel group 100 _1,1 . The sensing signal SS _1,1 includes not only the component of the amount of light detected by the particular photodiode, but also the component of the voltage source noise of the voltage source VDD. In addition, since the pixel group 100 _1,1 does not generate any sensing signal according to the light detection of a photosensitive diode during the coupling operation, the generated reference signal RS _2,1 only contains the voltage source VDD. The composition of the voltage source noise. When the read circuit 12 performs a subtraction operation according _2,1 sensing signal SS _1,1 and a reference signal RS, SS _1,1 sensing signal component on the noise source voltage VDD of the voltage source in the reference were The signal RS _2,1 is offset by the component of the voltage source noise of the voltage source VDD, and the remaining component of the sensing signal SS _{1,1 is} a component of the amount of light detected by the particular photodiode. Therefore, the read data generated according to the result of the subtraction operation does not contain any voltage source noise components. The readout data more accurately represents the amount of light detected by the particular photodiode in the pixel group 100 _1,1 .

Similarly, in order to obtain the read data of the pixel group corresponding to the bit line BLB, the pixel driver 11 can trigger the pixel group 100 coupled to the bit line BLB to perform the read operation. The pixel driver 11 further triggers the pixel group 100 coupled to the same row bit line BLA to perform a coupling operation. In an embodiment, the pixel group 100 performing the coupling operation is configured in a column (eg, column R1 or R3) adjacent to the column (eg, column R2) in which the pixel group 100 performing the read operation is located. In another embodiment, the pixel group 100 performing the coupling operation is configured in a row (eg, column R5 or R7) that is separate from the column (eg, column R2) in which the pixel group 100 performing the read operation is located. The operation of the readout circuit 12 in this case is as described in the previous embodiment, and thus the related description is omitted here.

In the following, the detailed circuit architecture and operation of the pixel group 100 and the readout circuit 12 will be explained in detail. Each pixel group 100 includes at least one photodiode. In the embodiment of FIG. 2, each pixel group 100 includes a photodiode PD. Each pixel group 100 also includes a transfer switch 20, a reset switch 21, and output transistors 22 and 23. In each pixel group, the transfer switch 20 is coupled to the photodiode Between the body PD and the floating node FN and controlled by a trigger signal from the pixel driver 11, the reset switch 21 is coupled between the voltage source VDD and the floating node FN and is coupled by the pixel driver 11 The reset signal RST is controlled. In addition, in each pixel group 100, the gate of the output transistor 22 is coupled to the floating node FN, and its drain is coupled to the voltage source VDD. In each pixel group 100, the gate of the output transistor 23 receives a start signal from the pixel driver 11, and is coupled to the source of the output transistor 22, and its source is coupled to the corresponding bit. Line BLA or BLB. It should be noted that the pixel groups 100 configured on the same column receive the same trigger signal and the same enable signal.

The readout circuit 21 includes a plurality of sample and hold circuits 210, a plurality of multiplexer circuits (MUX) 211, a plurality of analog-to-digital converter circuits (A/D) 212, and a processing circuit 213. Each sample hold circuit 210 is coupled to a bit line group BLG and includes two sample hold units 210A and 210B. As shown in FIG. 2, in a sample maintaining circuit 210, the sample maintaining unit 210A is coupled to the bit line BLA in the corresponding bit line group BLG to sample the signal on the bit line BLA, and the sample is maintained. The unit 210B is coupled to the bit line BLB in the corresponding bit line group BLG to sample the signal on the bit line BLB. Each multiplexer circuit 211 is coupled between a sample-and-hold circuit 210 and an analog-to-digital converter circuit 212 to be sampled by the sample-and-hold units 210A and 210B in the corresponding sample-and-hold circuit 210 at different times. The signal is passed to the same digital analog converter circuit 212.

By referring to Figures 2 and 3, in the example where the read operation of the pixel group 100 _1,1 is accompanied by the coupling operation of the pixel group 100 _2,1 , the transfer switch of the pixel group 100 _1,1 The trigger signal TSA from the pixel driver 11 is received, and the transfer switch 20 of the pixel group 100 _{2, 1} receives the trigger signal TSB from the pixel driver 11. The gates of the output transistors 23 of the pixel groups 100 _1,1 and 100 _2,1 receive the same start signal AS. During the readout pixel group 100 _1,1 RP _1,1, and the pixel group 100 _{1,1 2,1} 100 output transistor 23 is turned on by the same activation signal AS, pixel group 100 The reset switch 21 of _{1, 1} and 100 _{2, 1} is turned on by the reset signal RST to reset the voltage level of the floating node FN therein according to the voltage supplied from the voltage source VDD. Next, the pixel group 100 The transfer switch 201 of _1,1 is turned on by the trigger signal TSA having the pulse wave PLSA to trigger the pixel group 100 _{1,1 to} perform the read operation. Thus, the charge according to the pixel group 100 _1,1 photosensitive diode PD of the light generated by the detection pixel group will vary the voltage level of the floating node FN 100 _1,1. The output transistor 22 of the pixel group 100 _1,1 operates according to the changed voltage level on the corresponding floating node FN to generate a sensing signal SS _1,1 , which is corresponding to the sensing signal SS _1,1 The turned-on output transistor 23 provides a bit line BLA of the set bit line group BLG1.

However, during the readout period RP _1,1 , the trigger signal TSB does not have any pulse wave, so the transfer switch of the pixel group 100 _{2, 1} is turned off, and thus, the pixel group 100 _{2, 1} It will not be triggered to perform a read operation. Since the reset switch 21 of the pixel group 100 _{2, 1} is turned on, the turned-on reset switch 21 couples the voltage from the voltage source VDD to the corresponding floating node FN, that is, the floating of the pixel group 100 _2,1 The voltage level on the node FN is reset according to the voltage supplied from the voltage source VDD. At this time, the output transistor 22 of the pixel group 100 _2,1 operates according to the reset voltage level on the floating node FN to generate a reference signal RS _2,1 , which is a reference signal RS _2,1 The bit line BLB of the set bit line group BLG1 is supplied through the output transistor 23 corresponding to the turn-on.

For the sample maintaining circuit 210 coupled to the bit line group BLG1, the sample maintaining unit 210A receives the sensing signal SS _1,1 through the bit line BLA and performs a sampling operation on the sensing signal SS _1,1 to generate a sampling feeling. sensing signal SS _'1,1, and the sampling unit 210B maintained through the bit line BLB receiving a reference signal and the reference signal RS _2,1 RS _2,1 perform a sampling operation to generate a sampled reference signal RS' _2,1. The multiplexer circuit 211 corresponding to the bit line group BLG1 receives the sampling sensing signal SS' _1,1 and the sampling reference signal RS' _2,1 , and samples the sensing signal SS' _1,1 and the sampling reference at different times. Signal RS' _{2,1 is} passed to the same analog to digital converter circuit 212. As shown in FIG. 3, in the conversion period CP _1,1 of the readout period RP _1,1 , the corresponding analog-to-digital converter circuit 21 respectively pairs the sample sensing signals SS' _1,1 from the sample-and-hold circuit 212 and The sampling reference signal RS' _2,1 performs an analog-to-digital conversion operation ADC to generate the sensing data SD _1,1 and the reference data RD _2,1 . The processing circuit 213 receives the sensing data SD _1,1 and the reference data RD _2,1 , and performs a subtraction operation on the sensing data SD _1,1 and the reference data RD _2,1 to generate the read data DOUT _1,1 .

As described above, the sensing signal SS _1,1 includes not only the component of the amount of light detected by the specific photodiode, but also the component of the voltage source noise of the voltage source VDD. The reference signal RS _2,1 contains only the components of the voltage source noise of the voltage source VDD. Therefore, the sensing data signal SD _1,1 also includes the component of the detected amount of light and the component of the voltage source noise of the voltage source VDD, and the reference information RD _2,1 contains only the voltage about the voltage source VDD. The composition of the source noise. When the processing circuit 213 performs the subtraction operation on the sensing data SD _1,1 and the reference data RD _2,1 , the component of the voltage source noise of the voltage source VDD in the sensing data SD _1,1 is used in the reference material. The component of the voltage source noise of the voltage source VDD is offset by the component of RD _2,1 , and the remaining component of the sensing data SD _1,1 is related to the specific _photodiode in the pixel group 100 _1,1 The composition of the detected amount of light. Therefore, the read data DOUT _1,1 generated according to the result of the subtraction operation does not contain any voltage source noise components. In other words, the read data DOUT _{1,1 is} not affected by the power supply noise of the voltage source VDD. The readout data DOUT _1,1 more accurately represents the amount of light detected by the particular photodiode in the pixel group 100 _1,1 .

In this embodiment, the sample and hold circuit 210 can be implemented in a variety of different circuit architectures. In an embodiment, the sample and hold circuit 210 may perform a sampling operation to complete correlated double sampling. As shown in FIG. 4, for a sample hold circuit 210, each of the sample hold units 210A and 210B includes three switches 40-42 and two capacitors 43 and 44. Switches 40 and 41 are controlled by control signals S40 and S41, respectively. In order to clearly illustrate the illustration, FIG. 4 shows only the pixel groups 100 _1,1 and 100 _2,1 , the corresponding sample and hold circuit 210 , the corresponding multiplexer circuit 211 , the corresponding analog digital converter 213 , and Processing circuit 213. Referring again to Figure 3, the CDS represents the relevant subsampling operation. During the enabling period of the associated subsampling Pcds, the control signals S40 and S41 have different pulse waveforms, that is, the control signals S40 and S41 have different energization periods. Through the control signals S40 and S41, each sample maintaining unit performs correlated subsampling such that a signal (a sensing signal or a reference signal) from a bit line is sampled to generate two sub-signals that are combined into one group. . Each multiplexer circuit 211 includes switches 45 and 46 for two secondary signals combined from the sample maintaining unit 210A and switches 47 for two secondary signals from the sample maintaining unit 210B. 48. The same set of spur signals combine to form a sampled signal, such as a sampled sensed signal or a sampled referenced signal. In the same multiplexer circuit 211, the switches 45 and 46 are simultaneously turned on to transmit the corresponding analog digital converter 212, and the switches 47 and 48 are simultaneously turned on to transmit the two signals corresponding to the analog digital converter 212. .

Referring to FIG. 4, in the sample maintaining circuit 210 coupled to the bit line group BLG1, the correlated subsampling with respect to the sensing signal SS _1,1 is performed by the sample maintaining unit 210A to generate two sub-signals SSA _1,1 With SSB _1,1 , correlated subsampling with respect to reference signal RS _2,1 is performed by sample maintaining unit 210B to generate two secondary signals RSA _2,1 and RSB _2,1 . The multiplexer circuit 211 corresponding to the bit line BLA receives the secondary signals SSA _1,1 and SSB _1,1 and simultaneously transmits the SSA _1,1 and SSB _1,1 to the corresponding analog digits through the turned-on switches 45 and 46. Converter 212. In addition, the corresponding bit line BLB of the multiplexer circuit 211 receives the secondary signal RSA _2,1 RSB _2,1, 47 and 48 and simultaneously the secondary signal transmission and RSB _2,1 RSA _2,1 to switch conduction through Corresponding analog to digital converter 212. In this embodiment, the secondary signal SSA _{1,1 is} combined with SSB _1,1 to form a sampled sensing signal SS' _1,1 , and the secondary signal RSA _{2,1 is} combined with RSB _2,1 to form a reference signal RS' _{2 , 1} . It should be noted that the time at which the sampled sensing signal SS' _{1,1 is} transmitted to the analog-to-digital converter 212 is different from the time at which the sampled reference signal RS' _{2,1 is} transmitted to the analog-to-digital converter 212. In other words, for one bit line group BLG, the switches 45 and 46 in the multiplexer circuit 211 of the corresponding bit line BLA are different from the switches in the multiplexer circuit 211 of the corresponding bit line BLB. 47 and 48 on time.

In the above embodiment, there is only one photodiode in each pixel group 100. However, in other embodiments, each pixel group can include at least two photodiodes. As shown in FIG. 5, each pixel group 100 includes a photosensitive secondary PD 50 in addition to the photodiode PD. In order to be clearly displayed, FIG. 5 only shows the pixel groups 100 _1,1 and 100 _2,1 . Due to the configuration of the photodiode PD50, each pixel group 100 further includes a transfer switch 50 coupled between the photodiode PD50 and the corresponding floating node FN, and the other from the pixel driver 11 Controlled by a trigger signal TSA' or TSB'. For example, when the pixel driver 11 triggers the pixel group 100 _1,1 to perform a read operation, it is used to control the trigger signals TSA and TSA' of the transfer switches 20 and 50 in the trigger group 100 _1,1 . Waves appear at different times. In other words, the photodiodes PD and PD50 are used as the specific photodiode at different times. As shown in FIG. 5A, when the photodiode PD of the pixel group 100 _1,1 is used as the specific photodiode, the transfer switch 20 is turned on, and the sensing signal SS _{1,1 is} generated and supplied to the readout. The circuit 12 performs the above-described sample hold operation, analog digital conversion operation, and subtraction operation. As shown in FIG. 5B, when the photodiode PD50 of the pixel group 100 _1,1 is used as the specific photodiode, the transfer switch 50 is turned on, and the sensing signal SS50 _{1,1 is} generated and supplied to the readout. The circuit 12 performs the above-described sample hold operation, analog digital conversion operation, and subtraction operation. During the occurrence of the pulse waves of the trigger signals TSA and TSA', in the pixel group 100 _2,1 performing the coupling operation, the trigger signal TSB for controlling the transfer switches 20 and 50 of the pixel group 100 _2,1 Neither TSB has any pulse waves, and therefore both transfer switches 20 and 50 are off. At this time, the reference signal FS _{2,1 is} generated and supplied to the readout circuit 12 to perform the above-described sample hold operation, analog-to-digital conversion operation, and subtraction operation.

In the above embodiment, the number of photosensitive diodes per group of pixels is one or two, which is merely an example. The number of photodiodes for each pixel group can be determined based on system requirements.

The present invention has been disclosed in the above preferred embodiments, and is not intended to limit the scope of the present invention. Any one of ordinary skill in the art can make a few changes without departing from the spirit and scope of the invention. The scope of protection of the present invention is therefore defined by the scope of the appended claims.

1‧‧‧Sensing device

10‧‧‧ pixel array

11‧‧‧ pixel driver

12‧‧‧Readout circuit

100, 100 _1,1 , 100 _2,1 ‧‧‧ pixel groups

BLA, BLB‧‧‧ bit line

BLG1...BLGn‧‧‧ bit line group

C1...Cn‧‧‧

R1...Rm‧‧‧ column

RS _2,1 ‧‧‧ reference signal

SS _1,1 ‧‧‧Sensing signal

VDD‧‧‧voltage source

Claims (11)

A sensing device includes: a plurality of pixel groups configured in a plurality of columns and a plurality of rows to form a pixel array, wherein the pixel groups include a first pixel group and a second pixel a group, and the first pixel group and the second pixel group are disposed in different columns and the same row; and a readout circuit coupled to the pixel groups; wherein, when When the first pixel group is triggered to perform a read operation to generate a first sensing signal, the second pixel group is triggered to perform a coupling operation to generate a reference signal; and wherein the reading The output circuit performs a subtraction operation according to the first sensing signal and the reference signal to generate a first read data corresponding to the read operation of the first pixel group. The sensing device of claim 1, wherein the readout circuit comprises: a sample maintaining circuit coupled to the first pixel group and the second pixel group, the first sense The measurement signal and the reference signal performing a sampling operation have respectively generated a first sampled sensing signal and a sampled reference signal. The sensing device of claim 1, wherein the sample maintaining circuit performs the sampling operation to complete the correlated subsampling. The sensing device of claim 2, wherein the readout circuit further comprises: An analog-to-digital converter circuit; a multiplexer circuit coupled between the sample-and-hold circuit and the analog-to-digital converter circuit to maintain the first sampled sensing signal and the sampled reference signal from the sample at different times Transmitting the circuit to the analog-to-digital converter circuit; wherein the analog-to-digital converter performs an analog-to-digital conversion operation on the first sampled sensing signal and the sampled reference signal to generate a first sensing data and a reference data, respectively And wherein the first read data is generated according to a difference between the first sensing data and the reference material. The sensing device of claim 4, wherein the readout circuit further comprises: a processing circuit, receiving the first sensing data and the reference material, and the first sensing data and the reference The data is executed to perform the subtraction operation to generate the first output data. The sensing device of claim 1, further comprising: a pixel driver coupled to the pixel groups; wherein, when the pixel driver triggers the first pixel group to perform the reading When the operation is performed, the pixel driver triggers the second pixel group to perform the coupling operation. The sensing device of claim 1, wherein the column in which the first pixel group is configured is adjacent to the second pixel group configuration. Column. The sensing device of claim 1, wherein, in the pixel groups, at least two of the columns are arranged in the column in which the first pixel group is located and the second pixel Between the columns where the group configuration is located. A sensing device includes: a plurality of pixel groups configured in a plurality of columns and a plurality of rows to form a pixel array; a plurality of bit line groups, each of the bit line groups being coupled to be configured in the same The pixel groups on the line, and each of the bit line groups includes a two-dimensional line; a plurality of sample-and-hold circuits, each of the sample-and-hold circuits being coupled to the same through the corresponding bit line group The pixel groups on the row, and each of the sample maintaining circuits includes two sample maintaining units respectively coupled to two of the same bit line groups in the same bit line group; a complex multiplexer circuit Each of the multiplexer circuits is coupled to one of the sample and hold circuits; a plurality of analog-to-digital converter circuits, each of the analog-to-digital converters coupled to one of the multiplexer circuits, and each The multiplexer circuit simultaneously couples the two of the same sample-and-hold circuits to the same analog-to-digital converter circuit; and a processing circuit coupled to the analog-to-digital converters; Wherein, for two pixel groups configured in different columns and the same row in the pixel groups, the processing circuit is based on two of the corresponding bit line groups The two signals on the bit line are used to generate a readout of one of the two pixel groups. The sensing device of claim 9, wherein each of the sample maintaining circuits performs an associated subsampling operation. The sensing device of claim 9, further comprising: a pixel driver coupled to the pixel groups; wherein, when the pixel driver triggers one of the two pixel groups To perform a read operation, the pixel driver triggers the other of the two pixel groups to perform a coupling operation.