TW201541604A - Package module with wiring electronic component and method for the same - Google Patents

Package module with wiring electronic component and method for the same Download PDF

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TW201541604A
TW201541604A TW103115534A TW103115534A TW201541604A TW 201541604 A TW201541604 A TW 201541604A TW 103115534 A TW103115534 A TW 103115534A TW 103115534 A TW103115534 A TW 103115534A TW 201541604 A TW201541604 A TW 201541604A
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electronic component
segment
substrate
package structure
connection
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TW103115534A
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TWI557871B (en
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Wei-Hsuan Lee
Kuan-Chang Lin
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Advanced Semiconductor Eng
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Abstract

A manufacturing method for a package module with wiring electronic component is provided. Firstly, a plurality of parameters of wiring electronic component is calculating according to the assumption electronic component. Then, the parameters are transformed. After that, the package module is formed according to the transformed parameters. The package module at least includes a substrate, the electronic component, and a molding layer. In addition, the transforming step refers to the dielectric constant of the molding layer.

Description

具有線路式電子元件的封裝結構及其製造方法 Package structure with line type electronic component and manufacturing method thereof

本發明提供一種封裝結構及其製造方法,且特別是一種具有線路式電子元件的封裝結構及其製造方法。 The present invention provides a package structure and a method of fabricating the same, and more particularly to a package structure having a line type electronic component and a method of fabricating the same.

在一些電路板模組的設計中,會將一些電子元件內埋至電路板中,或者是印刷形成於電路板上,前者內埋設計過程中電子元件會考慮電路板的介電常數(dielectric constant)與損失係數(dissipation factor),後者例如微帶型傳輸線(Micro-strip Transmission Line)或是共平面波導(Coplanar waveguide,CPW)架構。共平面波導架構與微帶型傳輸線比較起來最大的優點就是所有金屬均在同一平面上,因此可省去一些製程。 In the design of some circuit board modules, some electronic components are buried in the circuit board, or printed on the circuit board. In the former embedded design process, the electronic components will consider the dielectric constant of the circuit board (dielectric constant) And a dissipation factor, such as a Micro-strip Transmission Line or a Coplanar Waveguide (CPW) architecture. The biggest advantage of the coplanar waveguide architecture compared to the microstrip transmission line is that all metals are on the same plane, so some processes can be eliminated.

然而,在設計電子模組或具電路基板的封裝結構過程中,有些電子元件的尺寸較大,需要較大的空間,也會佔據基板上較大的面積,而其它相對較小的電子元件與其並存時,大、小電子元件高度上的落差變成是無法使用的空間而形成一種浪費;另一方面,隨著電路板模組功能的提升,所需電子元件的數量將跟著增加,因此增加了電路板上接墊、線路的複雜與密度。 However, in the process of designing an electronic module or a package structure with a circuit substrate, some electronic components are large in size, require a large space, and occupy a large area on the substrate, while other relatively small electronic components are When coexisting, the drop in the height of the large and small electronic components becomes an unusable space and forms a waste; on the other hand, as the function of the circuit board module increases, the number of required electronic components will increase, thus increasing The complexity and density of the pads and lines on the board.

在不增加電路板模組的尺寸,卻要擁有更多功能的條件下,如何使電子模組、電路板模組達到微小化成為產業追求的目標。 Under the condition of not increasing the size of the circuit board module, but having more functions, how to make the electronic module and the circuit board module become miniaturized has become the goal pursued by the industry.

本發明主要目的在於利用模封層材料之特性,將線路式電子元件設計製造整併於模封層中,並且透過模封層提供三維的電性 連接路線。 The main purpose of the present invention is to design and manufacture a line type electronic component in a mold layer by utilizing the characteristics of the material of the mold layer, and provide three-dimensional electrical properties through the mold layer. Connect the route.

基於上述目的,本發明提供一種具有線路式電子元件的封裝結構之製造方法,其包括:根據預設電子元件的規格,計算出其相對應的線路式電子元件所需的多個參數;轉換前述參數,轉換過程之計算依據至少包括封裝結構所選定之模封層之介電常數;依據前述轉換後的參數形成封裝結構,此封裝結構包括基板、線路式電子元件與模封層。其中轉換過程可依預設電子元件規格可容許誤差範圍選擇性地利用模擬軟體來微調參數值。 Based on the above object, the present invention provides a method of fabricating a package structure having a line type electronic component, comprising: calculating a plurality of parameters required for a corresponding line type electronic component according to a specification of a predetermined electronic component; The parameter, the conversion process is calculated according to at least the dielectric constant of the encapsulation layer selected by the package structure; the package structure is formed according to the converted parameter, and the package structure comprises a substrate, a line type electronic component and a mold layer. The conversion process can selectively use the simulation software to fine tune the parameter values according to the allowable error range of the preset electronic component specifications.

本發明提供一種具有線路式電子元件的封裝結構,其包括基板、線路式電子元件以及模封層。線路式電子元件包括至少一傳輸線,每一傳輸線具至少三個連接段,第一連接段位於基板上,第二連接段位於模封層中,第三連接段位於模封層上表面,第二連接段連接第一連接段以及第三連接段。 The present invention provides a package structure having a line type electronic component including a substrate, a line type electronic component, and a mold layer. The line type electronic component comprises at least one transmission line, each transmission line has at least three connection segments, the first connection segment is located on the substrate, the second connection segment is located in the molding layer, the third connection segment is located on the upper surface of the molding layer, and the second The connecting section connects the first connecting section and the third connecting section.

為了能更進一步瞭解本發明為達成既定目的所採取之技術、方法及功效,請參閱以下有關本發明之詳細說明、圖式,相信本發明之目的、特徵與特點,當可由此得以深入且具體之瞭解,然而所附圖式與附件僅提供參考與說明用,並非用來對本發明加以限制者。 In order to further understand the technology, method and effect of the present invention in order to achieve the intended purpose, reference should be made to the detailed description and drawings of the present invention. The drawings and the annexed drawings are intended to be illustrative and not to limit the invention.

1、1’、1”‧‧‧封裝結構 1, 1', 1" ‧ ‧ package structure

10‧‧‧基板 10‧‧‧Substrate

20、20’、20”‧‧‧模封層 20, 20', 20" ‧ ‧ seal layer

210、210”‧‧‧孔洞 210, 210" ‧ ‧ holes

30‧‧‧線路式濾波器 30‧‧‧Line Filter

310、410、910‧‧‧傳輸線 310, 410, 910‧‧ transmission lines

320‧‧‧電容 320‧‧‧ Capacitance

312、412、912‧‧‧第一連接段 312, 412, 912‧‧‧ first connection segment

314、414、914‧‧‧第二連接段 314, 414, 914‧‧‧ second connection segment

316、416、916‧‧‧第三連接段 316, 416, 916‧‧‧ third connection

318、418‧‧‧連接端 318, 418‧‧‧ connection

40‧‧‧線路式耦合器 40‧‧‧Line Coupler

50‧‧‧電子元件 50‧‧‧Electronic components

60‧‧‧焊料 60‧‧‧ solder

70‧‧‧基材 70‧‧‧Substrate

80‧‧‧第二模封層 80‧‧‧Second molding layer

90‧‧‧線路式電子元件 90‧‧‧Line-type electronic components

920‧‧‧第二傳輸線 920‧‧‧second transmission line

922‧‧‧第四連接段 922‧‧‧fourth connection

924‧‧‧第五連接段 924‧‧‧ fifth connection

926‧‧‧第六連接段 926‧‧‧ sixth connection

d1、d2‧‧‧間距 D1, d2‧‧‧ spacing

L1、L2‧‧‧長度 L1, L2‧‧‧ length

w1、w2‧‧‧寬度 W1, w2‧‧‧ width

S101、S102、S103‧‧‧步驟 S101, S102, S103‧‧‧ steps

圖1為本發明實施例具有線路式電子元件之封裝結構的製造流程圖。 1 is a flow chart showing the manufacturing of a package structure having a line type electronic component according to an embodiment of the present invention.

圖2為本發明第一實施例之封裝結構立體示意圖。 2 is a perspective view of a package structure according to a first embodiment of the present invention.

圖3A-3E為本發明第一實施例之封裝結構製造流程剖面示意圖。 3A-3E are schematic cross-sectional views showing a manufacturing process of a package structure according to a first embodiment of the present invention.

圖4為本發明一實施例之線路式濾波器模擬之頻率響應圖。 4 is a frequency response diagram of a line filter simulation according to an embodiment of the present invention.

圖5為本發明第二實施例之封裝結構立體示意圖。 FIG. 5 is a perspective view of a package structure according to a second embodiment of the present invention.

圖6A-6E為本發明第二實施例之封裝結構製造流程剖面示意圖。 6A-6E are schematic cross-sectional views showing a manufacturing process of a package structure according to a second embodiment of the present invention.

圖7為本發明第三實施例之封裝結構剖面示意圖。 Figure 7 is a cross-sectional view showing a package structure in accordance with a third embodiment of the present invention.

本發明所稱之線路式電子元件係指其整體電子元件中的一部份存在於模封層或封裝結構之中,意即,電子元件的設計及其製造會考量模封層材料的介電常數與損失係數,即為本發明之線路式電子元件。 The term "line type electronic component" as used in the present invention means that a part of the whole electronic component exists in the molding layer or the package structure, that is, the design and manufacture of the electronic component considers the dielectric of the molding layer material. The constant and loss coefficient are the line type electronic components of the present invention.

以下實施例中的線路式電子元件將以濾波器以及耦合器為例,說明線路式電子元件形成於立體封裝結構及其製造方法,實際應用上線路式電子元件的種類還可以是巴倫器、電感或任何集成元件,本發明不以此為限。 The line type electronic components in the following embodiments will use a filter and a coupler as an example to illustrate that the line type electronic component is formed in a three-dimensional package structure and a manufacturing method thereof. In practical applications, the type of the line type electronic component may also be a balun device. Inductance or any integrated component, the invention is not limited thereto.

圖1為本發明實施例的製造流程圖,其對應的封裝結構1、1’繪示於圖2以及圖5中。圖2為本發明第一實施例之的立體示意圖,此封裝結構1中的線路式電子元件為線路式濾波器30。圖3A-3E為製造流程剖面示意圖,對應圖2的剖面線A-A。 1 is a manufacturing flow diagram of an embodiment of the present invention, and corresponding package structures 1, 1' are shown in FIGS. 2 and 5. 2 is a perspective view of a first embodiment of the present invention. The line type electronic component in the package structure 1 is a line filter 30. 3A-3E are schematic cross-sectional views of the manufacturing process, corresponding to the section line A-A of FIG.

請參照圖2及圖3E,封裝結構1包括基板10、模封層20’、線路式濾波器30以及電子元件50。基板10可以是印刷電路板(print circuit board,PCB)、半導體基板或者是低溫共燒多層陶瓷基板(low-temperature cofired ceramics,LTCC)。模封層材料例如是環氧樹脂成形模料(Epoxy Molding Compounds,EMCs)。電子元件50可以是主動元件,例如是裸晶或者是封裝後的晶片,或是被動元件,例如是電容器、電阻器、電感器。當然,在實際應用上,封裝結構1可以包括基板10、模封層20’和線路式濾波器30,而不包含電子元件50,如後述之第二實施例。 Referring to FIGS. 2 and 3E, the package structure 1 includes a substrate 10, a mold layer 20', a line filter 30, and an electronic component 50. The substrate 10 may be a printed circuit board (PCB), a semiconductor substrate, or a low-temperature cofired ceramics (LTCC). The molding layer material is, for example, Epoxy Molding Compounds (EMCs). The electronic component 50 can be an active component, such as a die or packaged wafer, or a passive component such as a capacitor, resistor, inductor. Of course, in practical applications, the package structure 1 may include the substrate 10, the mold layer 20', and the line filter 30 without including the electronic component 50, as will be described later in the second embodiment.

在本實施例中,線路式濾波器30包括三條傳輸線310以及三個電容320,其中每一個電容320分別和一條傳輸線310的一端相連接。三條傳輸線310彼此互相並排,相鄰兩條傳輸線310之間距d1。傳輸線310的數目、電容320的電容值、兩相鄰傳輸線310的間距d1、傳輸線310的長度以及寬度w1等數值,可視為本發 明線路式濾波器30的參數。所述參數是根據預設濾波器的規格進行計算而得,所有參數會根據不同需求與規格進行調整。 In the present embodiment, the line filter 30 includes three transmission lines 310 and three capacitors 320, each of which is connected to one end of a transmission line 310. The three transmission lines 310 are mutually juxtaposed with each other, and the distance between adjacent two transmission lines 310 is d1. The number of the transmission lines 310, the capacitance value of the capacitor 320, the pitch d1 of the two adjacent transmission lines 310, the length of the transmission line 310, and the width w1 may be regarded as the same. The parameters of the line filter 30 are shown. The parameters are calculated according to the specifications of the preset filter, and all parameters are adjusted according to different requirements and specifications.

本實施例中,每條傳輸線310皆由導電線路所形成,包含三個第一連接段312、四個第二連接段314以及兩個第三連接段316。位於兩側的傳輸線310進一步包括連接端318用以分別和鄰近的第一連接段312相連接,以作為線路式濾波器30的輸入端或者是輸出端。 In this embodiment, each transmission line 310 is formed by a conductive line, and includes three first connection segments 312, four second connection segments 314, and two third connection segments 316. The transmission lines 310 on both sides further include a connection end 318 for connecting to the adjacent first connection section 312, respectively, as an input or an output of the line filter 30.

接下來,介紹封裝結構1的製造方法,請參閱圖1以及圖3A-3E。如步驟S101,首先依照預設濾波器的規格及設計程序完成平面(X-Y)印刷式濾波器,此時可得多個參數,例如電容值及等效於電感之並聯耦合線段(parallel coupled line)長度。此時要注意到的是,並聯耦合線段之線寬、線距(width/gap)此時要參考後續製程的模封層中進行局部線路式電子元件製程的最小設計規範,否則會發生元件設計出來卻面臨到製程無法配合的狀況。另外,此時的平面(X-Y)並聯耦合線段長度也不會是最終長度,主要是提供後續在模封層中進行三維佈局時參考用。也就是此步驟所得的多個參數會需要一個轉換計算的過程,即下一步驟S102,為方便理解,可稱轉換前的參數為平面參數,而轉換後的參數稱為三維參數。 Next, a description will be given of a manufacturing method of the package structure 1, see FIG. 1 and FIGS. 3A-3E. In step S101, a planar (XY) printed filter is first implemented according to a preset filter specification and a design procedure. In this case, a plurality of parameters, such as a capacitance value and a parallel coupled line equivalent to the inductance, are obtained. length. At this point, it should be noted that the line width and line spacing of the parallel coupled line segments (width/gap) should refer to the minimum design specification of the local line electronic component process in the molding layer of the subsequent process, otherwise component design will occur. When I came out, I was faced with a situation where the process could not be coordinated. In addition, the length of the plane (X-Y) parallel coupled line segment at this time is not the final length, and is mainly used for reference in the subsequent three-dimensional layout in the mold layer. That is, a plurality of parameters obtained in this step may require a conversion calculation process, that is, the next step S102. For convenience of understanding, the parameter before conversion may be referred to as a plane parameter, and the converted parameter is referred to as a three-dimensional parameter.

接著步驟S102轉換參數,即,將前一步驟的平面參數轉換成三維參數,此三維參數是考量模封層材料之介電常數與損失係數、以及連接段結構、連接點之電性阻抗。一般而言,轉換前的參數數值與轉換後的參數數值會有所差異。轉換後,可依預設濾波器可容許誤差範圍選擇性地利用模擬軟體來微調、驗證,使線路式濾波器30符合預設濾波器的規格,最後做出三維參數,以作為後續製造線路式濾波器的製程依據。在此步驟中,除了對線路式濾波器進行參數的微調與驗證,可更進一步對封裝結構1做整體特性優化的微調與驗證,意即其內部包含線路式電子元件在內 的所有電子元件間電性連接的相關參數亦進行微調與驗證。 Next, the parameter is converted in step S102, that is, the plane parameter of the previous step is converted into a three-dimensional parameter, which is a dielectric constant and a loss coefficient of the material of the sealing layer, and an electrical impedance of the connection segment structure and the connection point. In general, the value of the parameter before conversion will differ from the value of the parameter after conversion. After the conversion, the analog software can be used to finely adjust and verify according to the allowable error range of the preset filter, so that the line filter 30 conforms to the specifications of the preset filter, and finally the three-dimensional parameters are used as the subsequent manufacturing line type. The process basis of the filter. In this step, in addition to the fine-tuning and verification of the parameters of the line filter, the fine tuning and verification of the overall characteristics of the package structure 1 can be further performed, that is, the internal line-containing electronic components are included therein. The relevant parameters of the electrical connection between all electronic components are also fine-tuned and verified.

接著步驟S103,依據轉換後的參數形成封裝結構,意即,將線路式濾波器30相關參數落實形成於基板10及模封層20’中,以形成封裝結構1。電性連接的相關參數亦可於此步驟製作形成。 Next, in step S103, a package structure is formed according to the converted parameters, that is, the relevant parameters of the line filter 30 are implemented in the substrate 10 and the mold layer 20' to form the package structure 1. The relevant parameters of the electrical connection can also be formed in this step.

在此針對步驟S103進一步舉例說明,請參考圖3A-3E並對照圖2。圖3A,提供基板10,形成電子元件50、電容320、第一連接段312以及連接端318於基板10上。圖3B,形成模封層20於基板10上。模封層20會覆蓋基板10、電容320、三個第一連接段312、連接端318以及電子元件50。圖3C,形成四個孔洞210於模封層20’中。位於左右兩側的兩個孔洞210會暴露出位於左右兩側的第一連接段312的一端。位於中間的兩個孔洞210會暴露出位於中間的第一連接段312的兩端。圖3D,分別形成四個第二連接段314於孔洞210中,並分別連接第一連接段312。圖3E,形成兩個第三連接段316於模封層20’之上表面,並且分別與第二連接段314相連接,以使第一連接段312、第二連接段314以及第三連接段316形成一傳輸路徑。 Further illustrated herein with respect to step S103, please refer to FIGS. 3A-3E and to FIG. 3A, a substrate 10 is provided to form an electronic component 50, a capacitor 320, a first connection segment 312, and a connection terminal 318 on the substrate 10. FIG. 3B, forming a mold layer 20 on the substrate 10. The mold layer 20 covers the substrate 10, the capacitor 320, the three first connection segments 312, the connection terminals 318, and the electronic components 50. Figure 3C, four holes 210 are formed in the mold layer 20'. Two holes 210 on the left and right sides expose one end of the first connecting section 312 on the left and right sides. Two holes 210 in the middle expose both ends of the first connecting section 312 in the middle. 3D, four second connecting segments 314 are formed in the holes 210, respectively, and are connected to the first connecting segments 312, respectively. 3E, two third connecting segments 316 are formed on the upper surface of the molding layer 20', and are respectively connected to the second connecting portion 314 to make the first connecting segment 312, the second connecting segment 314 and the third connecting segment 316 forms a transmission path.

上述第二連接段314的形成方法例如是利用直通模封穿孔(through molding via,TMV),然而在其他實施例中,也可以是利用堆疊式導電凸塊(stacked stud bump)來形成第二連接段314,意即,將堆疊式導電凸塊當做一種電子元件,跟第一連接段、電容等其它電子元件一起先形成在基板上方,並使其分別連接於第一連接段;之後再形成模封層覆蓋電容等其它電子元件、第一連接段,並且暴露出堆疊式導電凸塊的一端。 The forming method of the second connecting portion 314 is, for example, using a through molding via (TMV). However, in other embodiments, the stacked stud bump may be used to form the second connection. Section 314, that is, the stacked conductive bumps are regarded as an electronic component, which is formed on the substrate together with other electronic components such as the first connecting segment and the capacitor, and is respectively connected to the first connecting segment; The sealing layer covers other electronic components such as capacitors, the first connecting segment, and exposes one end of the stacked conductive bumps.

傳輸線310除了可以佈線於基板10之上,還可以佈線於模封層20’之中以及模封層20’的表面,模封層20’實際上提供了傳輸線310更多的佈線空間。 The transmission line 310 can be routed over the substrate 10, and can also be routed in the encapsulation layer 20' and the surface of the encapsulation layer 20'. The encapsulation layer 20' actually provides more wiring space for the transmission line 310.

傳輸線310只有部分長度存在基板10表面,其它部份則存在於模封層之中或表面,所以傳輸線310在封裝結構1中佔有的直 線距離L1會小於傳輸線310的總長度。因而線路式濾波器30在基板10上的空間可以大幅的減少,增加了基板10的面積使用率,使用者可以根據實際需求將傳輸線310設計在模封層20’之中或者是之上。 The transmission line 310 has only a part of the length of the surface of the substrate 10, and other portions exist in the surface of the molding layer or the surface, so the transmission line 310 occupies a straight line in the package structure 1. The line distance L1 will be less than the total length of the transmission line 310. Therefore, the space of the line filter 30 on the substrate 10 can be greatly reduced, and the area utilization rate of the substrate 10 is increased. The user can design the transmission line 310 in or on the molding layer 20' according to actual needs.

另一方面,由於電子元件50以及傳輸線310皆設置於模封層20’中或模封層20’上,電子元件50可以和其它其電子元件50或任一連接段的傳輸線電性連接。如此,提供了線路式電子元件和其它電子元件50空間利用上相當大的設計彈性。 On the other hand, since the electronic component 50 and the transmission line 310 are both disposed in the encapsulation layer 20' or on the encapsulation layer 20', the electronic component 50 can be electrically connected to other transmission lines of the electronic component 50 or any of the connection segments. As such, there is considerable design flexibility in the space utilization of line electronic components and other electronic components 50.

圖4為本發明第一實施例之線路式濾波器30頻率響應模擬結果圖。預設濾波器的工作頻率可大約等於2.45GHz,利用插入損耗(insertion loss)以及折返損耗(return loss)來表示線路式濾波器30在工作頻率為2.45GHz的情況下濾波的情形。 Fig. 4 is a graph showing the result of frequency response simulation of the line filter 30 of the first embodiment of the present invention. The operating frequency of the preset filter can be approximately equal to 2.45 GHz, and the insertion loss and the return loss are used to indicate the case where the line filter 30 is filtered at an operating frequency of 2.45 GHz.

以下說明本發明第二實施例,請參閱圖5,此實施例和前一實施例不同的地方在於封裝結構1’中僅有線路式電子元件,例如是線路式耦合器40,而沒有其它的電子元件。和前一實施例相似的部份在此不再贅述。在本實施例中,線路式耦合器40包括兩條彼此平行的傳輸線410,並沿同一方向延伸。 The following describes a second embodiment of the present invention. Referring to FIG. 5, this embodiment differs from the previous embodiment in that only the wired electronic component, such as the line coupler 40, is included in the package structure 1', and there is no other. Electronic component. Parts similar to those of the previous embodiment will not be described herein. In the present embodiment, the line coupler 40 includes two transmission lines 410 that are parallel to each other and extend in the same direction.

圖6A-6E為本發明第二實施例之封裝結構1’的製造流程剖面示意圖。圖6A-6E的剖面圖是沿著圖5中封裝結構1’的剖面線B-B進行剖面而得。製造方法與步驟和前一實施例相似,在此不多做贅述。 6A-6E are schematic cross-sectional views showing a manufacturing process of a package structure 1' according to a second embodiment of the present invention. 6A-6E are cross-sectional views taken along section line B-B of the package structure 1' of Fig. 5. The manufacturing method and steps are similar to those of the previous embodiment, and will not be described here.

本發明還可以用於層疊封裝(package on package,PoP)。圖7為本發明第三實施例之封裝結構1”的剖面示意圖,不同於第一實施例的地方在於本實施例中,封裝結構1”除了基板10以及模封層20’外,更包括第二模封層80以及焊料60、基材70。而線路式電子元件90包括模封層20’中的傳輸線910以及第二模封層80中的第二傳輸線920。其中,傳輸線910可劃分為第一連接段912、第二連接段914以及第三連接段916,而第二傳輸線920還可以劃 分成第四連接段922、第五連接段924以及第六連接段926。 The invention can also be used in a package on package (PoP). FIG. 7 is a cross-sectional view of a package structure 1 ′′ according to a third embodiment of the present invention. The difference from the first embodiment is that the package structure 1′′ includes the substrate 10 and the mold layer 20 ′. The second mold layer 80 and the solder 60 and the substrate 70. The line electronic component 90 includes a transmission line 910 in the encapsulation layer 20' and a second transmission line 920 in the second encapsulation layer 80. The transmission line 910 can be divided into a first connection segment 912, a second connection segment 914, and a third connection segment 916, and the second transmission line 920 can also be divided. It is divided into a fourth connecting section 922, a fifth connecting section 924 and a sixth connecting section 926.

另外,第三連接段916與焊料60位於模封層20’以及基材70之間,第二傳輸線920位於基材70上,第二模封層80位於基材上。詳細而言,第二模封層80覆蓋基材70、第四連接段922與第五連接段924,第六連接段926位於第二模封層80上表面。傳輸線910透過焊料60電性連接第二傳輸線920,而第五連接段連接第四連接段與第六連接段。基板10、模封層20’以及傳輸線910的材料、結構、相對元件關係大致與第一實施例相同,在此不多做贅述。 In addition, the third connecting portion 916 and the solder 60 are located between the mold layer 20' and the substrate 70, the second transfer line 920 is on the substrate 70, and the second mold layer 80 is on the substrate. In detail, the second molding layer 80 covers the substrate 70, the fourth connecting portion 922 and the fifth connecting portion 924, and the sixth connecting portion 926 is located on the upper surface of the second molding layer 80. The transmission line 910 is electrically connected to the second transmission line 920 through the solder 60, and the fifth connection section connects the fourth connection section and the sixth connection section. The material, structure, and relative element relationship of the substrate 10, the mold layer 20', and the transmission line 910 are substantially the same as those of the first embodiment, and will not be further described herein.

此層疊封裝的製造方法包括上述步驟S101、S102及S103,相似的部份在此不多做贅述,需特別注意部份說明如下。其中步驟S101的參數在計算時需同時包含個別的模封層20’內及第二模封層80內計畫轉換成線路式電子元件的預設電子元件的規格。 The manufacturing method of the package includes the above steps S101, S102 and S103, and similar parts are not described here, and special attention is paid to the following. The parameters of step S101 need to include the specifications of the predetermined electronic components in the individual mold layer 20' and the second mold layer 80 that are converted into line electronic components.

步驟S102在轉換計算前一步驟的參數時,需考量個別模封層20’、第二模封層80之介電常數與損失係數、以及焊料60之電性阻抗。在其它應用上,若此封裝結構1”更具有如第一實施例之其它電子元件50,則亦需同時考量線路式電子元件、電子元件50之間連接段的電性阻抗。 In step S102, when calculating the parameters of the previous step, the dielectric constant and loss coefficient of the individual mold layer 20' and the second mold layer 80, and the electrical impedance of the solder 60 are considered. In other applications, if the package structure 1 ′′ has other electronic components 50 as in the first embodiment, it is also necessary to simultaneously consider the electrical impedance of the connection segments between the line-type electronic components and the electronic components 50 .

步驟S103,形成線路式電子元件90於封裝結構1”中,意即將線路式電子元件90相關參數落實形成於基板10與模封層20’、焊料60,以及基材70與第二模封層80,以形成封裝結構1”。此步驟中,可以分別完成傳輸線910於模封層20’中,以及第二傳輸線920於第二模封層80中,再透過焊料60連接此兩部份。也可以先形成基板10、模封層20’以及傳輸線910,而方法和第一實施例相同,在此不多做贅述;之後,形成焊料60以及基材70於模封層20’上,接著形成第四連接段922於基材70上,再形成第五連接段924與第二模封層80,最後形成第六連接段926。其中第五連接段924的形成方法例如前述之直通模封穿孔(through molding via,TMV)或是堆疊式導電凸塊(stacked stud bump)。 Step S103, forming the line type electronic component 90 in the package structure 1", meaning that the relevant parameters of the line type electronic component 90 are formed on the substrate 10 and the mold layer 20', the solder 60, and the substrate 70 and the second mold layer. 80 to form a package structure 1". In this step, the transmission line 910 can be separately formed in the encapsulation layer 20', and the second transmission line 920 is in the second encapsulation layer 80, and the two portions are connected through the solder 60. The substrate 10, the mold layer 20', and the transmission line 910 may be formed first, and the method is the same as that of the first embodiment, and will not be described here; after that, the solder 60 and the substrate 70 are formed on the mold layer 20', and then Forming a fourth connecting portion 922 on the substrate 70, forming a fifth connecting portion 924 and a second molding layer 80, and finally forming a sixth connecting portion 926. The method for forming the fifth connecting portion 924 is, for example, the through-through die-punching (through) Molding via, TMV) or stacked stud bumps.

本發明實施例中所舉之數量、間距、長度、寬度,以及排列方式僅為舉例參數的種類,以說明本發明如何將預設電子元件的規格轉換成線路式電子元件並實現在封裝結構中,在其他實施例中,也可以針對其他種類的電子元件來進行各項參數的設計,本發明不限制參數的種類。另需特別說明的是,在實際應用上,線路式電子元件也可以是一條傳輸線所構成,例如電感,所以本發明所舉傳輸線數目僅為舉例說明。 The number, spacing, length, width, and arrangement of the embodiments of the present invention are merely examples of the types of parameters to illustrate how the present invention converts the specifications of the preset electronic components into line electronic components and implements them in the package structure. In other embodiments, the design of various parameters may also be performed for other types of electronic components, and the present invention does not limit the types of parameters. It should be particularly noted that, in practical applications, the line type electronic component may also be constituted by a transmission line, such as an inductor, so the number of transmission lines in the present invention is merely an example.

綜上所述,本發明線路式電子元件利用模封層做為佈線的空間,相較於以往的二維平面電性連接路線,本發明透過模封層提供三維的電性連接路線。另,因本發明可以整合模封層材料之特性,例如介電常數(dielectric constant)、損失係數(dissipation factor),連接點之材料,例如焊料,連接段的連接結構,例如直通模封穿孔、堆疊式導電凸塊等等,將線路式電子元件設計製造整併於封裝結構中,封裝結構的設計因而更有彈性;且,將局部線路式電子元件形成於垂直基板面積方向的空間中,可以減少線路式電子元件在基板上佔據的面積,達到微小化的目的。 In summary, the line type electronic component of the present invention uses the mold layer as a wiring space, and the present invention provides a three-dimensional electrical connection route through the mold layer compared to the conventional two-dimensional plane electrical connection route. In addition, the present invention can integrate the characteristics of the molding layer material, such as dielectric constant, dissipation factor, material of the connection point, such as solder, connection structure of the connecting section, such as through-molded perforation, Stacked conductive bumps and the like, the circuit type electronic components are designed and manufactured in the package structure, and the design of the package structure is more flexible; and the local line type electronic components are formed in the space of the vertical substrate area direction, The area occupied by the line type electronic components on the substrate is reduced, and the purpose of miniaturization is achieved.

以上所述僅為本發明的實施例,其並非用以限定本發明的專利保護範圍。任何熟習相像技藝者,在不脫離本發明的精神與範圍內,所作的更動及潤飾的等效替換,仍為本發明的專利保護範圍內。 The above is only an embodiment of the present invention, and is not intended to limit the scope of the invention. It is still within the scope of patent protection of the present invention to make any substitutions and modifications of the modifications made by those skilled in the art without departing from the spirit and scope of the invention.

S101、S102、S103‧‧‧步驟 S101, S102, S103‧‧‧ steps

Claims (10)

一種具有線路式電子元件的封裝結構之製造方法,其包括:根據一預設電子元件的規格,計算出一線路式電子元件所需的多個參數;轉換該些參數;依據轉換後的該些參數形成該封裝結構,該封裝結構至少包括一基板、該線路式電子元件與一模封層;其中該轉換步驟至少參考該模封層之介電常數。 A manufacturing method of a package structure having a line type electronic component, comprising: calculating a plurality of parameters required for a line type electronic component according to a specification of a predetermined electronic component; converting the parameters; according to the converted The parameter forms the package structure, the package structure includes at least a substrate, the line type electronic component and a mold layer; wherein the converting step refers at least to a dielectric constant of the mold layer. 如申請專利範圍第1項所述的封裝結構之製造方法,其中該轉換步驟更包括:利用模擬軟體來微調該些參數。 The manufacturing method of the package structure according to claim 1, wherein the converting step further comprises: fine-tuning the parameters by using a simulation software. 如申請專利範圍第1項所述的封裝結構之製造方法,其中形成該線路式電子元件於該封裝結構中的步驟更包括:形成至少一傳輸線,其中該傳輸線之至少一第一連接段位於該基板上;形成該模封層於該基板上,該模封層包含該傳輸線的至少一第二連接段;形成該傳輸線的至少一第三連接段於該模封層上方;其中該第一連接段、該第二連接段以及該第三連接段相互電性連接。 The manufacturing method of the package structure of claim 1, wherein the step of forming the line type electronic component in the package structure further comprises: forming at least one transmission line, wherein at least one first connection segment of the transmission line is located Forming the mold layer on the substrate, the mold layer comprising at least one second connection segment of the transmission line; forming at least one third connection segment of the transmission line above the mold layer; wherein the first connection The segment, the second connecting segment and the third connecting segment are electrically connected to each other. 如申請專利範圍第3項所述的封裝結構之製造方法,更包括:形成至少一焊料以及一基材於該模封層上;形成至少一第四連接段於該基材上,該些第四連接段至少其中之一透過該焊料連接該第三連接段;形成至少一第五連接段與一第二模封層;形成至少一第六連接段於該第二模封層上方;其中,該些第五連接段個別對應地連接該些第四連接段與該些第六連接段。 The method for manufacturing a package structure according to claim 3, further comprising: forming at least one solder and a substrate on the mold layer; forming at least a fourth connection segment on the substrate, the At least one of the four connection segments is connected to the third connection segment through the solder; at least a fifth connection segment and a second molding layer are formed; and at least a sixth connection segment is formed above the second molding layer; The fifth connecting segments respectively connect the fourth connecting segments and the sixth connecting segments. 一種具有線路式電子元件的封裝結構,其包括: 一基板;一線路式電子元件,該線路式電子元件包括至少一傳輸線;一模封層,該模封層位於該基板上,其中該傳輸線具有至少一第一連接段、至少一第二連接段以及至少一第三連接段,該第一連接段位於該基板上且為該模封層覆蓋,該第二連接段位於該模封層中,該第三連接段位於該模封層上,且該第二連接段連接該第一連接段以及該第三連接段;其中該線路式電子元件是根據多個參數進行設計,該些參數是根據一預設電子元件的規格以及參考該模封層之介電常數、該傳輸線之電性阻抗後計算而得,使得該線路式電子元件符合該預設電子元件的規格。 A package structure having a line type electronic component, comprising: a substrate; a line type electronic component comprising at least one transmission line; a molding layer, the molding layer is located on the substrate, wherein the transmission line has at least a first connecting segment and at least a second connecting segment And at least a third connecting segment, the first connecting segment is located on the substrate and covered by the molding layer, the second connecting segment is located in the molding layer, and the third connecting segment is located on the molding layer, and The second connecting segment is connected to the first connecting segment and the third connecting segment; wherein the line type electronic component is designed according to a plurality of parameters according to a specification of a preset electronic component and referring to the sealing layer The dielectric constant and the electrical impedance of the transmission line are calculated such that the line electronic component conforms to the specifications of the predetermined electronic component. 如申請專利範圍第5項所述之封裝結構,更包括一電子元件,該電子元件位於該基板上,且該模封層覆蓋該電子元件。 The package structure of claim 5, further comprising an electronic component, the electronic component being located on the substrate, and the molding layer covering the electronic component. 如申請專利範圍第5項所述之封裝結構,其中該封裝結構更包括:一基材,該基材位於該模封層上,其中該第三連接段位於該模封層以及該基材之間;一第二傳輸線,位於該基材上,該第二傳輸線具有至少一第四連接段、至少一第五連接段以及至少一第六連接段,該第四連接段電性連接該第三連接段;一第二模封層,該第二模封層位於該基材上,且覆蓋該第四連接段以及該第五連接段,而該第六連接段於該第二模封層上,該第五連接段連接該第四連接段與該第六連接段,其中該傳輸線以及該第二傳輸線構形成一傳輸路徑。 The package structure of claim 5, wherein the package structure further comprises: a substrate on the mold layer, wherein the third connection segment is located on the mold layer and the substrate a second transmission line is disposed on the substrate, the second transmission line has at least a fourth connection segment, at least a fifth connection segment, and at least a sixth connection segment, the fourth connection segment is electrically connected to the third a second molding layer, the second molding layer is disposed on the substrate, and covers the fourth connecting segment and the fifth connecting segment, and the sixth connecting segment is on the second molding layer The fifth connecting segment connects the fourth connecting segment and the sixth connecting segment, wherein the transmission line and the second transmission line form a transmission path. 如申請專利範圍第7項所述之封裝結構,其中該第二連接段或該第五連接段係為直通模封穿孔(through molding via,TMV)或堆疊式導電凸塊(stacked stud bump)。 The package structure of claim 7, wherein the second connection segment or the fifth connection segment is a through molding via (TMV) or a stacked stud bump. 如申請專利範圍第5項所述之封裝結構,其中該些參數包括該傳輸線的長度及寬度。 The package structure of claim 5, wherein the parameters include a length and a width of the transmission line. 如申請專利範圍第5項所述之封裝結構,其中該基板包括印刷電路板、半導體基板或是低溫共燒多層陶瓷基板。 The package structure of claim 5, wherein the substrate comprises a printed circuit board, a semiconductor substrate or a low temperature co-fired multilayer ceramic substrate.
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