TW201537739A - Semiconductor device and method for manufacturing the same - Google Patents

Abstract

A semiconductor device is operated for sensing incident light and includes a substrate, a device layer, a semiconductor layer and a color filter layer. The device layer is disposed on the substrate and includes light-sensing regions. The semiconductor layer overlies the device layer and has a first surface and a second surface opposite to the first surface. The first surface is adjacent to the device layer. The semiconductor layer includes microstructures on the second surface. The color filter layer is disposed on the second surface of the semiconductor layer.

Description

Semiconductor component and method of manufacturing same Related application

The present application is based on and claims priority to U.S. Provisional Application Serial No. 61/971,445, filed on March 27, 2014, the entire disclosure of which is hereby incorporated by reference.

This invention relates to a semiconductor component, and more particularly to a semiconductor sensing component.

A semiconductor image sensor is used to sense light. In general, semiconductor image sensors include complementary metal oxide semiconductor (CMOS) image sensors (CIS) and charge coupled device (CCD) sensors, and have been widely used in various applications, such as digital static Camera (DSC), mobile phone camera, digital video recorder (DV) and digital camera (DVR) applications. These semiconductor image sensors utilize an array of image sensing elements, each of which includes a photodiode and other components to absorb light and convert the absorbed light into digital data or electronic signals.

The back-illuminated (BSI) complementary metal oxide semiconductor image sensor is a complementary metal oxide semiconductor image sensor. A back-illuminated complementary metal oxide semiconductor image sensor is operable to detect a rear projection Shoot the light. Back-illuminated CMOS image sensors reduce optical paths and increase fill factor to improve photosensitivity and quantum efficiency per unit area, and reduce optical crosstalk and photoresponse Not uniform. Therefore, the image quality of the complementary metal oxide semiconductor image sensor can be greatly improved. In addition, the back-illuminated CMOS image sensor has a high chief ray angle that allows for a shorter lens height to achieve a thinner camera module. Therefore, the back-illuminated complementary metal oxide semiconductor image sensor technology has gradually become the mainstream technology.

However, when existing back-illuminated metal-oxide-semiconductor image sensors have substantially met their intended goals, these sensors still cannot fully meet various needs.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a semiconductor device and a method of fabricating the same, wherein a semiconductor layer between a color filter layer and an element layer has a surface on which a plurality of microstructures are formed, and thus most The light can be refracted by these microstructures into the semiconductor layer and absorbed by the element layer. Therefore, the quantum efficiency of the semiconductor element is greatly improved by low reflection and high absorption.

According to the above object of the present invention, a semiconductor element is proposed for sensing incident light. The semiconductor element includes a substrate, an element layer, a semiconductor layer, and a color filter layer. The component layer is disposed on the substrate and includes a plurality of photosensitive regions. a semiconductor layer above the element layer and having a first surface and a second surface opposite the first surface, wherein the first surface is adjacent to the element layer and the semiconductor The bulk layer comprises a plurality of microstructures on the second surface. The color filter layer is disposed on the second surface of the semiconductor layer.

According to an embodiment of the invention, each of the microstructures has a cross-sectional shape, and the cross-sectional shape is triangular, trapezoidal or curved.

According to another embodiment of the invention, any two of the above microstructures are contiguous with each other.

In accordance with yet another embodiment of the present invention, any two of the above microstructures are separated from one another.

According to still another embodiment of the present invention, the height of each of the microstructures is greater than λ/2.5, and the distance between any adjacent ones of the microstructures is greater than λ/2, and λ represents the wavelength of the incident light.

According to the above object of the present invention, a method of manufacturing a semiconductor device is further proposed. In the method of fabricating a semiconductor device, a substrate is provided, wherein an element layer and a semiconductor layer are sequentially formed on a surface of the substrate, the semiconductor layer having a first surface and a second surface opposite to the first surface, the first surface being adjacent Component layer. A plurality of microstructures are formed on the second surface of the semiconductor layer. A color filter layer is formed on the second surface of the semiconductor layer.

According to an embodiment of the invention, the operation of providing the substrate comprises forming a semiconductor layer with germanium or germanium.

In accordance with another embodiment of the present invention, the above-described operation for forming a microstructure utilizes a lithography process and an etching process.

According to still another embodiment of the present invention, the operation of forming the microstructure is such that each microstructure has a cross-sectional shape, and the cross-sectional shape is triangular, trapezoidal or curved.

In accordance with still another embodiment of the present invention, the operation of forming the microstructures is such that any two adjacent of the microstructures are adjacent to each other.

In accordance with still another embodiment of the present invention, the operation of forming the microstructures described above separates any adjacent ones of the microstructures from each other.

According to still another embodiment of the present invention, between the operation of forming a microstructure and the operation of forming a color filter layer, the method of fabricating the semiconductor device further includes forming a dielectric layer overlying the second surface of the semiconductor layer, wherein The electrical layer has a flat surface, and the operation of forming the color filter layer forms a color filter layer on the flat surface.

According to still another embodiment of the present invention, the method of fabricating the semiconductor device further includes forming a plurality of microlenses on the color filter layer.

According to the above object of the present invention, a method of manufacturing a semiconductor device is further proposed. In the method of fabricating a semiconductor device, a first substrate is provided, the first substrate having a first surface and a second surface opposite the first surface. A plurality of microstructures are formed on the second surface of the first substrate. A dielectric layer is formed overlying the second surface of the first substrate. A second substrate is bonded to the dielectric layer. Forming a component layer on the first surface of the first substrate. A third substrate is bonded to the element layer. The second substrate and the dielectric layer are removed to expose the second surface of the first substrate. A color filter layer is formed on the second surface of the first substrate.

In accordance with an embodiment of the present invention, the operation of providing the first substrate includes providing the first layer and the second layer stacked on the first layer, and performing the operation of forming the structure to form the microstructure on the second layer.

According to another embodiment of the present invention, the method of manufacturing the above semiconductor element is further between the operation of bonding the second substrate and the operation of forming the element layer. Includes removing the first layer.

In accordance with yet another embodiment of the present invention, the above described operation of providing the first substrate comprises making the first layer and the second layer from different materials.

According to still another embodiment of the present invention, between the operation of forming the element layer and the operation of bonding the third substrate, the method of fabricating the semiconductor device further includes forming a passivation layer over the element layer and planarizing the passivation layer.

In accordance with still another embodiment of the present invention, the operation of forming the microstructures is such that any two adjacent of the microstructures are adjacent to each other.

In accordance with still another embodiment of the present invention, the operation of forming the microstructures described above separates any adjacent ones of the microstructures from each other.

100‧‧‧Semiconductor components

102‧‧‧Substrate

104‧‧‧ Surface

106‧‧‧Component layer

108‧‧‧Photosensitive area

110a‧‧‧Semiconductor layer

110b‧‧‧Semiconductor layer

112‧‧‧ first surface

114a‧‧‧second surface

114b‧‧‧second surface

116a‧‧‧Microstructure

116b‧‧‧Microstructure

118‧‧‧ dielectric layer

120‧‧‧ surface

122‧‧‧Color filter layer

124‧‧‧Microlens layer

126‧‧‧Microlens

128‧‧‧ incident light

130‧‧‧ positive

132‧‧‧Back

200‧‧‧ mask

202‧‧‧Light

300‧‧‧ operations

302‧‧‧ operation

304‧‧‧ operation

400‧‧‧First substrate

402‧‧‧ first floor

404‧‧‧ second floor

406‧‧‧ first surface

408‧‧‧ second surface

410‧‧‧Microstructure

412‧‧‧ surface

414‧‧‧ dielectric layer

416‧‧‧ surface

418‧‧‧Second substrate

420‧‧‧Component layer

422‧‧‧Photosensitive area

424‧‧‧passivation layer

426‧‧‧ surface

428‧‧‧ Third substrate

430‧‧‧ dielectric layer

432‧‧‧ surface

434‧‧‧Color filter layer

436‧‧‧Microlens layer

438‧‧‧Microlens

440‧‧‧Semiconductor components

500‧‧‧ mask

502‧‧‧Light

600‧‧‧ operation

602‧‧‧ operation

604‧‧‧ operation

606‧‧‧ operation

608‧‧‧ operation

610‧‧‧ operation

612‧‧‧ operation

614‧‧‧ operation

H1‧‧‧ Height

H2‧‧‧ height

W1‧‧‧ spacing

W2‧‧‧ spacing

A better understanding of the aspects of the present disclosure can be obtained from the following detailed description taken in conjunction with the drawings. It should be noted that, according to industry standard practices, the features are not drawn to scale. In fact, in order to make the discussion clearer, the dimensions of each feature can be arbitrarily increased or decreased.

1 is a cross-sectional view showing a semiconductor device in accordance with various embodiments of the present invention.

2A is a schematic enlarged cross-sectional view showing a semiconductor layer of a semiconductor device in accordance with various embodiments of the present invention.

2B is a schematic enlarged cross-sectional view showing a semiconductor layer of a semiconductor device in accordance with various embodiments of the present invention.

3A to 3D are schematic cross-sectional views showing respective intermediate stages of a method of fabricating a semiconductor device in accordance with various embodiments.

4 is a flow chart showing a method of manufacturing a semiconductor device in accordance with various embodiments.

5A to 5F are schematic cross-sectional views showing respective intermediate stages of a method of fabricating a semiconductor device in accordance with various embodiments.

Fig. 6 is a flow chart showing a method of manufacturing a semiconductor device in accordance with various embodiments.

The following disclosure provides many different embodiments or embodiments to implement different features of the subject matter provided. Specific examples of components and arrangements described below are used to simplify the disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the description, the first feature is formed above or above the second feature, and may include an embodiment in which the first feature and the second feature are formed in direct contact, and may also include additional features that may be formed in the first An embodiment between a feature and a second feature such that the first feature and the second feature may not be in direct contact. In addition, the disclosure may repeat reference numerals and/or text in the various embodiments. Such repetitions are based on the simplification and clarity of the invention and are not intended to specify the relationship between the various embodiments and/or configurations discussed. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

In a general back-illuminated complementary metal oxide semiconductor image sensor, before the light is projected from the back side and passes through the color filter layer and enters the semiconductor layer between the color filter layer and the lower device layer, the light will Colliding to the flat surface of the semiconductor layer, while the flat surface of the semiconductor layer will Light reflection. Therefore, the quantum efficiency of the back-illuminated metal-oxide-semiconductor image sensor is reduced by the high-light reflection of the semiconductor layer and the low-light reception of the element layer.

Embodiments of the present disclosure are directed to a semiconductor device and a method of fabricating the same, wherein a semiconductor layer interposed between a color filter layer and an element layer has a surface on which a plurality of microstructures are formed, and thus most The light can be refracted by these microstructures into the semiconductor layer and absorbed by the element layer. Therefore, the quantum efficiency of the semiconductor element is greatly improved by low reflection and high absorption.

1 is a cross-sectional view showing a semiconductor device in accordance with various embodiments of the present invention. In some embodiments, semiconductor component 100 is a complementary metal oxide semiconductor image sensing component that is operable to sense incident light 128. The semiconductor device 100 has a front side 130 and a back side 132. In a particular embodiment, semiconductor component 100 is a back-illuminated complementary metal oxide semiconductor image sensing component that is operable to sense incident light 128 projected from its back side 132. As shown in FIG. 1, the semiconductor device 100 includes a substrate 102, an element layer 106, a semiconductor layer 110a, and a color filter layer 122. The substrate 102 is a semiconductor substrate. The substrate 102 is composed of a single crystal semiconductor material or a compound semiconductor material. In some examples, substrate 102 is a tantalum substrate. In some embodiments, tantalum or glass may also be used as the material for the substrate 102.

In some embodiments, component layer 106 is disposed on surface 104 of substrate 102. In an alternate embodiment, a passivation layer (not shown) may be additionally formed between the element layer 106 and the substrate 102. Component layer 106 includes a plurality of photosensitive regions 108. In some examples, each photosensitive region 108 includes a pixel that includes an image sensing element, wherein the image sensing element includes a photodiode and other components. Photosensitive region 108 operates to sense incident light 128.

The semiconductor layer 110a is located above the element layer 106. In some embodiments, the semiconductor layer 110a is composed of tantalum, niobium, epitaxial germanium, and/or epitaxial germanium. The semiconductor layer 110a has a first surface 112 and a second surface 114a opposite the first surface 112, the first surface 112 being adjacent to the element layer 106. The semiconductor layer 110a includes a plurality of microstructures 116a formed on the second surface 114a. 2A and 2B, FIG. 2A is a schematic enlarged cross-sectional view showing a semiconductor layer of a semiconductor device in accordance with various embodiments of the present invention, and FIG. 2B is a cross-sectional view showing an embodiment of the present invention. A schematic cross-sectional view of a semiconductor layer of a semiconductor device. In some embodiments, each microstructure 116a has a cross-sectional shape that is triangular, trapezoidal, or curved, such as semi-circular or semi-elliptical. For example, each microstructure 116a has a triangular cross-sectional shape as shown in FIG. 2A, and each microstructure 116b formed on the second surface 114b of the semiconductor layer 110b has a trapezoidal cross-sectional shape as shown in FIG. 2B. . In these examples, the semiconductor layer 110b is similar to the semiconductor layer 110a above the element layer 106, and the first surface 112 of the semiconductor layer 110b is opposite the second surface 114b and adjacent to the element layer 106. Similarly, the semiconductor layer 110b may be composed of germanium, germanium, epitaxial germanium, and/or epitaxial germanium.

In some examples, microstructures 116a or 116b are regularly arranged. In some examples, the microstructures 116a or 116b are arranged irregularly. Furthermore, as shown in FIG. 2A, any adjacent ones of the microstructures 116a may abut each other. in In some examples, as shown in Figure 2B, any two adjacent microstructures 116b are separated from one another. In the semiconductor layer 110a shown in Fig. 2A, each of the microstructures 116a has a height h1, and a space w1 is formed between any adjacent ones of the microstructures 116a. In some examples, height h1 is between 100λ and λ/100, and pitch w1 is between 100λ and λ/100, where λ represents the wavelength of incident light 128. In a particular example, height h1 is greater than λ/2.5 and pitch w1 is greater than λ/2. In the semiconductor layer 110b shown in Fig. 2B, each of the microstructures 116b has a height h2, and a gap w2 is formed between any adjacent ones of the microstructures 116b. In some examples, height h2 is between 100λ and λ/100, and pitch w2 is between 100λ and λ/100. In a particular example, height h2 is greater than λ/2.5 and spacing w2 is greater than λ/2.

By the microstructures 116a or 116b, the area of the second surface 114a or 114b can be increased, and the incident angle of the incident light 128 projected onto the second surface 114a or 114b is smaller than the incident angle at which the incident light 128 is projected onto a flat surface, thus entering the light. Most of the radiation 128 can be refracted multiple times in the microstructures 116a or 116b, then passed through the semiconductor layer 110a or 110b to the element layer 106 and absorbed by the element layer 106. Therefore, the absorption rate of the incident light 128 can be greatly improved.

In some embodiments, color filter layer 122 is formed on second surface 114a of semiconductor layer 110a. The color filter layer 122 includes a plurality of color filters arranged in an array, such as a plurality of red filters, a plurality of green filters, and a plurality of blue filters. In some embodiments, as shown in FIG. 1, the semiconductor device 100 selectively includes a dielectric layer 118 formed to cover the second surface 114a of the semiconductor layer 110a. In some examples, Dielectric layer 118 is composed of hafnium oxide, tantalum nitride or hafnium oxynitride. The surface 120 of the dielectric layer 118 is flat and the color filter layer 122 is formed on the planar surface 120 of the dielectric layer 118.

Referring again to FIG. 1, in some embodiments, semiconductor component 100 selectively includes microlens layer 124. This microlens layer 124 is formed on the color filter layer 122. The microlens layer 124 includes a plurality of microlenses 126. These microlenses 126 can direct incident light 128 toward the photosensitive region 108 of the component layer 106 and focus. These microlenses 126 can be arranged in various forms having various shapes depending on the refractive index of the microlenses 126 and the distance between the photosensitive regions 108 and the microlenses 126.

Referring to FIGS. 3A to 3D, FIGS. 3A to 3D are schematic cross-sectional views showing respective intermediate stages of a method of fabricating a semiconductor device in accordance with various embodiments. As shown in Figure 3A, a substrate 102 is provided. The substrate 102 is composed of a single crystal semiconductor material or a compound semiconductor material. In some embodiments, tantalum, niobium or glass is used as the material for forming the substrate 102. The element layer 106 and the semiconductor layer 110a are sequentially formed on the surface 104 of the substrate 102. The semiconductor layer 110a has a first surface 112 and a second surface 114a opposite the first surface 112. In some embodiments, element layer 106 is first formed on first surface 112 of semiconductor layer 110a, and then element layer 106 is attached to surface 104 of substrate 102 using, for example, bonding techniques. In some examples, the second surface 114a of the semiconductor layer 110a may be selectively thinned to reduce the thickness of the semiconductor layer 110a. In a specific example, the semiconductor layer 110a is formed on a temporary substrate (not shown), and the element layer 106 is formed on the first surface 112 of the semiconductor layer 110a. The element layer 106 is bonded to the surface 104 of the substrate 102, followed by a thinning process to remove the temporary substrate, and the semiconductor layer 110a can be thinned in the thinning process. Chemical mechanical polishing (CMP) techniques can be utilized to perform the thinning process.

In some embodiments, component layer 106 includes a plurality of photosensitive regions 108. Each photosensitive region 108 can include a pixel that includes an image sensing element, and the image sensing element includes a photodiode and other components. In some examples, the semiconductor layer 110a is composed of tantalum, niobium, epitaxial germanium, and/or epitaxial germanium.

As shown in Fig. 3C, a plurality of microstructures 116a are formed on the second surface 114a of the semiconductor layer 110a. In some embodiments, as shown in FIGS. 3B and 3C, the operation of forming the microstructures 116a is performed by a lithography process and an etching process in which the light 202 is projected toward the second surface 114a by the reticle 200. The lithography process is performed to define a region where the microstructure 116a is to be formed, and then an etching process is performed on the second surface 114a to remove a portion of the semiconductor layer 110a, and at the second surface 114a, according to the definition of the lithography process. A microstructure 116a is formed thereon. In some examples, the etching process is performed using a dry etch technique or a chemical etch technique. In a particular example, these microstructures 116a are formed using a laser removal technique.

Each of the microstructures 116a may be formed with a triangular, trapezoidal or curved cross-sectional shape, which may be, for example, semi-circular or semi-elliptical. The microstructures 116a are formed regularly. In some examples, microstructures 116a are formed irregularly. In some embodiments, the operations of forming the microstructures 116a are performed in conjunction with the 2A and 3C drawings, so that any adjacent ones of the microstructures 116a are adjacent to each other. Referring to FIG. 2B, in the operation of forming the microstructure 116b, Adjacent two of the microstructures 116b can be separated from each other. Each microstructure 116a has a height h1 and a spacing w1 is formed between any adjacent ones of the microstructures 116a. In some examples, height h1 is between 100λ and λ/100, and pitch w1 is between 100λ and λ/100, where λ represents the wavelength of incident light 128. In a particular example, height h1 is greater than λ/2.5 and pitch w1 is greater than λ/2.

In some embodiments, after the microstructures 116a are formed, a color filter layer 122 is formed on the second surface 114a of the semiconductor layer 110a. The color filter layer 122 includes a plurality of color filters arranged in an array, such as a plurality of red filters, a plurality of green filters, and a plurality of blue filters. In some embodiments, as shown in FIG. 3D, after the microstructures 116a are formed, a dielectric layer 118 is formed to cover the second surface 114a of the semiconductor layer 110a and fill the gap between any adjacent ones of the microstructures 116a. The color filter layer 122 is formed on the dielectric layer 118. The dielectric layer 118 may be composed of tantalum oxide, tantalum nitride or hafnium oxynitride. Dielectric layer 118 has a flat surface 120 and color filter layer 122 is formed on planar surface 120 of dielectric layer 118. In some examples, the operation of forming dielectric layer 118 is performed using thermal oxidation techniques or deposition techniques, such as chemical vapor deposition (CVD) techniques. In a particular example, after the dielectric layer 118 is formed, the dielectric layer 118 is planarized to form a dielectric layer 118 having a planar surface 120. The chemical mechanical polishing technique can be used for the planarization process.

In some embodiments, after the color filter layer 122 is formed, the microlens layer 124 including the plurality of microlenses 126 is selectively formed on the color filter layer 122 to complete the semiconductor device 100. Forming a microlens 126 The operation is based on the refractive index of the microlens 126 and the distance between the photosensitive region 108 and the microlens 126, and the microlenses 126 are formed in various arrangements and in various shapes.

Referring to FIG. 4 and FIGS. 3A to 3D together, FIG. 4 is a flow chart showing a method of manufacturing a semiconductor device in accordance with various embodiments. The method begins at operation 300 to provide a substrate 102, which in turn forms element layer 106 and semiconductor layer 110a on surface 104 of substrate 102, as shown in FIG. 3A. The semiconductor layer 110a has a first surface 112 and a second surface 114a relative to the first surface 112. In some embodiments, the element layer 106 is formed on the first surface 112 of the semiconductor layer 110a and the element layer 106 is attached to the surface 104 of the substrate 102 using, for example, bonding. Optionally, the second surface 114a of the semiconductor layer 110a is thinned to reduce the thickness of the semiconductor layer 110a.

In operation 302, as shown in FIGS. 3B and 3C, the microstructures 116a are formed on the second surface 114a of the semiconductor layer 110a using, for example, a lithography process and an etching process. In some examples, the etching process is performed using a dry etch technique or a chemical etch technique. In a particular example, these microstructures 116a are formed using a laser removal technique. The operation of forming the microstructures 116a may be performed such that each of the microstructures 116a has a triangular, trapezoidal or curved cross-sectional shape, which may be, for example, semi-circular or semi-elliptical. The microstructures 116a can be formed regularly. In some examples, microstructures 116a are formed irregularly.

In some embodiments, the operation of forming microstructures 116a is performed such that any adjacent ones of microstructures 116a are contiguous with each other, as shown in FIG. 2A. Alternatively, as shown in FIG. 2B, any two adjacent microstructures 116b may be Separated from each other. In some examples, the height h1 of each microstructure 116a is between 100λ and λ/100, and the spacing w1 between any adjacent ones of the microstructures 116a is between 100λ and λ/100, where λ represents incidence The wavelength of light. In a particular example, the height h1 of each microstructure 116a is greater than λ/2.5, and the spacing w1 between any adjacent ones of the microstructures 116a is greater than λ/2.

In operation 304, a color filter layer 122 is formed on the second surface 114a of the semiconductor layer 110a. The color filter layer 122 includes a plurality of color filters arranged in an array, such as a plurality of red filters, a plurality of green filters, and a plurality of blue filters. In some embodiments, as shown in FIG. 3D, a dielectric layer 118 is first formed using a thermal oxidation technique or a deposition technique to cover the second surface 114a of the semiconductor layer 110a and fill between any adjacent ones of the microstructures 116a. The gap is formed to form a color filter layer 122 on the dielectric layer 118. The dielectric layer 118 has a flat surface 120 formed by a planarization process, and a color filter layer 122 is formed on the flat surface 120. In some embodiments, a microlens layer 124 comprising a plurality of microlenses 126 is selectively formed on the color filter layer 122 to complete the semiconductor device 100.

5A to 5F are schematic cross-sectional views showing respective intermediate stages of a method of fabricating a semiconductor device in accordance with various embodiments. As shown in FIG. 5A, a first substrate 400 is provided. The first substrate 400 has a first surface 406 and a second surface 408, wherein the first surface 406 and the second surface 408 are opposite sides of the first substrate 400. The first substrate 400 may be composed of a single layer structure. In some embodiments, as shown in FIG. 5A, the first substrate 400 includes a first layer 402 and a second layer 404 stacked on the first layer 402. The first layer 402 and the second layer 404 are made of a single crystal semiconductor material or a compound semiconductor Made up of materials. In some examples, germanium, germanium, epitaxial germanium, epitaxial germanium, or glass is used as the material for forming the first layer 402 and the second layer 404. The first layer 402 and the second layer 404 may be formed of different materials, for example, the first layer 402 may be formed of tantalum and the second layer 404 may be formed of an epitaxial germanium. In a particular example, first layer 402 and second layer 404 can be formed from the same material.

As shown in FIG. 5C, microstructures 410 are formed on second surface 408 of first substrate 400, wherein the microstructures 410 are formed on second layer 404. In some embodiments, as shown in FIGS. 5B and 5C, the operation of forming the microstructures 410 is performed by a lithography process and an etch process in which the light 502 is projected toward the second surface 408 by the reticle 500. The lithography process is performed, and an etching process is performed on the second surface 408 according to the definition of the lithography process to remove a portion of the second layer 404 of the first substrate 400, and a microstructure 410 is formed on the second surface 408. . In some examples, the etching process is performed using a dry etch technique or a chemical etch technique. In a particular example, these microstructures 410 are formed using a laser removal technique.

In some examples, each microstructure 410 can be formed with a triangular, trapezoidal or curved cross-sectional shape, which can be, for example, semi-circular or semi-elliptical. The microstructures 410 can be arranged regularly. In some examples, the microstructures 410 are arranged irregularly. In some embodiments, referring again to FIG. 5C, the operation of forming microstructures 410 is performed such that any adjacent ones of microstructures 410 are adjacent to each other. Referring also to FIGS. 2B and 5C, the arrangement of microstructures 410 can be similar to microstructures 116b, wherein any adjacent ones of microstructures 410 can be separated from one another. Similar to the microstructure 116a or 2B shown in Figure 2A In the illustrated microstructures 116b, the height of each of the microstructures 410 may be between 100λ and λ/100, and the spacing between any adjacent ones of the microstructures 410 may be between 100λ and λ/100, where λ Represents the wavelength of incident light. In a particular example, the height of each microstructure 410 is greater than λ/2.5, and the spacing between any adjacent ones of the microstructures 410 is greater than λ/2. The arrangement and shape of the microstructures 410 can be similar to the microstructures 116a of FIG. 2A or the microstructures 116b of FIG. 2B.

After the microstructures 410 are formed on the second surface 408 of the first substrate 400, a dielectric layer 414 is formed to cover the second surface 408 of the first substrate 400 and fill between any adjacent ones of the microstructures 410. The gap is shown in Figure 5C. In some examples, the operation of forming dielectric layer 414 is performed using thermal oxidation techniques or chemical vapor deposition techniques. For example, dielectric layer 414 is comprised of an oxide, such as hafnium oxide. Optionally, the dielectric layer 414 is planarized such that the surface 416 of the dielectric layer 414 is flat. The planarization operation can be performed using chemical mechanical polishing techniques.

After the operation of forming the dielectric layer 414, a second substrate 418 is provided and the second substrate 418 is bonded to the surface 416 of the dielectric layer 414. The surface 416 of the dielectric layer 414 is planarized to be flat so that the second substrate 418 can smoothly and firmly engage the surface 416 of the dielectric layer 414. In some examples, the second substrate 418 is formed from a glass or semiconductor material, such as tantalum and niobium. Optionally, after the bonding operation, the first surface 406 of the first substrate 400 is thinned using, for example, a chemical mechanical polishing technique or an etching technique to remove portions of the first substrate 400. In a specific example, as shown in FIG. 5C, the first layer 402 of the first substrate 400 is removed to expose the first The surface 412 of the second layer 404.

Next, as shown in FIG. 5D, the element layer 420 is formed on the surface 412 of the second layer 404 of the first substrate 400. The element layer 420 includes a plurality of photosensitive regions 422. In some examples, each photosensitive region 422 includes a pixel that includes an image sensing component, wherein the image sensing component includes a photodiode and other components.

In some embodiments, after forming the component layer 420, a third substrate 428 is provided, followed by bonding the third substrate 428 to the component layer 420. For example, the third substrate 428 is formed from a glass or semiconductor material, such as tantalum and niobium. In some embodiments, as shown in FIG. 5E, a passivation layer 424 is formed to cover the element layer 420 prior to the bonding operation of the third substrate 428. The passivation layer 424 can be composed, for example, of hafnium oxide, tantalum nitride, or hafnium oxynitride. In some examples, the passivation layer 424 is planarized so that the surface 426 of the passivation layer 424 can be flat. The planarization operation can be performed using chemical mechanical polishing techniques. Since the surface 426 of the passivation layer 424 is flattened to be flat, the third substrate 428 can be smoothly and firmly bonded to the surface 426 of the passivation layer 424.

After the bonding operation of the third substrate 428, a thinning operation is performed on the second substrate 418 by, for example, chemical mechanical polishing techniques and/or etching techniques to sequentially remove the second substrate 418 and the dielectric layer 414. . After the thinning operation, the microstructures 410 on the second surface 408 of the first substrate 400 are exposed, as shown in Figure 5E.

In some embodiments, after the microstructures 410 are exposed, a color filter layer 434 is formed on the second surface 408 of the first substrate 400. Color filter Light layer 434 includes a plurality of color filters arranged in an array, such as a plurality of red filters, a plurality of green filters, and a plurality of blue filters. In some embodiments, as shown in FIG. 5F, after exposing the microstructures 410, a dielectric layer 430 is formed to cover the second surface 408 of the first substrate 400 and fill any adjacent ones of the microstructures 410. The gap between them is followed by formation of a color filter layer 434 on the dielectric layer 430. The dielectric layer 430 may be composed of tantalum oxide, tantalum nitride or hafnium oxynitride. Dielectric layer 430 has a flat surface 432 and color filter layer 434 is formed on planar surface 432. Dielectric layer 430 can be formed using thermal oxidation techniques or deposition techniques, such as chemical vapor deposition techniques. Optionally, after the dielectric layer 430 is formed, the dielectric layer 430 is planarized, and thus the surface 432 of the dielectric layer 430 is flat. The chemical mechanical polishing technique can be used for the planarization process.

In some embodiments, as shown in FIG. 5F, after the color filter layer 434 is formed, a microlens layer 436 including a plurality of microlenses 438 is formed on the color filter layer 434 to complete the semiconductor device 440. The operation of forming the microlens 438 may form the microlens 438 in various arrangements and various shapes depending on the refractive index of the microlens 438 and the distance between the photosensitive region 422 and the microlens 438.

Referring to FIG. 6 and FIGS. 5A to 5F together, FIG. 6 is a flow chart showing a method of manufacturing a semiconductor device in accordance with various embodiments. The method begins at operation 600, which provides a first substrate 400 having a first surface 406 and a second surface 408 opposite the first surface 406. The first substrate 400 may be composed of a single layer structure. In some embodiments, as shown in FIG. 5A, the first substrate 400 includes a first layer 402 and second layer 404 are stacked on first layer 402. The first layer 402 and the second layer 404 can be formed from different materials. In a particular example, first layer 402 and second layer 404 can be formed from the same material.

In operation 602, as shown in FIGS. 5B and 5C, the microstructures 410 are formed on the second surface 408 of the first substrate 400 using, for example, a lithography process and an etch process. In some examples, the etching process is performed using a dry etch technique or a chemical etch technique. These microstructures 410 can be formed using laser removal techniques. The operation of forming the microstructures 410 can be performed such that each of the microstructures 410 has a triangular, trapezoidal or arcuate cross-sectional shape, which can be, for example, semi-circular or semi-elliptical. The microstructures 410 can be formed regularly. In some examples, microstructures 410 are formed irregularly.

In some embodiments, the operation of forming the microstructures 410 is performed such that any adjacent ones of the microstructures 410 are contiguous with each other, such as the microstructures 116a shown in FIG. 2A. As with the microstructure 116b shown in FIG. 2B, any adjacent ones of the microstructures 410 can be separated from each other. In some examples, the height of each microstructure 410 is between 100λ and λ/100, and the spacing between any adjacent ones of the microstructures 410 is between 100λ and λ/100, where λ represents incident light. wavelength. In a particular example, the height of each microstructure 410 is greater than λ/2.5, and the spacing between any adjacent ones of the microstructures 410 is greater than λ/2.

In operation 604, as shown in FIG. 5C, a dielectric layer 414 is formed to cover the second surface 408 of the first substrate 400. In some examples, the operation of forming dielectric layer 414 is performed using thermal oxidation techniques or chemical vapor deposition techniques. Alternatively, for example, chemical mechanical polishing techniques can be used for dielectric Layer 414 is planarized to form a dielectric layer 414 having a flat surface 416.

In operation 606, again as shown in FIG. 5C, a second substrate 418 is provided and a second substrate 418 is bonded to the surface 416 of the dielectric layer 414. In some examples, the second substrate 418 is formed from a glass or semiconductor material. Optionally, the first surface 406 of the first substrate 400 is thinned using, for example, a chemical mechanical polishing technique or an etching technique to remove portions of the first substrate 400. In a particular example, the first layer 402 of the first substrate 400 is removed to expose the surface 412 of the second layer 404. In operation 608, element layer 420 is formed on surface 412 of second layer 404 of first substrate 400 as shown in FIG. 5D. The element layer 420 includes a plurality of photosensitive regions 422. Each photosensitive region 422 can include one pixel.

In operation 610, a third substrate 428 is provided and a third substrate 428 is bonded to the component layer 420. The third substrate 428 can be formed from a glass or semiconductor material such as tantalum and niobium. In some embodiments, as shown in FIG. 5E, a passivation layer 424 is formed to cover the element layer 420. In some examples, passivation layer 424 is planarized using, for example, a chemical mechanical polishing technique such that surface 426 of passivation layer 424 is flat. In operation 612, a thinning operation is performed on the second substrate 418 by, for example, chemical mechanical polishing techniques and/or etching techniques to sequentially remove the second substrate 418 and the dielectric layer 414 to expose the first The second surface 408 of the substrate 400 is associated with the microstructures 410.

In operation 614, a color filter layer 434 is formed on the second surface 408 of the first substrate 400. The color filter layer 434 includes a plurality of color filters arranged in an array, such as a plurality of red filters and a plurality of green filters. With multiple blue filters. In some embodiments, as shown in FIG. 5F, a dielectric layer 430 is formed to cover the second surface 408 of the first substrate 400, and then a color filter layer 434 is formed on the dielectric layer 430. In a particular example, dielectric layer 430 has a flat surface 432 and color filter layer 434 is formed on planar surface 432. Optionally, the dielectric layer 430 is planarized using, for example, a chemical mechanical polishing technique. In some embodiments, a microlens layer 436 comprising a plurality of microlenses 438 is formed on color filter layer 434 to complete semiconductor component 440.

In accordance with an embodiment, the present disclosure discloses a semiconductor component that operates to sense incident light. The semiconductor device includes a substrate, an element layer, a semiconductor layer, and a color filter layer. The component layer is disposed on the substrate and includes a plurality of photosensitive regions. The semiconductor layer is above the component layer and has a first surface and a second surface opposite the first surface. The first surface is adjacent to the component layer. The semiconductor layer includes a plurality of microstructures on the second surface. The color filter layer is disposed on the second surface of the semiconductor layer.

According to another embodiment, the present disclosure discloses a method of fabricating a semiconductor device. In this method, a substrate is provided, and the element layer and the semiconductor layer are sequentially formed on the surface of the substrate. The semiconductor layer has a first surface and a second surface opposite the first surface, the first surface being adjacent to the element layer. A plurality of microstructures are formed on the second surface of the semiconductor layer. A color filter layer is formed on the second surface of the semiconductor layer.

According to still another embodiment, the present disclosure discloses a method of fabricating a semiconductor device. In this method, a first substrate having a first surface and a second surface opposite the first surface is provided. Forming a plurality of microstructures on the first substrate On the second surface. A dielectric layer is formed overlying the second surface of the first substrate. A second substrate is bonded to the dielectric layer. Forming a component layer on the first surface of the first substrate. A third substrate is bonded to the element layer. The second substrate and the dielectric layer are removed to expose the second surface of the first substrate. A color filter layer is formed on the second surface of the first substrate.

The features of several embodiments have been summarized above, and those skilled in the art will appreciate the aspects of the disclosure. It will be appreciated by those skilled in the art that the present disclosure can be readily utilized to design or refine other processes and structures to achieve the same objectives and/or the same advantages as the embodiments described herein. It is also to be understood by those skilled in the art that the present invention may be practiced without departing from the spirit and scope of the disclosure. Alternative.

100‧‧‧Semiconductor components

102‧‧‧Substrate

104‧‧‧ Surface

106‧‧‧Component layer

108‧‧‧Photosensitive area

110a‧‧‧Semiconductor layer

112‧‧‧ first surface

114a‧‧‧second surface

116a‧‧‧Microstructure

118‧‧‧ dielectric layer

120‧‧‧ surface

122‧‧‧Color filter layer

124‧‧‧Microlens layer

126‧‧‧Microlens

128‧‧‧ incident light

130‧‧‧ positive

132‧‧‧Back

Claims (10)

A semiconductor component for sensing an incident light, the semiconductor component comprising: a substrate; a component layer disposed on the substrate and comprising a plurality of photosensitive regions; a semiconductor layer located above the component layer And having a first surface and a second surface opposite to the first surface, wherein the first surface is adjacent to the element layer, and the semiconductor layer comprises a plurality of microstructures on the second surface; and a color filter a layer disposed on the second surface of the semiconductor layer. The semiconductor component of claim 1, wherein any two adjacent of the microstructures are adjacent to each other. The semiconductor component of claim 1, wherein any two of the microstructures are separated from each other. The semiconductor device of claim 1, wherein each of the microstructures has a height greater than λ/2.5, and a distance between any adjacent ones of the microstructures is greater than λ/2, and λ represents a wavelength of the incident light. A method of fabricating a semiconductor device, comprising: providing a substrate, wherein an element layer and a semiconductor layer are sequentially formed on a surface of the substrate, the semiconductor layer having a first surface and opposite to the first surface a second surface, the first surface being adjacent to the element layer; forming a plurality of microstructures on the second surface of the semiconductor layer; A color filter layer is formed on the second surface of the semiconductor layer. The method of fabricating a semiconductor device according to claim 5, further comprising forming a dielectric layer over the second surface of the semiconductor layer between the operation of forming the microstructures and the operation of forming the color filter layer Wherein the dielectric layer has a flat surface, and the operation of forming the color filter layer forms the color filter layer on the flat surface. The method of fabricating a semiconductor device according to claim 5, further comprising forming a plurality of microlenses on the color filter layer. A method of fabricating a semiconductor device, comprising: providing a first substrate, the first substrate having a first surface and a second surface opposite the first surface; forming a plurality of microstructures on the first substrate Forming a dielectric layer over the second surface of the first substrate; bonding a second substrate to the dielectric layer; forming an element layer on the first substrate Bonding a third substrate to the component layer; removing the second substrate and the dielectric layer to expose the second surface of the first substrate; and forming a color filter The layer is on the second surface of the first substrate. The method of fabricating a semiconductor device according to claim 8, wherein the operation of providing the first substrate comprises providing a first layer and a second layer stacked on the first layer, and performing an operation system for forming the microstructures. Put these A microstructure is formed on the second layer; and between the operation of bonding the second substrate and the operation of forming the element layer, the method of fabricating the semiconductor element further comprises removing the first layer. The method of manufacturing a semiconductor device according to claim 8, wherein, between the operation of forming the device layer and the operation of bonding the third substrate, further comprising: forming a passivation layer overlying the device layer; and planarizing the Passivation layer.