TW201524105A - Power controllers and relevant control methods capable of providing load compensation - Google Patents

Abstract

Controllers and related control methods for a switched mode power supply are disclosed. The switched mode power supply has an inductive device and a power switch connected in series. An output current estimator in a controller is configured for receiving a current-sense signal representing an inductor current flowing through the inductive device and a discharge-time signal indicating a discharge time of the inductive device. The output current estimator generates a charge current in response to the discharge-time signal and the current-sense signal, thereby the charge current substantially corresponding to an output current that the switched mode power supply outputs to a load. The charge current is limited not to exceed a maximum value. A current limiter is configured for limiting the current-sense signal when the charge current is the maximum value.

Description

Power controller capable of providing load compensation and related control methods

The present invention relates to a switched mode power supply, and more particularly to a power supply that can predict an output current to one of the loads.

Switched power supplies typically employ a power switch to control the flow of current through an inductive component. Compared with other general power supplies, the switch power supply has a small product volume and superior conversion efficiency, so it is widely welcomed and adopted by the industry.

The supply of the flyback architecture is widely used because it provides an electrical isolation effect. The flyback architecture uses a transformer to isolate the input power line connected to the mains outlet from the direct current to the output power line connected to the load. The primary side generally refers to the side on which the circuits electrically connected to the input power line are located; in contrast, the secondary side generally refers to the side on which the circuits electrically connected to the output power line are located. The so-called secondary side control is to use a resistor or some electronic components, placed on the secondary side to detect the output voltage on the secondary side of the load or the output current flowing. The secondary side control can simply achieve a good output voltage or output current regulation, but because the secondary side resistor or electronic components continue to consume power, the secondary side control may have a lower conversion efficiency. . U.S. Patent Application Publication No. US20100321956A1 discloses a number of switching power supplies that are adjusted using primary side control. The maximum rated output current of the secondary side of the section or the rated output voltage. U.S. Patent Application Publication No. US20100321956A1 allows the maximum rated output current of the secondary side to be approximately a constant value that does not vary with the input voltage of the input power line.

Load compensation is a technique that increases the output voltage as the output current to the load increases, and can be used to compensate for voltage losses on the transmission line between the power supply and the load. One conventional method of performing load compensation is to use a peak current flowing through a transformer to approximate the output current output to a load, thereby changing the target value of the output voltage regulated by the power supply. However, as is known in the industry, the peak current is quite different from the output current, so the peak current cannot be used to represent the output current at all.

The embodiment discloses a power supply controller suitable for a switching power supply. The switched power supply includes an inductive component and a power switch connected in series. The power controller includes an output current estimator and a current limiter. The output current estimator is configured to provide a current detection signal and a discharge time signal. The current detection signal represents an inductor current flowing through one of the inductive components. The discharge time signal indicates one of the inductive elements of the discharge time. And based on the current detection signal and the discharge time signal, the output current estimator generates a charging current that is approximately corresponding to an output current of the switching power supply to a load output. The charging current is limited to no more than a maximum value. When the charging current is equal to the maximum value, the current limiter architecture is used to limit the current detecting signal.

The embodiment discloses a control method suitable for use in a switching power supply as an output current detection. The switching power supply includes an inductive component and a function Rate switches, connected in series. The control method includes: receiving a current detection signal, which generally represents an inductor current flowing through the inductive component; detecting the inductive component to generate a discharge time signal, substantially indicating a discharge time of the inductive component; The current detection signal and the discharge time signal generate a charging current, wherein the discharge current represents approximately an output current of the switching power supply output to a load; limiting the charging current to not exceed a maximum value; And, when the charging current is equal to the maximum value, the current detecting signal is pressed.

Another embodiment discloses a power controller suitable for a switching power supply. The switched power supply includes an inductive component and a power switch connected in series. The power controller includes an output current estimator and a load compensator. The output current estimator architecture receives a current detection signal and a discharge time signal. The current detection signal generally represents an inductor current flowing through the inductive component, the discharge time signal indicating approximately one discharge time of the inductive component. The output current estimator generates a charging current according to the current detection signal and the discharge time signal. The charging current generally corresponds to one of the output power of the switched power supply to a load output. The load compensator, according to the charging current, is configured to draw a bias current from a resistor and flow to a ground line. The inductive component includes an auxiliary winding, and the resistor is coupled between the auxiliary winding and the load compensator.

10‧‧‧Switching power supply

20‧‧‧Bridge rectifier

24‧‧‧load

26‧‧‧Power Controller

28, 30‧‧‧ resistance

34‧‧‧Power switch

36‧‧‧ Current Sense Resistor

38‧‧‧ transmission line

62‧‧‧Sampling and holding circuit

64‧‧‧Discharge time determiner

66‧‧‧Load compensation circuit

68‧‧‧Error amplifier

70‧‧‧Output current estimator

72‧‧‧ oscillator

74‧‧‧ comparator

76‧‧‧ Comparator

78‧‧‧SR Recorder

90‧‧‧Transducer

92, 94‧‧‧potentiometer

96‧‧‧Update circuit

98‧‧‧Collection capacitor

99‧‧‧ Capacitance

100‧‧‧CS peak voltage detector

102‧‧‧Voltage Control Current Source

103‧‧‧ oblique line

104‧‧‧ switch

ACC‧‧‧ Collector

AUX‧‧‧Auxiliary winding

CS‧‧‧current detection terminal

FB‧‧‧ feedback end

GATE‧‧‧ drive side

I _CHARGE ‧‧‧Charging current

I _DIS ‧‧‧discharge current

I _OFFSET ‧‧‧Bias Current

I _OUT ‧‧‧Output current

I _PRM ‧‧‧current

I _REF ‧‧‧Preset value

I _SEC ‧‧‧secondary winding current

PRM‧‧‧ primary side winding

S _DIS ‧‧‧discharge time signal

SEC‧‧‧secondary winding

S _UPDATE ‧‧‧Update signal

T _CYC ‧‧‧ Switching Cycle

T _DIS ‧‧‧Discharge time

T _OFF ‧‧‧Closed time

T _ON ‧‧‧Opening time

V _ACC ‧‧‧ feedback voltage

V _AUX ‧‧‧cross pressure

V _CC ‧‧‧Operating power supply

V _COM ‧‧‧compensation voltage

V _CS ‧‧‧current detection voltage

V _CS-PEAK ‧‧‧ voltage

V _FB ‧‧‧ feedback voltage signal

V _GATE ‧‧‧ drive signal

V _IN ‧‧‧Input power supply

V _LC ‧‧‧load represents voltage

V _LIMIT ‧‧‧Limit voltage

V _M ‧‧‧ voltage

V _OUT ‧‧‧output power supply

V _REF ‧‧‧reference voltage

V _REF-M ‧‧‧Preset voltage

V _TAR ‧‧‧target voltage

Figure 1 shows a switched mode power supply implemented in accordance with the present invention.

Figure 2 shows the waveforms of some of the signals in Figure 1.

Figure 3 illustrates the power controller in Figure 1.

Figure 4 illustrates the output current estimator in Figure 3.

Figure 5A shows the charge current I _{CHARGE versus} voltage V _M in some embodiments.

Figure 5B shows the bias current I _{OFFSET versus} charge current I _CHARGE in some embodiments.

An embodiment of the present invention has a power supply controller disposed on the primary side that can generate an estimated signal based on a current flowing through a primary winding of a transformer and a discharge time of the transformer. One of these estimated signals is a charging current, the method of which will be explained in this specification, and it is demonstrated that this charging current can represent a considerable amount of output current output by a power supply to a load. Moreover, by limiting the maximum value of the charging current, the output current can also be accurately adjusted to not exceed the maximum rated output current of the power supply. In addition, the charging current can represent the output current very accurately or to a considerable extent, so the charging current can be used as an input to generate an offset current to be compensated for the load, and to obtain an accurate The result of control.

1 shows a switched mode power supply 10 implemented in accordance with the present invention that employs primary side control. The bridge rectifier 20 provides full-wave rectification to convert an alternating current (AC) power source supplied from a mains outlet into a direct current (DC) input power source V _IN . The voltage input to the power supply V _IN may have an M-type waveform or be approximately an invariant constant. The power controller 26 can be an integrated circuit having a plurality of pins that can be electrically connected to peripheral devices or components. The power controller 26 can periodically turn the power switch 34 on or off through the driver GATE. When the power switch 34 is turned on, the primary side winding PRM of the transformer stores energy; when the power switch 34 is turned off, the transformer is discharged through the secondary side winding SEC and the auxiliary winding AUX, respectively, and the output power supply V _OUT and the operating power supply V are respectively established. _{CC is} supplied to the load 24 and the power controller 26, respectively. Connected between the load 24 and the secondary winding is a transmission line 38 whose parasitic resistance is represented by the resistance indicated therein.

Resistors 28 and 30 can be considered as a voltage divider for detecting the voltage across the auxiliary winding AUX, V _AUX , and then providing a feedback voltage signal V _FB to a feedback terminal FB of the power supply controller 26. When the power switch 34 is turned off, the voltage across the V _{AUX will be} approximately proportional to the reflective voltage across the voltage across the secondary winding SEC. Based on the feedback voltage signal V _FB , the power controller 26 controls the duty cycle of the power switch 34. Through the current detecting terminal CS, the power controller 26 detects the current detecting voltage V _CS , which represents the current I _PRM flowing through the current detecting resistor 36, the power switch 34, and the primary winding _PRM .

Figure 2 shows the waveforms of some of the signals in Figure 1. The driving signal V _GATE GATE is at the end of the drive is a logical 1, the power switch 34 is turned on. The power switch 34 is maintained at the on time, referred to as the ON time T _ON ; in contrast, the power switch 34 is maintained at the off time, referred to as the OFF time T _OFF , as shown in FIG. A cycle time T _CYC is equal to the sum of one on time T _ON and one off time T _OFF , as shown in FIG. 2 . At the turn-on time T _ON , the voltage across the auxiliary winding AUX, V _{AUX ,} is a negative value, mapping the voltage of the input power supply V _IN . At this time, the primary side winding PRM stores energy, and the current detection voltage V _CS representing the current I _PRM will increase with time. At the instant when the power switch 34 is turned off, the secondary winding SEC begins to generate a secondary winding current I _SEC which decreases over time until the secondary winding SEC is fully discharged. As shown in Fig. 2, the time during which the secondary winding SEC is released, or the time when the secondary winding current I _{SEC is} greater than 0, is called the discharge time T _DIS . At the discharge time T _DIS , the voltage across the voltage V _AUX is a positive value, approximately the voltage of the output power source V _OUT . After the discharge time T _DIS ends, the voltage across the V _AUX begins to oscillate and converges to 0V. In Fig. 2, the discharge time T _{DIS is} only a part of the off time T _OFF because the switch mode power supply 10 is assumed to operate in a discontinuous conduction mode (DCM). In case the switch mode power supply 10 is operated in a continuous conduction mode (CCM), the discharge time T _{DIS will be} approximately equal to the off time T _OFF .

Fig. 3 illustrates the power supply controller 26 in Fig. 1. The oscillator 72 periodically sets the SR register 78 so that the drive signal V _GATE becomes a logical one, so the on time T _{ON is} started. The sample-and-hold circuit 62 samples the feedback voltage signal V _FB at the discharge time T _DIS in a timely manner, and then the error amplifier 68 compares the sampling result of the sample-and-hold circuit 62 with a predetermined target voltage V _TAR to generate a compensation voltage V. _COM . When the current detection voltage V _CS exceeds the compensation voltage V _COM , the comparator 74 resets the SR recorder 78 and starts the off time T _OFF . During the off time T _OFF , the current detection voltage V _CS suddenly drops to 0V, as shown in FIG. In other words, the compensation voltage V _COM controls or suppresses the peak value of the current detection voltage V _CS .

The discharge time determiner 64 is electrically connected to the feedback terminal FB. By detecting the waveform of the feedback voltage signal V _FB , the discharge time determiner 64 provides a discharge time signal S _DIS to indicate the time of the discharge time T _DIS . The discharge time signal S _{DIS does} not necessarily have to be completely synchronized with the discharge time T _DIS . For example, in an embodiment, the discharge time signal S _DIS becomes a logical one after a period of time from the start of the discharge time T _DIS , and then becomes a logical zero after a period of time at which the discharge time T _DIS ends. Therefore, the discharge time signal S _DIS is a logically one time, approximately equal to the discharge time T _DIS .

Based on the discharge time signal S _DIS and the current sense voltage V _CS , the output current estimator 70 provides a load representative voltage V _LC to the load compensation circuit 66. Here, the load representative voltage V _LC corresponds to a charging current I _CHARGE . As will be described later, the charging current I _CHARGE is substantially proportional to the output current I _OUT outputted to the load 24 in FIG. The load compensation circuit 66 generates a bias current I _OFFSET which draws current from the feedback terminal FB at the discharge time and flows to the ground line. In general, the larger the output current I _{OUT , the} larger the charging current I _{CHARGE and the} larger the bias current I _{OFFSET , the} larger the voltage across the voltage V _AUX is to maintain the sampling result of the sample and hold circuit 62 approximately equal to the target voltage V _TAR , Therefore, the voltage of the output power V _OUT is higher. Therefore, the load compensation circuit 66 can cause the voltage of the output power source V _OUT to be approximately equal to "I _OUT * K ₁ + K ₂ * V _TAR ", where K ₁ and K ₂ are two fixed values. As long as the resistance values of the resistors 28 and 30 are properly selected, I _OUT * K ₁ can be approximately equal to the voltage across the transmission line 38 in Fig. 1, so that the load 24 can receive a supply voltage with a fairly good regulation result (=K). ₂ * V _TAR ). Load compensation is thus accurately implemented.

Output current estimator 70 additionally provides a limit voltage V _LIMIT to comparator 76. Once the current detection signal V _CS exceeds the limit voltage V _LIMIT , the comparator 76 resets the SR recorder 78, ends the turn-on time T _ON , and begins the off time T _OFF . Therefore, the limit voltage V _LIMIT can also control or suppress the peak value of the current detection signal V _CS .

Figure 4 illustrates an output current estimator 70 having a transducer 90, level shifters 92 and 94, an update circuit 96, a collection capacitor 98, a switch 104, and a voltage controlled current source (voltage- Controlled current source 102, and a CS peak voltage detector 100.

The CS peak voltage detector 100 generates a voltage V _CS-PEAK that represents a peak of the current detection signal V _CS . An example of a CS peak voltage detector 100 is provided, for example, in FIG. 10 of U.S. Patent Application Publication No. US20100321956A1. In some embodiments, the CS peak voltage detector 100 can be replaced with an average current detector as exemplified in FIG. 17 or FIG. 18 of US Patent Application Publication No. US20100321956A1. The voltage controlled current source 102 converts the voltage V _CS-PEAK into a discharge current I _DIS which discharges the collector terminal ACC only when the discharge time signal S _DIS is a logical one. In other words, the discharge time of the discharge current I _DIS to the collector terminal ACC is equivalently approximately equal to the discharge time T _DIS . In some embodiments, the switch 104 in FIG. 4 can be omitted. Instead, the discharge time signal S _{DIS is} used to activate or deactivate the voltage controlled current source 102. The voltage V _M on the capacitor 99 is shifted and sent to the transducer 90 for comparison with a predetermined reference voltage V _REF . The transducer 90 outputs a charging current I _CHARGE according to the comparison result, and continuously charges the collecting terminal ACC. By detecting the charging current I _CHARGE , the load representative voltage V _LC can be generated. The update circuit 96 is triggered by the update signal S _UPDATE to sample the feedback voltage V _ACC on the collector ACC to update the voltage V _M , which can be updated once per switching cycle. The update signal S _UPDATE does not necessarily cause the update circuit 96 to perform an update once per switching cycle, for example, it may be performed every two switching cycles. In an embodiment, the update signal S _UPDATE may be equivalent to the drive signal V _GATE , meaning that the updated action is performed at the beginning of the off time T _OFF . The voltage V _M is always kept at a constant value until the update circuit 96 updates it to become another constant value. Depending on the voltage V _M , the potential converter 94 provides a limiting voltage V _LIMIT . From the above description, it can be found that when the voltage V _{M is} constant, the charging current I _CHARGE will remain unchanged.

Similar to the analysis in U.S. Patent Application Publication No. US20100321956A1, when the charging current I _CHARGE is a fixed value and the value of the feedback voltage V _ACC when being sampled is equal to the value of the previous sampling, the charging current I _CHARGE will be It is proportional to the output current I _OUT output to the load 24. In order to make the charging current I _CHARGE proportional to the output current I _OUT , the value of the feedback voltage V _ACC every time it is sampled must be the same or stable. The update circuit 96, the potential converter 92, and the transducer 90 together form a loop having a negative loop gain, and this loop may eventually stabilize the value of the feedback voltage V _ACC each time it is sampled. At a value. For example, if the charging current I _{CHARGE is} greater than a desired value proportional to the output current I _OUT , the feedback voltage V _ACC will become larger at the next sampling, causing the updated voltage V _{M to} become larger as well. Therefore, the charging current I _CHARGE becomes small. vice versa. Therefore, the charging current I _CHARGE can be changed at approximately the same as the output current I _OUT .

Figure 5A shows the charge current I _{CHARGE versus} voltage V _M in some embodiments. The voltage V _{M is} transmitted through the potential converter 92 and the transducer 90 to control the charging current I _CHARGE . As shown in Fig. 5A, the charging current I _CHARGE outputted by the transducer 90 has no negative value, and the lowest is OA. When the voltage V _{M is} lower than the preset voltage V _REF-M (which corresponds to the reference voltage V _{REF in} FIG. 4 ), the charging current I _{CHARGE is} approximately a maximum value, that is, I _MAX shown in FIG. 5A. .

When the load 24 is not large or very light, the output current I _OUT has not reached the maximum rated output current, so the voltage V _M will stabilize at a certain value greater than the preset voltage V _REF-M , so that the charging current I _{CHARGE and the} output The current I _{OUT is} proportional. At this time, the power controller 26 in FIG. 3 operates in the constant voltage mode, and adjusts the voltage of the output power source V _OUT to stabilize it at a preset value. However, when the load 24 is very heavy, the charging current I _CHARGE is fixed at I _MAX and causes the voltage V _M to fall below the preset voltage V _REF-M . At this time, if the output current I _OUT exceeds its maximum rated output current (proportional to I _MAX ), both the voltage V _M and the limit voltage V _LIMIT will decrease with each switching cycle until the limiting voltage V _{LIMIT is} depressed The voltage V _{CS-PEAK is} such that the output current I _OUT is equal to the maximum rated output current. In other words, when the voltage V _{M is} lower than the preset voltage V _REF-M , the power controller 26 operates in the constant current mode.

At constant voltage operation, the transducing gain of the transducer 90 roughly determines the position of the voltage V _M value. The larger the transduction gain, the narrower the possible range of the voltage V _M , and the feedback voltage V _ACC can have more operating voltage space available. However, the transduction gain should not be too large, because increasing the transconductance gain also increases the negative loop gain, while excessive negative loop gain may cause oscillation, making the voltage V _M unstable.

FIG. 5B shows the relationship of the bias current I _{OFFSET to the} charging current I _CHARGE in some embodiments, which relationship may be performed by the load compensation circuit 66. In an embodiment, the load representative voltage V _LC and the bias current I _OFFSET can be generated by mapping the charging current I _CHARGE . In some embodiments, load compensation does not need to be generated when the load is very light or unloaded. Therefore, as shown in FIG. 5B, when the charging current I _{CHARGE is} lower than a predetermined value I _REF , the bias current I _OFFSET disappears, which is equal to 0A. When the charging current I _{CHARGE is} higher than a predetermined value I _REF , the two are approximately a linear relationship, as exemplified by the oblique line 103 in FIG. 5B.

Output current estimator 70 uses only an internal, having a negative loop gain of the loop, it reached two important functions: to provide with an output current I _OUT is proportional to the charging current I _{CHARGE of,} and controlling the output current I _OUT is not more than Maximum rated output current.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

70‧‧‧Output current estimator

90‧‧‧Transducer

92, 94‧‧‧potentiometer

96‧‧‧Update circuit

98‧‧‧Collection capacitor

99‧‧‧ Capacitance

100‧‧‧CS peak voltage detector

102‧‧‧Voltage Control Current Source

104‧‧‧ switch

ACC‧‧‧ Collector

I _CHARGE ‧‧‧Charging current

I _DIS ‧‧‧discharge current

S _DIS ‧‧‧discharge time signal

S _UPDATE ‧‧‧Update signal

V _ACC ‧‧‧ feedback voltage

V _CS ‧‧‧current detection voltage

V _CS-PEAK ‧‧‧ voltage

V _LC ‧‧‧load represents voltage

V _LIMIT ‧‧‧Limit voltage

V _M ‧‧‧ voltage

V _REF ‧‧‧reference voltage

Claims (10)

A power controller for a switching power supply, the switch power supply includes an inductive component connected in series and a power switch, the power controller includes: an output current estimator, and the architecture provides a current detection signal representing an inductor current flowing through the inductive component, and a discharge time signal indicating a discharge time of the inductive component, and generating the signal according to the current detection signal and the discharge time signal a charging current that is approximately corresponding to an output current of the switching power supply to a load output, wherein the charging current is limited to not greater than a maximum value; and a current limiter when the charging current is equal to the maximum value The architecture is used to limit the current detection signal. The power supply controller of claim 1, wherein the inductive component comprises an auxiliary winding, the switching power supply has a resistor connected to the auxiliary winding, and the power controller further comprises: a load compensator, Based on the charging current, the architecture draws a bias current from the resistor. The power controller of claim 1, wherein the charging current is not a negative value. The power controller of claim 1, wherein the output current estimator generates a voltage signal according to the charging current, the discharging time signal, and the current detecting signal, and the output current estimator has a transducer And comparing the voltage signal with a reference voltage to generate the charging current. The power controller of claim 4, wherein the voltage signal is updated once during each switching cycle of the switched mode power supply. A power controller as in the fourth application of the patent application, wherein the charging current continues to be collected End charging, the output current estimator provides a discharge current according to the current detection signal, the discharge current discharges the collection end during the discharge time, and the voltage signal is filtered by sampling a feedback voltage on the collection end Update. The power controller of claim 6, wherein one of the current detection signals has a peak value that determines the discharge current. The power controller of claim 6, wherein the output current estimator further comprises a collecting capacitor connected to the collecting end, and an updating circuit is connected to the collecting end for sampling the feedback voltage. The power controller of claim 1, wherein the output current estimator generates a voltage signal according to the charging current, the discharging time signal, and the current detecting signal, and the output current estimator further comprises a potential The converter is configured to convert the voltage signal into a second voltage signal, and the current current limiter includes a comparator for comparing the second voltage signal and the current detection signal to control the power switch. A control method is applicable to a switching power supply device. As an output current detection, the switching power supply includes an inductance component and a power switch connected in series. The control method includes: receiving a current detection a signal, which generally represents an inductor current flowing through the inductive component; detecting the inductive component to generate a discharge time signal, substantially indicating a discharge time of the inductive component; and the current detection signal and the discharge time signal according to the signal Generating a charging current, wherein the discharging current represents approximately an output current of the switching power supply output to a load; Limiting that the charging current does not exceed a maximum value; and when the charging current is equal to the maximum value, suppressing the current detecting signal.