TW201501280A - Photodiode structure - Google Patents

Photodiode structure Download PDF

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TW201501280A
TW201501280A TW102122136A TW102122136A TW201501280A TW 201501280 A TW201501280 A TW 201501280A TW 102122136 A TW102122136 A TW 102122136A TW 102122136 A TW102122136 A TW 102122136A TW 201501280 A TW201501280 A TW 201501280A
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photodiode
layer
region
contact
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TW102122136A
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Yun-Shan Chang
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Yun-Shan Chang
Lin David Da Wei
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Abstract

A photodiode structure includes a first-type substrate, a second-type doped well and a second-type doped region is formed in the first-type substrate. An isolation layers is disposed on the peripheral of the second-type doped well without contact in between. The second-type doped region is formed in the second-type doped well and is extended on the surface of the second-type doped well. A protective layer covers the first-type substrate. A contact conductor thread through the protective layer which includes a contact layer and a conductive strip. The contact layer is formed on the opposite side of the conductive strip and in contact with and connected to the second-type doped region.

Description

光電二極體 Photodiode

本發明是有關於一種影像感測元件,特別是有關於一種光電二極體影像感測元件的改良。 The present invention relates to an image sensing element, and more particularly to an improvement of a photodiode image sensing element.

互補式金屬氧化物半導體影像感測器主要利用一包括光二極體元件的主動畫素陣列(active pixel matrix)或影像感測元(image sensor cell)陣列,而這兩種陣列能將入射之影像光能轉換成數位資料。傳統的影像感測元(image sensor cell)包括感測光照強度的光電二極體(photodiode),以及鄰近的電晶體。 A complementary metal oxide semiconductor image sensor mainly utilizes an active pixel matrix or an image sensor cell array including photodiode elements, and the two arrays can image an incident image. Light energy is converted into digital data. A conventional image sensor cell includes a photodiode that senses light intensity, and an adjacent transistor.

上述電晶體連帶周邊區域的其他額外的元件包括控制與信號處理電路以及周邊的邏輯電路構成光二極體互補式金氧半影像感測元件(photodiode-type CMOS image sensor)。因此,為降低製造成本與製程的複雜度,二極體互補式金氧半影像感測元件周邊的電路係與主要區域內影像感測元的電晶體於相同的製程步驟中形成。 Other additional components associated with the peripheral region of the transistor include a control and signal processing circuit and peripheral logic circuitry to form a photodiode-type CMOS image sensor. Therefore, in order to reduce the manufacturing cost and the complexity of the process, the circuit around the diode complementary MOS image sensing element and the transistor of the image sensing element in the main area are formed in the same process step.

然而,上述方法往往造成主要光感測區域內影像感測元的電晶體電性不良的影響。更明確地說。在半導體與氧化層界面會因矽懸浮鍵缺陷(Si dangling bond defect),產生表面複合中心(recombination centers)而降低元件少數載子生命週期,產生漏電流現象。而當形成自對準矽化物(Silicide,Self-aligned Silicidation)於周邊電路(例如CMOS邏輯電路)的閘極與汲極/源極區域時,同時該自對準矽化物亦形成於光二極體元件的表面,則會加深此缺陷。如此,將導致該影像感測元生成不必要的暗電流(dark current),進而降低訊號/雜訊(S/N or SNR,Signal-to-noise ratio)的比值,影響感測器裝置的品質。 However, the above methods often cause the influence of poor transistor electrical properties of the image sensing elements in the main light sensing region. More specifically. At the interface between the semiconductor and the oxide layer, due to the Si dangling bond defect, surface recombination centers are generated to reduce the minority carrier life cycle of the device and cause leakage current. When a self-aligned telluride (Silicide, Self-aligned Silicidation) is formed in the gate and drain/source regions of a peripheral circuit (for example, a CMOS logic circuit), the self-aligned germanide is also formed in the photodiode. The surface of the component will deepen this defect. In this way, the image sensing element will generate unnecessary dark current (dark Current), in turn, reduces the ratio of signal/to-noise ratio (S/N or SNR), affecting the quality of the sensor device.

隨著半導體製程技術進步,互補式金屬氧化半導體(COMS,Complementary Metal Oxide Semiconductor)元件製程技術對縮小元件與高精度的要求下,元件間干擾越來越明顯,被用來作為元件之間絕緣的淺溝槽隔離製程(STI,Shallow Trench Isolation)也就變得愈來愈重要。在習知光電二極體元件中,位於圍繞光電二極體元件之隔離層與主動區域之間界面的缺陷可能會導致暗電流,而位於光電二極體側面部分周圍或鄰近於矽基板表面的矽懸鍵亦會導致暗電流。也就是說,在無入射光之情況下,圍繞光電二極體之界面部分,符合表面物理學理論所存在晶界之懸鍵(dangling bonds),電荷載子於界面移動時,某些載子將被隨機捕捉,然後以此能階釋放,導致暗電流之產生以致影像感測器所擷取的影像的品質與動態範圍降低。 With the advancement of semiconductor process technology, the complementary metal oxide semiconductor (COMS, Complementary Metal Oxide Semiconductor) component process technology has become more and more obvious in terms of component reduction and high precision, and is used as insulation between components. The shallow trench isolation process (STI, Shallow Trench Isolation) has become more and more important. In conventional photodiode elements, defects located at the interface between the isolation layer and the active region surrounding the photodiode element may cause dark current, while being located around or adjacent to the side surface of the photodiode. The dangling button also causes dark current. That is to say, in the absence of incident light, around the interface portion of the photodiode, dangling bonds conforming to the grain boundary of the surface physics theory, when the charge carriers move at the interface, some carriers It will be randomly captured and then released in this order, resulting in dark currents resulting in reduced image quality and dynamic range of the image captured by the image sensor.

為解決習知光電二極體元件之隔離層因高應力造成鄰近N型井區晶格錯位導致漏電流(Leakage Current)之問題,本發明提供一種光電二極體,係藉由布局(layout)的設計,使隔離層與井區分離一定距離設置。 In order to solve the problem that the isolation layer of the conventional photodiode element is caused by the high stress causing the leakage current of the adjacent N-type well region, the present invention provides a photodiode by layout. The design is such that the isolation layer is separated from the well area by a certain distance.

一種光電二極體,其包括一第一型基底、一第二型摻雜井設置於第一型基底內、一第二型摻雜區形成於該第二型摻雜井內。第一型基底內具有一隔離區域,作為光電二極體之隔離元件,且隔離區域並不接觸該第二型摻雜井。其中,第一型基底之上表面形成有一保護層,保護層覆蓋第二型摻雜井與第二型摻雜區。一接觸導體包括一接觸層與一導電條,接觸層形成於該導電條的下端。接觸導體係貫穿保護層並透過下端之接觸層與第二型摻雜區接觸及電連接。 A photodiode includes a first type substrate, a second type doping well disposed in the first type substrate, and a second type doping region formed in the second type doping well. The first type substrate has an isolation region as an isolation element of the photodiode, and the isolation region does not contact the second type doping well. Wherein, a protective layer is formed on the upper surface of the first type substrate, and the protective layer covers the second type doping well and the second type doping area. A contact conductor includes a contact layer and a conductive strip, and a contact layer is formed at a lower end of the conductive strip. The contact guiding system penetrates the protective layer and is in contact with and electrically connected to the second type doped region through the contact layer at the lower end.

與先前技術相比較,本發明光電二極體,隔離區域與第二型摻雜井並不接觸,以避免隔離層與主動區域之間界面缺陷所可能導致之暗電流干擾。 Compared with the prior art, in the photodiode of the present invention, the isolation region is not in contact with the second type doping well to avoid dark current interference which may be caused by interface defects between the isolation layer and the active region.

為讓本發明之上述目的、特徵、和優點能更明顯易懂,下文特舉較佳實施例,並配合所附圖式,作詳細說明如下: The above described objects, features, and advantages of the present invention will become more apparent and understood.

100‧‧‧光電二極體 100‧‧‧Photoelectric diode

102‧‧‧第一型基底 102‧‧‧First type substrate

103‧‧‧接觸導體 103‧‧‧Contact conductor

104‧‧‧保護層 104‧‧‧Protective layer

105‧‧‧上表面 105‧‧‧ upper surface

106‧‧‧隔離區域 106‧‧‧Isolated area

107‧‧‧PN連結界面 107‧‧‧PN connection interface

109‧‧‧空乏區 109‧‧‧ Vacant Zone

118‧‧‧第二型摻雜井 118‧‧‧Type 2 doping well

119‧‧‧第二型摻雜區 119‧‧‧Second-type doped area

120‧‧‧接觸層 120‧‧‧Contact layer

121‧‧‧導電條 121‧‧‧ Conductive strip

212‧‧‧間隔區 212‧‧‧ interval zone

213‧‧‧鈍化層 213‧‧‧ Passivation layer

214‧‧‧透明導電氧化物層 214‧‧‧Transparent conductive oxide layer

215‧‧‧多晶矽層 215‧‧‧Polysilicon layer

216‧‧‧電極 216‧‧‧electrode

圖1是本發明一實施例之光電二極體的上視圖;圖2是圖1之A-A剖面示意圖,並說明其元件之分佈;圖3是本發明一實施例之光電二極體的剖面示意圖,並說明圖2間隔區之形成方式;圖4是本發明一實施例之光電二極體的剖面示意圖。 1 is a top view of a photodiode according to an embodiment of the present invention; FIG. 2 is a cross-sectional view taken along line AA of FIG. 1 and illustrating a distribution of elements thereof; and FIG. 3 is a cross-sectional view of a photodiode according to an embodiment of the present invention; FIG. 4 is a schematic cross-sectional view showing a photodiode according to an embodiment of the present invention. FIG.

請參考圖1與圖二。圖1係為本發明一實施例之光電二極體的上視圖,圖2係為圖1的A-A切線之剖面圖。本發明光電二極體100包括第一型基底102、第二型摻雜井118、第二型摻雜區119、空乏區109、PN連結界面107、隔離區域106、接觸層120、接觸導體103以及保護層104。第一型基底102,具有一上表面105作為光線入射面。第二型摻雜井118設置於第一型基底102內,第一型基底102與第二型摻雜井118相鄰接面區域形成一PN連結界面107。第二型摻雜區119形成於該第二型摻雜井118內,並且從該第二型摻雜井118之表面延伸而裸露於第二型摻雜井118之表面。 Please refer to Figure 1 and Figure 2. 1 is a top view of a photodiode according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along line A-A of FIG. 1. The photodiode 100 of the present invention includes a first type substrate 102, a second type doping well 118, a second type doping region 119, a depletion region 109, a PN junction interface 107, an isolation region 106, a contact layer 120, and a contact conductor 103. And a protective layer 104. The first type substrate 102 has an upper surface 105 as a light incident surface. The second type doping well 118 is disposed in the first type substrate 102, and the first type substrate 102 and the second type doping well 118 adjacent to the junction area form a PN connection interface 107. A second type doping region 119 is formed in the second type doping well 118 and extends from the surface of the second type doping well 118 to be exposed on the surface of the second type doping well 118.

於一實施例中,上述第一型基底102為P型基底(P-substrate),第二型摻雜井118是N型摻雜井(N-well)。第二型摻雜區119則設置於該第二型摻雜井118內之表面上,為相對高濃度之N型摻雜區。 In one embodiment, the first type substrate 102 is a P-substrate and the second type doping well 118 is an N-type well. The second type doping region 119 is disposed on the surface of the second type doping well 118 as a relatively high concentration N-type doping region.

上述空乏區109為圖示中虛線所包含的區域,該區域係由第一 型基底102與第二型摻雜井118相鄰接PN連結界面107周圍區域所定義。 The above-mentioned depletion area 109 is an area included by a broken line in the figure, and the area is first The type substrate 102 is defined adjacent to the area around the PN junction interface 107 adjacent to the second type doping well 118.

上述第一型基底102內具有一隔離區域106,作為光電二極體100之隔離元件且並不接觸該第二型摻雜井118。詳細而言,本發明之隔離區域106與第二型摻雜區119之間具有一間隔區212,該間隔區212為空乏區109所涵蓋範圍之部分區域,間隔區212之內部組成結構則與空乏區109之內部組成結構相同。因此根據本發明之實施例,係提供一種光電二極體100,將隔離區域106與第二型摻雜區119隔離設置,即隔離區域106不與第一型基底102與第二型摻雜井118相鄰接區域的PN連結界面107接觸,隔離區域106形成空乏區109側面擴散範圍之限制。其中,隔離區域106可為選自氮化矽或氧化矽之材質所組成,且由局部氧化(LOCOS)、淺溝槽隔離物(STI)以及場氧化區(FOX)等方式所形成之隔離層。 The first type substrate 102 has an isolation region 106 therein as an isolation element of the photodiode 100 and does not contact the second type doping well 118. In detail, between the isolation region 106 and the second doping region 119 of the present invention, there is a spacer 212, which is a partial region of the coverage area of the depletion region 109, and the internal structure of the spacer 212 is The internal composition of the depletion zone 109 is the same. Therefore, in accordance with an embodiment of the present invention, a photodiode 100 is provided that isolates the isolation region 106 from the second doped region 119, that is, the isolation region 106 does not interact with the first type substrate 102 and the second type doping well. 118 is in contact with the PN connection interface 107 of the adjacent region, and the isolation region 106 forms a limitation of the side diffusion range of the depletion region 109. The isolation region 106 may be composed of a material selected from the group consisting of tantalum nitride or hafnium oxide, and the isolation layer formed by local oxidation (LOCOS), shallow trench isolation (STI), and field oxidation region (FOX). .

上述第一型基底102之上表面105形成有一保護層104,保護層104覆蓋第二型摻雜井118與第二型摻雜區119。第一型基底102之上表面105另形成有一接觸導體103,接觸導體103包含一接觸層120與一導電條121,接觸層120形成於該導電條121的另一端。當接觸導體103貫穿保護層104而與第二型摻雜區119接觸時,係透過導電條121下端之接觸層120與第二型摻雜區119接觸及電連接。 The upper surface 105 of the first type substrate 102 is formed with a protective layer 104 covering the second type doping well 118 and the second type doping area 119. The upper surface 105 of the first type substrate 102 is further formed with a contact conductor 103. The contact conductor 103 includes a contact layer 120 and a conductive strip 121. The contact layer 120 is formed at the other end of the conductive strip 121. When the contact conductor 103 penetrates the protective layer 104 and contacts the second type doping region 119, the contact layer 120 passing through the lower end of the conductive strip 121 is in contact with and electrically connected to the second type doping region 119.

因此,當第二型摻雜井118之上表面105吸收光子時,空乏區109內之多數自由電子-電洞對開始吸收光子之能量,同時使電子-電洞對之電子與電洞相互分離而產生電流。隔離區域106係用以定義電流產生區域所產生的電流則經由設置於第二型摻雜區119上之接觸導體103導引至CMOS電路。 Therefore, when the surface 105 of the second type doping well 118 absorbs photons, most of the free electron-hole pairs in the depletion region 109 begin to absorb the energy of the photons, and at the same time separate the electrons and holes from the electron-holes. And the current is generated. The isolation region 106 is used to define the current generated by the current generating region and is then guided to the CMOS circuit via the contact conductor 103 disposed on the second doping region 119.

請參閱圖2,由於上述隔離區域106與第二型摻雜區119為分離設置,隔離區域106與第二型摻雜區119之間形成一間隔區 212。於一實施例中,間隔區212寬度範圍可為50um以上。如此,隔離區域106與第二型摻雜區119並不接觸,可避免隔離區域106因蝕刻、化學機械研磨(CMP)、低壓化學氣相沉積(LPCVD)等隔離製程,所造成對溝槽側壁結構之損壞與結構中機械應力(mechanical stress)而引發如差排(dislocation)等缺陷,導致鄰近第二型摻雜井118晶格漏電流增加的問題。 Referring to FIG. 2, since the isolation region 106 and the second doping region 119 are separately disposed, a spacer is formed between the isolation region 106 and the second doping region 119. 212. In an embodiment, the spacer 212 may have a width in the range of 50 um or more. As such, the isolation region 106 is not in contact with the second doping region 119, and the isolation region 106 can be prevented from being etched, chemical mechanical polishing (CMP), low pressure chemical vapor deposition (LPCVD), etc. The damage of the structure and the mechanical stress in the structure cause defects such as dislocation, resulting in an increase in lattice leakage current adjacent to the second type doping well 118.

請參閱圖3,其係用以舉例說明圖2間隔區之形成方式。於本發明一實施例中,於第一型基底102內形成隔離區域106後且於進行離子佈值(ion implantation)之前,設置一鈍化層213。此鈍化層213設置於間隔區212與隔離區域106上,作為後續離子佈值(ion implantation)之遮幕層(mask),防止離子佈值之雜質(impurities)進入隔離區域106與第二型摻雜區119間之間隔區212。如此可減少離子佈值雜質於介電材質中擴散造成污染與破壞,而產生隔離區域106與第二型摻雜區119間之漏電流問題。 Please refer to FIG. 3, which is used to illustrate the formation of the spacer region of FIG. In an embodiment of the invention, a passivation layer 213 is disposed after the isolation region 106 is formed in the first type substrate 102 and before the ion implantation is performed. The passivation layer 213 is disposed on the spacer 212 and the isolation region 106 as a mask for subsequent ion implantation, preventing impurities of the ion cloth value from entering the isolation region 106 and the second type of dopant. A space 212 between the miscellaneous zones 119. In this way, the contamination and destruction of the ion cloth value impurities in the dielectric material can be reduced, and the leakage current between the isolation region 106 and the second type doping region 119 is generated.

請參閱圖2。本發明提供一種光電二極體100,於第一型基底102之上表面105形成有一保護層104,保護層104覆蓋第二型摻雜井118與第二型摻雜區119。接觸導體103包含一接觸層120與一導電條121,接觸層120形成於導電條121的另一端。當接觸導體103貫穿保護層104而與第二型摻雜區119接觸時,係透過導電條121下端之接觸層120與第二型摻雜區119接觸及電連接。 Please refer to Figure 2. The present invention provides a photodiode 100 having a protective layer 104 formed on the upper surface 105 of the first substrate 102. The protective layer 104 covers the second doping well 118 and the second doping region 119. The contact conductor 103 includes a contact layer 120 and a conductive strip 121 formed on the other end of the conductive strip 121. When the contact conductor 103 penetrates the protective layer 104 and contacts the second type doping region 119, the contact layer 120 passing through the lower end of the conductive strip 121 is in contact with and electrically connected to the second type doping region 119.

上述接觸層120為使用自動對準矽化物(salicide,Self-Aligned Silicidation)製程所生成之金屬矽化層(silicide layer),可使用各種類型之金屬包括鈦(Ti)、鈷(Co)、鎳(Ni)、鈀(Pd)或鉑(Pt),以及合金,例如,鈦/鎢、鈦/鉬、鈷/鎢或鈷/鉬。 The contact layer 120 is a metal silicide layer formed by a salicide (Self-Aligned Silicidation) process, and various types of metals including titanium (Ti), cobalt (Co), and nickel can be used. Ni), palladium (Pd) or platinum (Pt), and alloys such as titanium/tungsten, titanium/molybdenum, cobalt/tungsten or cobalt/molybdenum.

為了降低光電二極體100表面的金屬矽化物成為漏電流(leakage)來源與減低表面複合中心(recombination center)現象。於一實施例中,本發明提供一光電二極體100。其中該接觸層120之大小範圍為不超出接觸導體103下表面周圍所界定之區域。藉 由去除位於光電二極體100表面上而未被接觸導體103所覆蓋,即去除延伸出接觸導體103垂直投影的部分金屬矽化物接觸層120,以減少此接觸層120所形成之漏電流影響。 In order to reduce the metal telluride on the surface of the photodiode 100, it becomes a leakage source and reduces the surface recombination center phenomenon. In one embodiment, the present invention provides a photodiode 100. The size of the contact layer 120 is such that it does not extend beyond the area defined by the lower surface of the contact conductor 103. borrow The metal halide contact layer 120, which is not covered by the contact conductor 103, is removed by the removal of the surface of the photodiode 100, that is, the portion of the metal halide contact layer 120 extending from the vertical projection of the contact conductor 103 is removed to reduce the leakage current effect formed by the contact layer 120.

另外,因入射光在光電二極體中的吸收深度與入射光之波長有關,波長較短的光在靠光電二極體表面部分被吸收,波長較長的光具有較深之收吸收深度(absorption path)。光二極體互補式金氧半影像感測元件對光譜的感測以紅外光(700~800nm)為最佳,最好的量子效率的波長為850 nm。光譜響應曲線是隨著光波長的增加而提升,因長波長光子穿透深度較深,接近PN連結界面107因此轉換效率提升(因PN連結界面107內部電場可有效率的拆解吸收光子後的電子電洞對),而當光波長為短波長時,表示吸收光落在表面附近容易被複合而使響應度下降。因此當光電二極體吸收入射波長較短的光,如藍光時,因表面吸收(surface absorption)與產生電子電洞對再復合(recombination)現象,對應用於如紅外光等較長波長光源為主要吸收光能來源之光電二極體造成一定程度之干擾。 In addition, since the absorption depth of the incident light in the photodiode is related to the wavelength of the incident light, the shorter wavelength light is absorbed by the surface portion of the photodiode, and the longer wavelength light has a deeper absorption depth ( Absorption path). The photodiode complementary gold-oxygen half-image sensing element senses the spectrum with infrared light (700-800 nm) as the best, and the best quantum efficiency has a wavelength of 850 nm. The spectral response curve increases as the wavelength of the light increases. Because the long-wavelength photon penetration depth is deeper, the conversion efficiency is improved near the PN junction interface 107 (the internal electric field of the PN junction interface 107 can be efficiently disassembled to absorb the photons). When the wavelength of the light is a short wavelength, it means that the absorbed light falls on the surface and is easily recombined to lower the responsiveness. Therefore, when the photodiode absorbs light having a short incident wavelength, such as blue light, it is re-combined due to surface absorption and generation of electron holes, and is used for a longer wavelength light source such as infrared light. A photodiode that primarily absorbs light energy causes some degree of interference.

本發明藉由對保護層104之構成設計,應用於以紅外光之長波長為主要吸收光能來源之光電二極體結構100。請參閱圖4,為本發明一實施例,其中保護層104為包含一透明導電氧化物層214與一多晶矽層215之疊合結構,透明導電氧化物層214係設置於多晶矽層215上方。多晶矽層215與透明導電氧化物層214係電連結於該第一型基底102,將透明導電氧化物層214與多晶矽層215吸收短波長入射光後所產生之光電流(photoelectric current),透過與多晶矽層215電連結之電極216接地排除。使透明導電氧化物層214與多晶矽層215具濾除短波長迷光(stray light)之功能。 The present invention is applied to a photodiode structure 100 that absorbs light energy mainly based on the long wavelength of infrared light by designing the protective layer 104. Referring to FIG. 4 , in an embodiment of the invention, the protective layer 104 is a stacked structure including a transparent conductive oxide layer 214 and a polysilicon layer 215 . The transparent conductive oxide layer 214 is disposed above the polysilicon layer 215 . The polysilicon layer 215 and the transparent conductive oxide layer 214 are electrically connected to the first type substrate 102, and the transparent current conductive oxide layer 214 and the polysilicon layer 215 absorb the photocurrent current generated by the short-wavelength incident light. The electrode 216 electrically connected to the polysilicon layer 215 is grounded. The transparent conductive oxide layer 214 and the polysilicon layer 215 are provided with a function of filtering out short-wavelength stray light.

上述透明導電氧化物層214為金屬化合物導電膜層,最佳實施例為銦錫氧化物(ITO,Indium Tin Oxide)導電膜層。 The transparent conductive oxide layer 214 is a metal compound conductive film layer, and the preferred embodiment is an indium tin oxide (ITO, Indium Tin Oxide) conductive film layer.

上述之透明導電氧化物層214與多晶矽層215係上下疊置形成 於該接觸導體103周圍與第一型基底102之上表面105,此區域為原習知場氧化區(FOX)等隔離物的設置區域。長波長光如850 nm的紅外光在矽材質的吸收深度約為13μm,而第二型摻雜井118深度卻只有2μm(井離子佈值深度)。因此大部分的長波長光係落在空乏區外電場收集不到的第一型基底102中。多晶矽層215之設置具有使原第二型摻雜井118之摻雜濃度峰值(peak concentration)更深之作用,藉以提升吸收深度較深之長波長光於第二型摻雜井118的光子吸收效率(absorption efficiency)。 The transparent conductive oxide layer 214 and the polysilicon layer 215 are stacked on top of each other. Around the contact conductor 103 and the upper surface 105 of the first type substrate 102, this area is an installation area of a spacer such as a conventional field oxide region (FOX). Long-wavelength light such as 850 nm infrared light has a depth of absorption of about 13 μm in the tantalum material, while the second type doping well 118 has a depth of only 2 μm (well ion cloth depth). Therefore, most of the long-wavelength light system falls in the first type substrate 102 which is not collected by the electric field outside the depletion region. The polysilicon layer 215 is disposed to have a deeper peak concentration of the original second type doping well 118, thereby enhancing the photon absorption efficiency of the long wavelength light having a deeper absorption depth in the second type doping well 118. (absorption efficiency).

雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 While the present invention has been described in its preferred embodiments, the present invention is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application.

100‧‧‧光電二極體 100‧‧‧Photoelectric diode

102‧‧‧第一型基底 102‧‧‧First type substrate

103‧‧‧接觸導體 103‧‧‧Contact conductor

104‧‧‧保護層 104‧‧‧Protective layer

105‧‧‧上表面 105‧‧‧ upper surface

106‧‧‧隔離區域 106‧‧‧Isolated area

107‧‧‧PN連結界面 107‧‧‧PN connection interface

109‧‧‧空乏區 109‧‧‧ Vacant Zone

118‧‧‧第二型摻雜井 118‧‧‧Type 2 doping well

119‧‧‧第二型摻雜區 119‧‧‧Second-type doped area

120‧‧‧接觸層 120‧‧‧Contact layer

121‧‧‧導電條 121‧‧‧ Conductive strip

212‧‧‧間隔區 212‧‧‧ interval zone

Claims (10)

一種光電二極體,包括:一第一型基底,包含一上表面;一第二型摻雜井,設置於該第一型基底內,該第一型基底與該第二型摻雜井相鄰接面區域係為一PN連結界面;一第二型摻雜區,形成於該第二型摻雜井內,並且從該第二型摻雜井之表面延伸;一隔離區域,形成於該第一型基底內,並且不接觸該第二型摻雜井;一保護層,形成於該上表面,並且覆蓋該第二型摻雜區與該第二型摻雜井;以及一接觸導體,貫穿該保護層,並且包括一接觸層與一導電條,其中該接觸層形成於該導電條的一端,並且接觸及連接該第二型摻雜區。 A photodiode comprising: a first type substrate comprising an upper surface; a second type doping well disposed in the first type substrate, the first type substrate and the second type doped well phase The abutting surface region is a PN junction interface; a second type doping region is formed in the second type doping well and extends from a surface of the second type doping well; an isolation region is formed in the a first type of substrate, and not contacting the second type doping well; a protective layer formed on the upper surface and covering the second type doping region and the second type doping well; and a contact conductor, The protective layer is penetrated and includes a contact layer and a conductive strip, wherein the contact layer is formed at one end of the conductive strip and contacts and connects the second type doped region. 如申請專利範圍第1項所述之光電二極體,其中該第一型基底係為一P型基底。 The photodiode of claim 1, wherein the first type of substrate is a P-type substrate. 如申請專利範圍第1項所述之光電二極體,其中該第二型摻雜井為一相對低濃度摻雜,該第二型摻雜區為一相對高濃度摻雜。 The photodiode of claim 1, wherein the second doping well is doped at a relatively low concentration, and the second doped region is doped at a relatively high concentration. 如申請專利範圍第1項所述之光電二極體,其中該接觸層為一自我對準金屬矽化製程所形成。 The photodiode of claim 1, wherein the contact layer is formed by a self-aligned metal deuteration process. 如申請專利範圍第1項所述之光電二極體,其中該隔離區域為氮化矽或氧化矽。 The photodiode of claim 1, wherein the isolation region is tantalum nitride or hafnium oxide. 如申請專利範圍第1項所述之光電二極體,其中該隔離區域為局部氧化層(LOCOS)、淺溝槽隔離層(STI)或場氧化層(FOX)。 The photodiode of claim 1, wherein the isolation region is a local oxide layer (LOCOS), a shallow trench isolation layer (STI) or a field oxide layer (FOX). 如申請專利範圍第1項所述之光電二極體,其中該保護層包含一透明導電氧化物層(TCO)與一多晶矽層,該透明導電氧化物層係設置於該多晶矽層上方。 The photodiode of claim 1, wherein the protective layer comprises a transparent conductive oxide layer (TCO) and a polysilicon layer, and the transparent conductive oxide layer is disposed above the polysilicon layer. 如申請專利範圍第7項所述之光電二極體,其中該多晶矽層厚度為0.1um。 The photodiode of claim 7, wherein the polycrystalline germanium layer has a thickness of 0.1 um. 如申請專利範圍第7項所述之光電二極體,其中該多晶矽層電連接於該第一型基底。 The photodiode of claim 7, wherein the polysilicon layer is electrically connected to the first type substrate. 如申請專利範圍第1項所述之光電二極體,其中該接觸導體為一接觸插塞(contact plug)。 The photodiode of claim 1, wherein the contact conductor is a contact plug.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI637495B (en) * 2017-06-22 2018-10-01 恆景科技股份有限公司 Cmos image sensor, a photodiode thereof and a method of forming the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI637495B (en) * 2017-06-22 2018-10-01 恆景科技股份有限公司 Cmos image sensor, a photodiode thereof and a method of forming the same

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