TW201500722A - Ultrasonic flow meter and ultrasonic flow measuring - Google Patents

Abstract

An ultrasonic flow meter and an ultrasonic flow measuring method are disclosed. The ultrasonic flow meter comprises a zero-cross detection circuit and an operation processing circuit. The zero-cross detection circuit comprises a digital-to-analog converter (DAC), a pre-trigger comparator, a zero-cross comparator, and a AND gate. The DAC generates a multi-step trigger signal. The pre-trigger comparator compares an ultrasonic wave with the multi-step trigger signal to output a first comparing signal. The zero-cross comparator compares an ultrasonic wave with a reference level to output a second comparing signal. The AND gate performs a AND operation according to the first comparing signal and a second comparing signal to output a zero-cross digital signal. The operation processing circuit calculates an ultrasonic flow according to the zero-cross digital signal.

Description

Ultrasonic flowmeter and ultrasonic flow measurement method

The invention relates to an ultrasonic flowmeter and a method for measuring ultrasonic flow.

The ultrasonic flowmeter series can be installed on the surface of the pipeline to measure the flow in the pipeline without removing the pipeline, or to measure the flow directly on the pipeline. Ultrasonic flowmeter is mainly used to measure the flow of clean and uniform liquid. It is widely used in petroleum, chemical, metallurgy, electric power, water supply and industrial water, river water and recycled water. In addition, ultrasonic flowmeter can measure impurity content. A high uniform fluid, such as the flow rate of a medium such as sewage, cannot be measured if there are bubbles or large solids in the tube.

The traditional time difference ultrasonic flowmeter needs to use a set of peak detection circuits to determine the intensity of the ultrasonic echo, and then provide the intensity of the ultrasonic echo to the gain control circuit for waveform amplification feedback control. Then, using the first wave of the ultrasonic echo, the zero-crossing detection circuit is used to determine the ultrasonic flight time. However, since the conventional time difference type ultrasonic flowmeter detects only the first wave zero crossing, it is easy to affect the measurement accuracy due to interference of bubbles, impurities, and the like in the fluid.

The invention relates to an ultrasonic flowmeter and a method for measuring ultrasonic flow.

According to the present invention, an ultrasonic flowmeter is proposed. The ultrasonic flowmeter includes a zero point detecting circuit and an arithmetic processing circuit. The zero detection circuit includes a digital analog converter, a pre-trigger comparator, a zero-crossing comparator, and an AND gate. The digital analog converter produces a multi-stage trigger signal. The pre-trigger comparator compares the ultrasonic echo with the multi-stage trigger signal to output a first comparison signal. The zero crossing comparator compares the ultrasonic echo with the reference level to output a second comparison signal. The gate performs an intersection operation between the first comparison signal and the second comparison signal to output a zero-cross digital signal. The arithmetic processing circuit calculates the ultrasonic flow based on the zero-crossing digital signal.

According to the present invention, a method of measuring ultrasonic flow is proposed. The ultrasonic flow measurement method comprises: generating a multi-stage trigger signal; comparing the ultrasonic echo with the multi-stage trigger signal to output a first comparison signal by a pre-trigger comparator; comparing the ultrasonic echo with a zero-crossing comparator The reference level is used to output a second comparison signal; the first comparison signal is subjected to an intersection operation with the second comparison signal to output a zero-cross digital signal; and the ultrasonic flow is calculated according to the zero-crossing digital signal.

In order to better understand the above and other aspects of the present invention, the preferred embodiments are described below, and in conjunction with the drawings, the detailed description is as follows:

1‧‧‧Supersonic flowmeter

11a, 11b‧‧‧ ultrasonic probe

12a, 12b‧‧‧ drive

13a, 13b‧‧‧ switch

14‧‧‧Bandpass filter

15‧‧‧Variable Gain Amplifier

16‧‧‧ Zero detection circuit

17‧‧‧Operation processing circuit

18‧‧‧Time measuring circuit

19‧‧‧Wireless communication module

161‧‧‧Digital Analog Converter

162‧‧‧Pre-trigger comparator

163‧‧‧ Zero crossing comparator

164‧‧‧ and gate

165‧‧‧Anti-gate

PTL(1)~PTL(M)‧‧‧Pre-trigger level

MS‧‧‧Multi-stage trigger signal

Rx‧‧‧Supersonic echo

Rst‧‧‧Reset signal

C1‧‧‧ first comparison signal

C2‧‧‧ second comparison signal

Ny‧‧‧ noise

L‧‧‧Latch signal

ZCD‧‧‧ zero crossover digital signal

ZC (1)‧‧‧ pre-trigger digital pulse

ZC(2)‧‧‧zero crossover digital pulse

SP‧‧‧ starting pulse

FIG. 1 is a block diagram showing an embodiment of an ultrasonic flowmeter.

Figure 2 is a schematic diagram of a zero point detection circuit.

Figure 3 is a timing diagram of the ultrasonic echo, the first comparison signal, the second comparison signal, and the zero-crossing digital signal.

Figure 4 is a schematic diagram showing the multi-stage trigger signal and the ultrasonic echo.

Figure 5 depicts a numerical distribution of the zero-crossing time array for the unfiltered calculus.

Figure 6 is a diagram showing the numerical distribution of filtered data after filtering calculation.

Please refer to FIG. 1 . FIG. 1 is a block diagram showing an embodiment of an ultrasonic flowmeter. The ultrasonic flowmeter 1 includes an ultrasonic probe 11a, an ultrasonic probe 11b, a driver 12a, a driver 12b, a switch 13a, a switch 13b, a band pass filter 14, a variable gain amplifier 15, a zero point detecting circuit 16, and an arithmetic processing circuit 17. The time measuring circuit 18 and the wireless communication module 19. The driver 12a is for driving the ultrasonic probe 11a, and the driver 12b is for driving the ultrasonic probe 11b. The ultrasonic probe 11a and the ultrasonic probe 11b alternately emit ultrasonic waves and receive ultrasonic echoes.

When the switch 13a is turned on, the switch 13b is correspondingly turned off. Conversely, when the switch 13a is turned off, the switch 13b is turned on correspondingly. The bandpass filter 14 is used to filter out noise outside the ultrasonic frequency range. The variable gain amplifier 15 adjusts the received ultrasonic echo according to the feedback signal and outputs it to the zero point detecting circuit 16. Time measurement The quantity circuit 18 calculates a timeout period. The wireless communication module 19 is configured to send and receive wireless signals. The arithmetic processing circuit 17 is, for example, a microcontroller, and the wireless communication module 19 is, for example, a ZigBee module.

Please refer to FIG. 1 , FIG. 2 and FIG. 3 at the same time. FIG. 2 is a schematic diagram of a zero-point detection circuit, and FIG. 3 is a diagram showing an ultrasonic echo, a first comparison signal, and a second comparison signal. Timing diagram of the zero-crossing digital signal. The zero point detection circuit 16 includes a digital analog converter 161, a pre-trigger comparator 162, a zero-crossing comparator 163, an AND gate 164, and a NAND gate 165. The arithmetic processing circuit 17 controls the digital analog converter 161 to generate a multi-stage trigger signal MS. The pre-trigger comparator 162 compares the ultrasonic echo with the Rx and the multi-stage trigger signal MS to output the first comparison signal C1. The zero-crossing comparator 163 compares the ultrasonic echo Rx with a reference level to output a second comparison signal C2. The reference level is, for example, the ground level. The gate 164 performs an intersection operation between the first comparison signal C1 and the second comparison signal C2 to output a zero-crossing digital signal ZCD. The zero-crossing digital signal ZCD includes an adjacent pre-trigger digital pulse ZC(1) and a zero-crossing digital pulse ZC(2), and the pre-trigger digital pulse ZC(1) is first generated, and the zero-crossing digital pulse ZC(2) ) is closest to the pre-trigger digital pulse ZC(1). The reverse gate 165 performs a reverse intersection operation on the first comparison signal C1 and the reset signal Rst output from the arithmetic processing circuit 17 to generate a latch signal L, and the latch signal L controls the latch state of the pre-trigger comparator 162. The arithmetic processing circuit 17 calculates the ultrasonic flow rate based on the zero-crossing digital signal ZCD. Since the zero-crossing digital signal ZCD outputted by the gate 164 is obtained by intersecting the first comparison signal C1 and the second comparison signal C2, it is possible to avoid erroneous judgment due to the influence of the noise Ny.

Further, the arithmetic processing circuit 17 selects the zero-crossing digital pulse ZC(2) as the end pulse for calculating the time-of-flight TOF. The arithmetic processing circuit 17 calculates the time-of-flight TOF based on the zero-crossing digital pulse ZC(2), which is the time difference between the start pulse SP and the zero-crossing digital pulse ZC(2). The arithmetic processing circuit 17 then calculates the ultrasonic flow rate based on the difference in flight time TOF of the two sets of ultrasonic probes.

Please refer to FIG. 1 , FIG. 3 and FIG. 4 at the same time. FIG. 4 is a schematic diagram showing a multi-stage trigger signal and an ultrasonic echo. The multi-stage trigger signal MS includes pre-trigger levels PTL(1)~PTL(M), and M is a positive integer greater than one. The pre-trigger levels PTL(1)~PTL(M) are generated sequentially, and the pre-trigger levels PTL(1)~PTL(M) are sequentially increased. For example, the pre-trigger level PTL(1)~PTL(M) is sequentially incremented by 15mV. When the pre-trigger level PTL (M) is equal to 3000 mV, then M is equal to 200.

The arithmetic processing circuit 17 generates a plurality of zero-crossing time arrays corresponding to the pre-trigger levels PTL(1) to PTL(M) according to the zero-crossing digital signal ZCD. The arithmetic processing circuit 17 first performs a filtering operation on all the zero-crossing time arrays to generate a filtered data, and the arithmetic processing circuit 17 calculates the ultrasonic flow based on the filtered data. The aforementioned filtering operation is, for example, a median value average filtering operation. The median average filtering operation first samples the N data and stores it in the array, and then sorts the array. The median is then taken, followed by subtracting the median two-sided data from the median. Then, it is judged whether the result of the subtraction is smaller than the allowable error value. When the result of the subtraction is less than the allowable error value, it stops. Then record the addresses A and B at the two ends of the array, and then average the values of the arrays x(A) to x(B), and the obtained values are the filtered data.

In addition, the arithmetic processing circuit 17 can also calculate the maximum amplitude of the ultrasonic echo Rx based on the pre-trigger digital pulse ZC(1), and use the maximum amplitude as the feedback signal of the variable gain amplifier 15. The pre-trigger level PTL(1)~PTL(M) includes the adjacent pre-trigger level PTL(M-1) and the pre-trigger level PTL(M), and the pre-trigger level PTL(M) is greater than the pre-trigger bit. Quasi PTL (M-1). When the multi-stage trigger signal MS is equal to the pre-trigger level PTL (M-1), the arithmetic processing circuit 17 receives the pre-trigger digital pulse ZC(1) within the timeout period. In contrast, when the multi-stage trigger signal MS is equal to the pre-trigger level PTL (M), the arithmetic processing circuit 17 cannot receive the pre-trigger digital pulse ZC (1) within the timeout period. The arithmetic processing circuit 17 selects the pre-trigger level PTL (M-1) as the maximum amplitude.

Please refer to Fig. 5 and Fig. 6 at the same time. Figure 5 shows the numerical distribution of the zero-crossing time array which is the unfiltered calculus, and Fig. 6 shows the numerical distribution of the filtered data after the filtering calculus. Figure. For example, using three inches of PVC tubing, the fluid is static tap water and the sampled data is 828. It can be seen from Fig. 5 that the standard deviation before the unfiltered calculation is 61 ns on average. In contrast, it can be seen from Fig. 6 that the standard deviation after filtering calculation is 0.24 ns on average, which significantly reduces the amplitude of the numerical jitter.

In conclusion, the present invention has been disclosed in the above preferred embodiments, and is not intended to limit the present invention. A person skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

16‧‧‧ Zero detection circuit

161‧‧‧Digital Analog Converter

162‧‧‧Pre-trigger comparator

163‧‧‧ Zero crossing comparator

164‧‧‧ and gate

165‧‧‧Anti-gate

MS‧‧‧Multi-stage trigger signal

Rx‧‧‧Supersonic echo

Rst‧‧‧Reset signal

C1‧‧‧ first comparison signal

C2‧‧‧ second comparison signal

L‧‧‧Latch signal

ZCD‧‧‧ zero crossover digital signal

Claims (20)

An ultrasonic flowmeter includes: a zero-point detection circuit comprising: a digital analog converter for generating a multi-stage trigger signal; and a pre-trigger comparator for comparing an ultrasonic echo with the multi-stage Triggering a signal to output a first comparison signal; a zero-crossing comparator for comparing the ultrasonic echo with a reference level to output a second comparison signal; and an AND gate for Performing an intersection operation between the first comparison signal and the second comparison signal to output a zero-cross digital signal; and an operation processing circuit for calculating an ultrasonic flow according to the zero-crossing digital signal . The ultrasonic flowmeter of claim 1, wherein the zero detection circuit further comprises a NAND gate for performing an inverse intersection operation on the first comparison signal and a reset signal. To generate a latch signal, the latch signal controls the latch state of the pre-trigger comparator. The ultrasonic flowmeter of claim 1, wherein the multi-stage trigger signal comprises a plurality of pre-trigger levels, the pre-trigger levels are sequentially generated, and the pre-trigger levels are sequentially Incrementally, the zero-crossing digital signal includes an adjacent one of a pre-trigger digital pulse and a zero-crossing digital pulse. The pre-trigger digital pulse is generated first, and the zero-crossing digital pulse is closest to the pre-trigger digital pulse. The ultrasonic flowmeter of claim 3, wherein the arithmetic processing circuit calculates a flight time based on the zero-crossing digital pulse, the arithmetic processing circuit calculates the flight time difference according to the alternating flight time values of the two sets of ultrasonic probes Ultrasonic flow. The ultrasonic flowmeter of claim 3, wherein the arithmetic processing circuit calculates one of the maximum amplitudes of the ultrasonic echo according to the pre-trigger digital pulse. The ultrasonic flowmeter of claim 5, further comprising: a variable gain amplifier, wherein the operation processing circuit uses the maximum amplitude as a feedback signal of the variable gain amplifier. The ultrasonic flowmeter of claim 5, further comprising: a time measuring circuit for calculating a timeout period, wherein the pre-trigger levels include one of the first pre-trigger levels and one a second pre-trigger level, wherein the second pre-trigger level is greater than the first pre-trigger level, and when the multi-stage trigger signal is equal to the first pre-trigger level, the operation processing circuit receives the timeout period The pre-trigger digital pulse, when the multi-stage trigger signal is equal to the second pre-trigger level, the operation processing circuit cannot receive the pre-trigger digit pulse within the timeout period, and the operation processing circuit selects the first pre-trigger bit It is the maximum amplitude. The ultrasonic flowmeter of claim 3, wherein the arithmetic processing circuit generates a plurality of zero-crossing time arrays according to the zero-crossing digital signal, wherein the zero-crossing time arrays respectively correspond to the pre-triggering Level. The ultrasonic flowmeter of claim 8, wherein the arithmetic processing circuit performs a filtering operation on the zero-crossing time array to generate a filter. After the data, the operation processing circuit calculates the ultrasonic flow rate based on the filtered data. The ultrasonic flowmeter of claim 8, wherein the filtering operation is a median average filtering operation. An ultrasonic flow measurement method includes: generating a multi-stage trigger signal; comparing a supersonic echo with the multi-stage trigger signal to output a first comparison signal by a pre-trigger comparator; and crossing a zero point Comparing the ultrasonic echo with a reference level to output a second comparison signal; performing an intersection operation between the first comparison signal and the second comparison signal to output a zero-cross digital signal And calculating an ultrasonic flow based on the zero-crossing digital signal. The ultrasonic flow measurement method of claim 11, further comprising: performing a reverse intersection operation on the first comparison signal and a reset signal to generate a latch signal, wherein the latch signal controls the pre-trigger The latch state of the comparator. The ultrasonic flow measurement method of claim 11, wherein the multi-stage trigger signal comprises a plurality of pre-trigger levels, the pre-trigger levels are sequentially generated, and the pre-trigger levels are In sequence increment, the zero-crossing digital signal includes an adjacent one of a pre-trigger digital pulse and a zero-crossing digital pulse, the pre-trigger digital pulse being generated first, and the zero-crossing digital pulse is closest to the pre-trigger digital pulse . The method for measuring ultrasonic wave flow according to claim 13, wherein the calculating step comprises: calculating a flight time according to the zero-crossing digital pulse; and calculating the super time according to the difference of flight time between the two sets of ultrasonic probes Sound wave flow. The ultrasonic flow measurement method of claim 13, further comprising: calculating a maximum amplitude of the ultrasonic echo according to the pre-trigger digital pulse. The method for measuring ultrasonic flow as described in claim 15 further includes: using the maximum amplitude as a feedback signal of a variable gain amplifier. The method for measuring the ultrasonic flow according to claim 15, further comprising: calculating a timeout period, wherein the pre-trigger levels include one of the first pre-trigger levels and a second pre-trigger level. And the second pre-trigger level is greater than the first pre-trigger level; wherein, when the multi-stage trigger signal is equal to the first pre-trigger level, the pre-trigger digit pulse is received during the timeout period; When the multi-stage trigger signal is equal to the second pre-trigger level, the pre-trigger digit pulse cannot be received within the timeout period, and the first pre-trigger level is selected as the maximum amplitude. For example, the ultrasonic flow measurement method described in claim 13 The method includes: generating a plurality of zero-crossing time arrays according to the zero-crossing digital signal, wherein the zero-crossing time arrays respectively correspond to the pre-trigger levels. The method for measuring ultrasonic wave flow according to claim 18, wherein the calculating step performs a filtering operation on the zero-crossing time array to generate a filtered data, and then calculating the super based on the filtered data. Sound wave flow. The ultrasonic flow measurement method according to claim 18, wherein the filtering operation is a median value average filtering operation.