TW201440426A - Network resistor - Google Patents

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TW201440426A
TW201440426A TW102113303A TW102113303A TW201440426A TW 201440426 A TW201440426 A TW 201440426A TW 102113303 A TW102113303 A TW 102113303A TW 102113303 A TW102113303 A TW 102113303A TW 201440426 A TW201440426 A TW 201440426A
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resistor
elements
resistance
group
resistance value
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TW102113303A
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TWI514759B (en
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Liang-cai ZHENG
xiang-an Huang
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Ali Zhuhai Corp
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Abstract

A network resistor including a plurality of resistor groups and at least one second resistor element is provided. The resistor groups respectively include a plurality of first resistor elements, and each of the first resistor elements has a first resistance. The second resistor element and the resistor groups are arranged interlacedly, and the second resistor element has a second resistance different from the first resistance.

Description

排阻器 Exclusion resistor

本發明是有關於一種排阻器,且特別是有關於一種可提升信號傳輸品質的排阻器。 The present invention relates to a resistor, and more particularly to a resistor that improves signal transmission quality.

隨著製程的演進與技術的進步,如中央處理器(Central Processing Unit,CPU)或動態隨機存取記憶體(DRAM)等電路組件的工作速率也越來越快。對於印刷電路板佈局設計(Printed Circuit Board Layout Design)而言,電路組件的工作速率提升也意味著佈局設計的困難度相對的增加。 As process evolution and technology advances, circuit components such as Central Processing Units (CPUs) or Dynamic Random Access Memory (DRAMs) are also operating faster. For Printed Circuit Board Layout Design, the increased operating speed of circuit components also means that the difficulty of layout design is relatively increased.

電阻是電路設計中經常使用到的基本電子元件。在印刷電路板佈局中,電阻可利用單電阻或是排阻的形式來實現。其中,由於單電阻焊盤較大,故在高速信號傳輸時很容易造成信號的損耗,進而使得信號傳輸品質降低。此外,相較於排阻而言,使用單電阻也會使得電路佈局的走線長度增長,導致印刷電路板的面積增大。 Resistors are the basic electronic components that are often used in circuit design. In a printed circuit board layout, the resistor can be implemented in the form of a single resistor or an exclusion resistor. Among them, since the single-resistance pad is large, it is easy to cause signal loss during high-speed signal transmission, thereby degrading the signal transmission quality. In addition, the use of a single resistor also increases the trace length of the circuit layout compared to the exclusion, resulting in an increase in the area of the printed circuit board.

因此,在高速電路的佈局中,一般會採用4輸入引腳(pin) -4輸出引腳的排阻。此類型的排阻通常包含有4個電阻值相同的電阻元件,藉以提供兩組高速信號的信號傳輸路徑,其中由於各個電阻元件之間的距離相當接近,因此可節省電路佈局的面積。 Therefore, in the layout of high-speed circuits, 4 input pins are generally used. -4 Output pin exclusion. This type of exclusion usually includes four resistive elements of the same resistance value, thereby providing a signal transmission path for two sets of high-speed signals, wherein the area of the circuit layout can be saved because the distance between the respective resistive elements is relatively close.

然而,也因為各個電阻元件之間的距離相當接近,當高速信號傳遞時,在各個電阻元件所提供的信號傳輸路徑之間也很容易發生串音干擾(cross-talk)的問題。此外,對於高速信號而言,在此類型排阻器中並沒有完整的接地信號可作為參考。而上述的問題皆會使得高速信號的傳輸品質降低。 However, also because the distance between the respective resistive elements is relatively close, crosstalk is prone to crosstalk between the signal transmission paths provided by the respective resistive elements when high speed signals are transmitted. In addition, for high speed signals, there is no complete ground signal in this type of resistor for reference. All of the above problems will reduce the transmission quality of high-speed signals.

有鑑於此,本發明提供一種排阻器,其可有效地提升電路板上的信號傳輸品質。 In view of this, the present invention provides an ohmic resistor that can effectively improve signal transmission quality on a circuit board.

本發明的排阻器包括多個電阻群組以及至少一個第二電阻元件。所述多個電阻群組分別包括多個第一電阻元件,且各個第一電阻元件具有第一電阻值。第二電阻元件與所述多個電阻群組交錯配置,其中第二電阻元件具有相異於第一電阻值的第二電阻值。 The resistor of the present invention includes a plurality of resistor groups and at least one second resistor element. The plurality of resistor groups respectively include a plurality of first resistance elements, and each of the first resistance elements has a first resistance value. The second resistive element is interleaved with the plurality of resistor groups, wherein the second resistive element has a second resistance value that is different from the first resistance value.

在本發明一實施例中,電阻群組包括第一與第二電阻群組,其中第一與第二電阻群組分別包括二第一電阻元件。該第二電阻元件配置於第一與第二電阻群組之間。 In an embodiment of the invention, the resistor group includes first and second resistor groups, wherein the first and second resistor groups respectively comprise two first resistor elements. The second resistive element is disposed between the first and second resistor groups.

在本發明一實施例中,電阻群組更包括第三電阻群組,其中第三電阻群組包括二第一電阻元件。該些第二電阻元件其中 之一配置於第一與第二電阻群組之間,且第二電阻元件其中之另一配置於第二與第三電阻群組之間。 In an embodiment of the invention, the resistor group further includes a third resistor group, wherein the third resistor group includes two first resistor elements. The second resistive elements One of the second resistor elements is disposed between the first and second resistor groups, and the other of the second resistor elements is disposed between the second and third resistor groups.

在本發明一實施例中,排阻器更包括多個輸入引腳以及多個輸出引腳。所述多個輸入引腳分別耦接第一電阻元件以及第二電阻元件的一端。所述多個輸出引腳分別耦接第一電阻元件以及第二電阻元件的另一端。第二電阻元件適於耦接至一接地端。 In an embodiment of the invention, the resistor further includes a plurality of input pins and a plurality of output pins. The plurality of input pins are respectively coupled to the first resistance element and one end of the second resistance element. The plurality of output pins are respectively coupled to the first resistance element and the other end of the second resistance element. The second resistive element is adapted to be coupled to a ground terminal.

本發明的排阻器包括n+1個電阻群組以及n個第二電阻元件,其中n大於或等於1,且為正整數。各個電阻群組包括2個第一電阻元件,且各個第一電阻元件具有第一電阻值。各個第二電阻元件與各個電阻群組交錯配置,其中各個第二電阻元件具有相異於第一電阻值的第二電阻值。 The resistor of the present invention includes n+1 resistor groups and n second resistor elements, where n is greater than or equal to 1, and is a positive integer. Each of the resistor groups includes two first resistance elements, and each of the first resistance elements has a first resistance value. Each of the second resistive elements is alternately arranged with each of the resistor groups, wherein each of the second resistive elements has a second resistance value that is different from the first resistance value.

在本發明一實施例中,排阻器更包括3n+2個輸入引腳以及3n+2個輸出引腳。所述輸入引腳分別耦接第一電阻元件以及第二電阻元件的一端。所述輸出引腳分別耦接第一電阻元件以及第二電阻元件的另一端。 In an embodiment of the invention, the resistor further includes 3n+2 input pins and 3n+2 output pins. The input pins are respectively coupled to the first resistive element and one end of the second resistive element. The output pins are respectively coupled to the first resistance element and the other end of the second resistance element.

本發明的排阻器包括至少一個電阻群組以及多個第二電阻元件。電阻群組包括多個第一電阻元件,且各個第一電阻元件具有第一電阻值。所述多個第二電阻元件分別與電阻群組交錯配置,其中各個第二電阻元件具有相異於第一電阻值的第二電阻值。 The resistor of the present invention includes at least one resistor group and a plurality of second resistor elements. The resistor group includes a plurality of first resistance elements, and each of the first resistance elements has a first resistance value. The plurality of second resistive elements are respectively staggered with the resistance group, wherein each of the second resistive elements has a second resistance value different from the first resistance value.

在本發明一實施例中,電阻群組包括第一電阻群組。第一電阻群組包括二第一電阻元件,其中第一電阻群組配置於所述多個第二電阻元件其中之一與其中之另一之間。 In an embodiment of the invention, the resistor group includes a first group of resistors. The first resistance group includes two first resistance elements, wherein the first resistance group is disposed between one of the plurality of second resistance elements and the other of the plurality of second resistance elements.

在本發明一實施例中,電阻群組更包括第二電阻群組。第二電阻群組包括二第一電阻元件,其中第二電阻群組配置於其中之另一第二電阻元件與所述多個第二電阻元件其中之又一之間。 In an embodiment of the invention, the resistor group further includes a second resistor group. The second resistance group includes two first resistance elements, wherein the second resistance group is disposed between the other of the second resistance elements and the other of the plurality of second resistance elements.

在本發明一實施例中,排阻器更包括多個輸入引腳以及多個輸出引腳。所述多個輸入引腳分別耦接第一電阻元件以及第二電阻元件的一端。所述多個輸出引腳分別耦接第一電阻元件以及第二電阻元件的另一端。 In an embodiment of the invention, the resistor further includes a plurality of input pins and a plurality of output pins. The plurality of input pins are respectively coupled to the first resistance element and one end of the second resistance element. The plurality of output pins are respectively coupled to the first resistance element and the other end of the second resistance element.

基於上述,本發明實施例提出一種排阻器,所述之排阻器配置有多個具有不同電阻值的電阻元件,且不同電阻值之電阻元件之間是以交錯排列的方式配置於排阻器中。在應用所述排阻器設計電路板的佈線結構時,設計者可透過將具有第一電阻值的電阻元件耦接至對應的信號線並且將具有第二電阻值的電阻元件耦接至接地網路的配置方式,使得各組信號線之間的耦合現象被接地信號所屏蔽,進而抑制信號線之間的串音干擾並且使得信號傳輸的品質提升。 Based on the above, an embodiment of the present invention provides a resistor device, wherein the resistor is configured with a plurality of resistor elements having different resistance values, and the resistor elements of different resistance values are arranged in a staggered manner on the resistors. In the device. When applying the wiring structure of the circuit breaker design circuit board, the designer can couple the resistance element having the first resistance value to the corresponding signal line and couple the resistance element having the second resistance value to the ground net The way of the road configuration is such that the coupling phenomenon between the signal lines of each group is shielded by the ground signal, thereby suppressing crosstalk interference between the signal lines and improving the quality of the signal transmission.

為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。 The above described features and advantages of the invention will be apparent from the following description.

10、10’‧‧‧電路板 10, 10'‧‧‧ boards

100、200、200_1~200_3、400、500、600、600_1~600_7、800‧‧‧排阻器 100, 200, 200_1~200_3, 400, 500, 600, 600_1~600_7, 800‧‧ ‧ Exclusions

110、210_1、210_2、410_1、410_2、410_3、510、610、810_1、810_2‧‧‧電阻群組 110, 210_1, 210_2, 410_1, 410_2, 410_3, 510, 610, 810_1, 810_2‧‧‧ resistance group

112、212_1~212_4、412_1~412_6、512、612_1、612_2、812_1~812_4‧‧‧第一電阻元件 112, 212_1~212_4, 412_1~412_6, 512, 612_1, 612_2, 812_1~812_4‧‧‧ first resistance element

120、220、420_1、420_2、520、620_1、620_2、820_1~820_3‧‧‧第二電阻元件 120, 220, 420_1, 420_2, 520, 620_1, 620_2, 820_1~820_3‧‧‧ second resistive element

GND‧‧‧接地端 GND‧‧‧ ground terminal

IP‧‧‧輸入引腳 IP‧‧‧ input pin

OP‧‧‧輸出引腳 OP‧‧‧ output pin

TL‧‧‧信號線 TL‧‧‧ signal line

TLP‧‧‧信號線對 TLP‧‧‧ signal pair

VIA‧‧‧貫孔 VIA‧‧‧Tongkong

圖1為本發明一實施例之排阻器的示意圖。 1 is a schematic view of a resistor according to an embodiment of the present invention.

圖2為依照圖1之一實施例的排阻器的結構示意圖。 2 is a schematic structural view of a resistor according to an embodiment of FIG. 1.

圖3為應用圖2之排阻器的電路板的佈線結構示意圖。 3 is a schematic view showing the wiring structure of a circuit board to which the resistor of FIG. 2 is applied.

圖4為依照圖1之另一實施例的排阻器的結構示意圖。 4 is a schematic structural view of a resistor according to another embodiment of FIG. 1.

圖5為本發明另一實施例之排阻器的示意圖。 FIG. 5 is a schematic diagram of a resistor according to another embodiment of the present invention.

圖6為依照圖5之一實施例的排阻器的結構示意圖。 FIG. 6 is a schematic structural view of a resistor according to an embodiment of FIG. 5. FIG.

圖7為應用圖6之排阻器的電路板的佈線結構示意圖。 FIG. 7 is a schematic diagram showing the wiring structure of a circuit board to which the resistor of FIG. 6 is applied.

圖8為依照圖5之另一實施例的排阻器的結構示意圖。 FIG. 8 is a schematic structural view of a resistor according to another embodiment of FIG. 5. FIG.

本發明實施例提出一種排阻器,所述之排阻器配置有多個具有不同電阻值的電阻元件,且不同電阻值之電阻元件之間是以交錯排列的方式配置於排阻器中。在應用所述排阻器設計電路板的佈線結構時,設計者可透過將具有第一電阻值的電阻元件耦接至對應的信號線並且將具有第二電阻值的電阻元件耦接至接地網路的配置方式,使得各組信號線之間的耦合現象被接地信號(ground signal)所屏蔽,進而抑制信號線之間的串音干擾並且使得信號傳輸的品質提升。為了使本揭露之內容更容易明瞭,以下特舉實施例作為本揭露確實能夠據以實施的範例。另外,凡可能之處,在圖式及實施方式中使用相同標號的元件/構件/步驟代表相同或類似部分。 The embodiment of the invention provides a resistor device, wherein the resistor is configured with a plurality of resistor elements having different resistance values, and the resistor elements of different resistance values are arranged in a staggered manner in the resistor. When applying the wiring structure of the circuit breaker design circuit board, the designer can couple the resistance element having the first resistance value to the corresponding signal line and couple the resistance element having the second resistance value to the ground net The way of the road configuration is such that the coupling phenomenon between the signal lines of each group is shielded by a ground signal, thereby suppressing crosstalk interference between the signal lines and improving the quality of the signal transmission. In order to make the content of the present disclosure easier to understand, the following specific embodiments are examples that can be implemented by the present disclosure. In addition, wherever possible, the elements and/

圖1為本發明一實施例之排阻器的示意圖。請參照圖1,排阻器100包括多個電阻群組110以及至少一個第二電阻元件 120。電阻群組110中包括多個第一電阻元件112,且各個第一電阻元件112具有第一電阻值。第二電阻元件120與電阻群組110交錯配置,並且第二電阻元件120具有相異於第一電阻值的第二電阻值。 1 is a schematic view of a resistor according to an embodiment of the present invention. Referring to FIG. 1 , the resistor 100 includes a plurality of resistor groups 110 and at least one second resistor element. 120. A plurality of first resistive elements 112 are included in the resistor group 110, and each of the first resistive elements 112 has a first resistance value. The second resistive element 120 is staggered with the resistor group 110, and the second resistive element 120 has a second resistance value that is different from the first resistance value.

更具體地說,在排阻器100中,每n+1個電阻群組110會對應配置有n個第二電阻元件120,並且各個第二電阻元件120會與電阻群組110相互交錯排列,其中n為正整數,且其數值可根據設計需求而更動。亦即,在排阻器100中,每兩個電阻群組110之間即配置有一個第二電阻元件。 More specifically, in the resistor 100, each n+1 resistor group 110 is correspondingly configured with n second resistor elements 120, and each of the second resistor elements 120 is staggered with the resistor group 110. Where n is a positive integer and its value can be changed according to design requirements. That is, in the resistor 100, a second resistance element is disposed between every two resistance groups 110.

舉例來說,以每個電阻群組110中包括2個第一電阻元件112為例,若n=1,則排阻器100會包括5個電阻元件112與120,其中各個電阻元件112與120由上至下(相對於圖式所繪示之方向)的排列順序為112→112→120→112→112;若n=2,則排阻器100會包括8個電阻元件112與120,其中各個電阻元件112與120由上至下的排列順序為112→112→120→112→112→120→112→112,其餘配置皆可以此類推。 For example, taking two first resistive elements 112 in each resistor group 110 as an example, if n=1, the resistor 100 will include five resistive elements 112 and 120, wherein each resistive element 112 and 120 The order of arrangement from top to bottom (relative to the direction shown in the drawing) is 112→112→120→112→112; if n=2, the resistor 100 will include 8 resistance elements 112 and 120, wherein The order of arrangement of the respective resistance elements 112 and 120 from top to bottom is 112→112→120→112→112→120→112→112, and the rest of the configurations can be deduced by analogy.

為了更進一步地說明本發明實施例,圖2為依照圖1之一實施例的排阻器的結構示意圖,圖3為應用圖2之排阻器的電路板的佈線結構示意圖。 2 is a schematic structural view of a resistor according to an embodiment of FIG. 1, and FIG. 3 is a schematic diagram of a wiring structure of a circuit board to which the resistor of FIG. 2 is applied.

請先參照圖2,排阻器200包括電阻群組210_1與210_2以及第二電阻元件220,其中電阻群組210_1與210_2分別包括兩 第一電阻元件212_1~212_2與212_3~212_4。此外,排阻器200還包括多個用以與外部電路相互耦接的輸入引腳(pin)IP與輸出引腳OP,其中各個輸入引腳IP分別耦接第一電阻元件212_1~212_4及第二電阻元件220的一端,且各個輸出引腳OP分別耦接第一電阻元件212_1~212_4及第二電阻元件220的另一端。換言之,在本實施例的配置下,排阻器200具有5引腳輸入-5引腳輸出的結構。 Referring first to FIG. 2, the resistor 200 includes resistor groups 210_1 and 210_2 and a second resistor element 220, wherein the resistor groups 210_1 and 210_2 respectively include two The first resistance elements 212_1~212_2 and 212_3~212_4. In addition, the resistors 200 further include a plurality of input pins IP and output pins OP for coupling with external circuits, wherein the respective input pins IP are respectively coupled to the first resistance elements 212_1 212 212_4 and One end of the two resistive elements 220, and each of the output pins OP is coupled to the other ends of the first resistive elements 212_1 212212_4 and the second resistive element 220, respectively. In other words, in the configuration of the present embodiment, the resistor 200 has a structure of a 5-pin input-5 pin output.

從排阻器200的具體應用觀點來看,請同時參照圖2與圖3,電路板10的佈線結構包括信號線對TLP、貫孔VIA、接地端GND、排阻器200_1~200_3以及其他電子元件(例如電容器、電感器或電晶體等)(未繪示)。在本實施例中,電路板10例如為具有雙層板結構的印刷電路板。每一信號線對TLP包括兩條信號線TL,其中一個信號線對TLP可用以傳遞一組傳輸信號。貫孔VIA與接地端GND會相互電性連接以形成一接地網路,其中所述接地網路提供一接地信號作為電路板10上各個傳輸信號的參考。此外,排阻器200_1~200_3為圖2所示之排阻器200在電路板10上之實體佈線結構。 From the viewpoint of the specific application of the resistor 200, please refer to FIG. 2 and FIG. 3 at the same time, the wiring structure of the circuit board 10 includes a signal line pair TLP, a through hole VIA, a ground GND, a resistors 200_1~200_3, and other electronic Components (such as capacitors, inductors or transistors, etc.) (not shown). In the present embodiment, the circuit board 10 is, for example, a printed circuit board having a two-layer board structure. Each signal line pair TLP includes two signal lines TL, one of which can be used to transfer a set of transmission signals. The via VIA and the ground GND are electrically connected to each other to form a ground network, wherein the ground network provides a ground signal as a reference for each transmission signal on the circuit board 10. Further, the resistors 200_1 200 200_3 are physical wiring structures of the resistors 200 shown in FIG. 2 on the circuit board 10.

詳細而言,設計者可根據需求而選用具有特定且非零之電阻值的電阻元件作為各個排阻器200_1~200_3中的第一電阻元件212_1~212_4,並且選用電阻值實質上等於0歐姆的電阻元件作為各個排阻器200_1~200_3中的第二電阻元件220。在實際的應用中,第二電阻元件220可利用低阻抗導線來實現,但本發明不以 此為限。 In detail, the designer can select a resistive element having a specific and non-zero resistance value as the first resistive element 212_1~212_4 among the respective resistors 200_1~200_3 according to requirements, and select a resistance value substantially equal to 0 ohm. The resistive element serves as the second resistive element 220 of each of the resistors 200_1 200 200_3. In practical applications, the second resistive element 220 can be implemented using a low impedance wire, but the present invention does not This is limited.

此外,應注意的是,本領域通常知識者應可了解”電阻值實質上等於0歐姆”是指電阻值趨近於一甚小之數值,使得第二電阻元件220之兩端可視為互相短路連接,而並非指第二電阻元件220的電阻值完全等於0。 In addition, it should be noted that those skilled in the art should understand that the "resistance value is substantially equal to 0 ohm" means that the resistance value approaches a very small value so that both ends of the second resistive element 220 can be regarded as short-circuited to each other. The connection does not mean that the resistance value of the second resistance element 220 is completely equal to zero.

在電路板10中,各個排阻器200_1~200_3的第一電阻元件212_1~212_4會分別透過對應的輸入引腳IP與輸出引腳OP耦接對應的信號線TL,藉以提供具有特定電阻值的信號傳輸路徑。其中,一個電阻群組(如210_1或210_2)可作為一組傳輸信號的信號傳輸路徑。另外,各個排阻器200_1~200-3的第二電阻元件220會分別透過對應的輸入引腳IP與輸出引腳OP耦接鄰近的貫孔VIA或接地端GND,以共同耦接至接地網路。 In the circuit board 10, the first resistance elements 212_1~212_4 of the respective resistors 200_1~200_3 are respectively coupled to the corresponding signal lines TL through the corresponding input pins IP and the output pins OP, thereby providing a specific resistance value. Signal transmission path. Among them, a resistance group (such as 210_1 or 210_2) can be used as a signal transmission path for a group of transmission signals. In addition, the second resistive elements 220 of the respective resistors 200_1 200-200-3 are respectively coupled to the adjacent vias VIA or ground GND through corresponding input pins IP and output pins OP to be commonly coupled to the ground grid. road.

根據上述的配置,由於在各個排阻器200_1~200-3中,每一組傳輸信號之間皆會間隔一個可視為短路到接地網路的第二電阻元件220,使得每一組傳輸信號之間的耦合現象會受到第二電阻元件220上的接地信號所屏蔽,進而抑制了傳輸信號之間的串音干擾。此外,在排阻器200_1~200_3中,每一組傳輸信號都可利用相鄰的第二電阻元件220上的接地信號作為參考,使得傳輸信號較不易產生失真(distortion)的現象。再者,相較於傳統的4輸入引腳-4輸出引腳的排阻器而言,由於本實施例之排阻器200僅增加了一個電阻元件,因此整體的體積並不會與傳統的排阻器有太大的差異。 According to the above configuration, in each of the resistors 200_1~200-3, each group of transmission signals is separated by a second resistance element 220 which can be regarded as a short circuit to the ground network, so that each group transmits signals. The coupling phenomenon between the two is blocked by the ground signal on the second resistive element 220, thereby suppressing crosstalk interference between the transmitted signals. In addition, in the resistors 200_1~200_3, each group of transmission signals can use the ground signal on the adjacent second resistance element 220 as a reference, so that the transmission signal is less likely to cause distortion. Moreover, compared with the conventional 4-input pin-4 output pin resistor, since the resistor device 200 of the embodiment only adds one resistor element, the overall volume is not the same as the conventional one. There are too many differences in the resistors.

應注意的是,圖3所繪示之電路板10的佈線結構僅為示意本發明實施例之排阻器200的應用,其中電路板10上的各個電子元件間的相對配置實際上會根據電路設計者的設計考量而有所更動,本發明不以此為限。 It should be noted that the wiring structure of the circuit board 10 illustrated in FIG. 3 is only for the application of the resistor device 200 of the embodiment of the present invention, wherein the relative arrangement between the various electronic components on the circuit board 10 is actually according to the circuit. The design considerations of the designer are changed, and the invention is not limited thereto.

圖4為依照圖1之另一實施例的排阻器的結構示意圖。請參照圖4,排阻器400包括電阻群組410_1~410_3以及第二電阻元件420_1與420_2,其中電阻群組410_1~410_3分別包括兩第一電阻元件412_1~412_2、412_3~412_4以及412_5~412_6。此外,排阻器400同樣包括多個輸入引腳IP與輸出引腳OP,其中各個輸入引腳IP分別耦接第一電阻元件412_1~412_6及第二電阻元件420_1與420_2的一端,且各個輸出引腳OP分別耦接第一電阻元件412_1~412_6及第二電阻元件420_1與420_2的另一端。 4 is a schematic structural view of a resistor according to another embodiment of FIG. 1. Referring to FIG. 4, the resistor 400 includes resistor groups 410_1~410_3 and second resistor elements 420_1 and 420_2, wherein the resistor groups 410_1~410_3 include two first resistor elements 412_1~412_2, 412_3~412_4, and 412_5~412_6, respectively. . In addition, the resistor 400 also includes a plurality of input pins IP and an output pin OP, wherein each of the input pins IP is coupled to one ends of the first resistance elements 412_1 412 412_6 and the second resistance elements 420_1 and 420_2, and each output The pin OP is coupled to the other ends of the first resistance elements 412_1 412 412_6 and the second resistance elements 420_1 and 420_2, respectively.

相較於圖2的排阻器200而言,本實施例的排阻器400具有8引腳輸入-8引腳輸出的結構。除此之外,排阻器400在結構上與應用上的特性皆與排阻器200大致相同,故相同或相似部分請參照前述實施例,於此不再重複贅述。 Compared to the resistor 200 of FIG. 2, the resistor 400 of the present embodiment has an 8-pin input-8 pin output structure. In addition, the structural and application characteristics of the resistors 400 are substantially the same as those of the resistors 200. Therefore, the same or similar parts are referred to the foregoing embodiments, and the detailed description thereof will not be repeated.

根據圖2與圖4實施例所教示之內容,圖1實施例所繪示之排阻器100的多種實施態樣已經被充分地支持。於本領域具有通常知識者應可自圖1至圖3實施例而自行推知其他不同引腳數目的排阻器架構,本發明並不僅限於上述實施例所示之實施態樣。 According to the teachings of the embodiment of FIG. 2 and FIG. 4, various embodiments of the resistor 100 illustrated in the embodiment of FIG. 1 have been sufficiently supported. Those skilled in the art should be able to infer the other different pin count resistors from the embodiment of FIG. 1 to FIG. 3, and the present invention is not limited to the embodiment shown in the above embodiment.

圖5為本發明另一實施例之排阻器的示意圖。排阻器500 包括至少一個電阻群組510以及多個第二電阻元件520。電阻群組510中包括多個第一電阻元件512,且各個第一電阻元件512具有第一電阻值。第二電阻元件520與電阻群組510交錯配置,並且第二電阻元件520具有相異於第一電阻值的第二電阻值。 FIG. 5 is a schematic diagram of a resistor according to another embodiment of the present invention. Exclusion device 500 At least one resistor group 510 and a plurality of second resistive elements 520 are included. A plurality of first resistive elements 512 are included in the resistor group 510, and each of the first resistive elements 512 has a first resistance value. The second resistive element 520 is interleaved with the resistor group 510, and the second resistive element 520 has a second resistance value that is different from the first resistance value.

更具體地說,在排阻器500中,每n個電阻群組510會對應配置有n+1個第二電阻元件520,並且各個第二電阻元件520會與電阻群組510相互交錯排列。亦即,在排阻器500中,每兩個第二電阻元件520之間即配置有一個電阻群組510。 More specifically, in the resistor 500, n+1 second resistance elements 520 are correspondingly arranged for each n resistance groups 510, and each of the second resistance elements 520 is staggered with the resistance group 510. That is, in the resistor 500, a resistance group 510 is disposed between every two second resistance elements 520.

舉例來說,以每個電阻群組510中包括2個第一電阻元件512為例,若n=1,則排阻器500會包括4個電阻元件512與520,其中各個電阻元件512與520由上至下(相對於圖式所繪示之方向)的排列順序為520→512→512→520;若n=2,則排阻器500會包括7個電阻元件512與520,其中各個電阻元件512與520由上至下的排列順序為520→512→512→520→512→512→520,其於配置皆可以此類推。 For example, taking two first resistive elements 512 in each resistor group 510 as an example, if n=1, the resistor 500 will include four resistive elements 512 and 520, wherein each resistive element 512 and 520 The order of arrangement from top to bottom (relative to the direction shown in the drawing) is 520→512→512→520; if n=2, the resistor 500 will include 7 resistance elements 512 and 520, wherein each resistor The order of the elements 512 and 520 from top to bottom is 520→512→512→520→512→512→520, which can be deduced in the configuration.

為了更進一步地說明本發明實施例,圖6為依照圖5之一實施例的排阻器的結構示意圖,圖7為應用圖5之排阻器的電路板的佈線結構示意圖。 In order to further illustrate the embodiments of the present invention, FIG. 6 is a schematic structural view of a resistor according to an embodiment of FIG. 5, and FIG. 7 is a schematic diagram of a wiring structure of a circuit board to which the resistor of FIG. 5 is applied.

請先參照圖6,排阻器600包括電阻群組610以及第二電阻元件620_1與620_2,其中電阻群組610包括兩第一電阻元件612_1與612_2。此外,排阻器400還包括多個用以與外部電路相互偶接的輸入引腳IP與輸出引腳OP,其中各個輸入引腳IP分別 耦接第一電阻元件612_1與612_2以及第二電阻元件620_1與620_2的一端,且各個輸出引腳OP分別耦接第一電阻元件612_1與612_2及第二電阻元件620_1與620_2的另一端。換言之,在本實施例的配置下,排阻器600具有4引腳輸入-4引腳輸出的結構。 Referring first to FIG. 6, the resistor 600 includes a resistor group 610 and second resistive elements 620_1 and 620_2, wherein the resistor group 610 includes two first resistive elements 612_1 and 612_2. In addition, the resistor 400 further includes a plurality of input pins IP and an output pin OP for coupling with external circuits, wherein each input pin IP is respectively One ends of the first resistance elements 612_1 and 612_2 and the second resistance elements 620_1 and 620_2 are coupled, and the respective output pins OP are coupled to the other ends of the first resistance elements 612_1 and 612_2 and the second resistance elements 620_1 and 620_2, respectively. In other words, in the configuration of the present embodiment, the resistor 600 has a structure of a 4-pin input - 4 pin output.

從排阻器600的具體應用觀點來看,請同時參照圖6與圖7,電路板10’的佈線結構包括信號線TL、貫孔VIA、接地端GND、排阻器600_1~600_7以及其他電子元件(例如電容器、電感器或電晶體等)(未繪示)。在本實施例中,電路板10’與前述圖3實施例的電路板10大致相同,兩者間的差異僅在於所應用的排阻器類型不同,故相同或相似的部分請參照上述實施例的說明,於此不再贅述。此外,排阻器600_1~600_7為圖6所示之排阻器600在電路板10’上之實體佈線結構。 From the viewpoint of the specific application of the resistor 600, please refer to FIG. 6 and FIG. 7 at the same time, the wiring structure of the circuit board 10' includes the signal line TL, the through hole VIA, the ground GND, the resistors 600_1~600_7, and other electronic Components (such as capacitors, inductors or transistors, etc.) (not shown). In this embodiment, the circuit board 10' is substantially the same as the circuit board 10 of the foregoing embodiment of FIG. 3, and the difference between the two is only in the type of the resistors to be applied. Therefore, the same or similar parts are referred to the above embodiment. The description of this will not be repeated here. Further, the resistors 600_1 to 600_7 are physical wiring structures of the resistor 600 shown in Fig. 6 on the board 10'.

詳細而言,設計者可根據需求而選用具有特定且非零之電阻值的電阻元件作為各個排阻器600_1~600_7中的第一電阻元件612_1與612_2,並且選用電阻值實質上等於0歐姆的電阻元件作為各個排阻器600_1~600_7中的第二電阻元件620。 In detail, the designer may select a resistance element having a specific and non-zero resistance value as the first resistance elements 612_1 and 612_2 among the respective resistors 600_1 600 600_7 according to requirements, and select a resistance value substantially equal to 0 ohm. The resistive element serves as the second resistive element 620 of each of the resistors 600_1 600 600_7.

在電路板10’中,各個排阻器600_1~600_7的第一電阻元件612_1與612_2會分別透過對應的輸入引腳IP與輸出引腳OP耦接對應的信號線TL,藉以提供具有特定電阻值的信號傳輸路徑。其中,一個電阻群組(如610)可作為一組傳輸信號的信號傳輸路徑。另外,各個排阻器600_1~600_7的第二電阻元件620_1 與620-2會分別透過對應的輸入引腳IP與輸出引腳OP耦接鄰近的貫孔VIA或接地端GND,以共同耦接至接地網路。 In the circuit board 10', the first resistance elements 612_1 and 612_2 of the respective resistors 600_1~600_7 are respectively coupled to the corresponding signal lines TL through the corresponding input pins IP and the output pins OP, thereby providing a specific resistance value. Signal transmission path. Among them, a resistor group (such as 610) can be used as a signal transmission path for transmitting signals. In addition, the second resistance elements 620_1 of the respective resistors 600_1 600 600_7 The 620-2 and the output pin OP are respectively coupled to the adjacent through hole VIA or the ground GND through the corresponding input pin IP to be coupled to the ground network.

根據上述的配置,由於在各個排阻器600_1~600_7中,每一組傳輸信號的兩側都配置有可視為短路到接地網路的第二電阻元件620_1與620_2,使得各個排阻器600_1~600_7所對應的傳輸信號之間的耦合現象會受到第二電阻元件620_1與620_2上的接地信號所屏蔽,進而抑制了傳輸信號之間的串音干擾。此外,在排阻器600_1~600_7中,每一組傳輸信號都可利用相鄰的第二電阻元件620_1與620_2上的接地信號作為參考,使得傳輸信號較不易產生失真(distortion)的現象。 According to the above configuration, in each of the resistors 600_1~600_7, two resistor elements 620_1 and 620_2, which can be short-circuited to the ground network, are disposed on both sides of each group of transmission signals, so that the respective resistors 600_1~ The coupling phenomenon between the transmission signals corresponding to 600_7 is shielded by the ground signal on the second resistance elements 620_1 and 620_2, thereby suppressing crosstalk interference between the transmission signals. In addition, in the resistors 600_1~600_7, each group of transmission signals can use the ground signal on the adjacent second resistance elements 620_1 and 620_2 as a reference, so that the transmission signal is less likely to cause a distortion phenomenon.

應注意的是,圖7所繪示之電路板10’的佈線結構僅為示意本發明實施例之排阻器600的應用,其中電路板10’上的各個電子元件間的相對配置實際上會根據電路設計者的設計考量而有所更動,本發明不以此為限。 It should be noted that the wiring structure of the circuit board 10' illustrated in FIG. 7 is only for the application of the resistor 600 of the embodiment of the present invention, wherein the relative arrangement between the various electronic components on the circuit board 10' will actually According to the design considerations of the circuit designer, the invention is not limited thereto.

圖8為依照圖5之另一實施例的排阻器的結構示意圖。請參照圖8,排阻器800包括電阻群組810_1與810_2以及第二電阻元件820_1~820_3,其中電阻群組810_1與810_2分別包括兩第一電阻元件812_1~812_2以及812_3~812_4。此外,排阻器400同樣包括多個輸入引腳IP與輸出引腳OP,其中各個輸入引腳IP分別耦接第一電阻元件812_1~812_4及第二電阻元件820_1~820_3的一端,且各個輸出引腳OP分別耦接第一電阻元件812_1~812_4及第二電阻元件820_1~820_3的另一端。 FIG. 8 is a schematic structural view of a resistor according to another embodiment of FIG. 5. FIG. Referring to FIG. 8 , the resistor 800 includes resistor groups 810_1 and 810_2 and second resistance elements 820_1 ~ 820_3. The resistor groups 810_1 and 810_2 respectively include two first resistance elements 812_1 81212_2 and 812_3 812 812_4. In addition, the resistor 400 also includes a plurality of input pins IP and an output pin OP, wherein each of the input pins IP is coupled to one ends of the first resistance elements 812_1 812 812_4 and the second resistance elements 820_1 820 820_3, and each output The pins OP are respectively coupled to the other ends of the first resistance elements 812_1 812 812_4 and the second resistance elements 820_1 820 820_3.

相較於圖6的排阻器600而言,本實施例的排阻器800具有7引腳輸入-7引腳輸出的結構。除此之外,排阻器800在結構上與應用上的特性皆與排阻器600大致相同,故相同或相似部分請參照前述實施例,於此不再重複贅述。 Compared with the resistor 600 of FIG. 6, the resistor 800 of the present embodiment has a 7-pin input-7-pin output structure. In addition, the structural and application characteristics of the resistor 800 are substantially the same as those of the resistor 600. Therefore, the same or similar parts are referred to the foregoing embodiments, and details are not described herein again.

根據圖6與圖8實施例所教示之內容,圖5實施例所繪示之排阻器500的多種實施態樣已經被充分地支持。於本領域具有通常知識者應可自圖5至圖8實施例而自行推知其他不同引腳數目的排阻器架構,本發明並不僅限於上述實施例所示之實施態樣。 According to the teachings of the embodiment of FIG. 6 and FIG. 8, various embodiments of the resistor 500 illustrated in the embodiment of FIG. 5 have been sufficiently supported. Those skilled in the art should be able to infer the other different pin count resistors from the embodiment of FIG. 5 to FIG. 8 , and the present invention is not limited to the embodiment shown in the above embodiments.

綜上所述,本發明實施例提出一種排阻器,所述之排阻器配置有多個具有不同電阻值的電阻元件,且不同電阻值之電阻元件之間是以交錯排列的方式配置於排阻器中。在應用所述排阻器設計電路板的佈線結構時,設計者可透過將具有第一電阻值的電阻元件耦接至對應的信號線並且將具有第二電阻值的電阻元件耦接至接地網路的配置方式,使得各組信號線之間的耦合現象被接地信號所屏蔽,進而抑制信號線之間的串音干擾並且使得信號傳輸的品質提升。 In summary, the embodiment of the present invention provides a resistor device, wherein the resistor is configured with a plurality of resistor elements having different resistance values, and the resistor elements of different resistance values are arranged in a staggered manner. In the resistor. When applying the wiring structure of the circuit breaker design circuit board, the designer can couple the resistance element having the first resistance value to the corresponding signal line and couple the resistance element having the second resistance value to the ground net The way of the road configuration is such that the coupling phenomenon between the signal lines of each group is shielded by the ground signal, thereby suppressing crosstalk interference between the signal lines and improving the quality of the signal transmission.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

100‧‧‧排阻器 100‧‧‧Exclusions

110‧‧‧電阻群組 110‧‧‧Resistance group

112‧‧‧第一電阻元件 112‧‧‧First resistance element

120‧‧‧第二電阻元件 120‧‧‧second resistance element

Claims (14)

一種排阻器,包括:多個電阻群組,分別包括多個第一電阻元件,且各該些第一電阻元件具有一第一電阻值;以及至少一第二電阻元件,與該些電阻群組交錯配置,其中該至少一第二電阻元件具有相異於該第一電阻值的一第二電阻值。 An resistor comprising: a plurality of resistor groups each including a plurality of first resistor elements, and each of the first resistor elements has a first resistance value; and at least one second resistor element, and the resistor groups The group is staggered, wherein the at least one second resistive element has a second resistance value that is different from the first resistance value. 如申請專利範圍第1項所述的排阻器,其中該些電阻群組包括:一第一與一第二電阻群組,分別包括二第一電阻元件,其中該第二電阻元件配置於該第一與該第二電阻群組之間。 The resistor of claim 1 , wherein the resistor groups comprise: a first resistor and a second resistor group, respectively comprising two first resistor elements, wherein the second resistor component is disposed on the resistor Between the first and the second resistor group. 如申請專利範圍第2項所述的排阻器,其中該些電阻群組更包括:一第三電阻群組,包括二第一電阻元件,其中該些第二電阻元件其中之一配置於該第一與該第二電阻群組之間,且該些第二電阻元件其中之另一配置於該第二與該第三電阻群組之間。 The resistor of claim 2, wherein the resistor group further comprises: a third resistor group comprising two first resistor elements, wherein one of the second resistor elements is disposed Between the first and the second resistor group, and the other of the second resistor elements is disposed between the second and the third resistor group. 如申請專利範圍第1項所述之排阻器,更包括:多個輸入引腳,分別耦接該些第一電阻元件以及該至少一第二電阻元件的一端;以及多個輸出引腳,分別耦接該些第一電阻元件以及該至少一第二電阻元件的另一端。 The resistor of claim 1, further comprising: a plurality of input pins respectively coupled to the first resistance element and one end of the at least one second resistance element; and a plurality of output pins, The first resistance element and the other end of the at least one second resistance element are respectively coupled. 如申請專利範圍第1項所述之排阻器,其中該至少一第二電阻元件適於耦接至一接地端。 The resistor of claim 1, wherein the at least one second resistive element is adapted to be coupled to a ground. 如申請專利範圍第1項所述之排阻器,其中該至少一第二電阻元件為一低阻抗導線。 The resistor of claim 1, wherein the at least one second resistive element is a low impedance conductor. 一種排阻器,包括:n+1個電阻群組,各該些電阻群組包括2個第一電阻元件,且各該些第一電阻元件具有一第一電阻值,其中n大於或等於1,且為正整數;以及n個第二電阻元件,各該些第二電阻元件與各該些電阻群組交錯配置,其中各該些第二電阻元件具有相異於該第一電阻值的一第二電阻值。 An resistor comprising: n+1 resistor groups, each of the resistor groups includes two first resistor elements, and each of the first resistor elements has a first resistance value, wherein n is greater than or equal to 1 And a plurality of second resistance elements, each of the second resistance elements being alternately arranged with each of the resistance groups, wherein each of the second resistance elements has a different value from the first resistance value The second resistance value. 如申請專利範圍第7項所述之排阻器,更包括:3n+2個輸入引腳,分別耦接該些第一電阻元件以及該些第二電阻元件的一端;以及3n+2個輸出引腳,分別耦接該些第一電阻元件以及該些第二電阻元件的另一端。 The resistor of claim 7, further comprising: 3n+2 input pins respectively coupled to the first resistance elements and one ends of the second resistance elements; and 3n+2 outputs The pins are respectively coupled to the first resistance elements and the other ends of the second resistance elements. 一種排阻器,包括:至少一電阻群組,其中該至少一電阻群組包括多個第一電阻元件,且各該些第一電阻元件具有一第一電阻值;以及多個第二電阻元件,分別與該至少一電阻群組交錯配置,其中各該些第二電阻元件具有相異於該第一電阻值的一第二電阻值。 An resistor comprising: at least one resistor group, wherein the at least one resistor group includes a plurality of first resistance elements, and each of the first resistance elements has a first resistance value; and a plurality of second resistance elements And each of the at least one resistor group is alternately arranged, wherein each of the second resistor elements has a second resistance value different from the first resistance value. 如申請專利範圍第9項所述的排阻器,其中該至少一電阻群組包括: 一第一電阻群組,包括二第一電阻元件,其中該第一電阻群組配置於該些第二電阻元件其中之一與其中之另一之間。 The resistor of claim 9, wherein the at least one resistor group comprises: A first resistor group includes two first resistor elements, wherein the first resistor group is disposed between one of the second resistor elements and the other of the second resistor elements. 如申請專利範圍第10項所述的排阻器,其中該至少一電阻群組更包括:一第二電阻群組,包括二第一電阻元件,其中該第二電阻群組配置於該其中之另一第二電阻元件與該些第二電阻元件其中之又一之間。 The resistor of claim 10, wherein the at least one resistor group further comprises: a second resistor group including two first resistor elements, wherein the second resistor group is disposed therein Another second resistive element and another one of the second resistive elements. 如申請專利範圍第9項所述之排阻器,更包括:多個輸入引腳,分別耦接該些第一電阻元件以及該些第二電阻元件的一端;以及多個輸出引腳,分別耦接該些第一電阻元件以及該些第二電阻元件的另一端。 The resistor of claim 9, further comprising: a plurality of input pins respectively coupled to the first resistor elements and one end of the second resistor elements; and a plurality of output pins, respectively The first resistance elements and the other ends of the second resistance elements are coupled. 如申請專利範圍第9項所述之排阻器,其中該些第二電阻元件適於耦接至一接地端。 The resistor of claim 9, wherein the second resistor elements are adapted to be coupled to a ground. 如申請專利範圍第9項所述之排阻器,其中該些第二電阻元件分別為一低阻抗導線。 The resistor of claim 9, wherein the second resistor elements are each a low impedance conductor.
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